CN115001645A - Clock recovery method and device, electronic equipment and computer storage medium - Google Patents

Clock recovery method and device, electronic equipment and computer storage medium Download PDF

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CN115001645A
CN115001645A CN202210667201.1A CN202210667201A CN115001645A CN 115001645 A CN115001645 A CN 115001645A CN 202210667201 A CN202210667201 A CN 202210667201A CN 115001645 A CN115001645 A CN 115001645A
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signal
target
sampling
clock recovery
tap coefficient
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CN115001645B (en
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李岩
宋经纬
董涛
伍剑
洪小斌
郭洪翔
邱吉芳
杨智生
李蔚
左勇
殷杰
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Beijing University of Posts and Telecommunications
Space Star Technology Co Ltd
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Beijing University of Posts and Telecommunications
Space Star Technology Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0054Detection of the synchronisation error by features other than the received signal transition
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0054Detection of the synchronisation error by features other than the received signal transition
    • H04L7/0058Detection of the synchronisation error by features other than the received signal transition detection of error based on equalizer tap values

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  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

The application relates to the technical field of communication, and provides a clock recovery method and device, electronic equipment and a computer storage medium. The method comprises the following steps: sampling the analog signal according to the clock signal to obtain a sampling signal; determining a target tap coefficient according to the sampling signal; and performing convolution operation on the sampling signal and the target tap coefficient to obtain a target signal, wherein the target signal is a signal obtained by performing clock recovery on the sampling signal. According to the method and the device, the convolution operation is carried out on the sampling signal through the determined tap coefficient, so that the channel equalization can be realized while the interpolation operation is carried out on the analog signal, the problem that the complexity of the algorithm is increased due to the fact that a channel equalization algorithm is adopted at the same time when the traditional interpolation filter is adopted for clock recovery is avoided, and the efficiency of the clock recovery is effectively improved.

Description

Clock recovery method and device, electronic equipment and computer storage medium
Technical Field
The present application relates to the field of communications technologies, and in particular, to a clock recovery method and apparatus, an electronic device, and a computer storage medium.
Background
In a high-speed optical fiber communication system, the signal generator at the transmitting end and the working clock of the analog-to-digital converter at the receiving end are usually non-homologous, and a clock recovery algorithm is required to recover the signal at the optimal sampling moment. At present, a traditional interpolation filter is used in a clock recovery algorithm for interpolation operation, and the design of the traditional interpolation filter can influence the overall performance of a signal, so that the received signal suffers from serious intersymbol interference, and further, the signal deviation is large. Channel equalization algorithms are currently available to reduce inter-symbol interference, but the use of channel equalization algorithms to reduce inter-symbol interference increases the complexity of the algorithms. Therefore, the current clock recovery is inefficient.
Disclosure of Invention
The embodiment of the application provides a clock recovery method, a clock recovery device, electronic equipment and a computer storage medium, which are used for solving the technical problem that the clock recovery by adopting a traditional interpolation filter needs to adopt a channel equalization algorithm at the same time, and the adoption of the channel equalization algorithm increases the complexity of the algorithm, so that the efficiency is low when the clock recovery is carried out at present.
In a first aspect, an embodiment of the present application provides a clock recovery method, including:
sampling the analog signal according to the clock signal to obtain a sampling signal;
determining a target tap coefficient according to the sampling signal;
and performing convolution operation on the sampling signal and the target tap coefficient to obtain a target signal, wherein the target signal is a signal obtained by performing clock recovery on the sampling signal.
In one embodiment, the step of determining a target tap coefficient from the sampled signal comprises:
determining a target interpolation interval according to the sampling signal;
and determining a target tap coefficient from a preset lookup table according to the target interpolation interval, wherein the preset lookup table comprises a plurality of interpolation intervals and tap coefficients respectively corresponding to the interpolation intervals.
In one embodiment, the step of sampling the analog signal according to the clock signal to obtain a sampling signal includes:
determining a sampling frequency of a clock signal;
and sampling the analog signal according to the sampling frequency to obtain a sampling signal.
In one embodiment, after the step of performing convolution operation based on the sampling signal and the target tap coefficient to obtain the target signal, the method further includes:
and updating tap coefficients and interpolation intervals based on the target signal.
In one embodiment, the step of updating the tap coefficients based on the target signal comprises:
determining an error signal according to the target signal and a standard reference signal;
and updating data of the target tap coefficient according to the target signal, the error signal, the sampling signal, the target tap coefficient and a preset step length coefficient.
In one embodiment, the step of determining an error signal based on the target signal and a standard reference signal comprises:
and performing difference operation on the square value of the target signal and the square value of the standard reference signal to obtain an error signal.
In one embodiment, the step of updating the interpolation interval based on the target signal comprises:
calculating a timing error according to the target signal and a preset step length coefficient to obtain a timing error;
and updating data of the target interpolation interval according to the timing error and the target interpolation interval.
In a second aspect, an embodiment of the present application provides a clock recovery apparatus, including:
the sampling module is used for sampling the analog signal according to the clock signal to obtain a sampling signal;
a determining module for determining a target tap coefficient according to the sampling signal;
and the convolution module is used for performing convolution operation on the sampling signal and the target tap coefficient to obtain a target signal, wherein the target signal is a signal obtained by performing clock recovery on the sampling signal.
In a third aspect, an embodiment of the present application provides an electronic device, including a processor and a memory storing a computer program, where the processor implements the steps of the clock recovery method according to the first aspect or the second aspect when executing the program.
In a fourth aspect, the present application provides a computer storage medium, which is a computer-readable storage medium and includes a computer program, and when the computer program is executed by a processor, the computer program implements the steps of the clock recovery method according to the first aspect or the second aspect.
According to the clock recovery method, the clock recovery device, the electronic equipment and the computer storage medium, the target tap coefficient is determined through the sampling signal obtained by sampling the analog signal through the clock signal, convolution operation is carried out on the sampling signal and the target tap coefficient, the signal obtained after clock recovery is carried out on the sampling signal is used as the target signal, because the convolution operation is carried out on the sampling signal through the determined tap coefficient, channel equalization can be achieved while interpolation operation is carried out on the analog signal, the problem that the complexity of an algorithm is increased due to the fact that a traditional interpolation filter needs to be adopted for clock recovery and a channel equalization algorithm is adopted at the same time is avoided, and the efficiency of clock recovery is effectively improved.
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In order to more clearly illustrate the technical solutions in the present application or the prior art, the drawings needed for the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic flowchart of a clock recovery method according to an embodiment of the present application;
fig. 2 is a second schematic flowchart of a clock recovery method according to an embodiment of the present application;
fig. 3 is a third schematic flowchart of a clock recovery method according to an embodiment of the present application;
fig. 4 is a schematic overall flowchart of a clock recovery method according to an embodiment of the present application;
FIG. 5 is a functional block diagram of an embodiment of a clock recovery apparatus according to the present application;
fig. 6 is a schematic structural diagram of an electronic device provided in an embodiment of the present application.
Detailed Description
To make the purpose, technical solutions and advantages of the present application clearer, the technical solutions in the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Fig. 1 is a schematic flow chart of a clock recovery method according to an embodiment of the present disclosure. Referring to fig. 1, an embodiment of the present application provides a clock recovery method, which may include:
step S100, sampling an analog signal according to a clock signal to obtain a sampling signal;
the clock recovery method in the embodiment can be realized by a clock recovery program of chips which can be stored in electronic equipment such as a computer, a tablet computer, a server, a smart phone and other intelligent terminals. Specifically, the electronic device can implement a clock recovery method by executing a clock recovery program stored in a chip thereof, perform clock recovery on a sampling signal obtained by sampling an analog signal by a clock signal, and because the sampling signal is subjected to convolution operation by a determined tap coefficient when performing clock recovery on the sampling signal, the channel equalization can be realized while performing interpolation operation on the analog signal, thereby avoiding the problem that the clock recovery by adopting a traditional interpolation filter requires a channel equalization algorithm and increases the algorithm complexity, and effectively improving the efficiency when performing clock recovery.
It can be understood that, in the actual communication process of the high-speed optical fiber communication system, the sampling time is easily shifted due to the mismatch of the clock at the transceiving end. When this phenomenon occurs, it is necessary to restore the signal at the optimum sampling timing. In this embodiment, the optimal interpolation filter is stored in a lookup table in advance, and each interpolation interval corresponds to a group of tap coefficients of the filter. So that in the clock recovery algorithm, the interpolation interval can be used as an index of the lookup table to select the tap coefficient of a specific filter.
In clock recovery of analog signals, high speed communication systems are digital and therefore must be sampled for further processing. Therefore, the electronic device can input the analog signal and the clock signal into the analog-to-digital converter, and the analog signal is sampled by the analog-to-digital converter according to the clock signal to obtain a sampling signal in the form of a digital signal. The analog signal can be obtained from a transmission link, or can be obtained from an optical fiber link through a photoelectric converter and output to an analog-to-digital converter; the clock signal is provided by a clock source, which may be from a chiplet on the circuit board. The analog signal is used for information transmission, such as an optical signal in an optical fiber, and a wireless signal transmitted by a Wifi antenna. The clock signal is used to operate the whole analog-to-digital converter, which samples the analog signal at a fixed frequency, i.e. the frequency of the clock signal. Sampling the analog signal to determine a target tap coefficient according to the sampling signal; and carrying out convolution operation on the sampling signal and the target tap coefficient to obtain a target signal.
Further, the step of sampling the analog signal according to the clock signal to obtain a sampling signal includes:
step S1001, determining the sampling frequency of a clock signal;
and step S1002, sampling the analog signal according to the sampling frequency to obtain a sampling signal.
After the analog signal and the clock signal are input into the analog-to-digital converter, the clock signal is identified, and the sampling frequency of the clock signal can be obtained by identifying the clock signal because the clock signal is a sine signal or a square signal with corresponding frequency. After the sampling frequency of the clock signal is obtained, the analog signal can be sampled by the analog-to-digital converter at the sampling frequency of the clock signal, and the analog signal is converted into a signal in a digital signal form to obtain a sampling signal. For example, in the present embodiment, the analog signal is s (t), and the clock signal is s clk (t) if the sampling frequency of the clock signal is determined to be f s Then, there are:
s`(n)=s(n/fs+Δt)
wherein s' (n) is a sampling signal, and Δ t is a sampling phase error, which is a random value varying with time; f. of s Is the sampling frequency of the clock signal; s (t) is an analog signal, n is time, and n is 1,2, 3.
Step S200, determining a target tap coefficient according to the sampling signal;
after the sampling signal is obtained, an interpolation interval corresponding to the sampling signal is determined from the plurality of interpolation intervals to be used as a target interpolation interval, and a group of tap coefficients corresponding to the target interpolation interval is determined from the group of tap coefficients to be used as a target tap coefficient according to the incidence relation between each interpolation interval and each group of tap coefficients in the lookup table. And performing convolution operation on the sampling signal and the target tap coefficient to obtain a signal obtained by performing clock recovery on the sampling signal and using the signal as a target signal. Because the target tap coefficient is determined from the groups of tap coefficients through the sampling signal, convolution operation can be further carried out on the basis of the sampling signal and the target tap coefficient to obtain a signal after clock recovery is carried out on the sampling signal, channel equalization can be realized while interpolation operation is carried out on the analog signal, the problem that the complexity of the algorithm is increased due to the fact that a channel equalization algorithm is needed to be adopted at the same time when a traditional interpolation filter is adopted for clock recovery is avoided, and the efficiency of clock recovery is effectively improved.
Step S300, performing convolution operation on the sampling signal and the target tap coefficient to obtain a target signal, wherein the target signal is a signal obtained by performing clock recovery on the sampling signal.
After the sampling signal and the target tap coefficient are obtained, the sampling signal and the target tap coefficient may be input to the convolution operation module, and the convolution operation module performs convolution operation on the sampling signal and the target tap coefficient. In addition, when performing convolution operation, a plurality of input sampling signals are required, and for example, when calculating y (100), sampling signals such as s ' (99), s ' (98), …, s ' (90) and the like may be required to be involved in calculation at the same time. The convolution operation can be specifically realized by the following formula:
Figure BDA0003692020100000071
where y (N) is a target signal, s' (N) is a sampling signal, h (k) is a target tap coefficient, and k is 1,2,3 h
According to the clock recovery method provided by the embodiment of the application, the target tap coefficient is determined through the sampling signal obtained by sampling the analog signal through the clock signal, convolution operation is carried out on the sampling signal and the target tap coefficient, the signal obtained after clock recovery is carried out on the sampling signal is used as the target signal, because the convolution operation is carried out on the sampling signal through the tap coefficient, channel equalization can be realized while interpolation operation is carried out on the analog signal, the problem that the complexity of an algorithm is increased due to the fact that a channel equalization algorithm is needed to be adopted at the same time when the clock recovery is carried out through a traditional interpolation filter is solved, and the efficiency of clock recovery is effectively improved.
Fig. 2 is a second flowchart of a clock recovery method according to an embodiment of the present application. Referring to fig. 2, in one embodiment, the step of determining a target tap coefficient from the sampled signal includes:
step S2001 of determining a target interpolation interval from the sampling signal;
step S2002, determining a target tap coefficient from a preset lookup table according to the target interpolation interval, where the preset lookup table includes a plurality of interpolation intervals and tap coefficients corresponding to the interpolation intervals, respectively.
After obtaining the sampling signal, the present embodiment may determine a corresponding interpolation interval from the interpolation intervals according to the sampling signal as the target interpolation interval. For example: if the current interpolation interval comprises Δ t '(1) - Δ t' (100), if the sampling signal is s '(100), determining the target interpolation interval as Δ t' (100) from Δ t '(1) - Δ t' (100) according to the sampling signal; if the sampling signal is s '(1), the target interpolation interval Δ t' (1) can be determined from Δ t '(1) - Δ t' (100) according to the sampling signal.
After the target interpolation interval is obtained, the optimal interpolation filter is stored in a form of a lookup table in advance, and each interpolation interval corresponds to a group of tap coefficients of the filter. Therefore, the target interpolation interval can be used as an index of a preset lookup table, and a group of tap coefficients corresponding to the target interpolation interval is determined from each group of tap coefficients according to the association relationship between each interpolation interval and each group of tap coefficients in the lookup table to be used as the target tap coefficients.
In the embodiment, the target interpolation interval is determined according to the sampling signal, and then the target tap coefficient is determined from the preset lookup table according to the target interpolation interval. And performing convolution operation on the sampling signal and the target tap coefficient to obtain a signal obtained by performing clock recovery on the sampling signal and using the signal as a target signal. Because the target tap coefficient is determined from the groups of tap coefficients through the sampling signal, convolution operation can be further carried out on the basis of the sampling signal and the target tap coefficient to obtain a signal after clock recovery is carried out on the sampling signal, channel equalization can be realized while interpolation operation is carried out on the analog signal, the problem that the complexity of the algorithm is increased due to the fact that a channel equalization algorithm is needed to be adopted at the same time when a traditional interpolation filter is adopted for clock recovery is avoided, and the efficiency of clock recovery is effectively improved.
Fig. 3 is a third schematic flowchart of a clock recovery method according to an embodiment of the present application. Referring to fig. 3, in an embodiment, after the step of performing convolution operation based on the sampling signal and the target tap coefficient to obtain the target signal, the method further includes:
and step S400, updating tap coefficients and updating interpolation intervals based on the target signal.
After the target signal is obtained through clock recovery, the present embodiment may also determine the deviation degree of the target signal from the optimal sampling time according to the target signal, other signals subjected to clock recovery, and the preset step coefficient, further update the current interpolation interval, that is, the target interpolation interval, using the deviation degree as a timing error, and update the lookup table through the updated interpolation interval.
In this embodiment, an error signal may be determined according to a comparison between the target signal and the standard reference signal, the target tap coefficient may be further updated according to information such as the error signal and the target signal, the sampling signal, the target tap coefficient, and the preset step size coefficient, and the lookup table may be updated according to the updated tap coefficient. The preset step coefficient can control the tracking speed of the timing error by changing the size of the preset step coefficient.
The interpolation interval and the tap coefficient in the lookup table are continuously updated through the signal after clock recovery, so that the tap coefficient determined according to the sampling signal subsequently is more accurate, the signal obtained by carrying out convolution operation on the tap coefficient and the sampling signal is closer to the optimal sampling moment, channel equalization can be realized while interpolation operation is carried out on the analog signal, the problem that the complexity of the algorithm is increased due to the fact that a traditional interpolation filter needs to be adopted for clock recovery and a channel equalization algorithm is adopted at the same time is avoided, and the efficiency of clock recovery is effectively improved.
Further, the step of updating the tap coefficient based on the target signal includes:
step S40011, determining an error signal according to the target signal and a standard reference signal;
step S40012, performing data update on the target tap coefficient according to the target signal, the error signal, the sampling signal, the target tap coefficient, and a preset step length coefficient.
Specifically, after the target signal is obtained, the target signal may be compared with a standard reference signal, and the comparison result may be used as an error signal. Further, the preset step size coefficient is multiplied with the error signal, the operation result is multiplied with the target signal, and the multiplication result with the sampling signal is multiplied with the complex conjugate number of the sampling signal to obtain the coefficient error. And further, adding the coefficient error and the target tap coefficient to obtain a new tap coefficient, performing data updating on the target tap coefficient through the new tap coefficient, and updating a tap coefficient value corresponding to the target tap coefficient in the lookup table through the updated tap coefficient. The specific calculation process can be realized by the following formula:
h i,k +μe n ×y(n)×conj[s′(n-k)]→h i,k
wherein h on the left side of the formula i,k The target tap coefficient before updating is specifically the tap coefficient of the ith row and the kth column of the lookup table; h on the right i,k Is the updated target tap coefficient; mu is a step coefficient; conj is the complex conjugate function; y (n) is a target signal; e.g. of the type n Is the current error signal, s' (n) isA sampling signal, comprising n-k sampling signals, k being 1,2, 3.
The updating process of the tap coefficients is a training process of the optimal interpolation filter, and the embodiment can continuously update the tap coefficients of the optimal interpolation filter stored in the lookup table by using a gradient descent method, so that the quality of signals after interpolation (i.e. convolution operation) tends to be optimal.
Further, the step of determining an error signal based on the target signal and a standard reference signal comprises:
step S400111, performing a difference operation on the square value of the target signal and the square value of the standard reference signal to obtain an error signal.
When determining the error signal from the target signal and the standard reference signal, the target signal may be squared to obtain a squared value of the target signal. And squaring the standard reference signal to obtain a square value of the standard reference signal. Further, performing a difference operation on the square value of the target signal and the square value of the standard reference signal, specifically, subtracting the square value of the standard reference signal from the square value of the target signal, and obtaining a difference value, which is the error signal. Specifically, the process of calculating the error signal can be implemented by the following formula:
Figure BDA0003692020100000101
wherein e is n For the current error signal, R ref Is the standard signal amplitude, i.e. the standard reference signal, and y (n) is the target signal.
Further, the step of updating the interpolation interval based on the target signal includes:
step S40021, calculating a timing error according to the target signal and a preset step length coefficient to obtain a timing error;
step S40022, updating data of the target interpolation interval according to the timing error and the target interpolation interval.
After obtaining the target signal, the present embodiment may further input the target signal to a timing error calculation module, where the module is provided with a Gardner algorithm, and may calculate a deviation degree of the target signal from the optimal sampling time through the Gardner algorithm to obtain a timing error, where the Gardner algorithm is a timing error detection algorithm. Specifically, the process of calculating the timing error can be implemented by the following formula:
TE(n)=μ·[y(n)-y(n-2)]·y(n-1)
where TE (n) is the current timing error, μ is the step size coefficient, y (n) is the target signal, y (n-1) is the previous clock-recovered signal of the target signal, and y (n-2) is the previous clock-recovered signal of y (n-1).
After the timing error, the timing error and the target interpolation interval (i.e. the current interpolation interval) are input into an interpolation interval calculation module, and the timing error and the target interpolation interval are added by the interpolation interval calculation module to obtain a new interpolation interval. The process of calculating the new interpolation interval can be shown by the following formula:
Δt`(n+1)=Δt`(n)+TE(n)
where Δ t '(n +1) is the new interpolation interval, Δ t' (n) is the target interpolation interval, and te (n) is the current timing error.
Further, data updating is carried out on the target interpolation interval through the new interpolation interval, and the interpolation interval corresponding to the target interpolation interval in the lookup table is updated through the updated interpolation interval.
In the embodiment, the interpolation interval and the tap coefficient in the lookup table are continuously updated through the signal after clock recovery, so that the tap coefficient determined according to the sampling signal subsequently is more accurate, and further, the signal obtained by performing convolution operation on the tap coefficient and the sampling signal is closer to the optimal sampling time, channel equalization can be realized while interpolation operation is performed on the analog signal, the problem that the complexity of the algorithm is increased due to the fact that a traditional interpolation filter needs to be adopted for clock recovery and a channel equalization algorithm is adopted at the same time is avoided, and the efficiency of clock recovery is effectively improved.
Referring to fig. 4, fig. 4 is a schematic overall flow chart of a clock recovery method according to an embodiment of the present application. Specifically, in this embodiment, a clock signal of the receiving end clock and the analog signal are input into the analog-to-digital converter, and the analog signal is sampled by the analog-to-digital converter according to the clock signal to obtain a sampling signal. Further, the sampled signal is convolved (i.e., subjected to plug-in operation) with the tap coefficient of the interpolation filter (i.e., the target tap coefficient) found in the optimal interpolation filter tap coefficient lookup table (i.e., the preset lookup table) to obtain a convolution output signal as a target signal. Further, a timing error calculation may be performed according to the convolution output signal to obtain a timing error, a new interpolation interval calculation may be performed according to the timing error and the current interpolation interval to obtain a new interpolation interval, and the corresponding interpolation interval in the optimal interpolation filter tap coefficient lookup table may be updated through the new interpolation interval. Wherein the interpolation interval is used to index the corresponding tap coefficient in a look-up table. And, the convolution output signal can be compared with the standard reference signal, specifically, the square value of the convolution output signal and the square value of the standard reference signal are subjected to difference operation to obtain an error signal, the coefficient error of the tap coefficient is further calculated according to the error signal, the convolution output signal, the sampling signal and other information, the coefficient error and the current tap coefficient (namely, the target tap coefficient) are added to obtain a new tap coefficient, and the tap coefficient of the corresponding tap coefficient in the optimal interpolation filter tap coefficient lookup table is updated according to the new tap coefficient.
Further, the application also provides a clock recovery device.
Referring to fig. 5, fig. 5 is a functional block diagram of a clock recovery apparatus according to an embodiment of the present disclosure.
The clock recovery apparatus includes:
the sampling module 100 is configured to sample an analog signal according to a clock signal to obtain a sampling signal;
a determining module 200, configured to determine a target tap coefficient according to the sampling signal;
and a convolution module 300, configured to perform convolution operation on the sampling signal and the target tap coefficient to obtain a target signal, where the target signal is a signal obtained by performing clock recovery on the sampling signal.
The clock recovery device provided by the embodiment of the application determines the target tap coefficient through the sampling signal obtained by sampling the analog signal by the clock signal, and performs convolution operation based on the sampling signal and the target tap coefficient to obtain the signal after performing clock recovery on the sampling signal as the target signal.
In one embodiment, the sampling module 100 is specifically configured to:
determining a sampling frequency of a clock signal;
and sampling the analog signal according to the sampling frequency to obtain a sampling signal.
In one embodiment, the determining module 200 is specifically configured to:
determining a target interpolation interval according to the sampling signal;
and determining a target tap coefficient from a preset lookup table according to the target interpolation interval, wherein the preset lookup table comprises a plurality of interpolation intervals and tap coefficients respectively corresponding to the interpolation intervals.
In one embodiment, the convolution module 300 is specifically configured to:
and updating tap coefficients and interpolation intervals based on the target signal.
In one embodiment, the convolution module 300 includes a first update module (not shown) for:
determining an error signal according to the target signal and a standard reference signal;
and updating data of the target tap coefficient according to the target signal, the error signal, the sampling signal, the target tap coefficient and a preset step length coefficient.
In one embodiment, the first updating module comprises a difference operation module (not shown in the figure) configured to:
and performing difference operation on the square value of the target signal and the square value of the standard reference signal to obtain an error signal.
In one embodiment, the convolution module 300 includes a second update module (not shown) for:
performing timing error calculation according to the target signal and a preset step length coefficient to obtain a timing error;
and updating data of the target interpolation interval according to the timing error and the target interpolation interval.
Fig. 6 illustrates a physical structure diagram of an electronic device, which may include, as shown in fig. 6: a processor (processor)810, a Communication Interface 820, a memory 830 and a Communication bus 840, wherein the processor 810, the Communication Interface 820 and the memory 830 communicate with each other via the Communication bus 840. The processor 810 may call the computer program in the memory 830 to perform the steps of the clock recovery method, including for example:
sampling the analog signal according to the clock signal to obtain a sampling signal;
determining a target tap coefficient according to the sampling signal;
and performing convolution operation on the sampling signal and the target tap coefficient to obtain a target signal, wherein the target signal is a signal obtained by performing clock recovery on the sampling signal.
In addition, the logic instructions in the memory 830 may be implemented in software functional units and stored in a computer readable storage medium when the logic instructions are sold or used as independent products. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
On the other hand, an embodiment of the present application further provides a computer storage medium, where the computer storage medium is a computer-readable storage medium, and the computer-readable storage medium stores a computer program, where the computer program is configured to cause a processor to execute the steps of the method provided in each of the above embodiments, for example, the method includes:
sampling the analog signal according to the clock signal to obtain a sampling signal;
determining a target tap coefficient according to the sampling signal;
and performing convolution operation on the sampling signal and the target tap coefficient to obtain a target signal, wherein the target signal is a signal obtained by performing clock recovery on the sampling signal.
The computer-readable storage medium can be any available medium or data storage device that can be accessed by a processor, including but not limited to magnetic memory (e.g., floppy disks, hard disks, magnetic tape, magneto-optical disks (MOs), etc.), optical memory (e.g., CDs, DVDs, BDs, HVDs, etc.), and semiconductor memory (e.g., ROMs, EPROMs, EEPROMs, non-volatile memory (NAND FLASH), Solid State Disks (SSDs)), etc.
The above-described embodiments of the apparatus are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware. With this understanding in mind, the above-described technical solutions may be embodied in the form of a software product, which can be stored in a computer-readable storage medium such as ROM/RAM, magnetic disk, optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the methods described in the embodiments or some parts of the embodiments.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions in the embodiments of the present application.

Claims (10)

1. A method of clock recovery, comprising:
sampling the analog signal according to the clock signal to obtain a sampling signal;
determining a target tap coefficient according to the sampling signal;
and performing convolution operation on the sampling signal and the target tap coefficient to obtain a target signal, wherein the target signal is a signal obtained by performing clock recovery on the sampling signal.
2. The clock recovery method of claim 1, wherein the step of determining a target tap coefficient from the sampled signal comprises:
determining a target interpolation interval according to the sampling signal;
and determining a target tap coefficient from a preset lookup table according to the target interpolation interval, wherein the preset lookup table comprises a plurality of interpolation intervals and tap coefficients respectively corresponding to the interpolation intervals.
3. The clock recovery method of claim 1, wherein the step of sampling the analog signal according to the clock signal to obtain the sampled signal comprises:
determining a sampling frequency of a clock signal;
and sampling the analog signal according to the sampling frequency to obtain a sampling signal.
4. The clock recovery method of claim 1, wherein the step of obtaining the target signal based on the convolution operation between the sampled signal and the target tap coefficient further comprises:
and updating tap coefficients and interpolation intervals based on the target signal.
5. The clock recovery method of claim 4, wherein the step of performing tap coefficient update based on the target signal comprises:
determining an error signal according to the target signal and a standard reference signal;
and updating data of the target tap coefficient according to the target signal, the error signal, the sampling signal, the target tap coefficient and a preset step length coefficient.
6. The clock recovery method of claim 5, wherein the step of determining an error signal based on the target signal and a standard reference signal comprises:
and performing difference operation on the square value of the target signal and the square value of the standard reference signal to obtain an error signal.
7. The clock recovery method of claim 4, wherein the step of performing interpolation interval update based on the target signal comprises:
calculating a timing error according to the target signal and a preset step length coefficient to obtain a timing error;
and updating data of the target interpolation interval according to the timing error and the target interpolation interval.
8. A clock recovery apparatus, comprising:
the sampling module is used for sampling the analog signal according to the clock signal to obtain a sampling signal;
a determining module for determining a target tap coefficient according to the sampling signal;
and the convolution module is used for performing convolution operation on the sampling signal and the target tap coefficient to obtain a target signal, wherein the target signal is a signal obtained by performing clock recovery on the sampling signal.
9. An electronic device comprising a processor and a memory storing a computer program, characterized in that the steps of the clock recovery method according to any of claims 1 to 7 are implemented when the processor executes the computer program.
10. A computer storage medium, being a computer readable storage medium, comprising a computer program, characterized in that the computer program, when being executed by a processor, is adapted to carry out the steps of the clock recovery method of any of the claims 1 to 7.
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Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1175145A (en) * 1996-08-23 1998-03-04 大宇电子株式会社 Timed inner-inserting device for digital demodulator
KR20010076780A (en) * 2000-01-28 2001-08-16 오길록 Parallel processing methode of apparatus for timing recovery using interpolation filter
US20100208855A1 (en) * 2009-02-18 2010-08-19 Dawei Huang System and method of adapting precursor tap coefficient
CN102577183A (en) * 2009-07-23 2012-07-11 思科技术公司 Clock recovery for optical transmission systems
JP2014045426A (en) * 2012-08-28 2014-03-13 Sumitomo Electric Ind Ltd Clock timing recovery device, clock timing recovery method and digital coherent receiver
US20140286378A1 (en) * 2013-03-25 2014-09-25 Fujitsu Limited Receiving circuit and communication circuit
CN106998236A (en) * 2017-02-07 2017-08-01 中国人民解放军国防科学技术大学 A kind of feedback-type symbol timing synchronizing apparatus and method based on filtering interpolation
CN107566307A (en) * 2017-08-31 2018-01-09 北京睿信丰科技有限公司 Blind equalizing apparatus and method, data modulation system and method
CN110247751A (en) * 2018-11-15 2019-09-17 浙江大华技术股份有限公司 The method, apparatus and storage medium of quadrature amplitude modulation QAM signal bit synchronization
CN110752870A (en) * 2019-10-29 2020-02-04 中国电子科技集团公司第五十四研究所 Timing recovery method and device for roll-off coefficient variable broadband satellite transmission system
CN111082870A (en) * 2019-12-30 2020-04-28 武汉邮电科学研究院有限公司 Clock recovery and adaptive equalizer combined device and method in coherent optical communication
CN111194077A (en) * 2019-12-17 2020-05-22 北京航空航天大学杭州创新研究院 Timing synchronization method under low sampling rate
CN112543064A (en) * 2020-12-02 2021-03-23 武汉邮电科学研究院有限公司 Clock recovery device and method for high-speed coherent optical communication system

Patent Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1175145A (en) * 1996-08-23 1998-03-04 大宇电子株式会社 Timed inner-inserting device for digital demodulator
KR20010076780A (en) * 2000-01-28 2001-08-16 오길록 Parallel processing methode of apparatus for timing recovery using interpolation filter
US20100208855A1 (en) * 2009-02-18 2010-08-19 Dawei Huang System and method of adapting precursor tap coefficient
CN102577183A (en) * 2009-07-23 2012-07-11 思科技术公司 Clock recovery for optical transmission systems
JP2014045426A (en) * 2012-08-28 2014-03-13 Sumitomo Electric Ind Ltd Clock timing recovery device, clock timing recovery method and digital coherent receiver
US20140286378A1 (en) * 2013-03-25 2014-09-25 Fujitsu Limited Receiving circuit and communication circuit
CN106998236A (en) * 2017-02-07 2017-08-01 中国人民解放军国防科学技术大学 A kind of feedback-type symbol timing synchronizing apparatus and method based on filtering interpolation
CN107566307A (en) * 2017-08-31 2018-01-09 北京睿信丰科技有限公司 Blind equalizing apparatus and method, data modulation system and method
CN110247751A (en) * 2018-11-15 2019-09-17 浙江大华技术股份有限公司 The method, apparatus and storage medium of quadrature amplitude modulation QAM signal bit synchronization
CN110752870A (en) * 2019-10-29 2020-02-04 中国电子科技集团公司第五十四研究所 Timing recovery method and device for roll-off coefficient variable broadband satellite transmission system
CN111194077A (en) * 2019-12-17 2020-05-22 北京航空航天大学杭州创新研究院 Timing synchronization method under low sampling rate
CN111082870A (en) * 2019-12-30 2020-04-28 武汉邮电科学研究院有限公司 Clock recovery and adaptive equalizer combined device and method in coherent optical communication
CN112543064A (en) * 2020-12-02 2021-03-23 武汉邮电科学研究院有限公司 Clock recovery device and method for high-speed coherent optical communication system

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
李永富等: "功率抖动信道中的实时时钟恢复算法", 《光学学报》 *

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