CN114978214B - Direct conversion receiver, data receiving method, storage medium and electronic device - Google Patents
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Abstract
The present disclosure relates to the field of wireless communication technologies, and in particular to a direct conversion receiver, a data receiving method, a storage medium and an electronic device, where the direct conversion receiver includes two paths of radio frequency conversion modules, a data processor and a digital signal processor, and each path of radio frequency conversion module includes a mixer, a low-pass filter, a signal amplifier and an analog-to-digital converter that are sequentially connected; the data processor is used for collecting initial output signals of the signal amplifiers of the two paths of radio frequency conversion modules, calculating standard output signals according to the input signals, and determining target improvement factors according to the initial output signals and the standard output signals; the digital signal processor is connected with the output ends of the analog-to-digital converters of the two paths of radio frequency conversion modules at the same time and is used for receiving the reference output signals of the radio frequency modules and updating the reference output signals according to the target improvement factors to obtain target output signals. The technical scheme of the disclosure avoids the condition that two paths of signals of the direct conversion receiver are not adapted.
Description
Technical Field
The disclosure relates to the technical field of wireless communication, in particular to a direct conversion receiver, a data receiving method, a storage medium and electronic equipment.
Background
The direct conversion receiver is a radio frequency receiver architecture widely applied to mobile phones at present, and two paths of signals of the direct conversion receiver are not adaptive due to certain phase and amplitude errors of a local carrier.
In the prior art, the adjustment precision of the phase and the amplitude is insufficient in a mode of reducing mismatch, and the complexity is high.
It should be noted that the information disclosed in the above background section is only for enhancing understanding of the background of the present disclosure and thus may include information that does not constitute prior art known to those of ordinary skill in the art.
Disclosure of Invention
The present disclosure is directed to a direct conversion receiver, a data receiving method, a computer readable medium, and an electronic device, so as to improve the situation of two-path signal mismatch of the direct conversion receiver at least to a certain extent, and have lower circuit complexity.
According to a first aspect of the present disclosure there is provided a direct conversion receiver comprising: each radio frequency conversion module comprises a mixer, a low-pass filter, a signal amplifier and an analog-to-digital converter which are connected in sequence; the mixer is used for mixing an input signal of the radio frequency conversion module and a local oscillation signal; the data processor is used for acquiring initial output signals of the signal amplifiers of the two paths of radio frequency conversion modules, calculating standard output signals according to the input signals, and determining target improvement factors according to the initial output signals and the standard output signals; and the digital signal processor is simultaneously connected with the output ends of the analog-to-digital converters of the two paths of radio frequency conversion modules and is used for receiving the reference output signals of the radio frequency modules and updating the reference output signals according to the target improvement factors.
According to a second aspect of the present disclosure, there is provided a data receiving method applied to a direct conversion receiver, the direct conversion receiver including two paths of radio frequency conversion modules, a data processor and a digital signal processor; each radio frequency conversion module comprises a mixer, a low-pass filter, a signal amplifier and an analog-to-digital converter which are connected in sequence; the frequency mixer is used for mixing the input signal of the radio frequency conversion module and the local oscillation signal, and comprises the following steps: the data processor collects initial output signals of the signal amplifiers of the two paths of radio frequency conversion modules and calculates standard output signals according to the input signals; the data processor determines a target improvement factor according to the initial output signal and the standard output signal; the digital signal processor receives the reference output signal of the radio frequency module and updates the reference output signal according to the target improvement factor.
According to a third aspect of the present disclosure, there is provided a computer readable medium having stored thereon a computer program which, when executed by a processor, implements the method described above.
According to a fourth aspect of the present disclosure, there is provided an electronic device comprising: the above direct conversion receiver.
The direct conversion receiver provided by the embodiment of the disclosure comprises two paths of radio frequency conversion modules, a data processor and a digital signal processor, wherein each path of radio frequency conversion module comprises a mixer, a low-pass filter, a signal amplifier and an analog-to-digital converter which are connected in sequence; the mixer is used for mixing an input signal of the radio frequency conversion module and a local oscillation signal; the data processor is used for acquiring initial output signals of the signal amplifiers of the two paths of radio frequency conversion modules, calculating standard output signals according to the input signals, and determining target improvement factors according to the initial output signals and the standard output signals; and the digital signal processor is simultaneously connected with the output ends of the analog-to-digital converters of the two paths of radio frequency conversion modules and is used for receiving the reference output signals of the radio frequency modules and updating the reference output signals according to the target improvement factors to obtain target output signals. Compared with the prior art, the method has the advantages that the standard output signal is calculated by the data processor, the target improvement factor is calculated according to the standard output signal, the target improvement factor is directly output to the digital signal processor, the digital signal processor is used for updating the reference output signal, secondary errors caused by the mixer and the signal amplifier are avoided, the accuracy of the obtained target output signal is improved, meanwhile, a complex logic circuit is not required to be designed, adjustment can be completed without using a variable gain amplifier, and the complexity of the circuit is reduced.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and together with the description, serve to explain the principles of the disclosure. It will be apparent to those of ordinary skill in the art that the drawings in the following description are merely examples of the disclosure and that other drawings may be derived from them without undue effort. In the drawings:
fig. 1 shows a circuit configuration diagram of a related art direct conversion receiver;
fig. 2 shows a circuit configuration diagram of a direct conversion receiver to which embodiments of the present disclosure may be applied;
fig. 3 schematically illustrates a circuit configuration diagram of a local oscillator signal source in an exemplary embodiment of the present disclosure;
FIG. 4 schematically illustrates a waveform diagram for characterizing phase differences and amplitude differences in an exemplary embodiment of the present disclosure
Fig. 5 schematically illustrates a circuit configuration diagram of another direct conversion receiver in an exemplary embodiment of the present disclosure;
fig. 6 schematically illustrates a circuit configuration diagram of still another direct conversion receiver in an exemplary embodiment of the present disclosure;
fig. 7 schematically illustrates a flowchart of a data receiving method in an exemplary embodiment of the present disclosure;
FIG. 8 schematically illustrates a flow chart for calculating a target improvement factor in an exemplary embodiment of the present disclosure;
FIG. 9 schematically illustrates another flow chart for calculating a target improvement factor in an exemplary embodiment of the present disclosure;
FIG. 10 schematically illustrates a flow chart of data processor interaction with repository data in an exemplary embodiment of the present disclosure;
fig. 11 shows a schematic diagram of an electronic device to which embodiments of the present disclosure may be applied.
Detailed Description
Example embodiments will now be described more fully with reference to the accompanying drawings. However, the exemplary embodiments may be embodied in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.
Furthermore, the drawings are merely schematic illustrations of the present disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and thus a repetitive description thereof will be omitted. Some of the block diagrams shown in the figures are functional entities and do not necessarily correspond to physically or logically separate entities. These functional entities may be implemented in software or in one or more hardware modules or integrated circuits or in different networks and/or processor devices and/or microcontroller devices.
The direct conversion receiver is a radio frequency receiver architecture widely used in mobile phones at present. In the down-conversion process, because of the local carrier wave sin omega used by it c t and cos omega c t has a certain phase and amplitude error (i.e. sin omega c t becomes). Thus, the two paths of I, Q have mismatch, and the subsequent signal amplifier may make the mismatch worse, so that the error rate increases, and the sensitivity of the receiver decreases.
Referring to fig. 1, one solution in the prior art is to add a variable phase stage 120 and a variable gain stage 110 to the local oscillator signal and baseband path, respectively. After analog-to-digital conversion, a known single tone signal is input to the input terminal, and the digital logic circuit 130 analyzes I, Q phase and amplitude errors of the two paths, so as to adjust the variable phase stage and the variable gain stage to reduce mismatch.
However, the signal amplitude needs to be adjusted by the variable gain stage 110 after analysis by the logic circuit 130, and the nonlinearity of the PA may make the gain adjustment inaccurate. The logic circuit 130 has a certain difficulty in solving the phase and amplitude error factors, and the complexity of the scheme is high, and meanwhile, the scheme in the related art needs to perform secondary mixing operation, which may cause new errors to occur.
Based on one or more of the above-mentioned drawbacks, the present disclosure proposes a new direct conversion receiver, including two radio frequency conversion modules, a data processor and a digital signal processor, wherein each radio frequency conversion module includes a mixer, a low pass filter, a signal amplifier and an analog-to-digital converter connected in sequence, respectively; the mixer is used for mixing an input signal of the radio frequency conversion module and a local oscillation signal; the data processor is used for acquiring initial output signals of the signal amplifiers of the two paths of radio frequency conversion modules, calculating standard output signals according to the input signals, and determining target improvement factors according to the initial output signals and the standard output signals; and the digital signal processor is simultaneously connected with the output ends of the analog-to-digital converters of the two paths of radio frequency conversion modules and is used for receiving the reference output signals of the radio frequency modules and updating the reference output signals according to the target improvement factors to obtain target output signals.
According to the technical scheme, the data processor is utilized to calculate the standard output signal, the target improvement factor is calculated according to the standard output signal, the target improvement factor is directly output to the digital signal processor, the digital signal processor is used for updating the reference output signal to obtain the target output signal, secondary errors caused by the mixer and the signal amplifier are avoided, the precision of the obtained target output signal is improved, meanwhile, a complex logic circuit is not required to be designed, adjustment can be completed without using a variable gain amplifier, and the complexity of the circuit is reduced.
The following describes each device in the above-described direct conversion receiver in detail.
In this exemplary embodiment, referring to fig. 2, the two rf conversion modules are disposed in parallel, and may include a first rf conversion module and a second rf conversion module, where the first rf conversion module may include a first mixer 211, a first low-pass filter 221, a first signal amplifier 231, and a first analog-to-digital converter 241 that are sequentially connected, and the second rf conversion module includes a second mixer 212, a second low-pass filter 222, a second signal amplifier 232, and a second analog-to-digital converter 242 that are connected at a time, where the mixers are used to mix the local oscillation signal and the input signal of the rf conversion module.
In this example embodiment, specific parameters and specific signals of each device in the first rf module and the second rf module may be customized according to the user requirement, which is not specifically limited in this example embodiment.
In this exemplary embodiment, the local oscillator signals include a first local oscillator signal and a second local oscillator signal, and the first local oscillator signal and the second local oscillator signal have polarization of 90 degrees, for example, the first local oscillator signal is cos ω c t, the firstThe two local oscillation signals are sin omega c t, wherein t represents time, ω c Representing the frequency of the local oscillator signal.
In this exemplary embodiment, referring to fig. 3, the first local oscillation signal and the second local oscillation signal may be sent by the same signal source 280, and a polarization module 270 is connected between the first local oscillation signal or the second local oscillation signal and the signal source 280, where the polarization angle of the polarization module 270 is 90 degrees, so that the phase difference between the first local oscillation signal and the second local oscillation signal is 90 degrees.
In this exemplary embodiment, the local oscillation signal is used as a carrier signal, and its frequency is greater than that of the input signal, and after passing through the low-pass filter, the local oscillation signal may be filtered out.
In this exemplary embodiment, the amplification factor of the signal amplifier may be customized according to the requirements of the users of the configuration, and there is no limitation in this exemplary embodiment.
In the present exemplary embodiment, the data processor 250 is connected to the output terminal of the first signal amplifier 231 and the output terminal of the second signal amplifier 232, and is configured to collect the initial output signals of the two signal amplifiers, i.e., collect the first initial output signal and the second initial output signal of the first signal amplifier 231.
Meanwhile, the data processor 250 may be configured to collect the first local oscillation signal, the second local oscillation signal, the input data, the filtering parameters of the low-pass filter, and the amplification gain of the signal amplifier. For calculating the reference output signal.
For example, assume that a signal transmitter (not shown) transmits a single frequency signal, specifically:
wherein x (t) is the single frequency signal, ω 0 Is the frequency of the single frequency signal.
In the case of not considering channel noise and assuming ideal transmitting end, the input signal to the direct conversion receiver is:
wherein Re () is the real arithmetic, w c Is the frequency of the local oscillator signal.
If the received signal is demodulated in two paths of IQ, the two paths of IQ ideal signal can be expressed as follows:
wherein, I is as above id (t) represents a first standard output signal corresponding to the first RF conversion module, Q id And (t) represents a second standard output signal corresponding to the second radio frequency conversion module, wherein filter () is a filtering operation.
In the present exemplary embodiment, after the standard output signal is obtained, the data processor 250 may calculate the target improvement factor according to the initial output signal.
In one example embodiment, the data processor 250 may determine the first improvement factor using the first initial output signal determination and the first standard output signal, then determine the second improvement factor using the second initial output signal and the second standard output signal, and then input the first improvement factor and the second improvement factor as the target improvement factor to the data signal processor. Referring to fig. 4, the target improvement factor may include a phase difference 402 and an amplitude difference 401, wherein the phase difference 402 may include a first phase difference of a first initial output signal and the first standard output signal and a second phase difference of a second initial output signal and the second standard output signal; the amplitude differences 401 may comprise a first amplitude difference of the first initial output signal and the first standard output signal described above and a second amplitude difference of the second initial output signal and the second standard output signal described above.
For example, assume that the first initial output signal is represented asThe second initial output signal is denoted +.>In this case, the first improvement factor and the second improvement factor may be calculated based on the first label data and the second standard output signal, that is, the amplitude difference and the phase difference between the first initial output signal and the first standard output signal are used as the first improvement factor, and the amplitude difference and the phase difference between the second initial output signal and the second standard output signal are used as the second improvement factor.
In another exemplary embodiment, the data processor 250 may determine the variation parameter using the first and second initial output signals, and then determine the target improvement factor according to the variation parameter, the first and second initial output signals, and the first and second standard output data.
For example, assume that the first initial output signal is represented asThe second initial output signal is denoted +.>The data processor 250 can obtain the amplitude difference between the first initial output signal and the second initial output signal based on the first initial output signal and the second initial output signalAnd phase difference phi, through FFT (Fast Fourier Transform), fast fourier transform) to obtain the amplitude spectrum and phase of the two signalsBit spectrum, thus comparing to obtain amplitude difference +.>And a phase difference phi. Or from the mean of the square of the signal. The present exemplary embodiment is not particularly limited. Wherein the above-mentioned amplitude difference +.>And the phase difference phi as the above-mentioned variation parameters.
For example, for convenience of calculation, the first initial output signal and the second initial signal may be respectively expressed as:Q(t0＝sin(w 0 t+φ0
the amplitude difference is calculatedAnd the phase difference phi as the variation parameters, assuming that the target improvement factor isThen:
suppose, I cor (t)＝cos(w 0 t)，Q cor (t)＝sin(w o t) respectively represent the first standard output data and the second standard output data.Q imb (t)＝sin(w 0 t+φ) represents a first initial output signal and a second initial output signal, respectively, which can be calculated by:
B＝0，/>
the value of each element in the matrix of the target improvement factor M is obtained, and the target improvement factor M can be calculated.
In an exemplary embodiment of the disclosure, the digital signal processor 260 is connected to the output terminals of the analog-to-digital converters of the two rf conversion modules at the same time, that is, to the output terminal of the first analog-to-digital converter 241 and the output terminal of the second analog-to-digital conversion module at the same time. The digital signal receiver may be configured to receive the reference output signal, that is, the first reference output signal corresponding to the first analog-to-digital converter 241 and the second reference output signal corresponding to the second analog-to-digital converter 242, and then receive the target improvement factor, and update the reference output signal with the target improvement factor to obtain a target output signal. I.e. digitally compensating for the mismatch between the first radio frequency conversion module and the second radio frequency conversion module. Through digital compensation, a variable gain amplifier and a variable phase stage are not required to be arranged, the circuit structure is simplified, meanwhile, errors caused by secondary mixing are avoided, and the debugging precision is improved.
In an exemplary embodiment of the present disclosure, referring to fig. 5, the direct conversion receiver may further include a memory bank 290, and the memory bank 290 is connected between the data processor 250 and the digital signal processor 260, for storing the target improvement factor and the input frequency corresponding to the target improvement factor. When the data processor 250 calculates the target improvement factor, not only the target improvement factor is transmitted to the digital signal processor 260, but also the target improvement factor and its corresponding input frequency may be stored in the memory 290, and a plurality of target improvement factors and their corresponding output frequencies may be stored in the memory 290 in advance.
In this exemplary embodiment, when a new input signal is obtained, the data processor 250 may detect the initial frequency of the input signal and search the memory 290 for whether the input frequency identical to the initial frequency exists, and if so, directly transmit the target improvement factor corresponding to the input frequency identical to the initial frequency to the digital signal processor 260, thereby avoiding the data processor from calculating again and reducing the calculation time. If not, the data processor 250 stores the input frequency and the target improvement factor in the memory 290 after calculating the target improvement factor corresponding to the input signal, and transmits the target improvement factor to the digital signal processor 260.
In an exemplary embodiment of the present disclosure, referring to fig. 6, the direct conversion receiver may further include an antenna 620 and a low noise amplifier 610, the antenna 620 is configured to receive a signal to be received, an input terminal of the low noise amplifier 610 is connected to the antenna 620, and an output terminal of the low noise amplifier is connected to the mixer, and is configured to pre-process the signal to be received to obtain the input signal.
The low noise amplifier 610 is an amplifier with a very low noise coefficient, for example, an amplifier with a noise coefficient smaller than a preset value is determined as the low noise amplifier 610, where the preset value may be 2 or 3, or may be customized according to the user requirement, which is not specifically limited in this exemplary embodiment.
Further, the present disclosure also provides a data receiving method applied to a direct conversion receiver, where the direct conversion receiver includes two paths of radio frequency conversion modules, a data processor 250 and a digital signal processor 260; each radio frequency conversion module comprises a mixer, a low-pass filter, a signal amplifier and an analog-to-digital converter which are connected in sequence; the mixer is configured to mix an input signal with a local oscillation signal, and referring to fig. 7, the data receiving method may include the steps of:
step S710, the data processor collects initial output signals of signal amplifiers of the two paths of radio frequency conversion modules, and calculates standard output signals according to the input signals;
step S720, the data processor determines a target improvement factor according to the initial output signal and the standard output signal;
in step S730, the digital signal processor receives the reference output signal of the rf module and updates the reference output signal according to the target improvement factor.
Compared with the prior art, the data receiving method in the disclosure uses the data processor 250 to calculate the standard output signal, calculates the target improvement factor according to the standard output signal, directly outputs the target improvement factor to the digital signal processor 260, and uses the digital signal processor 260 to update the reference output signal, thereby avoiding secondary errors caused by the mixer and the signal amplifier, improving the precision of the obtained reference output signal, simultaneously, completing the adjustment of the reference output signal without designing a complex logic circuit or using a variable gain amplifier, and reducing the complexity of the circuit.
The above steps are described in detail below.
The structural parts of the direct conversion receiver have been described in detail, and reference may be made to the description of the direct conversion receiver for specific details regarding the circuit structure, so that the details are not repeated herein.
In step S710, the data processor collects initial output signals of the signal amplifiers of the two paths of the radio frequency conversion modules, and calculates standard output signals according to the input signals;
in the present exemplary embodiment, the data processor 250 is connected to the output terminal of the first signal amplifier 231 and the output terminal of the second signal amplifier 232, and is configured to collect the initial output signals of the two signal amplifiers, i.e., collect the first initial output signal and the second initial output signal of the first signal amplifier 231.
Meanwhile, the data processor 250 may be configured to collect the first local oscillation signal, the second local oscillation signal, the input data, the filtering parameters of the low-pass filter, and the amplification gain of the signal amplifier. For calculating the reference output signal.
For example, assume that a signal transmitter (not shown) transmits a single frequency signal, specifically:
wherein x (t) is the single frequency signal, w 0 Is the frequency of the single frequency signal.
In the case of not considering channel noise and assuming ideal transmitting end, the input signal to the direct conversion receiver is:
wherein Re () is the real arithmetic, w c Is the frequency of the local oscillator signal.
If the received signal is demodulated in two paths of IQ, the two paths of IQ ideal signal can be expressed as follows:
wherein, I is as above id (t) represents a first standard output signal corresponding to the first RF conversion module, Q id And (t) represents a second standard output signal corresponding to the second radio frequency conversion module, and the filter is a filtering operation.
In the present exemplary embodiment, after the above-described standard output signal is obtained, step S720 may be performed.
In step S720, the data processor determines a target improvement factor from the initial output signal and the standard output signal;
in an example embodiment, referring to fig. 8, the data processor determining the target improvement factor according to the initial output signal and the standard output signal may include steps S810 to S830.
In step S810, a first improvement factor is obtained according to a first initial output signal and a standard output signal corresponding to the first rf conversion module;
in step S820, a second improvement factor is obtained according to the second initial output signal and the standard output signal corresponding to the second rf conversion module.
The data processor 250 may determine the first improvement factor using the first initial output signal and the first standard output signal and then determine the second improvement factor using the second initial output signal and the second standard output signal. Referring to fig. 4, the target improvement factor may include a phase difference and an amplitude difference, wherein the phase difference may include a first phase difference of the first initial output signal determination and the first standard output signal and a second phase difference of the second initial output signal determination and the second standard output signal.
For example, assume that the first initial output signal is represented asThe second initial output signal is denoted +.>In this case, the first improvement factor and the second improvement factor may be calculated based on the first label data and the second standard output signal, that is, the amplitude difference and the phase difference between the first initial output signal and the first standard output signal are used as the first improvement factor, and the amplitude difference and the phase difference between the second initial output signal and the second standard output signal are used as the second improvement factor.
In step S830, a target improvement factor is determined from the first improvement factor and the second improvement factor.
In the present exemplary embodiment, the first improvement factor and the second improvement factor may be input as the target improvement factor to the data signal processor.
In another example embodiment, referring to fig. 9, the data processor 250 determining the target improvement factor according to the initial output signal and the standard output signal may include steps S910 to S920.
In step S910, a variation parameter is determined according to a first initial output signal corresponding to the first rf conversion module and a second initial output signal corresponding to the second rf conversion module;
in step S920, a target improvement factor is determined according to the initial output signal, the variation parameter, and the standard output signal.
In this example embodiment, the data processor 250 may determine the variation parameter using the first and second initial output signals, and then determine the target improvement factor according to the variation parameter, the first and second initial output signals, and the first and second standard output data.
For example, assume that the first initial output signal is represented asThe second initial output signal is denoted +.>The data processor 250 may obtain the amplitude difference between the first initial output signal and the second initial output signal based on the first initial output signal and the second initial output signal>And the phase difference phi, the amplitude spectrum and the phase spectrum of the two paths of signals can be obtained through FFT, so that the amplitude difference phi is obtained through comparison>And a phase difference phi. Or from the mean of the square of the signal. The present exemplary embodiment is not particularly limited. Wherein the above-mentioned amplitude difference +.>And the phase difference phi as the above-mentioned variation parameters.
In the example, for the convenience of calculation, the above can be mentionedThe first initial output signal and the second initial signal are respectively expressed as:Q(t0＝sin(w 0 t+φ0
the amplitude difference is calculatedAnd the phase difference phi as the variation parameters, assuming that the target improvement factor isThen:
suppose, I cor (t)＝cos(w 0 t)，Q cor (t)＝sin(w o t) respectively represent the first standard output data and the second standard output data.Q im8 (t)＝sin(w 0 t+φ) represents a first initial output signal and a second initial output signal, respectively, which can be calculated by:
B＝0，/>
the value of each element in the matrix of the target improvement factor M is obtained, namely the target improvement factor M is calculated.
In step S730, the digital signal processor receives the reference output signal of the rf module and updates the reference output signal according to the target improvement factor.
In an exemplary embodiment of the disclosure, the digital signal processor 260 is connected to the output terminals of the analog-to-digital converters of the two-way rf conversion module at the same time, that is, to the output terminal of the first analog-to-digital converter 241 and the output terminal of the second analog-to-digital conversion module at the same time. The digital signal receiver may be configured to receive the reference output signal, that is, the first reference output signal corresponding to the first analog-to-digital converter 241 and the second reference output signal corresponding to the second analog-to-digital converter 242, and then receive the target improvement factor, and update the reference output signal with the target improvement factor to obtain a target output signal. I.e. digitally compensating for the mismatch between the first radio frequency conversion module and the second radio frequency conversion module. Through digital compensation, a variable gain amplifier and a variable phase stage are not required to be arranged, the circuit structure is simplified, meanwhile, errors caused by secondary mixing are avoided, and the debugging precision is improved.
In an exemplary embodiment of the present disclosure, referring to fig. 5, the direct conversion receiver may further include a memory bank 290, and the memory bank 290 is connected between the data processor 250 and the digital signal processor 260, for storing the target improvement factor and the input frequency corresponding to the target improvement factor. When the data processor 250 calculates the target improvement factor, not only the target improvement factor is transmitted to the digital signal processor 260, but also the target improvement factor and its corresponding input frequency may be stored in the memory 290, and a plurality of target improvement factors and their corresponding output frequencies may be stored in the memory 290 in advance.
Referring to fig. 10, in this exemplary embodiment, when a new input signal is obtained, the data processor may first perform step S1010, where the data processor detects an initial frequency of the input signal, then perform step S1020, find whether there is an input frequency identical to the initial frequency in the memory bank, and if so, perform step S1030, and transmit a target improvement factor corresponding to the input frequency identical to the initial frequency to the digital signal processor, thereby avoiding the processor from calculating again and reducing the calculation time. If not, step S1040 is performed, the data processor calculates a target improvement factor corresponding to the input signal, then step S1050 is performed, the input frequency and the target improvement factor are stored in the memory bank, and step S1060 is performed, the target improvement factor is transmitted to the digital signal processor.
In summary, in the present exemplary embodiment, the data processor is used to calculate the standard output signal, calculate the target improvement factor according to the standard output signal, and directly output the target improvement factor to the digital signal processor, and the digital signal processor updates the reference output signal to obtain the target output signal, so that secondary errors caused by the mixer and the signal amplifier are avoided, the accuracy of the obtained target output signal is improved, and meanwhile, the adjustment can be completed without designing a complex logic circuit or using a variable gain amplifier, and the complexity of the circuit is reduced. Meanwhile, a storage library is introduced, the input frequency and the corresponding target improvement factors are stored in the storage library, when the input signal with the initial frequency equal to the input frequency is received again, the data processor only needs to read the corresponding target improvement factors and transmit the corresponding target improvement factors to the digital signal processor, calculation is not needed again, calculation resources are saved, the adjustment speed is increased, and the data receiving speed is further increased.
It is noted that the above-described figures are merely schematic illustrations of processes involved in a method according to exemplary embodiments of the present disclosure, and are not intended to be limiting. It will be readily appreciated that the processes shown in the above figures do not indicate or limit the temporal order of these processes. In addition, it is also readily understood that these processes may be performed synchronously or asynchronously, for example, among a plurality of modules.
The exemplary embodiments of the present disclosure further provide an electronic device, which may include the above direct conversion receiver, and the specific structure of the direct conversion receiver is described in detail above, so that a detailed description thereof is omitted herein.
The configuration of the electronic device will be exemplarily described below using the mobile terminal 1100 of fig. 11 as an example. It will be appreciated by those skilled in the art that the configuration of fig. 11 can also be applied to stationary type devices in addition to components specifically for mobile purposes.
As shown in fig. 11, the mobile terminal 1100 may specifically include: processor 1101, memory 1102, bus 1103, mobile communication module 1104, antenna 1, wireless communication module 1105, antenna 2, display 1106, camera module 1107, audio module 1108, power module 1109, and sensor module 1110.
The processor 1101 may form a connection with the memory 1102 or other components through a bus 1103.
In an example embodiment, the processor 1101 may include the data processor and the digital signal processor described above.
Memory 1102 may be used to store computer-executable program code that includes instructions. The processor 1101 performs various functional applications and data processing of the mobile terminal 200 by executing instructions stored in the memory 1102. Memory 1102 may also store application data, such as files that store images, videos, and the like.
The communication functions of the mobile terminal 1100 may be implemented by the mobile communication module 1104, the antenna 1, the wireless communication module 1105, the antenna 2, a modem processor, a baseband processor, and the like. The antennas 1 and 2 are used for transmitting and receiving electromagnetic wave signals. The mobile communication module 1104 may provide a mobile communication solution of 2G, 3G, 4G, 5G, etc. applied on the mobile terminal 1100. The wireless communication module 1105 may provide a wireless communication solution for wireless local area network, bluetooth, near field communication, etc. that is applied to the mobile terminal 1100. The antenna 620 in fig. 6 includes the antenna 1 and the antenna 2 described above.
In this exemplary embodiment, the two-way rf conversion module in the direct conversion receiver may be disposed in the wireless communication module 1105, that is, the wireless communication module may include the mixer, the low-pass filter, the signal amplifier, and the analog-to-digital converter.
The processor 1101 and the wireless communication module 1105 together form the direct conversion receiver described above.
Display 1106 is used to implement display functions such as displaying user interfaces, images, video, and the like. The image capturing module 1107 is configured to implement capturing functions, such as capturing images, video, and the like. The audio module 1108 is used to implement audio functions such as playing audio, capturing speech, etc. The power module 1109 is configured to perform power management functions such as charging a battery, powering a device, monitoring a battery status, and the like. The sensor module 210 may include a depth sensor 11101, a pressure sensor 11102, a gyro sensor 11103, a barometric sensor 11104, etc. to implement a corresponding sensing function.
Those skilled in the art will appreciate that the various aspects of the present disclosure may be implemented as a system, method, or program product. Accordingly, various aspects of the disclosure may be embodied in the following forms, namely: an entirely hardware embodiment, an entirely software embodiment (including firmware, micro-code, etc.) or an embodiment combining hardware and software aspects may be referred to herein as a "circuit," module "or" system.
Exemplary embodiments of the present disclosure also provide a computer-readable storage medium having stored thereon a program product capable of implementing the method described above in the present specification. In some possible implementations, various aspects of the disclosure may also be implemented in the form of a program product comprising program code for causing a terminal device to carry out the steps according to the various exemplary embodiments of the disclosure as described in the "exemplary methods" section of this specification, when the program product is run on the terminal device.
It should be noted that the computer readable medium shown in the present disclosure may be a computer readable signal medium or a computer readable storage medium, or any combination of the two. The computer readable storage medium can be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the foregoing. More specific examples of the computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
In the context of this disclosure, a computer-readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. In the present disclosure, however, the computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, with the computer-readable program code embodied therein. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination of the foregoing. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to: wireless, wire, fiber optic cable, RF, etc., or any suitable combination of the foregoing.
Furthermore, the program code for carrying out operations of the present disclosure may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, C++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computing device, partly on the user's device, as a stand-alone software package, partly on the user's computing device, partly on a remote computing device, or entirely on the remote computing device or server. In the case of remote computing devices, the remote computing device may be connected to the user computing device through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computing device (e.g., connected via the Internet using an Internet service provider).
Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any adaptations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.
It is to be understood that the present disclosure is not limited to the precise arrangements and instrumentalities shown in the drawings, and that various modifications and changes may be effected without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.
Claims (8)
1. A direct conversion receiver, comprising:
each radio frequency conversion module comprises a mixer, a low-pass filter, a signal amplifier and an analog-to-digital converter which are connected in sequence; the mixer is used for mixing an input signal of the radio frequency conversion module and a local oscillation signal;
the data processor is used for acquiring initial output signals of the signal amplifiers of the two paths of radio frequency conversion modules, calculating standard output signals according to the input signals, and determining target improvement factors according to the initial output signals and the standard output signals;
the digital signal processor is connected with the output ends of the analog-to-digital converters of the two paths of radio frequency conversion modules at the same time and is used for receiving the reference output signals of the radio frequency conversion modules and updating the reference output signals according to the target improvement factors to obtain target output signals;
the storage bank is connected between the data processor and the digital signal processor and is used for storing a target improvement factor and input frequency corresponding to the target improvement factor;
the data processor is used for detecting the initial frequency of the input signal and transmitting a target improvement factor corresponding to the input frequency equal to the initial frequency to the digital signal processor.
2. The direct conversion receiver of claim 1, further comprising:
an antenna for receiving a signal to be received;
and the input end of the low-noise amplifier is connected with the antenna, and the output end of the low-noise amplifier is connected with the mixer and is used for preprocessing the signal to be received to obtain the input signal.
3. The data receiving method is applied to a direct conversion receiver, and the direct conversion receiver comprises two paths of radio frequency conversion modules, a data processor and a digital signal processor; each radio frequency conversion module comprises a mixer, a low-pass filter, a signal amplifier and an analog-to-digital converter which are connected in sequence; the mixer is used for mixing an input signal of the radio frequency conversion module and a local oscillation signal; the method comprises the following steps:
the data processor collects initial output signals of the signal amplifiers of the two paths of radio frequency conversion modules and calculates standard output signals according to the input signals;
the data processor determines a target improvement factor according to the initial output signal and the standard output signal;
the digital signal processor receives a reference output signal of the radio frequency conversion module and updates the reference output signal according to the target improvement factor to obtain a target output signal;
the direct conversion receiver further comprises a storage library, wherein the storage library is connected between the data processor and the digital signal processor and is used for storing a target improvement factor and input frequency corresponding to the target improvement factor; the method further comprises the steps of:
the data processor detects an initial frequency of the input signal and transmits a target improvement factor corresponding to an input frequency equal to the initial frequency to the digital signal processor.
4. A method according to claim 3, wherein the data processor calculating a standard output signal from the input signal comprises:
the data processor acquires the local oscillation signals and the filtering parameters of the low-pass filter and the amplification gain of the signal amplifier;
the data processor calculates the standard output signal based on the input signal, the local oscillator signal, the filter parameter, and the amplification gain.
5. The method of claim 3, wherein the two-way rf conversion module comprises a first rf conversion module and a second rf conversion module, and wherein determining the target improvement factor based on the initial output signal and the standard output signal comprises:
obtaining a first improvement factor according to a first initial output signal corresponding to the first radio frequency conversion module and the standard output signal;
obtaining a second improvement factor according to a second initial output signal corresponding to the second radio frequency conversion module and the standard output signal;
the target improvement factor is determined from the first improvement factor and the second improvement factor.
6. The method of claim 3, wherein the two-way rf conversion module comprises a first rf conversion module and a second rf conversion module, and wherein determining the target improvement factor based on the initial output signal and the standard output signal comprises:
determining a change parameter according to a first initial output signal corresponding to the first radio frequency conversion module and a second initial output signal corresponding to the second radio frequency conversion module;
and determining the target improvement factor according to the initial output signal, the variation parameter and the standard output signal.
7. A computer readable storage medium, on which a computer program is stored, characterized in that the program, when being executed by a processor, implements the method according to any of claims 3 to 6.
8. An electronic device, comprising:
the direct conversion receiver of claim 1 or 2.
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| JP4381945B2 (en) * | 2004-09-30 | 2009-12-09 | 株式会社ルネサステクノロジ | Receiver, receiving method, and portable wireless terminal |
| WO2020113946A1 (en) * | 2018-12-07 | 2020-06-11 | Huawei Technologies Co., Ltd. | I/q imbalance compensation |
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| US6356747B1 (en) * | 1998-07-28 | 2002-03-12 | Stmicroelectronics S.A. | Intermediary low-frequency frequency-conversion radiofrequency reception |
| JP2001028552A (en) * | 1999-07-14 | 2001-01-30 | Nippon Telegr & Teleph Corp <Ntt> | Direct conversion receiver |
| CN1643777A (en) * | 2002-01-24 | 2005-07-20 | 高通股份有限公司 | System and method for i-q mismatch compensation in a low if or zero if receiver |
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