CN114978214A - Direct conversion receiver, data receiving method, storage medium, and electronic device - Google Patents

Direct conversion receiver, data receiving method, storage medium, and electronic device Download PDF

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CN114978214A
CN114978214A CN202210565294.7A CN202210565294A CN114978214A CN 114978214 A CN114978214 A CN 114978214A CN 202210565294 A CN202210565294 A CN 202210565294A CN 114978214 A CN114978214 A CN 114978214A
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signal
output signal
improvement factor
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CN114978214B (en
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辛潇辉
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Guangdong Oppo Mobile Telecommunications Corp Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06Receivers
    • H04B1/16Circuits
    • H04B1/26Circuits for superheterodyne receivers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06Receivers
    • H04B1/16Circuits
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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Abstract

The present disclosure relates to the field of wireless communication technologies, and in particular, to a direct conversion receiver, a data receiving method, a storage medium, and an electronic device, where the direct conversion receiver includes two rf conversion modules, a data processor, and a digital signal processor, and each rf conversion module includes a mixer, a low-pass filter, a signal amplifier, and an analog-to-digital converter, which are connected in sequence; the data processor is used for acquiring initial output signals of the signal amplifiers of the two paths of radio frequency conversion modules and calculating standard output signals according to the input signals, and the data processor determines target improvement factors according to the initial output signals and the standard output signals; and the digital signal processor is simultaneously connected with the output ends of the analog-to-digital converters of the two radio frequency conversion modules and used for receiving the reference output signal of the radio frequency modules and updating the reference output signal according to the target improvement factor to obtain a target output signal. The technical scheme disclosed by the invention avoids the situation that two paths of signals of the direct frequency conversion receiver are not adaptive.

Description

Direct conversion receiver, data receiving method, storage medium, and electronic device
Technical Field
The present disclosure relates to the field of wireless communication technologies, and in particular, to a direct frequency conversion receiver, a data receiving method, a storage medium, and an electronic device.
Background
The direct frequency conversion receiver is a radio frequency receiver structure widely applied to mobile phones at present, and due to the fact that a certain phase and amplitude error exists in a local carrier wave, two paths of signals of the direct frequency conversion receiver cannot be adapted.
In the prior art, the adjustment precision of the phase and the amplitude is not enough in a mismatch reducing mode, and the complexity is high.
It is noted that the information disclosed in the above background section is only for enhancement of understanding of the background of the present disclosure and therefore may include information that does not constitute prior art that is already known to a person of ordinary skill in the art.
Disclosure of Invention
The purpose of the present disclosure is to provide a direct conversion receiver, a data receiving method, a computer readable medium, and an electronic device, so that the situation that two paths of signals of the direct conversion receiver are not adapted is improved at least to a certain extent, and the circuit complexity is low.
According to a first aspect of the present disclosure, there is provided a direct conversion receiver comprising: the system comprises two paths of radio frequency conversion modules, a frequency mixer, a low-pass filter, a signal amplifier and an analog-to-digital converter, wherein each path of radio frequency conversion module comprises the frequency mixer, the low-pass filter, the signal amplifier and the analog-to-digital converter which are connected in sequence; the frequency mixer is used for mixing the input signal of the radio frequency conversion module with the local oscillator signal; the data processor is used for acquiring initial output signals of the signal amplifiers of the two radio frequency conversion modules and calculating a standard output signal according to the input signal, and the data processor determines a target improvement factor according to the initial output signal and the standard output signal; and the digital signal processor is simultaneously connected with the output ends of the analog-to-digital converters of the two radio frequency conversion modules and used for receiving the reference output signal of the radio frequency module and updating the reference output signal according to the target improvement factor.
According to a second aspect of the present disclosure, a data receiving method is provided, which is applied to a direct frequency conversion receiver, where the direct frequency conversion receiver includes two radio frequency conversion modules, a data processor, and a digital signal processor; each radio frequency conversion module comprises a mixer, a low-pass filter, a signal amplifier and an analog-to-digital converter which are connected in sequence; the frequency mixer is used for mixing the input signal and the local oscillator signal of the radio frequency conversion module and comprises the following steps: the data processor collects two paths of initial output signals of the signal amplifier of the radio frequency conversion module and calculates a standard output signal according to the input signal; the data processor determining a target improvement factor based on an initial output signal and the standard output signal; and the digital signal processor receives a reference output signal of the radio frequency module and updates the reference output signal according to the target improvement factor.
According to a third aspect of the present disclosure, there is provided a computer readable medium having stored thereon a computer program which, when executed by a processor, performs the method described above.
According to a fourth aspect of the present disclosure, there is provided an electronic device comprising: the direct conversion receiver described above.
The direct frequency conversion receiver provided by the embodiment of the disclosure comprises two paths of radio frequency conversion modules, a data processor and a digital signal processor, wherein each path of radio frequency conversion module comprises a mixer, a low-pass filter, a signal amplifier and an analog-to-digital converter which are connected in sequence; the frequency mixer is used for mixing the input signal of the radio frequency conversion module with the local oscillator signal; the data processor is used for acquiring initial output signals of the signal amplifiers of the two paths of radio frequency conversion modules and calculating standard output signals according to the input signals, and the data processor determines target improvement factors according to the initial output signals and the standard output signals; and the digital signal processor is simultaneously connected with the output ends of the analog-to-digital converters of the two radio frequency conversion modules and used for receiving the reference output signal of the radio frequency modules and updating the reference output signal according to the target improvement factor to obtain a target output signal. Compared with the prior art, the method has the advantages that the standard output signal is calculated by the data processor, the target improvement factor is calculated according to the standard output signal, the target improvement factor is directly output to the digital signal processor, the reference output signal is updated by the digital signal processor, secondary errors caused by a frequency mixer and a signal amplifier are avoided, the precision of the obtained target output signal is improved, meanwhile, a complex logic circuit is not required to be designed, the adjustment can be completed without a variable gain amplifier, and the complexity of the circuit is reduced.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and together with the description, serve to explain the principles of the disclosure. It is to be understood that the drawings in the following description are merely exemplary of the disclosure, and that other drawings may be derived from those drawings by one of ordinary skill in the art without the exercise of inventive faculty. In the drawings:
fig. 1 is a circuit configuration diagram showing a direct conversion receiver in the related art;
FIG. 2 illustrates a circuit block diagram of a direct conversion receiver to which embodiments of the present disclosure may be applied;
FIG. 3 is a circuit diagram schematically illustrating a local oscillator signal source in an exemplary embodiment of the present disclosure;
FIG. 4 schematically illustrates a waveform diagram for characterizing phase differences and amplitude differences in exemplary embodiments of the present disclosure
FIG. 5 schematically illustrates a circuit configuration diagram of another direct conversion receiver in an exemplary embodiment of the present disclosure;
FIG. 6 schematically illustrates a circuit architecture diagram of yet another direct conversion receiver in an exemplary embodiment of the present disclosure;
fig. 7 schematically shows a flow chart of a data receiving method in an exemplary embodiment of the present disclosure;
FIG. 8 schematically illustrates a flow chart for calculating a target improvement factor in an exemplary embodiment of the disclosure;
FIG. 9 schematically illustrates another flow chart for calculating a target improvement factor in an exemplary embodiment of the disclosure;
FIG. 10 schematically illustrates a flow chart of data processor interaction with repository data in an exemplary embodiment of the present disclosure;
fig. 11 shows a schematic diagram of an electronic device to which an embodiment of the disclosure may be applied.
Detailed Description
Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many different forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.
Furthermore, the drawings are merely schematic illustrations of the present disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and thus their repetitive description will be omitted. Some of the block diagrams shown in the figures are functional entities and do not necessarily correspond to physically or logically separate entities. These functional entities may be implemented in the form of software, or in one or more hardware modules or integrated circuits, or in different networks and/or processor devices and/or microcontroller devices.
The direct conversion receiver is a radio frequency receiver architecture widely used in mobile phones at present. In the process of down-conversion, because of the local carrier sin ω used c t and cos omega c t has a certain phase and amplitude error (i.e. sin ω c t becomes
Figure BDA0003657894450000041
). Therefore, the I, Q two-path signals have mismatch, and the mismatch may be more serious by the later signal amplifier, so that the error rate is increased, and the sensitivity of the receiver is reduced.
Referring to fig. 1, one solution in the prior art is to add a variable phase stage 120 and a variable gain stage 110 to the local oscillator signal and the baseband path, respectively. A known single-tone signal is input at the input end, and after analog-to-digital conversion, the phase and amplitude errors of the two paths are analyzed I, Q through the digital logic circuit 130, so as to adjust the variable phase stage and the variable gain stage to reduce the mismatch.
However, the signal amplitude needs to be adjusted by the variable gain stage 110 after being analyzed by the logic circuit 130, and the non-linearity of the PA may make the gain adjustment inaccurate. The solution for determining the phase and amplitude error factors through the logic circuit 130 has a certain difficulty, the complexity of the solution is high, and the solution in the related art needs and performs a second mixing operation, which may cause a new error to appear.
Based on one or more of the above disadvantages, the present disclosure provides a new direct-conversion receiver, which includes two rf conversion modules, a data processor, and a digital signal processor, wherein each rf conversion module includes a mixer, a low-pass filter, a signal amplifier, and an analog-to-digital converter, which are connected in sequence; the frequency mixer is used for mixing the input signal of the radio frequency conversion module with the local oscillator signal; the data processor is used for acquiring initial output signals of the signal amplifiers of the two paths of radio frequency conversion modules and calculating standard output signals according to the input signals, and the data processor determines target improvement factors according to the initial output signals and the standard output signals; and the digital signal processor is simultaneously connected with the output ends of the analog-to-digital converters of the two radio frequency conversion modules and used for receiving the reference output signal of the radio frequency modules and updating the reference output signal according to the target improvement factor to obtain a target output signal.
According to the technical scheme, the data processor is used for calculating the standard output signal, the target improvement factor is calculated according to the standard output signal, the digital signal processor outputs the target improvement factor to the digital signal processor, the reference output signal is updated by the digital signal processor to obtain the target output signal, secondary errors caused by a mixer and a signal amplifier are avoided, the precision of the obtained target output signal is improved, meanwhile, a complex logic circuit is not required to be designed, the adjustment can be completed without a variable gain amplifier, and the complexity of the circuit is reduced.
The following describes each device in the direct conversion receiver in detail.
In this exemplary embodiment, referring to fig. 2, the two rf conversion modules are arranged in parallel, and may include a first rf conversion module and a second rf conversion module, where the first rf conversion module may include a first mixer 211, a first low pass filter 221, a first signal amplifier 231, and a first analog-to-digital converter 241, which are connected in sequence, and the second rf conversion module includes a second mixer 212, a second low pass filter 222, a second signal amplifier 232, and a second analog-to-digital converter 242, which are connected at a time, where the mixer is configured to mix a local oscillator signal with an input signal of the rf conversion module.
In this exemplary embodiment, specific parameters and specific signals of each device in the first radio frequency module and the second radio frequency module may be customized according to user requirements, and are not specifically limited in this exemplary embodiment.
In this exemplary embodiment, the local oscillator signals include a first local oscillator signal and a second local oscillator signal, and the first local oscillator signal and the second local oscillator signal have a polarization of 90 degrees therebetween, for example, the first local oscillator signal is cos ω c t, the second local oscillator signal is sin ω c t, where t represents time, ω c Representing the frequency of the local oscillator signal.
In this exemplary embodiment, referring to fig. 3, the first local oscillator signal and the second local oscillator signal may be sent by the same signal source 280, and a polarization module 270 is connected between the first local oscillator signal or the second local oscillator signal and the signal source 280, where a polarization angle of the polarization module 270 is 90 degrees, so that a phase difference between the first local oscillator signal and the second local oscillator signal is 90 degrees.
In this exemplary embodiment, the local oscillator signal is a carrier signal, which has a frequency greater than that of the input signal, and after passing through the low pass filter, the local oscillator signal may be filtered.
In the present exemplary embodiment, the amplification factor of the signal amplifier can be customized according to the requirements of users, and is not limited in the present exemplary embodiment.
In the present exemplary embodiment, the data processor 250 is connected to the output terminal of the first signal amplifier 231 and the output terminal of the second signal amplifier 232, and is configured to collect the initial output signals of the two signal amplifiers, that is, collect the first initial output signal and the second initial output signal of the first signal amplifier 231.
Meanwhile, the data processor 250 may be configured to collect the first local oscillation signal, the second local oscillation signal, the input data, the filtering parameter of the low-pass filter, and the amplification gain of the signal amplifier. For calculating the above-mentioned reference output signal.
For example, it is assumed that the signal transmitter (not shown) transmits a single-frequency signal, specifically:
Figure BDA0003657894450000061
wherein x (t) is the single-frequency signal, ω 0 The frequency of the single-frequency signal.
Without considering the channel noise and assuming the ideal transmitting end, the input signal to the direct conversion receiver is:
Figure BDA0003657894450000062
where Re () is a real operation, w c Is the frequency of the local oscillator signal.
If the received signal is subjected to ideal IQ two-way demodulation, the IQ two-way ideal signal can be represented as follows:
Figure BDA0003657894450000063
Figure BDA0003657894450000064
wherein, the above-mentioned I id (t) represents a first standard output signal, Q, corresponding to the first RF conversion module id (t) represents a second standard output signal corresponding to the second rf transform module, and filter () is a filtering operation.
In the present exemplary embodiment, after obtaining the above-described standard output signal, the data processor 250 may calculate a target improvement factor from the above-described initial output signal.
In an example embodiment, the data processor 250 may determine the first improvement factor using the first initial output signal determination and the first standard output signal, then determine the second improvement factor using the second initial output signal and the second standard output signal, and then input the first and second improvement factors as the target improvement factor to the data signal processor. Referring to fig. 4, the target improvement factor may include a phase difference 402 and an amplitude difference 401, wherein the phase difference 402 may include a first phase difference of a first initial output signal and the first standard output signal and a second phase difference of a second initial output signal and the second standard output signal; the amplitude difference 401 may include a first amplitude difference of the first initial output signal and the first standard output signal and a second amplitude difference of the second initial output signal and the second standard output signal.
For example, assume that the first initial output signal is represented as
Figure BDA0003657894450000071
The second initial output signal is represented as
Figure BDA0003657894450000072
In this case, the first improvement factor and the second improvement factor may be calculated according to the first annotation data and the second standard output signal, that is, the amplitude difference and the phase difference between the first initial output signal and the first standard output signal are used as the first improvement factor, and the amplitude difference and the phase difference between the second initial output signal and the second standard output signal are used as the second improvement factor.
In another exemplary embodiment, the data processor 250 may determine a variation parameter using the first initial output signal and the second initial output signal, and then determine the target improvement factor based on the variation parameter, the first initial output signal, the second initial output signal, and the first standard output data and the second standard output data.
For example, assume that the first initial output signal is represented as
Figure BDA0003657894450000073
The second initial output signal is represented as
Figure BDA0003657894450000074
The data processor 250 can determine the amplitude difference between the first initial output signal and the second initial output signal based on the first initial output signal and the second initial output signal
Figure BDA0003657894450000075
And the phase difference phi can be obtained by FFT (fast Fourier transform) and fast Fourier transform) to obtain the amplitude spectrum and the phase spectrum of the two paths of signals, so that the amplitude difference is obtained by comparison
Figure BDA0003657894450000076
And a phase difference phi. Or by averaging the squares of the signals. And is not particularly limited in the present exemplary embodiment. Wherein the above-mentioned amplitude difference can be used
Figure BDA0003657894450000077
And the phase difference phi as the above-mentioned variation parameter.
For example, for convenience of calculation, the first initial output signal and the second initial signal may be respectively expressed as:
Figure BDA0003657894450000078
Q(t0=sin(w 0 t+φ0
the above-mentioned amplitude difference
Figure BDA0003657894450000079
The sum phase difference phi is used as the variation parameter, and the target improvement factor is assumed to be
Figure BDA0003657894450000081
Then:
Figure BDA0003657894450000082
let I cor (t)=cos(w 0 t),Q cor (t)=sin(w o t) respectively represent the first standard output data and the second standard output data.
Figure BDA0003657894450000083
Q imb (t)=sin(w 0 t + φ) represents the first initial output signal and the second initial output signal, respectively, and can be calculated as:
Figure BDA0003657894450000084
B=0,
Figure BDA0003657894450000085
i.e. the value of each element in the matrix of the target improvement factor M is obtained, i.e. the target improvement factor M can be calculated.
In an exemplary embodiment of the disclosure, the digital signal processor 260 is simultaneously connected to the output ends of the analog-to-digital converters of the two rf conversion modules, that is, the output end of the first analog-to-digital converter 241 and the output end of the second analog-to-digital conversion module. The digital signal receiver may be configured to receive the reference output signal, i.e., a first reference output signal corresponding to the first adc 241 and a second reference output signal corresponding to the second adc 242, and then receive the target improvement factor, and update the reference output signal by using the target improvement factor to obtain a target output signal. Namely, the mismatch between the first rf conversion module and the second rf conversion module is compensated in a digital manner. Through digital compensation, a variable gain amplifier and a variable phase stage are not required to be arranged, the circuit structure is simplified, errors caused by secondary mixing are avoided, and the debugging precision is improved.
In an exemplary embodiment of the disclosure, referring to fig. 5, the direct conversion receiver may further include a storage 290, where the storage 290 is connected between the data processor 250 and the digital signal processor 260, and is used for storing a target improvement factor and an input frequency corresponding to the target improvement factor. When the data processor 250 calculates the target improvement factor, the target improvement factor is not only transmitted to the digital signal processor 260, but the target improvement factor and the corresponding input frequency thereof may be stored in the repository 290, and a plurality of target improvement factors and corresponding output frequencies thereof may be stored in the repository 290 in advance.
In the present exemplary embodiment, when a new input signal is obtained, the data processor 250 may detect an initial frequency of the input signal, find whether there is an input frequency identical to the initial frequency in the repository 290, and directly transmit a target improvement factor corresponding to the input frequency identical to the initial frequency to the digital signal processor 260 if there is the input frequency identical to the initial frequency, so as to avoid recalculation by the data processor and reduce the calculation time. If not, the data processor 250 calculates a target improvement factor corresponding to the input signal, stores the input frequency and the target improvement factor in the repository 290, and transmits the target improvement factor to the digital signal processor 260.
In an exemplary embodiment of the disclosure, referring to fig. 6, the direct conversion receiver may further include an antenna 620 and a low noise amplifier 610, where the antenna 620 is configured to receive a signal to be received, an input end of the low noise amplifier 610 is connected to the antenna 620, and an output end of the low noise amplifier 610 is connected to the mixer, and is configured to pre-process the signal to be received to obtain the input signal.
The low noise amplifier 610 is an amplifier with a very low noise coefficient, for example, the amplifier with the noise coefficient smaller than a preset value is determined as the low noise amplifier 610, where the preset value may be 2 or 3, and may also be customized according to a user requirement, which is not specifically limited in this exemplary embodiment.
Further, the present disclosure also provides a data receiving method, which is applied to a direct frequency conversion receiver, where the direct frequency conversion receiver includes two radio frequency conversion modules, a data processor 250 and a digital signal processor 260; each radio frequency conversion module comprises a mixer, a low-pass filter, a signal amplifier and an analog-to-digital converter which are connected in sequence; the mixer is configured to mix an input signal and a local oscillator signal, and as shown in fig. 7, the data receiving method may include the following steps:
step S710, the data processor collects the initial output signals of the signal amplifiers of the two paths of radio frequency conversion modules and calculates standard output signals according to the input signals;
step S720, the data processor determines a target improvement factor according to the initial output signal and the standard output signal;
in step S730, the digital signal processor receives the reference output signal of the rf module and updates the reference output signal according to the target improvement factor.
Compared with the prior art, the data receiving method in the disclosure calculates the standard output signal by using the data processor 250, calculates the target improvement factor according to the standard output signal, directly outputs the target improvement factor to the digital signal processor 260, and updates the reference output signal by using the digital signal processor 260, thereby avoiding secondary errors caused by a mixer and a signal amplifier, improving the precision of the obtained reference output signal, simultaneously, completing the adjustment of the reference output signal without designing a complex logic circuit or using a variable gain amplifier, and reducing the complexity of the circuit.
The above steps will be described in detail below.
The above description has been given for the structural part of the direct conversion receiver, and specific details regarding the circuit structure can refer to the above description of the direct conversion receiver, and therefore, the detailed description thereof is omitted here.
In step S710, the data processor collects two initial output signals of the signal amplifier of the rf conversion module, and calculates a standard output signal according to the input signal;
in the present exemplary embodiment, the data processor 250 is connected to the output terminal of the first signal amplifier 231 and the output terminal of the second signal amplifier 232, and is configured to collect the initial output signals of the two signal amplifiers, that is, collect the first initial output signal and the second initial output signal of the first signal amplifier 231.
Meanwhile, the data processor 250 may be configured to collect the first local oscillation signal, the second local oscillation signal, the input data, a filtering parameter of the low-pass filter, and an amplification gain of the signal amplifier. For calculating the above-mentioned reference output signal.
For example, it is assumed that the signal transmitter (not shown) transmits a single-frequency signal, specifically:
Figure BDA0003657894450000101
wherein x (t) is the single-frequency signal, w 0 The frequency of the single-frequency signal.
Without considering the channel noise and assuming the ideal transmitting end, the input signal to the direct conversion receiver is:
Figure BDA0003657894450000102
where Re () is the real operation, w c Is the frequency of the local oscillator signal.
If the received signal is ideally IQ-demodulated, the IQ-two ideal signal can be represented as follows:
Figure BDA0003657894450000103
Figure BDA0003657894450000104
wherein, the above-mentioned I id (t) represents a first standard output signal, Q, corresponding to the first RF conversion module id And (t) represents a second standard output signal corresponding to the second radio frequency conversion module, and the filter is filtering operation.
In the present exemplary embodiment, after the above-described standard output signal is obtained, step S720 may be performed.
In step S720, the data processor determines a target improvement factor according to the initial output signal and the standard output signal;
in an example embodiment, referring to fig. 8, the data processor determining the target improvement factor based on the initial output signal and the standard output signal may include steps S810 to S830.
In step S810, a first improvement factor is obtained according to a first initial output signal and a standard output signal corresponding to the first rf transform module;
in step S820, a second improvement factor is obtained according to a second initial output signal and a standard output signal corresponding to the second rf transform module.
The data processor 250 may determine the first improvement factor using the first initial output signal determination and the first standard output signal and then determine the second improvement factor using the second initial output signal and the second standard output signal. Referring to fig. 4, the target improvement factor may include a phase difference and an amplitude difference, wherein the phase difference may include a first phase difference between a first initial output signal determination and the first standard output signal and a second phase difference between a second initial output signal determination and the second standard output signal.
For example, assume that the first initial output signal is represented as
Figure BDA0003657894450000111
The second initial output signal is represented as
Figure BDA0003657894450000112
At this time, the output can be made based on the first and second standard dataThe signal calculates the first improvement factor and the second improvement factor, namely, the amplitude difference and the phase difference between the first initial output signal and the first standard output signal are used as the first improvement factor, and the amplitude difference and the phase difference between the second initial output signal and the second standard output signal are used as the second improvement factor.
In step S830, a target improvement factor is determined based on the first improvement factor and the second improvement factor.
In the present exemplary embodiment, the first improvement factor and the second improvement factor may be input to the data signal processor as the target improvement factor.
In another example embodiment, referring to fig. 9, the data processor 250 may include steps S910 to S920 to determine the target improvement factor according to the initial output signal and the standard output signal.
In step S910, determining a variation parameter according to a first initial output signal corresponding to a first rf transform module and a second initial output signal corresponding to a second rf transform module;
in step S920, a target improvement factor is determined based on the initial output signal, the variation parameter, and the standard output signal.
In the present exemplary embodiment, the data processor 250 may determine a variation parameter using the first initial output signal and the second initial output signal, and then determine the target improvement factor based on the variation parameter, the first initial output signal, the second initial output signal, and the first standard output data and the second standard output data.
For example, assume that the first initial output signal is represented as
Figure BDA0003657894450000121
The second initial output signal is represented as
Figure BDA0003657894450000122
The data processor 250 can derive a first initial output signal and a second initial output signal based on the first initial output signal and the second initial output signalAmplitude difference between the second initial output signals
Figure BDA0003657894450000123
The sum phase difference phi can be obtained through FFT to obtain the amplitude spectrum and the phase spectrum of the two paths of signals, so that the amplitude difference is obtained through comparison
Figure BDA0003657894450000124
And a phase difference phi. Or by averaging the squares of the signals. And is not particularly limited in the present exemplary embodiment. Wherein the above-mentioned amplitude difference can be used
Figure BDA0003657894450000125
And the phase difference phi as the above-mentioned variation parameter.
For example, for convenience of calculation, the first initial output signal and the second initial signal may be respectively expressed as:
Figure BDA0003657894450000126
Q(t0=sin(w 0 t+φ0
the above-mentioned amplitude difference
Figure BDA0003657894450000127
The sum phase difference phi is used as the variation parameter, and the target improvement factor is assumed to be
Figure BDA0003657894450000128
Then:
Figure BDA0003657894450000129
let I cor (t)=cos(w 0 t),Q cor (t)=sin(w o t) respectively represent the first standard output data and the second standard output data.
Figure BDA00036578944500001210
Q im8 (t)=sin(w 0 t + phi) represents a first initial output signal and a second initial output signal, respectivelyThe output signal can be calculated as:
Figure BDA00036578944500001211
B=0,
Figure BDA00036578944500001212
the value of each element in the matrix of the target improvement factor M is obtained, i.e. the target improvement factor M is calculated.
In step S730, the digital signal processor receives the reference output signal of the rf module and updates the reference output signal according to the target improvement factor.
In an exemplary embodiment of the disclosure, the digital signal processor 260 is simultaneously connected to the output ends of the analog-to-digital converters of the two rf conversion modules, that is, to the output end of the first analog-to-digital converter 241 and the output end of the second analog-to-digital conversion module. The digital signal receiver may be configured to receive the reference output signal, i.e., a first reference output signal corresponding to the first adc 241 and a second reference output signal corresponding to the second adc 242, and then receive the target improvement factor, and update the reference output signal by using the target improvement factor to obtain a target output signal. Namely, the mismatch between the first rf conversion module and the second rf conversion module is compensated in a digital manner. Through digital compensation, a variable gain amplifier and a variable phase stage are not required to be arranged, the circuit structure is simplified, errors caused by secondary mixing are avoided, and the debugging precision is increased.
In an exemplary embodiment of the disclosure, referring to fig. 5, the direct conversion receiver may further include a storage 290, where the storage 290 is connected between the data processor 250 and the digital signal processor 260, and is used for storing a target improvement factor and an input frequency corresponding to the target improvement factor. When the data processor 250 calculates the target improvement factor, the target improvement factor is not only transmitted to the digital signal processor 260, but the target improvement factor and the corresponding input frequency thereof may be stored in the repository 290, and a plurality of target improvement factors and corresponding output frequencies thereof may be stored in the repository 290 in advance.
Referring to fig. 10, in the exemplary embodiment, when obtaining a new input signal, the data processor may first perform step S1010, detect an initial frequency of the input signal, then perform step S1020, find whether there is an input frequency in the repository that is the same as the initial frequency, and if so, perform step S1030, transmit a target improvement factor corresponding to the input frequency that is the same as the initial frequency to the digital signal processor, thereby avoiding the re-calculation by the processor and reducing the calculation time. If not, step S1040 is executed, the data processor calculates a target improvement factor corresponding to the input signal, step S1050 is executed, the input frequency and the target improvement factor are stored in the repository, and step S1060 is executed, the target improvement factor is transmitted to the digital signal processor.
In summary, in the exemplary embodiment, the data processor is used to calculate the standard output signal, calculate the target improvement factor according to the standard output signal, and directly output the target improvement factor to the digital signal processor, and the digital signal processor updates the reference output signal to obtain the target output signal, thereby avoiding secondary errors caused by the mixer and the signal amplifier, improving the precision of the obtained target output signal, and simultaneously, completing the adjustment without designing a complex logic circuit or using a variable gain amplifier, and reducing the complexity of the circuit. Meanwhile, the storage library is introduced, the input frequency and the corresponding target improvement factor are stored in the storage library, when the input signal with the initial frequency equal to the input frequency is received again, the data processor only needs to read the corresponding target improvement factor and transmit the target improvement factor to the digital signal processor, re-calculation is not needed, the calculation resource is saved, the adjustment speed is increased, and the data receiving speed is accelerated.
It is noted that the above-mentioned figures are merely schematic illustrations of processes involved in methods according to exemplary embodiments of the present disclosure, and are not intended to be limiting. It will be readily understood that the processes shown in the above figures are not intended to indicate or limit the chronological order of the processes. In addition, it is also readily understood that these processes may be performed synchronously or asynchronously, e.g., in multiple modules.
Exemplary embodiments of the present disclosure also provide an electronic device, where the electronic device may include the direct conversion receiver, and a specific structure of the direct conversion receiver is described in detail above, and therefore, is not described herein again.
The configuration of the electronic device will be exemplarily described below by taking the mobile terminal 1100 in fig. 11 as an example. It will be appreciated by those skilled in the art that the configuration of figure 11 can also be applied to fixed type devices, in addition to components specifically intended for mobile purposes.
As shown in fig. 11, the mobile terminal 1100 may specifically include: processor 1101, memory 1102, bus 1103, mobile communication module 1104, antenna 1, wireless communication module 1105, antenna 2, display 1106, camera module 1107, audio module 1108, power module 1109, and sensor module 1110.
The processor 1101 may be connected to the memory 1102 or other components by a bus 1103.
In an example embodiment, the processor 1101 may include the data processor and digital signal processor described above, among others.
Memory 1102 may be used to store computer-executable program code, which includes instructions. The processor 1101 executes various functional applications of the mobile terminal 200 and data processing by executing instructions stored in the memory 1102. The memory 1102 may also store application data, such as files for storing images, videos, and the like.
The communication function of the mobile terminal 1100 may be implemented by the mobile communication module 1104, the antenna 1, the wireless communication module 1105, the antenna 2, a modem processor, a baseband processor, and the like. The antennas 1 and 2 are used for transmitting and receiving electromagnetic wave signals. The mobile communication module 1104 may provide a mobile communication solution of 2G, 3G, 4G, 5G, etc. applied to the mobile terminal 1100. The wireless communication module 1105 may provide wireless communication solutions for wireless lan, bluetooth, near field communication, etc. applied to the mobile terminal 1100. The antenna 620 in fig. 6 includes the above-described antenna 1 and antenna 2.
In this exemplary embodiment, the two-way rf conversion module in the direct conversion receiver may be disposed in the wireless communication module 1105, that is, the wireless communication module may include the mixer, the low pass filter, the signal amplifier, and the analog-to-digital converter.
The processor 1101 and the wireless communication module 1105 together form the direct conversion receiver described above.
The display screen 1106 is used to implement display functions, such as displaying a user interface, images, video, and the like. The camera module 1107 is used to implement a camera function, such as capturing images, video, and the like. The audio module 1108 is used to implement audio functions, such as playing audio, collecting voice, etc. The power module 1109 is used to implement power management functions, such as charging batteries, supplying power to devices, monitoring battery status, etc. The sensor module 210 may include a depth sensor 11101, a pressure sensor 11102, a gyro sensor 11103, an air pressure sensor 11104, etc. to implement a corresponding sensing detection function.
As will be appreciated by one skilled in the art, aspects of the present disclosure may be embodied as a system, method or program product. Accordingly, various aspects of the present disclosure may be embodied in the form of: an entirely hardware embodiment, an entirely software embodiment (including firmware, microcode, etc.) or an embodiment combining hardware and software aspects that may all generally be referred to herein as a "circuit," module "or" system.
Exemplary embodiments of the present disclosure also provide a computer-readable storage medium having stored thereon a program product capable of implementing the above-described method of the present specification. In some possible embodiments, various aspects of the disclosure may also be implemented in the form of a program product comprising program code for causing a terminal device to perform the steps according to various exemplary embodiments of the disclosure as described in the above-mentioned "exemplary methods" section of this specification, when the program product is run on the terminal device.
It should be noted that the computer readable media shown in the present disclosure may be computer readable signal media or computer readable storage media or any combination of the two. A computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples of the computer readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
In the present disclosure, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. In contrast, in the present disclosure, a computer readable signal medium may comprise a propagated data signal with computer readable program code embodied therein, either in baseband or as part of a carrier wave. Such a propagated data signal may take many forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to: wireless, wire, fiber optic cable, RF, etc., or any suitable combination of the foregoing.
Furthermore, program code for carrying out operations of the present disclosure may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computing device, partly on the user's device, as a stand-alone software package, partly on the user's computing device and partly on a remote computing device, or entirely on the remote computing device or server. In the case of a remote computing device, the remote computing device may be connected to the user computing device through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computing device (e.g., through the internet using an internet service provider).
Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any variations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.
It will be understood that the present disclosure is not limited to the precise arrangements described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is to be limited only by the terms of the appended claims.

Claims (10)

1. A direct conversion receiver, comprising:
the system comprises two paths of radio frequency conversion modules, a frequency mixer, a low-pass filter, a signal amplifier and an analog-to-digital converter, wherein each path of radio frequency conversion module comprises the frequency mixer, the low-pass filter, the signal amplifier and the analog-to-digital converter which are connected in sequence; the frequency mixer is used for mixing the input signal of the radio frequency conversion module with the local oscillator signal;
the data processor is used for acquiring initial output signals of the signal amplifiers of the two paths of radio frequency conversion modules and calculating standard output signals according to the input signals, and the data processor determines target improvement factors according to the initial output signals and the standard output signals;
and the digital signal processor is simultaneously connected with the output ends of the analog-to-digital converters of the two radio frequency conversion modules and used for receiving the reference output signal of the radio frequency change module and updating the reference output signal according to the target improvement factor to obtain a target output signal.
2. The direct conversion receiver of claim 1, further comprising:
the storage bank is connected between the data processor and the digital signal processor and used for storing a target improvement factor and an input frequency corresponding to the target improvement factor;
the data processor is used for detecting an initial frequency of the input signal and transmitting a target improvement factor corresponding to an input frequency equal to the initial frequency to the digital signal processor.
3. Direct conversion receiver according to claim 1 or 2, characterized in that the direct conversion receiver further comprises:
an antenna for receiving a signal to be received;
and the input end of the low-noise amplifier is connected to the antenna, and the output end of the low-noise amplifier is connected to the frequency mixer and used for preprocessing the signal to be received to obtain the input signal.
4. A data receiving method is applied to a direct frequency conversion receiver, and the direct frequency conversion receiver comprises two paths of radio frequency conversion modules, a data processor and a digital signal processor; each radio frequency conversion module comprises a mixer, a low-pass filter, a signal amplifier and an analog-to-digital converter which are connected in sequence; the frequency mixer is used for mixing the input signal of the radio frequency conversion module with the local oscillator signal; the method comprises the following steps:
the data processor collects two paths of initial output signals of the signal amplifier of the radio frequency conversion module and calculates a standard output signal according to the input signal;
the data processor determining a target improvement factor based on an initial output signal and the standard output signal;
and the digital signal processor receives a reference output signal of the radio frequency module and updates the reference output signal according to the target improvement factor to obtain a target output signal.
5. The method of claim 4, wherein the data processor computing a standard output signal from the input signal comprises:
the data processor acquires a local oscillation signal, filtering parameters of the low-pass filter and amplification gain of the signal amplifier;
and the data processor calculates the standard output signal according to the input signal, the local oscillation signal, the filtering parameter and the amplification gain.
6. The method of claim 4, wherein the two RF transform modules comprise a first RF transform module and a second RF transform module, and wherein determining the target improvement factor based on the initial output signal and the standard output signal comprises:
obtaining the first improvement factor according to a first initial output signal corresponding to the first radio frequency conversion module and the standard output signal;
obtaining the second improvement factor according to a second initial output signal corresponding to the second radio frequency conversion module and the standard output signal;
determining the target improvement factor based on the first improvement factor and the second improvement factor.
7. The method of claim 4, wherein the two RF transform modules comprise a first RF transform module and a second RF transform module, and wherein determining the target improvement factor based on the initial output signal and the standard output signal comprises:
determining a change parameter according to a first initial output signal corresponding to the first radio frequency conversion module and a second initial output signal corresponding to the second radio frequency conversion module;
determining the target improvement factor based on the initial output signal, the variation parameter, and the standard output signal.
8. The method of claim 4, wherein the direct conversion receiver further comprises a storage bank connected between the data processor and the digital signal processor for storing a target improvement factor and an input frequency corresponding to the target improvement factor; the method further comprises the following steps:
the data processor detects an initial frequency of the input signal and transmits a target improvement factor corresponding to an input frequency equal to the initial frequency to the digital signal processor.
9. A computer-readable storage medium, on which a computer program is stored, which program, when being executed by a processor, carries out the method according to any one of claims 4 to 8.
10. An electronic device, comprising:
a direct conversion receiver as claimed in any one of claims 1 to 3.
CN202210565294.7A 2022-05-23 2022-05-23 Direct conversion receiver, data receiving method, storage medium and electronic device Active CN114978214B (en)

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