CN114937672A - Display panel and display device - Google Patents

Display panel and display device Download PDF

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Publication number
CN114937672A
CN114937672A CN202210610139.2A CN202210610139A CN114937672A CN 114937672 A CN114937672 A CN 114937672A CN 202210610139 A CN202210610139 A CN 202210610139A CN 114937672 A CN114937672 A CN 114937672A
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China
Prior art keywords
lead
area
region
pin
fan
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CN202210610139.2A
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Chinese (zh)
Inventor
王聪
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Wuhan Tianma Microelectronics Co Ltd
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Wuhan Tianma Microelectronics Co Ltd
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Priority to CN202210610139.2A priority Critical patent/CN114937672A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
    • H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals

Abstract

The embodiment of the invention provides a display panel and a display device, relates to the technical field of display, and aims to improve the display uniformity of the display panel. The fan-out wiring area of the display panel comprises a first area, a second area and a third area which are sequentially arranged along a first direction; the fan-out wiring area comprises a first lead, a second lead and a third lead; in the first region, the first lead, the second lead, and the third lead are arranged in a second direction; in the first area, the distance between the first lead and the second lead is d112, the distance between the second lead and the third lead is d123, and d123 is larger than or equal to d 112; in the second region, the second lead and the third lead are adjacent; the second lead and the third lead are arranged in parallel; alternatively, the second region includes a line of symmetry, and the second lead and the third lead are symmetrically disposed about the line of symmetry.

Description

Display panel and display device
[ technical field ] A method for producing a semiconductor device
The invention relates to the technical field of display, in particular to a display panel and a display device.
[ background ] A method for producing a semiconductor device
With the continuous development of science and technology, more and more display devices are widely applied to daily life and work of people, and become an indispensable important tool for people at present. Further, with the development of display technologies, the demands of users on the display effects of display devices are increasing. At present, the display panel has the problem of uneven display during display.
[ summary of the invention ]
In view of the above, embodiments of the present invention provide a display panel and a display device, so as to improve the display uniformity of the display panel.
In one aspect, an embodiment of the present invention provides a display panel, including a display area, a fan-out routing area, and a pin area arranged along a first direction, where the fan-out routing area includes a first area, a second area, and a third area arranged sequentially along the first direction;
the display area comprises a first signal line, a second signal line and a third signal line;
the fan-out wiring area comprises a first lead, a second lead and a third lead, the first lead is electrically connected with the first signal wire, the second lead is electrically connected with the second signal wire, and the third lead is electrically connected with the third signal wire; the first lead, the second lead and the third lead all extend from the first region to at least the third region;
in the first region, the first, second, and third leads are arranged in a second direction intersecting the first direction; in the first area, the distance between the first lead and the second lead is d112, the distance between the second lead and the third lead is d123, and d123 is larger than or equal to d 112;
in the second region, the second lead and the third lead are adjacent; the second lead and the third lead are arranged in parallel; or the second region includes a line of symmetry about which the second and third leads are symmetrically disposed;
in the third region, the first, second, and third leads are arranged in the second direction.
In another aspect, an embodiment of the present invention provides a display device, which includes the display panel described above.
According to the display panel and the display device provided by the embodiment of the invention, the fan-out wiring area is divided into the first area, the second area and the third area which are arranged along the first direction, so that the arrangement mode of the leads arranged in each area can be set according to the function difference required to be realized by each area. In the first region, the first lead, the second lead, and the third lead are arranged in the second direction, and the distance d112 between the first lead and the second lead is smaller than or equal to the distance d123 between the second lead and the third lead, so that a space for disposing a lead for transmitting other types of signals can be left between the second lead and the third lead in the first region. In the second region, the second lead and the third lead in the second region may be arranged in parallel, or the second lead and the third lead may be arranged symmetrically, so that the lengths of the second lead and the third lead in the second region may be the same. The impedance of the second lead and the third lead passing through the first region and the second region is made to be uniform while satisfying the design requirement of the first region. When each pixel in the display panel is displayed at the same target brightness, the actual brightness of the second pixel column connected with the second lead and the actual brightness of the third pixel column connected with the third lead can be consistent, the display uniformity is improved, and the display effect of the display panel is improved.
[ description of the drawings ]
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic diagram of a display panel according to an embodiment of the present invention;
fig. 2 is a schematic partial enlarged view of a display panel according to an embodiment of the invention;
FIG. 3 is a partially enlarged schematic view of another display panel according to an embodiment of the invention;
fig. 4 is a partially enlarged schematic view of another display panel according to an embodiment of the invention;
FIG. 5 is a schematic partial enlarged view of another display panel according to an embodiment of the present invention;
FIG. 6 is a schematic cross-sectional view of a display panel according to an embodiment of the present invention;
FIG. 7 is an enlarged schematic view of a first region of a display panel according to an embodiment of the present invention;
fig. 8 is a schematic cross-sectional view of a first region of a display panel according to an embodiment of the invention;
fig. 9 is a schematic cross-sectional view of a third area of a display panel according to an embodiment of the invention;
fig. 10 is a schematic diagram of a display device according to an embodiment of the present invention.
[ detailed description ] embodiments
For better understanding of the technical solutions of the present invention, the following detailed descriptions of the embodiments of the present invention are provided with reference to the accompanying drawings.
It should be understood that the described embodiments are only some embodiments of the invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the examples of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be understood that the term "and/or" as used herein is merely one type of association that describes an associated object, meaning that three relationships may exist, e.g., a and/or B may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter related objects are in an "or" relationship.
It should be understood that although the terms first, second, third, etc. may be used to describe the leads in embodiments of the present invention, the leads should not be limited to these terms. These terms are only used to distinguish a plurality of leads from one another. For example, a first lead may also be referred to as a second lead, and similarly, a second lead may also be referred to as a first lead, without departing from the scope of embodiments of the present invention.
An embodiment of the present invention provides a display panel, as shown in fig. 1, fig. 1 is a schematic diagram of a display panel provided in an embodiment of the present invention, where the display panel includes a display area AA, a fan-out routing area FA, and a pin area PA, which are arranged along a first direction h 1.
The display area AA is provided with a plurality of sub-pixels, and signal lines connected to the sub-pixels. For example, the display area AA includes the first signal line 11, the second signal line 12, and the third signal line 13 shown in fig. 1. The lead area PA is provided with a plurality of leads (pad). After the display panel is manufactured, an Integrated Circuit (IC) is connected to the bonding pads in the pad area PA. The fan-out wiring area FA is provided with a plurality of leads for connecting the pins in the pin area PA and the corresponding signal lines in the display area AA. For example, the fan-out routing area FA includes a first lead, a second lead, and a third lead; the pin area PA includes a first pin, a second pin, and a third pin. The first signal line 11 is electrically connected to the first pin through a first lead, the second signal line 12 is electrically connected to the second pin through a second lead, and the third signal line 13 is electrically connected to the third pin through a third lead.
When the display panel works, each pin in the pin area PA receives a signal provided by the integrated circuit, and provides the signal to the pixel in the display area AA through the pin in the fan-out wiring area FA to drive the display panel to display.
When the leads located in the fan-out routing area FA are arranged, as shown in fig. 2 and fig. 3, fig. 2 is a partially enlarged schematic view of a display panel provided in an embodiment of the present invention, fig. 3 is a partially enlarged schematic view of another display panel provided in an embodiment of the present invention, and the fan-out routing area FA includes a first area a1, a second area a2, and a third area A3 sequentially arranged along a first direction h 1; the first lead 21, the second lead 22, and the third lead 23 each extend from the first region a1 to at least the third region A3.
In the first region a1, the first, second, and third leads 21, 22, and 23 are aligned in the second direction h2, the second direction h2 intersecting the first direction h 1; illustratively, the second direction h2 may be perpendicular to the first direction h 1.
In the first region A1, the distance between the first lead 21 and the second lead 22 is d112, the distance between the second lead 22 and the third lead 23 is d123, and d 123. gtoreq.d 112. Illustratively, as shown in fig. 2 and 3, the first region a1 includes a plurality of first sub-regions a11 and a plurality of second sub-regions a 12. The first sub-area a11 and the second sub-area a12 are alternately arranged in the second direction h 2.
The first sub-region a11 is provided with a plurality of first-type leads. The first type of lead is used for transmitting a first type of signal. The first type of lead includes the above-described first lead 21, second lead 22, and third lead 23. The first lead 21 and the second lead 22 are located in the same first sub-region a 11. The third lead 23 is located in another first sub-region a 11. The second subregion a12 is provided with a plurality of leads of the second type. The second type leads are used for transmitting second type signals. The first type of signal and the second type of signal are of different signal types. For example, the first type of signal may be a data signal, that is, the first signal line 11, the second signal line 12, and the third signal line 13 may all be data lines transmitting data signals. The second type of signal includes a power signal or a touch signal. Wherein the power supply signal includes any one of a first power supply signal PVDD and a second power supply signal PVEE. As shown in fig. 2 and fig. 3, in the second sub-region a12, the second type of lead includes a plurality of fourth leads 24, and the fourth leads 24 are used for transmitting any one or more of the first power signal PVDD, the second power signal PVEE, and the touch signal. The fourth lead 24 is located between the second lead 22 and the third lead 23,
as shown in fig. 2 and 3, the second sub-region a12 is located between the second lead 22 and the third lead 23. The second lead 22 and the third lead 23 are two first-type leads closest to each other in the adjacent two first sub-regions a 11. The distance d123 between the second wire 22 and the third wire 23 is the width of the second sub-region a12 provided with the second type of wire in the second direction h 2.
It should be noted that the number of the leads in each of the first sub-region a11 and the second sub-region a12 and the distance between two adjacent leads in any one of the first sub-region a11 and the second sub-region a12 shown in fig. 2 and fig. 3 are only schematic, and in the actual design of the display panel, the number may be adjusted according to different design requirements, which is not limited by the embodiment of the present invention.
As shown in fig. 2 and 3, in the second region a2, the second lead 22 and the third lead 23 are adjacent. The second lead 22 and the third lead 23 are adjacent in the second region a2, which means that: in the second region a2, no other first-type lead is provided between the second lead 22 and the third lead 23. As shown in conjunction with fig. 1, the display area AA includes a first pixel column 101, a second pixel column 102, and a third pixel column 103 arranged along the second direction h 2. The first pixel column 101, the second pixel column 102, and the third pixel column 103 each include a plurality of sub-pixels 10 arranged in the first direction h 1. The second pixel column 102 is located between the first pixel column 101 and the third pixel column 103, and the second pixel column 102 is adjacent to both the first pixel column 101 and the third pixel column 103. The first pixel column 101 is electrically connected to the first signal line 11, the second pixel column 102 is electrically connected to the second signal line 12, and the third pixel column 103 is electrically connected to the third signal line 13. That is, the above-described first, second, and third lead lines 21, 22, and 23 provided in the fan-out routing area FA may be electrically connected to three pixel columns of the first, second, and third pixel columns 101, 102, and 103, respectively, adjacently provided in the display area AA.
Illustratively, the sub-pixel 10 includes a light emitting device and a pixel driving circuit electrically connected to each other. The light emitting device includes any one of an organic light emitting device, an inorganic light emitting device, a quantum dot light emitting device, and the like.
In the embodiment of the present invention, the second lead 22 and the third lead 23 are arranged in parallel in the second region a 2. Alternatively, the second lead 22 and the third lead 23 are symmetrically disposed about the line of symmetry. Fig. 2 is a schematic view showing that the second wire 22 and the third wire 23 in the second region a2 are arranged in parallel, and fig. 3 is a schematic view showing that the second wire 22 and the third wire 23 are arranged symmetrically with respect to the line of symmetry 20.
It should be noted that the extending directions of the second lead 22 and the third lead 23 located in the second area a2 in fig. 2 and fig. 3 are only schematic, and in an actual setting of the display panel, the extending directions of the second lead 22 and the third lead 23 may also be adjusted according to different design requirements on the premise of ensuring good insulation of the second lead 22 and the third lead 23, which is not limited in the embodiment of the present invention. The line of symmetry 20 shown in fig. 3 is a virtual line, and this structure may not be actually provided in the display panel.
As shown in fig. 2 and 3, in the first region a1 and the third region A3, the first lead 21, the second lead 22, and the third lead 23 are all aligned in the second direction h 2. Illustratively, in the first and third regions a1 and A3, the first, second, and third leads 21, 22, and 23 are all arranged in parallel to compress the length occupied by the first and third regions a1 and A3 in the first direction h 1.
According to the display panel provided by the embodiment of the invention, the fan-out wiring area FA is divided into the first area A1, the second area A2 and the third area A3 which are arranged along the first direction h1, so that the arrangement mode of the leads arranged in each area can be set according to the function difference required to be realized by each area. In the first region a1, the embodiment of the present invention is configured such that the first lead 21, the second lead 22, and the third lead 23 are arranged in the second direction h2, and the distance d112 between the first lead 21 and the second lead 22 is equal to or less than the distance d123 between the second lead 22 and the third lead 23, so that in the first region a1, a space in which a lead for transmitting other types of signals is disposed may be left between the second lead 22 and the third lead 23. In the second region a2, the embodiment of the present invention may make the lengths of the second and third leads 22 and 23 located in the second region a2 uniform by arranging the second and third leads 22 and 23 in parallel, or arranging the second and third leads 22 and 23 symmetrically. The impedances of the second and third leads 22 and 23 passing through the first and second regions a1 and a2 are made to be uniform while satisfying the design requirements of the first region a 1. When the pixels in the display panel are displayed with the same target brightness, the actual brightness of the second pixel column 102 connected with the second lead 22 and the actual brightness of the third pixel column 103 connected with the third lead 23 can be consistent, the display uniformity is improved, and the display effect of the display panel is improved.
As shown in fig. 2 and 3, in the third region a3, the distance between the first lead 21 and the second lead 22 is d 312. Optionally, the embodiment of the present invention may order: d312 ≧ d112 to compress the spacing between the first lead 21 and the second lead 22 in the first region A1 to leave sufficient space for placement of the second type of lead within the limited space of the first region A1.
In the third region a3, the distance between the second lead 22 and the third lead 23 is d 323. For example, the embodiment of the present invention may further cause: d323 is less than or equal to d 123. Fig. 2 shows a schematic diagram of d323 ═ d123, and fig. 3 shows a schematic diagram of d323 < d 123. With this arrangement, it is also possible to make the interval between the second lead 22 and the third lead 23 in the first region a1 larger to leave enough space for the arrangement of the second type of leads within the limited space of the first region a 1.
As shown in fig. 2 and 3, the fan-out routing area FA further includes a fourth area a4, and the fourth area a4 is located on a side of the third area A3 away from the second area a 2; the fourth region a4 includes a first fan-out lead 41, a second fan-out lead 42, and a third fan-out lead 43; the pin area PA includes a first pin 31, a second pin 32, and a third pin 33. The first lead 21 is electrically connected to the first pin 31 through a first fan-out lead 41, the second lead 22 is electrically connected to the second pin 32 through a second fan-out lead 42, and the third lead 23 is electrically connected to the third pin 33 through a third fan-out lead 43.
In the embodiment of the present invention, at least one of the first, second, and third fan-out leads 41, 42, and 43 includes the first diagonal segment 40, and the extending direction of the first diagonal segment 40 has a non-zero included angle with the first direction h 1. With this arrangement, after the respective leads are led out from the side of the third area A3 away from the display area AA, the leads can be converged and converged into one or more fan-out lead bundles in the fourth area a 4. The fan-out lead harness includes any one of the above-described first fan-out lead 41, second fan-out lead 42, and third fan-out lead 43 having the first diagonal segment 40. As such, the pin area PA may be disposed on a side of the first diagonal segment 40 away from the third area a3, and the length of the pin area PA in the second direction h2 is set smaller, so that the arrangement of the pin area PA is matched with an integrated circuit having a smaller size.
When the second lead 22 and the third lead 23 in the second area a2 are symmetrically arranged about the symmetry line 20, as shown in fig. 4, fig. 4 is a partially enlarged schematic view of another display panel according to an embodiment of the present invention, where a distance between the second lead 32 and the third lead 33 is d523, and d523 is d 323. For example, in the fourth region a4, the second fan-out lead 42 and the third fan-out lead 43 may be arranged in parallel, and thus the lengths of the second fan-out lead 42 and the third fan-out lead 43 may be kept consistent, which can further reduce the impedance difference with the leads connected to the second signal line 12 and the third signal line 13, thereby improving the brightness consistency of the second pixel column 102 and the third pixel column 103.
Optionally, as shown in fig. 2 and fig. 3, the distance between the third area A3 and the first area a1 is less than or equal to the distance between the third area A3 and the lead area PA. That is, the embodiment of the present invention may dispose the third region A3 closer to the first region a 1. With this arrangement, in favor of compressing the length of the second region a2 in the first direction h1, the length of the second region a2 in the first direction h1 may be made equal to or less than the length of the fourth region a4 in the first direction h 1. Compared with the second region a2, the fourth region a4 is closer to the pin region PA, and since the length of the pin region PA in the second direction h2 is smaller, as described above, when the fan-out leads located in the fourth region a4 are arranged to be inclined portions including the first inclined line segment 40, the embodiment of the present invention is advantageous to ensure that the distance between two adjacent fan-out leads in the fourth region a4 is not too small and good insulation between two adjacent fan-out leads in the fourth region a4 can be ensured by setting the length of the fourth region a4 in the first direction h1 to be greater than or equal to the length of the second region a2 in the first direction h1 under the condition that the number of fan-out leads is constant. On the other hand, the embodiment of the invention is beneficial to reducing the length of the whole fan-out routing area FA in the first direction h1 by setting the length of the second area a2 in the first direction h1 to be too small.
Optionally, as shown in fig. 5, fig. 5 is a partially enlarged schematic view of another display panel according to an embodiment of the present invention, and the fan-out routing area FA of the display panel further includes a fifth area a5 located between the third area A3 and the pin area PA. For example, as shown in fig. 5, the fifth region a5 may be located between the third region A3 and the fourth region a 4. The fifth area A5 includes a plurality of gate circuits 5 and N clock signal lines 6, N.gtoreq.2. Accordingly, the gate circuit 5 includes N switching units 50. Fig. 5 is a schematic diagram of N ═ 2.
The control end of the switch unit 50 is electrically connected with the corresponding clock signal line 6; the first terminals of the N switching units 50 in the same gating circuit 5 are electrically connected to the same pin located in the pin area PA. As shown in fig. 5, the first end of the switching unit 50 is electrically connected to the same pin through a fan-out lead located at the fourth area a 4. The second ends of the N switching elements 50 in the same gate circuit 5 are electrically connected to at least two of the first, second, and third leads 21, 22, and 23 located at the third area a3, respectively. As shown in fig. 5, the two switching elements 50 in the second gate circuit 5 are electrically connected to the first and second leads 21 and 22, respectively, in the second direction h 2. The first switching unit 50 in the third gate circuit 5 is electrically connected to the third lead 23.
When the display panel is in operation, different clock signal lines 6 provide signals for turning on the corresponding switch units 50 in a time-sharing manner. When the switching unit 50 is turned on, the signal provided by the corresponding pin is provided to the corresponding lead through the switching unit 50. The gate circuit 5 can reduce the number of pins required for the operation of the display panel, and for example, as shown in fig. 5, the first lead 21 and the second lead 22 are connected to the same gate circuit 5, and by adopting the arrangement mode, the second lead 32 connected to the second lead 22 can be reused as the first lead 31, which is beneficial to reducing the number of pins. And multiplexing the second fan-out leads 42 connected to the second leads 22 as the first fan-out leads 41 is advantageous for reducing the number of leads disposed in the fourth area a4, so that the length occupied by the fourth area a4 in the first direction h1 can be reduced, which is advantageous for improving the screen occupation ratio of the display panel.
Illustratively, in an embodiment of the present invention, the first region a1 includes a bending axis. Each of the leads in the first region a1 may be bent with the bending axis as an axis. Referring to fig. 6, fig. 6 is a schematic cross-sectional view of a display panel according to an embodiment of the present invention, after the first region a1 is bent, the second region a2, the third region A3, the fourth region a4, and the pin area PA may be bent to a side of the display panel away from the light exit side. Fig. 6 illustrates only one positional relationship between the respective regions, and does not illustrate a specific structure in each region.
Illustratively, in the first region a1, at least one of the first lead 21, the second lead 22, and the third lead 23 includes a second diagonal segment whose extending direction and the extending direction of the bending axis form an angle θ satisfying: theta is more than or equal to 0 and less than 90 degrees. With such an arrangement, when the first region a1 is bent, the bending stress applied to the second oblique line segment in the bent state can be reduced, and the reliability of the lead provided with the second oblique line segment is improved. It should be noted that the second oblique line segment may be set as a straight line, or may also be set as an arc line. When the second oblique line segment is set to be an arc line, the extending direction of the second oblique line segment at any position is the extending direction of the tangent line at the corresponding position. As shown in fig. 7, fig. 7 is an enlarged schematic view of a first region of a display panel according to an embodiment of the present invention, and fig. 7 illustrates that the first lead 21, the second lead 22, and the third lead 23 are all configured to include a second diagonal segment 200, and the first lead 21, the second lead 22, and the third lead 23 all have a shape similar to a "8", where a bending axis is illustrated by a dotted line BX.
Alternatively, as shown in fig. 8, fig. 8 is a schematic cross-sectional view of a first region of a display panel according to an embodiment of the present invention, and in the first region a1, the first lead 21, the second lead 22, and the third lead 23 are disposed in the same layer. For example, the first lead 21, the second lead 22 and the third lead 23 may be disposed on a neutral plane of the display panel to reduce bending stress and improve reliability. The neutral plane is the film layer in which each film layer in the first region a1 is subjected to the least stress during the bending process. The determination of the neutral plane may be determined according to the thickness and modulus of each film layer in the first region a 1.
Alternatively, as shown in fig. 8, the fourth lead 24 and the first lead 21 are disposed in the same layer.
For example, in any one of the second, third and fourth regions a2, A3 and a4, the first, second and third leads 21, 22 and 23 may be disposed in the same film layer according to an embodiment of the present invention. Alternatively, in the embodiment of the present invention, the second lead 22 may be disposed on a different film layer from the first lead 21 and the third lead 23, as shown in fig. 9, fig. 9 is a schematic cross-sectional view of a third area of the display panel provided in the embodiment of the present invention, where the first lead 21 and the third lead 23 are disposed on the same layer, and an insulating layer 300 is further included between the second lead 22 and the first lead 21, so that the possibility of short circuit between the second lead 22 and the first lead 21 or between the second lead 22 and the third lead 23 is reduced, and the reliability of the display panel is improved.
Alternatively, in any one of the second region a2, the third region A3 and the fourth region a4, the embodiment of the present invention may dispose the second type lead for transmitting the second type signal on another film layer different from the first lead 21, the second lead 22 and the third lead 23.
As shown in fig. 10, fig. 10 is a schematic view of a display device according to an embodiment of the present invention, where the display device includes the display panel 1000. The specific structure of the display panel 1000 has been described in detail in the above embodiments, and is not described herein again. Of course, the display device shown in fig. 10 is only a schematic illustration, and the display device may be any electronic device with a display function, such as a mobile phone, a tablet computer, a notebook computer, an electronic book, or a television.
According to the display device provided by the embodiment of the invention, the fan-out wiring area of the display panel is divided into the first area, the second area and the third area which are arranged along the first direction, so that the arrangement mode of the leads arranged in the fan-out wiring area can be set according to the function difference required to be realized in each area. In the first region, the first lead, the second lead, and the third lead are arranged in the second direction, and the distance d112 between the first lead and the second lead is smaller than or equal to the distance d123 between the second lead and the third lead, so that a space for disposing a lead for transmitting other types of signals can be left between the second lead and the third lead in the first region. In the second region, the second lead and the third lead in the second region may be arranged in parallel, or the second lead and the third lead may be arranged symmetrically, so that the lengths of the second lead and the third lead in the second region may be the same. The impedance of the second lead and the third lead passing through the first region and the second region is made to be uniform while satisfying the design requirement of the first region. When each pixel in the display panel is displayed with the same target brightness, the actual brightness of the second pixel column connected with the second lead and the actual brightness of the third pixel column connected with the third lead can be consistent, the display uniformity is improved, and the display effect of the display panel is improved.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and should not be taken as limiting the scope of the present invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.

Claims (11)

1. A display panel is characterized by comprising a display area, a fan-out wiring area and a pin area which are arranged along a first direction, wherein the fan-out wiring area comprises a first area, a second area and a third area which are sequentially arranged along the first direction;
the display area comprises a first signal line, a second signal line and a third signal line;
the fan-out wiring area comprises a first lead, a second lead and a third lead, the first lead is electrically connected with the first signal line, the second lead is electrically connected with the second signal line, and the third lead is electrically connected with the third signal line; the first, second, and third leads each extend from the first region to at least the third region;
in the first region, the first, second, and third leads are arranged in a second direction that intersects the first direction; in the first region, the distance between the first lead and the second lead is d112, the distance between the second lead and the third lead is d123, and d123 is more than or equal to d 112;
in the second region, the second lead and the third lead are adjacent; the second lead and the third lead are arranged in parallel; or, the second region includes a line of symmetry about which the second and third leads are symmetrically disposed;
in the third region, the first lead, the second lead, and the third lead are arranged in the second direction.
2. The display panel according to claim 1,
in the third region, a distance between the first lead and the second lead is d312, and a distance between the second lead and the third lead is d 323; d312 is more than or equal to d112, and d323 is more than or equal to d 123.
3. The display panel according to claim 2,
in the second region, the second lead and the third lead are symmetrically disposed about the line of symmetry;
the pin area comprises a first pin, a second pin and a third pin; the first lead is electrically connected with the first pin, the second lead is electrically connected with the second pin, and the third lead is electrically connected with the third pin;
the distance between the second pin and the third pin is d523, and d523 is d 323.
4. The display panel according to claim 1,
the fan-out wiring area further comprises a fourth area, and the fourth area is positioned on one side, far away from the second area, of the third area; the fourth region includes a first fan-out lead, a second fan-out lead, and a third fan-out lead; the pin area comprises a first pin, a second pin and a third pin;
the first lead is electrically connected with the first pin through the first fan-out lead, the second lead is electrically connected with the second pin through the second fan-out lead, and the third lead is electrically connected with the third pin through the third fan-out lead;
at least one of the first fan-out lead, the second fan-out lead and the third fan-out lead comprises a first diagonal segment, and a non-zero included angle is formed between the extending direction of the first diagonal segment and the first direction.
5. The display panel according to claim 1, further comprising a fifth region between the third region and the pin area, the fifth region including a plurality of gate circuits and N clock signal lines, N ≧ 2; the gating circuit comprises N switching units;
the control end of the switch unit is electrically connected with the clock signal line; first ends of the N switch units in the same gating circuit are electrically connected to the same pin in the pin area, and second ends of the N switch units in the same gating circuit are respectively electrically connected to at least two of the first lead, the second lead and the third lead in the third area.
6. The display panel according to claim 1,
the distance between the third area and the first area is smaller than or equal to the distance between the third area and the pin area.
7. The display panel according to claim 1,
the first region comprises a bending axis;
at least one of the first lead, the second lead, and the third lead includes, in the first region, a second oblique line segment, and an angle θ between an extending direction of the second oblique line segment and an extending direction of the bending axis satisfies: theta is more than or equal to 0 and less than 90 degrees.
8. The display panel according to claim 1,
in the first region, the first lead, the second lead, and the third lead are provided in the same layer.
9. The display panel according to claim 1,
the display area further comprises a first pixel column, a second pixel column and a third pixel column, wherein the second pixel column is positioned between the first pixel column and the third pixel column, and is adjacent to the first pixel column and the third pixel column; the first pixel column is electrically connected to the first signal line, the second pixel column is electrically connected to the second signal line, and the third pixel column is electrically connected to the third signal line.
10. The display panel according to claim 1,
the first signal line, the second signal line and the third signal line are all used for transmitting data signals;
the first region further comprises a fourth lead wire, the fourth lead wire is located between the second lead wire and the third lead wire, and the fourth lead wire is used for transmitting a power signal or a touch signal.
11. A display device characterized by comprising the display panel according to any one of claims 1 to 10.
CN202210610139.2A 2022-05-31 2022-05-31 Display panel and display device Pending CN114937672A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210610139.2A CN114937672A (en) 2022-05-31 2022-05-31 Display panel and display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210610139.2A CN114937672A (en) 2022-05-31 2022-05-31 Display panel and display device

Publications (1)

Publication Number Publication Date
CN114937672A true CN114937672A (en) 2022-08-23

Family

ID=82866700

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210610139.2A Pending CN114937672A (en) 2022-05-31 2022-05-31 Display panel and display device

Country Status (1)

Country Link
CN (1) CN114937672A (en)

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