CN109991788B

CN109991788B - Display panel and display device

Info

Publication number: CN109991788B
Application number: CN201910215623.3A
Authority: CN
Inventors: 刘宗锥; 许喜爱
Original assignee: Xiamen Tianma Microelectronics Co Ltd
Current assignee: Xiamen Tianma Microelectronics Co Ltd
Priority date: 2019-03-21
Filing date: 2019-03-21
Publication date: 2021-08-06
Anticipated expiration: 2039-03-21
Also published as: CN109991788A

Abstract

The invention discloses a display panel and a display device, which relate to the technical field of display and comprise a first substrate and a second substrate which are oppositely arranged, wherein the first substrate comprises: a substrate base plate; the fan-out routing is arranged on one side, facing the second substrate, of the substrate and is positioned in the non-display area; the electrostatic conductive gasket is arranged on one side, facing the second base plate, of the substrate base plate, is positioned in the non-display area, and is recessed towards the substrate base plate along the direction perpendicular to the plane of the substrate base plate to form a recessed part, and the electrostatic conductive gasket comprises at least one conductive through hole; the concave part comprises a first area and a second area surrounding the first area, and the conductive through holes are only distributed in the first area; the orthographic projection of the second area on the plane of the substrate base plate is overlapped with at least part of fan-out routing wires; and the alignment film is arranged on the substrate base plate and is positioned on one side of the electrostatic conductive liner, which is far away from the substrate base plate. By the scheme, the antistatic interference capability of the product is improved.

Description

Display panel and display device

Technical Field

The present invention relates to the field of display technologies, and in particular, to a display panel and a display device.

Background

From the CRT (Cathode Ray Tube) era to the liquid crystal era and now to the OLED (Organic Light-Emitting Diode) era, the display industry has been developing over decades. The display industry is closely related to our lives, and display technologies cannot be separated from traditional mobile phones, flat panels, televisions and PCs, to current intelligent wearable devices and VRs.

Static electricity is usually generated in the display device, and if the static electricity exists in the display device and is not led out in time, the existence of the static electricity may open circuits around the display panel, resulting in abnormal display, such as: redness, blueness, abnormal or even no indication, etc.

Therefore, how to reliably conduct the static electricity generated inside the display device to the outside becomes one of the technical problems to be solved at present.

Disclosure of Invention

In view of the above, the present disclosure provides a display panel and a display device, in which an electrostatic conductive pad is recessed toward a substrate to form a recessed portion, and an orthogonal projection of a second region in the recessed portion on a plane of the substrate overlaps at least a portion of fan-out traces, even if a frame of the display panel is narrowed, the area of the orthogonal projection of the recessed portion on the plane of the substrate is also increased, so that in a process of forming an alignment film, a contact area between the alignment film and the electrostatic conductive pad is decreased, thereby decreasing an influence of the alignment film on electrostatic conductivity of the electrostatic conductive pad, and improving an ability of an antistatic effect of a product.

The application has the following technical scheme:

in a first aspect, the present application provides a display panel, which is provided with a display area and a non-display area surrounding the display area, the display panel includes a first substrate and a second substrate that are oppositely disposed, the first substrate includes:

a substrate base plate;

the fan-out routing is arranged on one side, facing the second substrate, of the substrate and is positioned in the non-display area;

the electrostatic conductive gasket is arranged on one side, facing the second base plate, of the substrate base plate, is located in the non-display area, and is recessed towards the substrate base plate in a direction perpendicular to the plane of the substrate base plate to form a recessed portion, and the electrostatic conductive gasket comprises at least one conductive through hole; the depressed part comprises a first area and a second area surrounding the first area, and the orthographic projection of the conductive through holes on the plane of the substrate base plate is only distributed in the first area; the orthographic projection of the second area on the plane of the substrate base plate is overlapped with at least part of the fan-out routing;

the alignment film is arranged on the substrate base plate and is positioned on one side, away from the substrate base plate, of the electrostatic conductive liner, and the alignment film is at least positioned in the display area.

In a second aspect, the present application further provides a display device, including a display panel, where the display panel is any one of the display panels provided in the present application.

Compared with the prior art, the display panel and the display device provided by the invention at least realize the following beneficial effects:

the display panel and the display device provided by the application comprise a first substrate and a second substrate which are oppositely arranged, wherein an electrostatic conduction gasket is arranged on one side of the first substrate, which faces the second substrate, and is sunken towards the substrate to form a sunken part; because the static conduction liner is sunken towards the substrate base plate, in the process of forming the alignment film, the amount of PI (Polyimide ) liquid entering the sunken part is smaller than the amount of PI liquid corresponding to the non-sunken area with the same area of the sunken part, the contact area of the PI liquid and the static conduction liner is favorably reduced, and the contact area of the PI liquid and the conductive through hole is favorably reduced. The PI solution is a chemical solution for forming an alignment film, and the alignment film is formed by printing the PI solution on a substrate and then baking the PI solution.

Of course, it is not necessary for any product in which the present invention is practiced to achieve all of the above-described technical effects simultaneously.

Other features of the present invention and advantages thereof will become apparent from the following detailed description of exemplary embodiments thereof, which proceeds with reference to the accompanying drawings.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.

Fig. 1 is a top view of a display panel provided in the prior art;

FIG. 2 is a schematic diagram showing another top view of a display panel provided by the prior art;

fig. 3 is a top view of a display panel according to an embodiment of the present disclosure;

FIG. 4 is a cross-sectional view along AA' of the display panel provided in the embodiment of FIG. 3;

FIG. 5 is a cross-sectional view along BB' of the first substrate of the embodiment shown in FIG. 3;

fig. 6 is a diagram illustrating a relative position of electrostatic conductive pads and fan-out traces in a display panel according to an embodiment of the present disclosure;

FIG. 7 is a diagram illustrating a relative position relationship between an electrostatic conductive pad and an alignment film in a display panel according to an embodiment of the present disclosure;

FIG. 8 is a cross-sectional view taken along line CC' of the first substrate of the display panel provided in the embodiment of FIG. 3;

FIG. 9 is a cross-sectional view along line DD' of the location of the conductive via in the display panel provided by the embodiment of FIG. 6;

FIG. 10 is a cross-sectional view along line DD' of another location of a conductive via in the display panel provided in the embodiment of FIG. 6;

FIG. 11 is another cross-sectional view along line DD' of the locations of the conductive vias in the display panel provided in the embodiment of FIG. 6;

FIG. 12 is a cross-sectional view taken along EE' of the embodiment of FIG. 6;

FIG. 13 is a cross-sectional view taken along FF' in the embodiment of FIG. 6;

fig. 14 is a top view of a display device according to an embodiment of the present disclosure.

Detailed Description

Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.

The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.

Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.

In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.

Fig. 1 is a top view of a display panel 300 provided in the prior art, and fig. 2 is a top view of the display panel 300 provided in the prior art, and referring to fig. 1, an electrostatic conductive pad 301 is disposed at a lower frame position of the display panel 300 for conducting static electricity existing in the display panel 300 to the outside of the display panel 300. The COF (chip On film) technology is adopted, so that the design of the narrow lower frame of the display panel 300 is realized to a great extent, the COF is that a driving chip is bound On a flexible circuit board 303, then the flexible circuit board 303 is folded back to the side, far away from a light-emitting surface, of the display panel 300, and a control chip in the structure does not occupy the space of the lower frame of the display panel 300, so that the lower frame can be compressed, and the design of the narrow lower frame of the display panel 300 is realized. In the view shown in fig. 1 and 2, when the lower frame is compressed, the length of the electrostatic conductive pad 301 in the second direction is reduced from H1 to H2, and the distance between the electrostatic conductive pad 301 and the display area is reduced; in the process of forming the alignment film on the display panel 300, the alignment film is easily diffused to the position of the electrostatic conductive pad 301, so that the electrostatic conductive pad 301 has a reduced electrostatic conductive capability, which affects the anti-electrostatic interference capability of the display panel 300, and further affects the product performance.

In view of this, the present disclosure provides a display panel and a display device, in which an electrostatic conductive pad is recessed toward a substrate to form a recessed portion, and an orthogonal projection of a second region in the recessed portion on a plane of the substrate is overlapped with at least a portion of fan-out traces, which is beneficial to increasing an area of the recessed portion on the orthogonal projection of the substrate on the plane of the substrate, even if a frame edge of the display panel is narrow, in a process of forming an alignment film, it is also beneficial to reducing a contact area between a PI liquid and the electrostatic conductive pad, thereby being beneficial to reducing an influence of the PI liquid on an electrostatic conductive performance of the electrostatic conductive pad, and being beneficial to improving an ability of an antistatic effect of a product.

The application provides a display panel is provided with the display area and around the non-display area of display area, and display panel includes relative first base plate and the second base plate that sets up, and first base plate includes:

a substrate base plate;

the electrostatic conductive gasket is arranged on one side, facing the second base plate, of the substrate base plate, is positioned in the non-display area, and is recessed towards the substrate base plate along the direction perpendicular to the plane of the substrate base plate to form a recessed part, and the electrostatic conductive gasket comprises at least one conductive through hole; the concave part comprises a first area and a second area surrounding the first area, and the orthographic projection of the conductive through holes on the plane of the substrate base plate is only distributed in the first area; the orthographic projection of the second area on the plane of the substrate base plate is overlapped with at least part of fan-out routing wires;

the alignment film is arranged on the substrate and is positioned on one side of the electrostatic conductive liner away from the substrate, and the alignment film is at least positioned in the display area.

The following detailed description is made with reference to the accompanying drawings and examples.

Fig. 3 is a top view of the display panel 100 provided in the embodiment of the present application, fig. 4 is a cross-sectional view of the display panel 100 provided in the embodiment of fig. 3 along line AA', please refer to fig. 3 and fig. 4, the display panel 100 provided in the embodiment of the present application is provided with a display area 102 and a non-display area 103 surrounding the display area 102, the display panel 100 includes a first substrate 10 and a second substrate 20 disposed opposite to each other, a fan-out trace 50 is disposed on a side of a substrate 101 of the first substrate 10 facing the second substrate 20, the fan-out trace 50 is used to electrically connect signal lines (e.g. data lines and power lines) on the first substrate 10 with the driving chips, optionally, to implement the narrow frame design of the display panel, a COF technology may be adopted to bind the driving chip on the flexible circuit board 107, and then fold the flexible circuit board 107 back to the side of the display panel 100 away from the light exit surface. An electrostatic conductive pad 30 is further disposed on a side of the substrate base plate 101 facing the second base plate 20, and the electrostatic conductive pad 30 is used for conducting static electricity in the display panel 100 to the outside, so as to prevent the static electricity from affecting the display panel 100. Specifically, the electrostatic conductive pad 30 is recessed toward the substrate base 101 to form a recessed portion 38, referring to fig. 5 and fig. 6, fig. 5 is a cross-sectional view along BB' of the first base board 10 in the embodiment shown in fig. 3, fig. 6 is a relative position diagram of the electrostatic conductive pad 30 and the fan-out trace 50 in the display panel 100 provided in the embodiment of the present application, the electrostatic conductive pad 30 includes at least one conductive via 33, the recessed portion 38 formed by the electrostatic conductive pad 30 includes a first region 31 and a second region 32 surrounding the first region 31, the conductive via 33 is only distributed in the first region 31, and an orthogonal projection of the second region 32 on a plane of the substrate base 101 overlaps at least a part of the fan-out trace 50. Referring to fig. 4, in order to ensure that the alignment layer 108 completely covers the display region 102 during the process of forming the alignment layer 108 on the first substrate 10, the alignment layer 108 is usually formed in at least a portion of the non-display region 103, the alignment layer 108 is usually made of PI (Polyimide) liquid, which is a chemical liquid for making the alignment layer 108, and the PI liquid is printed on the first substrate 10 and then baked to form the alignment layer 108. In the process of printing the PI liquid in the non-display area 103, since the electrostatic conductive pad 30 is recessed towards the substrate base plate 101 to form the recessed portion 38, and the orthogonal projection of the second area 32 in the recessed portion 38 on the plane of the substrate base plate 101 overlaps with at least part of the fan-out trace 50, even if the frame edge of the display panel 100 is narrow, the design can increase the area of the orthogonal projection of the recessed portion 38 on the plane of the substrate base plate 101, so that in the process of forming the alignment film 108, even if part of the PI liquid extends to the non-display area 103, due to the existence of the recessed portion 38 with a larger area, the area covered by the alignment film 108 on the electrostatic conductive pad 30 is smaller than the area covered by the electrostatic conductive pad 30 in other non-recessed areas in the same unit area, thereby being beneficial to reducing the contact area between the alignment film 108 and the conductive via 33 in the electrostatic conductive pad 30, and further being beneficial to reducing the influence of the electrostatic conductive pad 30 caused by the alignment film 108 on the electrostatic conductive performance of the electrostatic conductive pad 30, the narrow frame is realized, and the anti-static interference capability of the product is improved.

It should be noted that fig. 3 only schematically shows a relative position relationship among the first substrate, the second substrate, the electrostatic conductive pads, and the fan-out traces, and does not represent actual size and number.

Alternatively, with continued reference to fig. 7, fig. 7 is a diagram illustrating a relative position relationship between the electrostatic conductive gasket 30 and the alignment film 108 in the display panel 100 according to the embodiment of the present disclosure, at least a portion of the alignment film 108 extends from the display region 102 to the non-display region 103;

the coverage area of the alignment film 108 in the first region 31 is smaller than that in the second region 32 within the same unit area.

Specifically, to ensure that the alignment film 108 can completely cover the display area 102, during the manufacturing process of the alignment film 108, a part of the PI liquid will be printed at the position of the non-display area, since the electrostatic conductive pad 30 is recessed towards the substrate 101 to form the recessed portion 38, and the amount of the PI liquid in the recessed portion 38 will be smaller than the amount of the PI liquid in the non-recessed area of the same unit area, further, in combination with fig. 3, 5 and 7, in the recessed portion 38 formed by the electrostatic conductive pad 30, the area where the second area 32 overlaps with the fan-out trace 50 will be closer to the display area 102 than the first area 31, during the printing process of the PI liquid, the amount of the PI liquid corresponding to the area where the second area 32 overlaps with the fan-out trace 50 will be larger than the amount of the PI liquid in the first area 31, that is, the coverage area of the alignment film 108 in the first area 31 is smaller than the coverage area in the second area 32, since the conductive vias 33 are disposed in the first region 31, even if PI liquid enters the recess 38 formed by the electrostatic conductive pad 30, the PI liquid covers the second region 32 more, and the coverage area of the PI liquid on the corresponding region of the conductive vias 33, i.e., the first region 31, is also reduced, so that the design is beneficial to reducing the contact area between the alignment film 108 and the conductive vias 33 in the electrostatic conductive pad 30, thereby being beneficial to reducing the influence of the alignment film 108 on the electrostatic conductive performance of the electrostatic conductive pad 30, and further being beneficial to improving the anti-electrostatic interference capability of the product.

Optionally, referring to fig. 4, in the display panel 100 provided in the embodiment of the present application, the second substrate 20 includes an electrostatic shielding layer 21, the display panel 100 further includes a conductive silver paste 40, the electrostatic shielding layer 21 is electrically connected to the electrostatic conductive pad 30 through the conductive silver, and an orthographic projection of the conductive silver paste 40 on the plane of the substrate 101 at least partially covers the first region 31.

Specifically, referring to fig. 3 and fig. 4, since the conductive via 33 is located in the first region 31 in the recess 38 formed by the electrostatic conductive pad 30, when the conductive silver paste 40 at least partially covers the first region 31, the conductive silver paste 40 can be electrically connected to the conductive via 33; because the conductive silver paste 40 is electrically connected to the electrostatic shielding layer 21 in the second substrate 20, static electricity on the second substrate 20 can be conducted to the static electricity conducting pad 30 of the first substrate 10 through the conductive silver paste 40, and then conducted to the outside of the display panel 100 through the static electricity conducting pad 30, thereby being beneficial to reducing the influence of static electricity on the second substrate 20 and also being beneficial to improving the anti-static electricity interference capability of the display panel 100.

Optionally, please refer to fig. 5 and 8, and fig. 8 is a cross-sectional view, taken along CC', of the first substrate 10 in the display panel 100 provided in the embodiment of fig. 3, and with reference to fig. 5 and 8, the first substrate 10 further includes a first metal layer 11, an interlayer insulating layer 14, a second metal layer 12, a planarization layer 16, a passivation layer 17, and an electrode layer 18, which are sequentially disposed on the substrate base 101 along a direction perpendicular to the substrate base 101, the electrode layer 18 includes an electrostatic conductive pad 30, and the first metal layer 11 is located on a side of the interlayer insulating layer 14 close to the substrate base 101;

the orthographic projection of the planarization layer 16 on the plane of the substrate base plate 101 does not overlap with the recess 38.

Specifically, referring to fig. 5 and 8, an array layer is generally disposed on the first substrate 10, the driving thin film transistor 105 in the array layer is used to drive the pixel electrode 182 on the display panel 100, generally, the gate of the driving thin film transistor 105 is located in the first metal layer 11, the source and the drain are located in the second metal layer 12, the drain is electrically connected to the pixel electrode, and the pixel electrode is generally located in the electrode layer 18. When the display panel 100 is a liquid crystal display panel 100, when the gate of the driving tft 105 is turned on, the signal of the source thereof is transmitted to the drain and further transmitted to the pixel electrode 182, and the voltage generated on the pixel electrode 182 and the voltage generated on the common electrode 181 cooperate to form a deflection voltage for driving the liquid crystal to deflect, thereby controlling whether the sub-pixel transmits light or whether the light transmits light excessively. Generally, a plurality of signal lines, such as data lines, are distributed on the second metal layer 12, and after the second metal layer 12 is fabricated, a planarization layer 16 with a larger thickness is usually formed on the surface of the second metal layer 12 away from the substrate 101 to provide a planarized surface for the subsequent film formation. In the display panel 100 provided in the embodiment of the application, please refer to fig. 5 and 8, the orthogonal projection of the planarization layer 16 on the plane of the substrate 101 is not overlapped with the recess 38 formed by the electrostatic conductive pad 30, so that, after the planarization layer 16 is formed on the surface of the second metal layer 12 away from the substrate 101, the planarization layer 16 in the region corresponding to the electrostatic conductive pad 30 is etched away, so that the subsequent film layers of the electrostatic conductive pad 30 are in a recessed state, so as to reduce the amount of PI liquid entering the recess 38 during the formation of the alignment film 108, thereby facilitating to improve the anti-static interference capability of the display panel 100. In the process of forming the recess 38, the planarization layer 16 in the region corresponding to the electrostatic conductive pad 30 may be completely etched away, or only a part of the region may be etched away, as long as the recess 38 can be formed in the electrostatic conductive pad 30, which is not particularly limited in this application.

Optionally, with continued reference to fig. 5, the depth D1 of the recess 38 in a direction perpendicular to the plane of the substrate base plate 101 is less than or equal to the maximum thickness D2 of the planarization layer 16.

Specifically, when a portion of the planarization layer 16 in the region corresponding to the electrostatic conductive pad 30 is etched away and a portion of the planarization layer is remained, the depth D1 of the recess 38 is smaller than the maximum thickness of the planarization layer 16, such that the recess 38 has a certain degree of recess, and during the formation of the alignment film 108, the amount of the PI solution entering the recess 38 can be reduced to a certain extent, thereby being beneficial to reducing the influence of the PI solution on the electrostatic conductive capability of the electrostatic conductive pad 30. When the planarization layer 16 of the corresponding region of the electrostatic conductive pad 30 is completely etched away, the depth D1 of the recess 38 is equal to the maximum thickness D2 of the planarization layer 16 within the tolerance, so that the recess 38 is recessed to a greater extent, and the amount of PI solution entering the recess 38 is minimized during the formation of the alignment film, thereby greatly reducing the influence of the PI solution on the electrostatic conductive capability of the electrostatic conductive pad 30.

Optionally, referring to fig. 5, the conductive via 33 includes a first via 331; in the first region 31, the second metal layer 12 is grounded, the electrostatic conductive pad 30 is electrically connected to the second metal layer 12 through a first via 331, and the first via 331 penetrates the passivation layer 17 in a direction perpendicular to the plane of the substrate base plate 101.

Specifically, referring to fig. 5, the second metal layer 12 is grounded at a position corresponding to the electrostatic conductive pad 30, and the electrostatic conductive pad 30 is electrically connected to the second metal layer 12, when static electricity is generated, the electrostatic conductive pad 30 can conduct the static electricity to the grounded second metal layer 12, so as to lead the static electricity out of the display panel 100, thereby reducing the influence of the static electricity on the display panel 100. Since there are few layers between the second metal layer 12 and the electrostatic conductive pad 30, and only one passivation layer 17 is included in the embodiment shown in fig. 5, when the first via hole 331 is formed, only a hole needs to be formed in the first passivation layer 17, which is beneficial to simplifying the manufacturing process. Note that, in the process of forming the recess 38, the planarization layer 16 in the region corresponding to the electrostatic conductive pad 30 may be completely etched away, or only a part of it may be etched away; when only a portion of the planarization layer is etched away and a portion of the planarization layer remains in the region corresponding to the electrostatic conductive pad 30, the planarization layer at the position corresponding to the first via 331 also needs to be etched away, that is, in the direction perpendicular to the plane of the substrate base plate 101, the first via 331 needs to penetrate through the planarization layer in addition to the passivation layer 17, so as to achieve the electrical connection between the electrostatic conductive pad 30 and the second metal layer 12.

Optionally, fig. 9 is a cross-sectional view along DD' of the position of the conductive via 33 in the display panel 100 provided in the embodiment of fig. 6, please refer to fig. 9, in which the conductive via 33 includes a second via 332; in the first region 31, the first metal layer 11 is grounded, the electrostatic conductive pad 30 is electrically connected to the first metal layer 11 through the second via 332, and the second via 332 penetrates the passivation layer 17 and the interlayer insulating layer 14 in a direction perpendicular to the plane of the base substrate 101.

Specifically, referring to fig. 9, in the position corresponding to the electrostatic conductive pad 30, the first metal layer 11 is grounded, the electrostatic conductive pad 30 is electrically connected to the first metal layer 11, when static electricity is generated, the electrostatic conductive pad 30 can conduct the static electricity to the grounded first metal layer 11, so as to conduct the static electricity to the outside of the display panel 100, thereby reducing the influence of the static electricity on the display panel 100.

Of course, in some other embodiments of the present application, referring to fig. 10, fig. 10 is another cross-sectional view along DD' of the position of the conductive via 33 in the display panel 100 provided in the embodiment of fig. 6, at the position corresponding to the electrostatic conductive pad 30, the second metal layer 12 is electrically connected to the first metal layer 11 through the via, the first metal layer 11 is grounded, and the second metal layer 12 is grounded through the first metal layer 11; the electrostatic conductive pad 30 is electrically connected to the second metal layer 12, thereby achieving grounding. In this structure, in the punching process, each hole only penetrates through one insulating layer, which is easy to implement in the process, and the electrostatic conductive pad 30 can also transmit the static electricity to the outside of the display panel 100 through the second metal layer 12 and the first metal layer 11, thereby being beneficial to reducing the influence of the static electricity on the display panel 100.

Alternatively, fig. 11 is another cross-sectional view along line DD' of the position of the conductive via 33 in the display panel 100 provided in the embodiment of fig. 6, please refer to fig. 11, in which the first substrate 10 further includes a third metal layer 13, and the third metal layer 13 is located between the planarization layer 16 and the passivation layer 17;

the conductive vias 33 include a third via 333; in the first region 31, the third metal layer 13 is grounded, the electrostatic conductive pad 30 is electrically connected to the third metal layer 13 through a third via 333, and the third via 333 penetrates the passivation layer 17 in the direction of the plane of the substrate base plate 101.

Specifically, with continued reference to fig. 11, in this embodiment, a portion of the planarization layer 16 remains at a position corresponding to the electrostatic conductive pad 30, and a third metal layer 13 is further included between the planarization layer 16 and the passivation layer 17, where the third metal layer 13 is grounded; the electrostatic conductive pad 30 is electrically connected to the third metal layer 13 through the third via hole 333 penetrating through the passivation layer 17, thereby achieving grounding, so that when static electricity is generated, the electrostatic conductive pad 30 can conduct the static electricity to the grounded third metal layer 13, thereby conducting the static electricity to the outside of the display panel 100, thereby reducing the influence of the static electricity on the display panel 100.

Optionally, fig. 12 is a cross-sectional view taken along EE' in the embodiment shown in fig. 6, please refer to fig. 12, the fan-out trace 50 includes a first line segment 51, an orthogonal projection of the first line segment 51 on the plane of the substrate 101 overlaps the second region 32, and the first line segment 51 is located on the first metal layer 11.

Specifically, referring to fig. 12 and fig. 6, since the recess of the electrostatic conductive pad 30 is implemented by removing at least a portion of the planarization layer 16 at the corresponding position of the electrostatic conductive pad 30, at this time, the corresponding passivation layer 17 will also recess downward, after the planarization layer 16 with a larger thickness originally located on the side of the passivation layer 17 facing the substrate 101 is removed, the possibility of cracking (peeling) of the corresponding passivation layer 17 will be increased, and after the passivation layer 17 is cracked, a short circuit will occur between the electrode layer 18 located on the side of the passivation layer 17 away from the substrate 101 and the third metal layer or the second metal layer located on the side of the passivation layer close to the substrate 101; in the present application, when the first line segment 51 overlapped with the second region 32 in the fan-out trace 50 is disposed on the first metal layer 11, the interlayer insulating layer 14 is disposed between the first line segment 51 and the passivation layer 17 at an interval, and this arrangement is favorable for reducing the risk of the passivation layer 17 breaking, so that the arrangement of the first line segment 51 can improve the electrostatic conduction capability of the electrostatic conduction pad 30, and at the same time, can also reduce the risk of the passivation layer 17 breaking, thereby being favorable for improving the overall performance of the display panel 100.

Alternatively, fig. 13 is a cross-sectional view taken along FF' in the embodiment shown in fig. 6, with reference to fig. 13, in a display panel 100 provided in the embodiment of the present application, the first substrate 10 further includes a third metal layer 13, and the third metal layer 13 is located between the planarization layer 16 and the passivation layer 17;

the fan-out routing 50 further includes a second line segment 52 except the first line segment 51, the second line segment 52 is located in at least one of the first metal layer 11, the second metal layer 12 and the third metal layer 13, and an orthographic projection of the second line segment 52 on the plane of the substrate base plate 101 does not overlap with the second area 32.

Specifically, referring to fig. 13, since the second line segment 52 in the fan-out trace 50 does not overlap with the second region 32 of the electrostatic conductive pad 30, even if the electrostatic conductive pad 30 is recessed toward the substrate 101, the normal arrangement of the electrostatic conductive pad 30 will not be affected, and therefore, the second line segment 52 in the fan-out trace 50 may be distributed in at least one of the first metal layer 11, the second metal layer 12 and the third metal layer 13. Optionally, the second line segments 52 in the fan-out traces 50 are distributed in at least two layers of the first metal layer 11, the second metal layer 12 and the third metal layer 13, which is beneficial to reducing the number of traces arranged on the same metal layer, and avoiding crosstalk between adjacent traces due to a smaller distance, and meanwhile, when the second line segments 52 in the fan-out traces 50 are distributed in different metal layers, the narrow frame design of the display panel 100 is also beneficial to be realized.

It should be noted that, referring to fig. 6, when the first line segment 51 and the second line segment 52 in the fan-out trace 50 are located on the same film layer, the two line segments can be directly electrically connected; when the first line segment 51 and the second line segment 52 are respectively located at different film layers, the electrical connection between the two can be realized in a perforation manner.

It should be further noted that, referring to fig. 8, in the display panel 100 provided in the embodiment of the present application, the electrode layer 18 on the first substrate 10 generally includes a common electrode 181 and a pixel electrode 182, and the electrostatic conductive pad 30 provided in the embodiment of the present application may be disposed in the same layer as the common electrode 181, or in the same layer as the pixel electrode 182, which is not specifically limited in the present application. When the electrostatic conductive pad 30 and the common electrode 181 or the pixel electrode 182 are disposed on the same layer, a special film layer does not need to be separately disposed for the electrostatic conductive pad 30, which is beneficial to saving the production process and improving the production efficiency; meanwhile, when the common electrode 181 or the pixel electrode 182 is disposed on the same layer, the metal layer can be covered and protected, and the metal layer is effectively prevented from being corroded when external moisture and oxygen contact the metal layer.

Based on the same inventive concept, the present application further provides a display device, and fig. 14 is a top view of the display device 200 provided in the embodiments of the present application, where the display device 200 includes a display panel 100, and the display panel 100 is any one of the display panels provided in the embodiments of the present application. For an embodiment of the display device provided in the embodiment of the present application, reference may be made to the embodiment of the display panel 100, and repeated descriptions are omitted. The display device provided by the application can be: any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like.

As can be seen from the above embodiments, the display panel and the display device provided by the present invention at least achieve the following advantages:

the display panel and the display device provided by the application comprise a first substrate and a second substrate which are oppositely arranged, wherein an electrostatic conduction gasket is arranged on one side of the first substrate, which faces the second substrate, and is sunken towards the substrate to form a sunken part; because the static conduction liner caves towards the substrate base plate, in the process of forming the alignment film, the amount of PI liquid entering the sunken part is smaller than the amount of PI liquid corresponding to the non-sunken area with the same area of the sunken part, which is favorable for reducing the contact area of the PI liquid and the static conduction liner, and is favorable for reducing the contact area of the PI liquid and the conductive via hole, even if the frame sides of the display panel and the display device are narrow, the influence of the PI liquid on the static conduction performance of the static conduction liner can be reduced, and the antistatic influence capacity of the display panel and the display device can be improved.

Although some specific embodiments of the present invention have been described in detail by way of examples, it should be understood by those skilled in the art that the above examples are for illustrative purposes only and are not intended to limit the scope of the present invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.

Claims

1. A display panel, provided with a display area and a non-display area surrounding the display area, the display panel including a first substrate and a second substrate which are disposed opposite to each other, the first substrate comprising:

a substrate base plate;

an alignment film disposed on the base substrate on a side of the electrostatic conductive pad away from the base substrate, the alignment film being at least in the display region and at least a portion of the alignment film extending from the display region to the non-display region; in the same unit area, the covering area of the alignment film in the first area is smaller than that in the second area.

2. The display panel according to claim 1, wherein the second substrate comprises an electrostatic shielding layer, the display panel further comprises a conductive silver paste, the electrostatic shielding layer is electrically connected to the electrostatic conductive pad through the conductive silver paste, and an orthographic projection of the conductive silver paste on the substrate at least partially covers the first region.

3. The display panel according to claim 1, wherein the first substrate further comprises a first metal layer, an interlayer insulating layer, a second metal layer, a planarization layer, a passivation layer, and an electrode layer sequentially disposed on the substrate in a direction perpendicular to the substrate, wherein the electrode layer comprises the electrostatic conductive pad, and the first metal layer is disposed on a side of the interlayer insulating layer adjacent to the substrate;

the orthographic projection of the planarization layer on the plane of the substrate base plate is not overlapped with the concave part.

4. The display panel according to claim 3, wherein the depth of the recess portion in a direction perpendicular to the plane of the substrate base plate is equal to or less than the maximum thickness of the planarization layer.

5. The display panel of claim 3, wherein the conductive via comprises a first via; in the first region, the second metal layer is grounded, the electrostatic conductive pad is electrically connected with the second metal layer through the first via hole, and the first via hole penetrates through the passivation layer in a direction perpendicular to the plane of the substrate base plate.

6. The display panel of claim 3, wherein the conductive via comprises a second via; in the first region, the first metal layer is grounded, the electrostatic conductive pad is electrically connected with the first metal layer through the second via hole, and the second via hole penetrates through the passivation layer and the interlayer insulating layer in a direction perpendicular to the plane of the substrate base plate.

7. The display panel of claim 3, wherein the first substrate further comprises a third metal layer between the planarization layer and the passivation layer;

the conductive vias include a third via; in the first region, the third metal layer is grounded, the electrostatic conductive pad is electrically connected with the third metal layer through the third via hole, and the third via hole penetrates through the passivation layer in the direction of the plane of the substrate base plate.

8. The display panel of claim 3, wherein the fan-out traces comprise a first line segment, an orthographic projection of the first line segment on a plane of the substrate base plate overlaps the second region, and the first line segment is located in the first metal layer.

9. The display panel of claim 8, wherein the first substrate further comprises a third metal layer between the planarization layer and the passivation layer;

the fan-out routing wire further comprises a second wire section except the first wire section, the second wire section is located on at least one of the first metal layer, the second metal layer and the third metal layer, and the orthographic projection of the second wire section on the plane of the substrate base plate is not overlapped with the second area.

10. A display device characterized by comprising the display panel according to any one of claims 1 to 9.