CN114928349A - Continuous time pipeline analog-to-digital converter and digital reconstruction filter thereof - Google Patents
Continuous time pipeline analog-to-digital converter and digital reconstruction filter thereof Download PDFInfo
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Abstract
The invention discloses a continuous time assembly line analog-to-digital converter and a digital reconstruction filter thereof, wherein the digital reconstruction filter comprises a first finite impulse response filter and a second finite impulse response filter, the output values of the first finite impulse response filter and the second finite impulse response filter are respectively obtained through a first transfer function and a second transfer function, and the output values of the continuous time assembly line analog-to-digital converter can be generated. A second input value corresponding to the second finite impulse response filter is determined according to the output value of the analog filter; the first and second transfer functions are determined from the transfer functions of an infinite impulse response filter used to fit the analog filter. The invention can reduce the order of the finite impulse response filter to reduce the power consumption while fitting the analog filter in the continuous time assembly line analog-to-digital converter, avoids the defect of poor system loop stability caused by adopting an infinite impulse response filter, highlights the structural advantage of the continuous time assembly line analog-to-digital converter and has industrial popularization significance.
Description
Technical Field
The invention relates to the technical field of analog-to-digital converters, in particular to a continuous-time assembly line analog-to-digital converter and a digital reconstruction filter thereof.
Background
A continuous time Pipeline analog-to-digital converter (CT-Pipeline ADC) is used as a novel digital-to-analog mixed structure, and the design difficulty of an analog circuit is transferred to a digital circuit, so that the bottleneck of the precision and the speed of the analog-to-digital converter using a circuit is broken through. However, due to the influence of factors such as process production, operating voltage, and temperature, the analog Filter between the sub-stages of the continuous time pipeline analog-to-Digital converter may deviate from the original design, so an adaptive Digital Reconstruction Filter (DRF) is usually used to track the deviation of the analog Filter, including gain, low-pass characteristics, and delay; therefore, the adaptive digital reconstruction filter is used as a key circuit module in the continuous-time pipeline analog-to-digital converter, and whether the adaptive digital reconstruction filter can accurately and adaptively calibrate the system performance of the integral digital-to-analog hybrid system has important influence.
At present, an adaptive digital reconstruction filter is mainly realized by a Finite Impulse Response (FIR) structure, and the instability problem existing in an Infinite Impulse Response (IIR) structure can be avoided. Adaptive iteration in foreground or background mode is usually performed based on a least mean square algorithm or a correlation accumulation algorithm by injecting a pseudo-random signal. Because the analog filter has the functions of amplification and low-pass filtering, the self-adaptive digital reconstruction filter adopting a single finite impulse response filter structure in the prior art is generally higher in order, so that the high-order digital reconstruction filter is realized with large area and power consumption cost in high-speed and high-precision application; in the iterative process, the number of the adder and multiplier units is increased along with the order of the filter, and the expense of a digital circuit is increased, so that the superiority of the continuous-time pipeline analog-to-digital converter architecture is weakened.
Disclosure of Invention
The invention aims to overcome the defects of large area, power consumption and computational cost caused by the adoption of a single finite impulse response filter in a continuous time assembly line analog-to-digital converter in the prior art, and provides the continuous time assembly line analog-to-digital converter and a digital reconstruction filter thereof.
The invention solves the technical problems through the following technical scheme:
the invention provides a digital reconstruction filter, which is applied to a continuous time assembly line analog-to-digital converter; the digital reconstruction filter comprises a first finite impulse response filter and a second finite impulse response filter; a first output value output by the first finite impulse response filter is obtained according to a first transfer function and a first input value corresponding to the first finite impulse response filter; a second output value output by the second finite impulse response filter is obtained according to a second transfer function and a second input value corresponding to the second finite impulse response filter; the first output value and the second output value are used to generate an output value of the continuous-time pipeline analog-to-digital converter;
wherein the second input value is determined from an output value of an analog filter of the continuous-time pipelined analog-to-digital converter; the first transfer function and the second transfer function are determined from a third transfer function corresponding to an infinite impulse response filter used to fit the analog filter.
Preferably, the first transfer function is used to characterize the gain characteristic of the analog filter.
Preferably, there is a delay difference between the branches where the first finite impulse response filter and the second finite impulse response filter are located; the first transfer function is also used to characterize the time delay characteristics of the analog filter.
Preferably, the second finite impulse response filter is configured to fit a low-pass filtering characteristic of the analog filter except for a gain characteristic and a time delay characteristic through the second transfer function.
Preferably, the first transfer function is determined according to the third transfer function numerator, and the second transfer function is determined according to the third transfer function denominator.
Preferably, the orders of the first transfer function and the second transfer function are positively correlated with the delay difference between the branches where the first finite impulse response filter and the second finite impulse response filter are located.
Preferably, the second finite impulse response filter is located at an output of the analog filter.
Preferably, the analog filter is a first order analog filter.
Preferably, the transfer function of the analog filter is
Wherein R is a resistance parameter corresponding to the analog filter; c is a capacitance parameter corresponding to the analog filter; the gain value corresponding to the analog filter is 4; the first transfer function is p (z) = 4; the second transfer function is q (z) =3.079-2.079z -1 (ii) a Wherein the first transfer function and the second transfer function are frequency domain functions.
The invention also provides a continuous-time pipeline analog-to-digital converter which comprises an analog filter and the digital reconstruction filter.
The positive progress effects of the invention are as follows: the continuous time assembly line analog-to-digital converter and the digital reconstruction filter thereof play the role of an infinite impulse response filter by using two finite impulse response filters, ensure that the order of the finite impulse response filter can be reduced, the area and the power consumption are reduced, and the defect of poor system loop stability caused by adopting one infinite impulse response filter is avoided while fitting a first-order analog filter in the continuous time assembly line analog-to-digital converter, thereby highlighting the structural advantages of the continuous time assembly line analog-to-digital converter and having industrial popularization significance.
Drawings
Fig. 1 is a partial structural diagram of a conventional digital reconstruction filter.
FIG. 2 is a schematic diagram of the logic operation of the output value of the continuous-time pipelined ADC.
FIG. 3 is a schematic diagram of logic scaling of an output value of a continuous-time pipelined analog-to-digital converter.
FIG. 4 is a diagram illustrating the result of logic scaling of the output value of the continuous-time pipelined ADC.
Fig. 5 is a schematic partial structure diagram of the digital reconstruction filter in embodiment 1 of the present invention.
Detailed Description
The invention is further illustrated by the following examples, which are not intended to limit the invention thereto.
Example 1
The embodiment provides a digital reconstruction filter, which is applied to a continuous time pipeline analog-to-digital converter; the digital reconstruction filter comprises a first finite impulse response filter and a second finite impulse response filter; a first output value output by the first finite impulse response filter is obtained according to a first transfer function corresponding to the first finite impulse response filter and a first input value; a second output value output by the second finite impulse response filter is obtained according to a second transfer function corresponding to the second finite impulse response filter and a second input value; the first output value and the second output value are used for generating an output value of the continuous-time pipeline analog-to-digital converter; wherein the second input value is determined from an output value of an analog filter of the continuous-time pipeline analog-to-digital converter; the first transfer function and the second transfer function are determined from a third transfer function corresponding to an infinite impulse response filter used to fit the analog filter. The transfer function is the ratio of the output Laplace transform expression of the linear steady system to the input Laplace transform expression of the input quantity under the zero initial condition.
In order to solve the problems of large area occupation and power consumption of a high-order FIR filter and unstable IIR filter, the invention replaces one IIR filter or one FIR filter with two FIR filters with lower orders in a digital reconstruction filter of a continuous time pipeline analog-to-digital converter.
Specifically, note
Is an approximation function of the transfer function F (z) for the analog filter in the continuous-time pipelined analog-to-digital converter shown in FIG. 1D2 in FIG. 1 is the output value of the analog filter, D1
The processed output value D3 is adapted by coefficients through the LMS algorithm (i.e. through the LMS block in the figure). As shown in FIG. 2, the output value of the digital reconstruction filter is usually the output value
And the output value
Combined to produce the output value of a continuous-time pipelined analog-to-digital converter
In this embodiment, the digital reconstruction filter implements an infinite impulse response filter by using a first finite impulse response filter and a second finite impulse response filter, and the two finite impulse response filters respectively represent a numerator and a denominator of a third transfer function corresponding to the infinite impulse response filter. The principle is that when the coefficient values of the numerator denominators are solved separately for the third transfer function, it is noted as
Then can be further calculated to obtain
The final output is shown in fig. 3 and 4 as the result of the conversion.
See fig. 5 for a partial structure of the digital reconstruction filter output values due to the use of
And
instead of that in figure 1
(ii) a Wherein
And
a first transfer function corresponding to the first finite impulse response filter with a lower order and a second finite impulse response filter corresponding to the second finite impulse response filter, respectively, so as to pass through the second finite impulse response filter
The output value D2 of the analog filter is further processed to output D4, and the output value D1 is processed to output D3 (the D3 can still realize coefficient adaptation through the LMS algorithm), and the final output value D = D3+ D4= is obtained
. Therefore, not only can the power consumption and the area consumption be saved, but also the problem of unstable loop of the IIR filter is avoided.
In a preferred embodiment, the first transfer function is determined according to a numerator of a third transfer function corresponding to the infinite impulse response filter, and the second transfer function is determined according to a denominator of the third transfer function. Optionally, the first transfer function is used to characterize the gain characteristic of the analog filter. When a delay difference exists between the branches where the first finite impulse response filter and the second finite impulse response filter are located; the first transfer function is also used to characterize the time delay characteristics of the analog filter. The second finite impulse response filter is used for fitting a low-pass filtering characteristic of the analog filter except for the gain characteristic and the time delay characteristic through a second transfer function. Optionally, the order of the first transfer function and the second transfer function is positively correlated to the delay difference between the branches where the first finite impulse response filter and the second finite impulse response filter are located. Optionally, the third transfer function corresponding to the infinite impulse response filter is obtained by performing signal processing by an impulse response invariant method according to the transfer function corresponding to the analog filter. Preferably, the analog filter is a first-order analog filter, and the second finite impulse response filter is located at the output of the analog filter, and those skilled in the art will understand that the output of the analog filter is provided with an analog-to-digital converter, and the second finite impulse response filter is electrically connected to the output of the analog-to-digital converter.
In particular, the first transfer function and the second transfer function are determined based on characteristics of a third transfer function of the infinite impulse response filter. First, the molecular coefficients of the third transfer function are determined
I.e. the first transfer function. For is to
Is transformed so that
But only one gain value and matches the gain characteristic of the analog filter. When changing
When the position of the branch or the number of the D-type triggers in the branch is changed, namely the delay characteristic of the branch is changed,
the delay characteristics need to be fitted. Can make the original gain value and a plurality of delay units
Multiplication (in frequency domain, once
The multiplication represents obtaining the corresponding sine wave amplitude value according to the frequency value at the last moment), namely, the sine wave amplitude value is properly increased
Is time-delay matched, thus
Is a gain value and the others are approximately 0. For is to
After coefficient convergence is completed, the adaptive digital filter iterative algorithm is used for filtering
Local convergence is performed.
In one embodiment, the analog filter transfer function is:
as known to those skilled in the art, h(s) is an s-frequency function of the fundamental signal with imaginary exponent exp (j ω t) in frequency domain analysis. Preferably, to provide that R is
C is
The description is given for the sake of example.
Theoretically, a z-domain function corresponding to the function H(s) is obtained through mapping processing of an impulse response invariant method
，
For the z-frequency function in the frequency domain analysis:
；
in the signal path
Is designed as oneThe first order finite impulse response filter FIR1 fits the gain of the analog filter, which in this example is set to an inter-stage gain value of 4. Another two-step FIR2 finite impulse response filter is designed in the branch of the analog filter to fit the analog filter low-pass characteristic. When the gain of the transfer function is 4,
the following steps are changed:
it should be noted that h(s) and h (z) are frequency domain functions. In addition, in this structure, when sampling positions of the branches where p (z) and q (z) are located are different, delay compensation is required. For example, when FIR2 is fewer branches than FIR1 is
The delay of (2) is required to pass
And realizing the compensation of time delay, and the like. When the clock rates before and after the system are identical (e.g. both are 4 GHz), the coefficients converged by FIR2 are the same values respectively by the LMS algorithm
Consistent with theoretical derivations. The continuous time pipeline analog-to-digital converter signal quantization noise-to-distortion ratio is 83.8dB, which also fits the theoretical derivation. It is demonstrated that the above-described scheme of fitting a first order analog filter in a continuous-time pipelined analog-to-digital converter using two low order finite impulse response filters instead of an infinite impulse response filter or a high order finite impulse response filter is feasible when the system front-to-back rates are identical.
The digital reconstruction filter of the embodiment plays a role of an infinite impulse response filter by using two finite impulse response filters, so that the order of the finite impulse response filter can be reduced, the area and the power consumption are reduced, and the defect of poor system loop stability caused by adopting one infinite impulse response filter is avoided while the fitting of a first-order analog filter in the continuous time assembly line analog-to-digital converter is ensured, thereby highlighting the structural advantages of the continuous time assembly line analog-to-digital converter and having the industrial popularization significance.
Example 2
This embodiment specifically provides a continuous-time pipeline analog-to-digital converter, which includes an analog filter and the digital reconstruction filter in embodiment 1. Based on the arrangement of two low-order finite impulse response filters in the digital reconstruction filter, the continuous time pipeline analog-to-digital converter of the embodiment can correspondingly locally realize the action of an infinite impulse response filter, the order of the finite impulse response filter can be reduced while the fitting of a first-order analog filter in the continuous time pipeline analog-to-digital converter is ensured, the area and the power consumption are reduced, the defect that the stability of a system loop is poor if an infinite impulse response filter is adopted is avoided, the structural advantage of the continuous time pipeline analog-to-digital converter is highlighted, and the industrial popularization significance is realized.
While specific embodiments of the invention have been described above, it will be appreciated by those skilled in the art that this is by way of example only, and that the scope of the invention is defined by the appended claims. Various changes and modifications to these embodiments may be made by those skilled in the art without departing from the spirit and scope of the invention, and these changes and modifications are within the scope of the invention.
Claims (10)
1. A digital reconstruction filter, characterized by being applied to a continuous-time pipelined analog-to-digital converter; the digital reconstruction filter comprises a first finite impulse response filter and a second finite impulse response filter; a first output value output by the first finite impulse response filter is obtained according to a first transfer function and a first input value corresponding to the first finite impulse response filter; a second output value output by the second finite impulse response filter is obtained according to a second transfer function and a second input value corresponding to the second finite impulse response filter; the first output value and the second output value are used to generate an output value of the continuous-time pipeline analog-to-digital converter;
wherein the second input value is determined from an output value of an analog filter of the continuous-time pipeline analog-to-digital converter; the first transfer function and the second transfer function are determined from a third transfer function corresponding to an infinite impulse response filter used to fit the analog filter.
2. The digital reconstruction filter of claim 1 wherein said first transfer function is used to characterize a gain characteristic of said analog filter.
3. The digital reconstruction filter of claim 2 wherein a delay difference exists between branches in which said first finite impulse response filter and said second finite impulse response filter are located; the first transfer function is also used to characterize the time delay characteristics of the analog filter.
4. The digital reconstruction filter of claim 3 wherein said second finite impulse response filter is adapted to fit a low pass filtering characteristic of said analog filter other than a gain characteristic and a time delay characteristic through said second transfer function.
5. The digital reconstruction filter of any of claims 1-4 wherein said first transfer function is determined from said third transfer function numerator and said second transfer function is determined from said third transfer function denominator.
6. The digital reconstruction filter of claim 3 wherein said first transfer function and said second transfer function have orders that are positively correlated with the delay difference between the branches in which said first finite impulse response filter and said second finite impulse response filter are located.
7. The digital reconstruction filter of claim 5 wherein said second finite impulse response filter is located at an output of said analog filter.
8. The digital reconstruction filter of claim 7 wherein said analog filter is a first order analog filter.
9. The digital reconstruction filter of claim 8 wherein said analog filter has a corresponding transfer function of
Wherein R is a resistance parameter corresponding to the analog filter; c is a capacitance parameter corresponding to the analog filter;
the gain value corresponding to the analog filter is 4; the first transfer function is p (z) = 4; the second transfer function is q (z) =3.079-2.079z -1 (ii) a Wherein the first transfer function and the second transfer function are frequency domain functions.
10. A continuous-time pipelined analog-to-digital converter comprising an analog filter and a digital reconstruction filter as claimed in any one of claims 1 to 9.
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