CN114928349B - Continuous time pipeline analog-to-digital converter and digital reconstruction filter thereof - Google Patents

Continuous time pipeline analog-to-digital converter and digital reconstruction filter thereof Download PDF

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CN114928349B
CN114928349B CN202210732198.7A CN202210732198A CN114928349B CN 114928349 B CN114928349 B CN 114928349B CN 202210732198 A CN202210732198 A CN 202210732198A CN 114928349 B CN114928349 B CN 114928349B
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filter
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impulse response
transfer function
finite impulse
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CN114928349A (en
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董丽然
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Gaoche Technology Shanghai Co ltd
Fengjia Microelectronics Kunshan Co ltd
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Gaoche Technology Shanghai Co ltd
Fengjia Microelectronics Kunshan Co ltd
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H21/00Adaptive networks
    • H03H21/0012Digital adaptive filters
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters

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Abstract

The invention discloses a continuous time pipeline analog-to-digital converter and a digital reconstruction filter thereof. The second input value corresponding to the second finite impulse response filter is determined according to the output value of the analog filter; the first and second transfer functions are determined from transfer functions of an infinite impulse response filter used to fit the analog filter. The invention fits the analog filter in the continuous time pipeline analog-digital converter, not only can reduce the order of the finite impulse response filter to reduce the power consumption, but also avoids the defect of poor system loop stability caused by adopting an infinite impulse response filter, highlights the structural advantage of the continuous time pipeline analog-digital converter, and has industrial popularization significance.

Description

Continuous time pipeline analog-to-digital converter and digital reconstruction filter thereof
Technical Field
The invention relates to the technical field of analog-to-digital converters, in particular to a continuous time pipeline analog-to-digital converter and a digital reconstruction filter thereof.
Background
The continuous time Pipeline analog-to-digital converter (CT-Pipeline ADC) is used as a novel digital-to-analog hybrid structure, and the design difficulty of an analog circuit is transferred to a digital circuit, so that the bottleneck of the analog-to-digital converter using a sampling and protecting circuit in precision and speed is broken through. However, due to factors such as process production, operating voltage, temperature, etc., the analog filters between the sub-stages of the continuous-time pipeline analog-to-digital converter deviate from the original design, so adaptive digital reconstruction filters (Digital Reconstruction Filter, DRF) are generally used to track the deviation of the analog filters, including gain, low-pass characteristics, and delay; the adaptive digital reconstruction filter is used as a key circuit module in the continuous time pipeline analog-to-digital converter, and whether the adaptive calibration can accurately and adaptively calibrate the system performance of the whole digital-to-analog hybrid system has an important influence.
Currently, the adaptive digital reconstruction filter is mainly implemented by a finite impulse response filter (Finite Impulse Response, FIR) structure, so that the instability problem existing in the structure using an infinite impulse response filter (Infinite Impulse Response, IIR) can be avoided. The adaptive iteration of the foreground mode or the background mode is typically performed by injecting a pseudo-random signal based on a least mean square algorithm or a correlation accumulation algorithm. Because the analog filter has amplifying and low-pass filtering functions, the adaptive digital reconstruction filter adopting a single finite impulse response filter structure in the prior art is generally higher in order, so that the cost of area and power consumption for realizing the high-order digital reconstruction filter is quite high in high-speed high-precision application; in the iterative process, the number of adder and multiplier units is increased along with the filter order, and the cost of a digital circuit is increased, so that the superiority of the continuous time pipeline analog-digital converter architecture is weakened.
Disclosure of Invention
The invention aims to overcome the defects of large area, power consumption and calculation power expenditure caused by the adoption of a single finite impulse response filter in a continuous time pipeline analog-to-digital converter in the prior art, and provides the continuous time pipeline analog-to-digital converter and a digital reconstruction filter thereof.
The invention solves the technical problems by the following technical scheme:
the invention provides a digital reconstruction filter which is applied to a continuous time pipeline analog-to-digital converter; the digital reconstruction filter includes a first finite impulse response filter and a second finite impulse response filter; a first output value output by the first finite impulse response filter is obtained according to a first transfer function and a first input value corresponding to the first finite impulse response filter; a second output value output by the second finite impulse response filter is obtained according to a second transfer function and a second input value corresponding to the second finite impulse response filter; the first output value and the second output value are used to generate an output value of the continuous-time pipelined analog-to-digital converter;
wherein the second input value is determined from an output value of an analog filter of the continuous-time pipelined analog-to-digital converter; the first transfer function and the second transfer function are determined from a corresponding third transfer function of an infinite impulse response filter used to fit the analog filter.
Preferably, the first transfer function is used to characterize the gain characteristics of the analog filter.
Preferably, a delay difference exists between branches where the first finite impulse response filter and the second finite impulse response filter are located; the first transfer function is also used to characterize the time delay characteristics of the analog filter.
Preferably, the second finite impulse response filter is configured to fit a low pass filter characteristic of the analog filter, excluding a gain characteristic and a time delay characteristic, through the second transfer function.
Preferably, the first transfer function is determined according to the third transfer function numerator, and the second transfer function is determined according to the third transfer function denominator.
Preferably, the order of the first transfer function and the second transfer function is positively correlated with the delay difference between the branches where the first finite impulse response filter and the second finite impulse response filter are located.
Preferably, the second finite impulse response filter is located at the output of the analog filter.
Preferably, the analog filter is a first-order analog filter.
Preferably, the transfer function of the analog filter isWherein R is a resistance parameter corresponding to the analog filter; c is a capacitance parameter corresponding to the analog filter; the gain value corresponding to the analog filter is 4; the first transfer function is P (z) =4; the second transfer function is Q (z) =3.079-2.079 z -1 The method comprises the steps of carrying out a first treatment on the surface of the Wherein the first transfer function and the second transfer function are frequency domain functions.
The invention also provides a continuous time pipeline analog-to-digital converter which comprises an analog filter and the digital reconstruction filter.
The invention has the positive progress effects that: the continuous time pipeline analog-to-digital converter and the digital reconstruction filter thereof play the role of an infinite impulse response filter by using the two finite impulse response filters, ensure that the first-order analog filter in the continuous time pipeline analog-to-digital converter is fitted, simultaneously reduce the order of the finite impulse response filter, reduce the area and the power consumption, and avoid the defect that the stability of a system loop is poor if the infinite impulse response filter is adopted, thereby highlighting the structural advantage of the continuous time pipeline analog-to-digital converter and having industrial popularization significance.
Drawings
Fig. 1 is a schematic diagram of a partial structure of a conventional digital reconstruction filter.
FIG. 2 is a schematic diagram of the logical operation of the output values of the continuous-time pipelined analog-to-digital converter.
FIG. 3 is a schematic diagram of the logic scaling of the output values of a continuous-time pipelined analog-to-digital converter.
Fig. 4 is a schematic diagram of a logical conversion result of the output value of the continuous-time pipelined analog-to-digital converter.
Fig. 5 is a schematic diagram showing a partial structure of a digital reconstruction filter in embodiment 1 of the present invention.
Detailed Description
The invention is further illustrated by means of the following examples, which are not intended to limit the scope of the invention.
Example 1
The embodiment provides a digital reconstruction filter which is applied to a continuous time pipeline analog-to-digital converter; the digital reconstruction filter includes a first finite impulse response filter and a second finite impulse response filter; the first output value of the output of the first finite impulse response filter is obtained according to a first transfer function and a first input value corresponding to the first finite impulse response filter; the second output value of the second finite impulse response filter is obtained according to a second transfer function and a second input value corresponding to the second finite impulse response filter; the first output value and the second output value are used for generating output values of the continuous time pipeline analog-to-digital converter; wherein the second input value is determined from an output value of an analog filter of the continuous-time pipeline analog-to-digital converter; the first transfer function and the second transfer function are determined from a corresponding third transfer function of an infinite impulse response filter used to fit the analog filter. The transfer function is the ratio of the Lawster transformation formula of the output quantity to the Lawster transformation formula of the input quantity of the linear steady system under the zero initial condition.
In order to solve the problems of large occupation area and power consumption of a high-order FIR filter and instability of the IIR filter, the invention replaces one IIR filter or one higher-order FIR filter by two lower-order FIR filters in a digital reconstruction filter of a continuous time pipeline analog-to-digital converter.
Specifically, noteFor the continuous-time pipelined analog-to-digital converter shown in FIG. 1, D2 in FIG. 1, i.e., the output value of the analog filter, D1 is +.>The processed output value D3 is realized by an LMS algorithm (namely by an LMS module in the figure)And (5) adaptive coefficient. As shown in FIG. 2, the usual digital reconstruction filter is to output values +.>And output value +.>Combined together to generate the output value of a continuous-time pipelined analog-to-digital converterIn this embodiment, the digital reconstruction filter implements an infinite impulse response filter through a first finite impulse response filter and a second finite impulse response filter, where the two finite impulse response filters respectively represent a numerator and a denominator in a third transfer function corresponding to the infinite impulse response filter. The principle is that when the coefficient values of the numerator denominators are solved for the third transfer function, respectively, it is noted +.>Can be further calculated to obtainThe conversion and the result are shown in fig. 3 and 4 as the final output.
See fig. 5 for a partial structure of the output values of the digital reconstruction filter, due to the use ofAnd->Instead of +.>The method comprises the steps of carrying out a first treatment on the surface of the Wherein->And->A first transfer function corresponding to a first finite impulse response filter having a lower order and a second finite impulse response filter corresponding to a second finite impulse response filter, respectively, so as to pass through the second finite impulse response filter->The output value D2 of the analog filter is further processed to output D4, and the processed D1 is output D3 (D3 can still realize coefficient adaptation through LMS algorithm), so as to obtain a final output value d=d3+d4=. Thus, not only can the power consumption and the area consumption be saved, but also the problem of unstable loop of the IIR filter is avoided.
In a preferred embodiment, the first transfer function is determined according to a numerator of a third transfer function corresponding to the infinite impulse response filter, and the second transfer function is determined according to a denominator of the third transfer function. Optionally, the first transfer function is used to characterize the gain characteristic of the analog filter. When a delay difference exists between branches where the first finite impulse response filter and the second finite impulse response filter are located; the first transfer function is also used to characterize the time delay characteristics of the analog filter. The second finite impulse response filter is used to fit the low pass filter characteristics of the analog filter in addition to the gain characteristics and the time delay characteristics by a second transfer function. Optionally, the order of the first transfer function and the second transfer function are positively correlated with the delay difference between the branches where the first finite impulse response filter and the second finite impulse response filter are located. Optionally, the third transfer function corresponding to the infinite impulse response filter is obtained by performing signal processing by an impulse response invariant method according to the transfer function corresponding to the analog filter. Preferably, the analog filter is a first-order analog filter, and the second finite impulse response filter is located at an output end of the analog filter, and as will be understood by those skilled in the art, the output end of the analog filter is provided with an analog-to-digital converter, and the second finite impulse response filter is electrically connected with the output end of the analog-to-digital converter.
Specifically, the first transfer function and the second transfer function are determined based on characteristics of a third transfer function of the infinite impulse response filter. First determining the molecular coefficients of the third transfer functionI.e. the first transfer function. For->Transforming so that->Only one gain value and matches the gain characteristics of the analog filter. When changing->The number of D-type triggers in the branch circuit or the position of the branch circuit is changed, namely, when the delay characteristic of the branch circuit is changed, the number of D-type triggers is increased>Fitting the delay characteristics is required. The original gain value and several delay units can be made +>Multiplication (in the frequency domain function, once +.>I.e. representing the acquisition of the corresponding sine wave amplitude from the frequency value at the previous instant), i.e. by increasing +.>Is time-delay matched in order of (2) such that +.>Is the gain value, the others are approximately 0. For->After coefficient convergence is completed, the adaptive digital filter iterative algorithm is applied to the filter>Local convergence is performed.
In one specific application example, the analog filter transfer function is:as will be appreciated by those skilled in the art, H(s) is an s-frequency function using the imaginary exponent exp (jωt) as the base signal in frequency domain analysis. Preferably, to set wherein R is +.>C is->An example is described.
Theoretically, the z-domain function corresponding to the function H(s) is obtained through the mapping processing of the impulse response invariant methodAs a z-frequency function in frequency domain analysis: />
In the signal path sourceA first-order finite impulse response filter FIR1 is designed to fit the gain of the analog filter, which gain value is set to the inter-stage gain value 4 in this example. In the branch where the analog filter is locatedThe other two-order finite impulse response filter FIR2 of the path design fits the analog filter low-pass characteristics. When the transfer function gain is 4, +.>The process is as follows:
it should be noted that H(s) and H (z) are frequency domain functions. In addition, in this structure, when the sampling positions of the branches where P (z) and Q (z) are located are different, delay compensation is required. For example, when the branch of FIR2 is smaller than the branch of FIR1The delay of (2) is required to pass +.>The compensation of delay is achieved, similar compensation and so on. When the clock rates of the front and back of the system are consistent (for example, 4 GHz), the coefficient values converged by the FIR2 are respectivelyConsistent with theoretical derivation. The continuous time pipelined analog-to-digital converter signal quantization noise-to-distortion ratio is 83.8dB, also consistent with theoretical derivation. The scheme of using two low-order finite impulse response filters to replace one infinite impulse response filter or one high-order finite impulse response filter to fit a first-order analog filter in a continuous-time pipeline analog-to-digital converter is feasible when the front and back rates of the system are consistent.
The digital reconstruction filter of the embodiment plays a role of an infinite impulse response filter by using two finite impulse response filters, ensures fitting of the first-order analog filter in the continuous time pipeline analog-to-digital converter, can reduce the order of the finite impulse response filter, reduces the area and the power consumption, and avoids the defect that the stability of a system loop is poor if the infinite impulse response filter is adopted, thereby highlighting the structural advantage of the continuous time pipeline analog-to-digital converter and having industrial popularization significance.
Example 2
The present embodiment specifically provides a continuous-time pipelined analog-to-digital converter comprising an analog filter and the digital reconstruction filter of embodiment 1. Based on the arrangement of two low-order finite impulse response filters in the digital reconstruction filter, the continuous time pipeline analog-to-digital converter of the embodiment can correspondingly and locally realize the function of an infinite impulse response filter, so that the first-order analog filter in the continuous time pipeline analog-to-digital converter is fitted, the order of the finite impulse response filter can be reduced, the area and the power consumption are reduced, the defect that the stability of a system loop is poor if the infinite impulse response filter is adopted is avoided, the structural advantage of the continuous time pipeline analog-to-digital converter is highlighted, and the method has industry popularization significance.
While specific embodiments of the invention have been described above, it will be appreciated by those skilled in the art that this is by way of example only, and the scope of the invention is defined by the appended claims. Various changes and modifications to these embodiments may be made by those skilled in the art without departing from the principles and spirit of the invention, but such changes and modifications fall within the scope of the invention.

Claims (9)

1. A digital reconstruction filter, characterized by being applied to a continuous-time pipelined analog-to-digital converter; the digital reconstruction filter includes a first finite impulse response filter and a second finite impulse response filter; a first output value output by the first finite impulse response filter is obtained according to a first transfer function and a first input value corresponding to the first finite impulse response filter; a second output value output by the second finite impulse response filter is obtained according to a second transfer function and a second input value corresponding to the second finite impulse response filter; the first output value and the second output value are used to generate an output value of the continuous-time pipelined analog-to-digital converter;
wherein the second input value is determined from an output value of an analog filter of the continuous-time pipelined analog-to-digital converter; the first transfer function and the second transfer function are determined according to a third transfer function corresponding to one infinite impulse response filter for fitting the analog filter; the first transfer function is determined from a numerator of the third transfer function, and the second transfer function is determined from a denominator of the third transfer function.
2. The digital reconstruction filter of claim 1 wherein the first transfer function is used to characterize a gain characteristic of the analog filter.
3. The digital reconstruction filter of claim 2 wherein there is a delay difference between the branches in which the first finite impulse response filter and the second finite impulse response filter are located; the first transfer function is also used to characterize the time delay characteristics of the analog filter.
4. A digital reconstruction filter as in claim 3 wherein said second finite impulse response filter is configured to fit low pass filter characteristics of said analog filter in addition to gain characteristics and time delay characteristics through said second transfer function.
5. A digital reconstruction filter as in claim 3 wherein the order of said first transfer function and said second transfer function are positively correlated with the delay difference between the branches in which said first finite impulse response filter and said second finite impulse response filter are located.
6. The digital reconstruction filter of claim 1 wherein the second finite impulse response filter is located at an output of the analog filter.
7. The digital reconstruction filter of claim 6 wherein the analog filter is a first order analog filter.
8. The digital reconstruction filter of claim 7 wherein the corresponding transfer function of the analog filter isWherein R is a resistance parameter corresponding to the analog filter; c is a capacitance parameter corresponding to the analog filter;
the gain value corresponding to the analog filter is 4; the first transfer function is P (z) =4; the second transfer function is Q (z) =3.079-2.079 z -1 The method comprises the steps of carrying out a first treatment on the surface of the Wherein the first transfer function and the second transfer function are frequency domain functions.
9. A continuous-time pipelined analog-to-digital converter comprising an analog filter and a digital reconstruction filter as claimed in any one of claims 1 to 8.
CN202210732198.7A 2022-06-27 2022-06-27 Continuous time pipeline analog-to-digital converter and digital reconstruction filter thereof Active CN114928349B (en)

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Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1162869A (en) * 1995-12-22 1997-10-22 汤姆森多媒体公司 Circuit for carrying out digital myquist filtering of IF intermediate frequency signals
CN1338149A (en) * 1998-12-14 2002-02-27 高通股份有限公司 Low-power programmable digital filter
CN101505287A (en) * 2008-02-04 2009-08-12 瑞昱半导体股份有限公司 Order adaptive finite impulse response filter and operating method thereof
CN101860344A (en) * 2010-06-12 2010-10-13 刘海成 Construction method of frequency-selecting filter and construction method for realizing FIR-type and IIR-type filters by adopting same
CN101923862A (en) * 2002-08-16 2010-12-22 艾玛复合信号公司 Method and system for processing subband signals using adaptive filters
CN102124650A (en) * 2008-10-06 2011-07-13 三菱电机株式会社 Signal processing circuit
CN102916677A (en) * 2011-08-02 2013-02-06 联发科技股份有限公司 Infinite impulse response (IIR) filter and filtering method
CN105009459A (en) * 2012-12-21 2015-10-28 特利丹达尔萨公司 Sigma-delta analog-to-digital converter
CN114389626A (en) * 2021-12-30 2022-04-22 北京力通通信有限公司 High-speed digital signal channel demodulation system

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7098669B2 (en) * 2003-10-01 2006-08-29 Flowline, Inc. Depth determining system
US8626809B2 (en) * 2009-02-24 2014-01-07 Samsung Electronics Co., Ltd Method and apparatus for digital up-down conversion using infinite impulse response filter

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1162869A (en) * 1995-12-22 1997-10-22 汤姆森多媒体公司 Circuit for carrying out digital myquist filtering of IF intermediate frequency signals
CN1338149A (en) * 1998-12-14 2002-02-27 高通股份有限公司 Low-power programmable digital filter
CN101923862A (en) * 2002-08-16 2010-12-22 艾玛复合信号公司 Method and system for processing subband signals using adaptive filters
CN101505287A (en) * 2008-02-04 2009-08-12 瑞昱半导体股份有限公司 Order adaptive finite impulse response filter and operating method thereof
CN102124650A (en) * 2008-10-06 2011-07-13 三菱电机株式会社 Signal processing circuit
CN101860344A (en) * 2010-06-12 2010-10-13 刘海成 Construction method of frequency-selecting filter and construction method for realizing FIR-type and IIR-type filters by adopting same
CN102916677A (en) * 2011-08-02 2013-02-06 联发科技股份有限公司 Infinite impulse response (IIR) filter and filtering method
CN105009459A (en) * 2012-12-21 2015-10-28 特利丹达尔萨公司 Sigma-delta analog-to-digital converter
CN114389626A (en) * 2021-12-30 2022-04-22 北京力通通信有限公司 High-speed digital signal channel demodulation system

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
A 2-GS/s 200-MHz BW Oversampling Continuous-Time Pipeline ADC with Adaptive Digital Filter in 28nm;Liran Dong等;《 2021 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)》;全文 *
用脉冲响应不变法设计IIR数字低通滤波器;樊景峰;吴加富;;濮阳职业技术学院学报(第01期);全文 *

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