CN114927101A

CN114927101A - Display device and driving method thereof

Info

Publication number: CN114927101A
Application number: CN202210588045.XA
Authority: CN
Inventors: 高娅娜; 周星耀
Original assignee: Wuhan Tianma Microelectronics Co Ltd
Current assignee: Wuhan Tianma Microelectronics Co Ltd
Priority date: 2022-05-26
Filing date: 2022-05-26
Publication date: 2022-08-19
Anticipated expiration: 2042-05-26
Also published as: US20230005426A1; US11756483B2; CN114927101B

Abstract

The embodiment of the application provides a display device and a driving method thereof, wherein the display device comprises a plurality of pixel circuits and a threshold detection module; the pixel circuit comprises a driving transistor and a data voltage writing module, wherein the output end of the data voltage writing module is electrically connected with the driving transistor, and the threshold value detection module is used for detecting the threshold value voltage of the driving transistor; the working process of the pixel circuit comprises a first stage and a second stage; the first phase comprises a data writing phase and a light-emitting phase, and the second phase comprises a regulating phase and a light-emitting phase; in a data writing phase, the driving transistor receives a data voltage; in the adjusting stage, the driving transistor receives an adjusting voltage corresponding to the threshold voltage of the driving transistor detected by the threshold detecting module. The bias state of the driving transistor in the second stage can be corrected, and the difference of the bias states of the driving transistor in the second stage and the driving transistor in the first stage is reduced to the maximum extent, so that the display effect of the display device is improved.

Description

Display device and driving method thereof

[ technical field ] A method for producing a semiconductor device

The present disclosure relates to display technologies, and particularly to a display device and a driving method thereof.

[ background of the invention ]

An organic light-emitting diode (OLED) display device has the advantages of low power consumption, self-luminescence, wide viewing angle, wide temperature characteristics, fast response speed, and the like, and is widely applied in the market. Among them, the pixel circuit for controlling the light emission of the light emitting device is the core technical content of the OLED display device, and has important research significance.

In the conventional pixel circuit, due to the operating characteristics of the driving transistor, the display device has a large difference between the luminance in the first phase and the luminance in the second phase, which affects the display effect. Especially, in the low-grayscale and low-frequency display state of the display device, the display brightness difference between the first stage and the second stage is particularly obvious. The first stage is a stage including a data writing stage and a light emitting stage, and the second stage is a stage which is performed after the first stage and does not include the data writing stage but includes the light emitting stage.

[ contents of application ]

In view of the above, embodiments of the present disclosure provide a display device and a driving method thereof to solve the above problems.

In a first aspect, an embodiment of the present application provides a display device, which includes a plurality of pixel circuits and a threshold detection module; the pixel circuit comprises a driving transistor and a data voltage writing module, wherein the driving transistor is used for generating light-emitting driving current, the output end of the data voltage writing module is electrically connected with the driving transistor, and the threshold detection module is used for detecting the threshold voltage of the driving transistor; the working process of the pixel circuit comprises a first phase and a second phase, and the second phase is carried out after the first phase; the first phase includes a data writing phase and a light emitting phase performed after the data writing phase, and the second phase includes a conditioning phase and a light emitting phase performed after the conditioning phase;

in the data writing stage, the data voltage writing module transmits data voltage to the driving transistor; in the adjusting stage, the data voltage writing module transmits adjusting voltage to the driving transistor, and the adjusting voltage corresponds to the threshold voltage of the driving transistor detected by the threshold detecting module.

In a second aspect, embodiments of the present application provide a driving method of a display device, for driving the display device provided in the first aspect; the driving method comprises the following steps:

in a data writing stage, the data voltage writing module transmits data voltage to the driving transistor;

in the adjusting phase, the data voltage writing module transmits an adjusting voltage corresponding to the threshold voltage of the driving transistor to the driving transistor.

In the embodiment of the application, in the adjusting stage of the second stage, the data voltage writing module transmits the adjusting voltage to the driving transistor, so that the bias state of the driving transistor can be corrected, and the difference of the bias states of the driving transistor in the second stage and the first stage is reduced. Therefore, the difference of the climbing speeds of the light-emitting driving currents received by the light-emitting device in the first stage and the second stage is reduced, the brightness difference of the display device in the first stage and the second stage is further reduced, and the display effect of the display device is improved. Moreover, since the adjusting voltage transmitted to the driving transistor by the data voltage writing module in the adjusting stage corresponds to the threshold voltage of the driving transistor, the adjusting voltage received by the driving transistor can change along with the characteristic change of the driving transistor, thereby reducing the bias state difference of the driving transistor in the second stage and the first stage belonging to the same frame picture to the maximum extent and further improving the display effect of the display device.

[ description of the drawings ]

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

Fig. 1 is a schematic diagram of a display device according to an embodiment of the present disclosure;

fig. 2 is a schematic diagram of a pixel circuit according to an embodiment of the present disclosure;

FIG. 3 is a schematic diagram of the pixel circuit shown in FIG. 2;

FIG. 4 is a timing diagram of the pixel circuit shown in FIG. 3;

FIG. 5 is a timing diagram of a display device according to an embodiment of the present disclosure;

FIG. 6 is a circuit diagram illustrating the threshold detection module of FIG. 1 detecting the threshold voltage of the driving transistor;

FIG. 7 is a timing diagram of the circuit of FIG. 6;

FIG. 8 is yet another timing diagram of the circuit of FIG. 6;

FIG. 9 is a schematic diagram of another circuit for detecting the threshold voltage of the driving transistor by the threshold detection module in FIG. 1;

FIG. 10 is a timing diagram of the circuit of FIG. 9;

FIG. 11 is a schematic diagram of another circuit for detecting the threshold voltage of the driving transistor by the threshold detection module in FIG. 1;

FIG. 12 is yet another schematic diagram of the pixel circuit of FIG. 2;

FIG. 13 is a timing diagram of the pixel circuit of FIG. 12;

fig. 14 is a flowchart of a driving method of a display device according to an embodiment of the present disclosure;

fig. 15 is a flowchart of a driving method of a display device according to an embodiment of the present disclosure;

fig. 16 is a flowchart illustrating the operation of step B0 in fig. 15.

[ detailed description ] embodiments

For better understanding of the technical solutions of the present application, the following detailed descriptions of the embodiments of the present application are provided with reference to the accompanying drawings.

It should be understood that the embodiments described are only a few embodiments of the present application, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

The terminology used in the embodiments of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in the examples of this application and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

It should be understood that the term "and/or" as used herein is merely one type of association that describes an associated object, meaning that three relationships may exist, e.g., a and/or B may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter related objects are in an "or" relationship.

In the description herein, it is to be understood that the terms "substantially", "approximately", "about", "substantially", and the like, as used in the claims and the examples herein, are intended to be generally accepted as not being precise, within the scope of reasonable process operation or tolerance.

It should be understood that although the terms first, second, third, etc. may be used to describe stages, switches, signal lines, etc. in the embodiments of the present application, these stages, switches, signal lines, etc. should not be limited to these terms. These terms are only used to distinguish one phase, switch, signal line, etc. from another. For example, a first switch may also be referred to as a second switch, and similarly, a second switch may also be referred to as a first switch, without departing from the scope of embodiments herein.

The applicant provides a solution to the problems of the prior art through intensive research.

Fig. 1 is a schematic diagram of a display device according to an embodiment of the present disclosure, fig. 2 is a schematic diagram of a pixel circuit according to an embodiment of the present disclosure, fig. 3 is a schematic diagram of the pixel circuit shown in fig. 2, and fig. 4 is a timing diagram of the pixel circuit shown in fig. 3.

The present embodiment provides a display device 100, and with reference to fig. 1 to 4, the display device 100 includes a plurality of pixel circuits 10 and a threshold detection module 20, where the pixel circuits 10 are used for driving light-emitting devices 30 to emit light and may be disposed in a display area of the display device 100.

As shown in fig. 2, the pixel circuit 10 includes a driving transistor Td for generating a light emitting driving current and a data voltage writing module 11, and an output terminal 112 of the data voltage writing module 11 is electrically connected to the driving transistor Td for transmitting a signal received by the driving transistor Td to the driving transistor Td. The threshold detection module 20 is used for detecting a threshold voltage Vth of the driving transistor Td in the pixel circuit 10.

As shown in fig. 4, the operation process of the pixel circuit 10 includes a first stage T1 and a second stage T2, and the second stage T2 is performed after the first stage T1. The first phase T1 includes a data writing phase E1 and a lighting phase E2 performed after the data writing phase E1, and the second phase T2 includes a conditioning phase E3 and a lighting phase E2 performed after the conditioning phase E3.

Wherein, in the data writing phase E1, the data voltage writing module 11 transmits the data voltage Vdata to the driving transistor Td; in the adjusting phase E3, the data voltage writing module 11 transmits an adjusting voltage V1 to the driving transistor Td, wherein the adjusting voltage V1 corresponds to the threshold voltage Vth of the driving transistor Td detected by the threshold detecting module 20.

That is, the adjusting voltage V1 transmitted by the data voltage writing module 11 corresponds to the threshold voltage Vth of the driving transistor Td receiving the adjusting voltage V1, and the adjusting voltage V1 received by the driving transistor Td when the threshold voltage Vth is different.

It should be noted that, during the adjusting phase E3, the data voltage writing module 11 transmits the adjusting voltage V1 to the source or the drain of the driving transistor Td.

Specifically, as shown in fig. 2-4, the control terminal 113 of the data voltage writing module 11 is electrically connected to the first scan line S1, and the signal transmitted by the first scan line S1 controls the switching state of the data voltage writing module 11.

In the data writing phase E1, the first scan line S1 transmits an active signal to control the data voltage writing module 11 to turn on, and at the same time, the data voltage writing module 11 receives the data voltage Vdata, and the data voltage Vdata is transmitted to the driving transistor Td through the turned-on data voltage writing module 11.

In the adjusting phase E3, the first scan line S1 transmits a valid signal to control the data voltage writing module 11 to turn on, and at the same time, the data voltage writing module 11 receives the adjusting voltage V1, the adjusting voltage V1 is transmitted to the driving transistor Td through the turned-on data voltage writing module 11, and the adjusting voltage V1 corresponds to the threshold voltage Vth of the driving transistor Td received the adjusting voltage V1 detected by the threshold detecting module 20.

In the first stage T1 in which the display device 100 displays one frame of screen, it is necessary to reset the gate of the driving transistor Td and write the data voltage Vdata into the gate of the driving transistor Td in order to generate a desired light emission driving current for the driving transistor Td. To ensure that the driving transistor Td can generate a desired light emission driving current and transmit the same to the light emitting device 30 during the light emission period E2 of the first period T1. There is a current ramp-up process in an initial stage of light emission of the light emitting device 30, and a speed of the current ramp-up is related to a bias state of the driving transistor Td.

However, in the second stage T2 in which the same frame is displayed, the display device 100 in the related art does not reset the gate of the driving transistor Td and write the data voltage Vdata, and the gate of the driving transistor Td maintains a potential substantially equivalent to that in the previous light emitting stage, generates a light emitting driving current, and transmits the light emitting driving current to the light emitting device 30. This results in a large difference in the bias state of the driving transistor Td between the initial stage of the light emitting period E2 of the second stage T2 and the initial stage of the light emitting period E2 of the first stage T1, which results in a large difference in the ramp rate of the light emitting driving current transmitted to the light emitting device 30 between the first stage T1 and the second stage T2, which results in a large difference in the luminance of the display apparatus 100 between the first stage T1 and the second stage T2, which affects the normal display of the display apparatus, and particularly, the flicker problem is very obvious in the low-frequency low-gray-scale display state of the display apparatus.

In the embodiment of the application, in the adjusting stage E3 of the second stage T2, the data voltage writing module 11 transmits the adjusting voltage V1 to the driving transistor Td, so that the bias state of the driving transistor Td can be corrected, and the difference between the bias states of the driving transistor Td in the second stage T2 and the driving transistor Td in the first stage T1 can be reduced. Thereby reducing the difference in the climbing speed of the light emitting driving current transmitted to the light emitting device 30 in the first and second stages T1 and T2, and further reducing the difference in the luminance of the display apparatus 100 in the first and second stages T1 and T2, and improving the display effect of the display apparatus 100.

In addition, considering that the characteristics of different driving transistors Td may not be the same, the characteristics of the same driving transistor Td may also vary with time, so that the bias state of the driving transistor Td in the pixel circuit 10 may not be the same in different first phases T1. The different first stage T1 may be the first stage of the same pixel circuit 10 in different frames, or the first stage of different pixel circuits 10 in the same frame.

Since the threshold voltage Vth of the driving transistor Td is a main parameter describing characteristics of the driving transistor Td, in the embodiment of the present application, the adjusting voltage V1 transmitted by the data voltage writing module 11 to the driving transistor Td in the adjusting phase E3 is set to correspond to the threshold voltage Vth of the driving transistor Td, so that the adjusting voltage V1 received by the driving transistor Td can vary with characteristic variations of the driving transistor Td, thereby maximally reducing bias state differences of the driving transistor Td in the second phase T2 and the first phase T1 belonging to the same frame, and further improving the display effect of the display device 100.

In an embodiment of the present application, as shown in fig. 2 and fig. 3, the pixel circuit 10 may further include a threshold voltage capture module 12, a power supply voltage write module 13, a light emission control module 14, a first reset module 15, a second reset module 16, and a first capacitor C1. The output end 112 of the data voltage writing module 11 is electrically connected to the source of the driving transistor Td, the input end 121 of the threshold voltage capture module 12 is electrically connected to the drain of the driving transistor Td, the output end 122 is electrically connected to the gate of the driving transistor Td, and the control end is electrically connected to the second scan line S2. The input terminal 131 of the power voltage writing module 13 is electrically connected to the power voltage signal line DL1, the output terminal 132 is electrically connected to the source of the driving transistor Td, the control terminal 133 is electrically connected to the emission control signal line EM, the input terminal 141 of the emission control module 14 is electrically connected to the drain of the driving transistor Td, the output terminal 142 is electrically connected to the light emitting device 30, the control terminal 143 is electrically connected to the emission control signal line EM, and the signal transmitted by the emission control signal line EM controls the switching states of the power voltage writing module 13 and the emission control module 14 to be the same. The input terminal 151 of the first reset module 15 receives a reset voltage Vref, the output terminal 152 is electrically connected to the gate of the driving transistor Td, the control terminal 153 is electrically connected to the third scan line S3, and the first reset module 15 is configured to reset the gate of the driving transistor Td. The input terminal 161 of the second reset module 16 receives the reset voltage Vref, the output terminal 162 is electrically connected to the input terminal 31 of the light emitting device 30, the control terminal 163 is electrically connected to the first scan line S1, the second reset module 16 is used for resetting the input terminal 31 of the light emitting device 30, and the signal transmitted by the first scan line S1 controls the data voltage writing module 11 and the second reset module 16 to be in the same switching state. One plate of the first capacitor C1 is electrically connected to the power supply voltage signal line DL1, and the other plate is electrically connected to the gate of the driving transistor Td.

Specifically, the data voltage writing module 11 includes a first transistor M1, a source of the first transistor M1 is electrically connected to the input end 111 of the data voltage writing module 11, a drain is electrically connected to the output end 112 of the data voltage writing module 11, and a gate is electrically connected to the control end 113 of the data voltage writing module 11. The threshold voltage capture module 12 includes a second transistor M2, a source of the second transistor M2 is electrically connected to the input terminal 121 of the threshold voltage capture module 12, a drain is electrically connected to the output terminal 122 of the threshold voltage capture module 12, and a gate is electrically connected to the control terminal 123 of the threshold voltage capture module 12. The power voltage writing module 13 includes a third transistor M3, a source of the third transistor M3 is electrically connected to the input terminal 131 of the power voltage writing module 13, a drain of the third transistor M3 is electrically connected to the output terminal 132 of the power voltage writing module 13, and a gate of the third transistor M3 is electrically connected to the control terminal 133 of the power voltage writing module 13. The light emission control module 14 includes a fourth transistor M4, wherein a source of the fourth transistor M4 is electrically connected to the input terminal 141 of the light emission control module 14, a drain thereof is electrically connected to the output terminal 142 of the light emission control module 14, and a gate thereof is electrically connected to the control terminal 143 of the light emission control module 14. The first reset module 15 includes a fifth transistor M5, wherein a source of the fifth transistor M5 is electrically connected to the input terminal 151 of the first reset module 15, a drain of the fifth transistor M5 is electrically connected to the output terminal 152 of the first reset module 15, and a gate of the fifth transistor M5 is electrically connected to the control terminal 153 of the first reset module 15. The second reset module 16 includes a sixth transistor M6, wherein a source of the sixth transistor M6 is electrically connected to the input terminal 161 of the second reset module 16, a drain thereof is electrically connected to the output terminal 162 of the second reset module 16, and a gate thereof is electrically connected to the control terminal 163 of the second reset module 16.

The operation of the pixel circuit shown in fig. 3 will be described with reference to fig. 3 and 4.

Note that, the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the fifth transistor M5, and the sixth transistor M6 are P-type transistors, which will be described below as an example. Of course, any of the transistors may be an N-type transistor.

As shown in FIG. 4, the first phase T1 further includes a reset phase E0, the reset phase E0 being performed before the data write phase E1. When displaying one frame of picture, the pixel circuit 10 shown in fig. 3 executes a first phase T1 and a second phase T2, wherein the first phase T1 includes a reset phase E0, a data write phase E1 and a light-emitting phase E2; the second phase T2 includes a conditioning phase E3 and a light emission phase E2.

In the reset phase E0 of the first phase T1, the third scan line S3 transmits a turn-on signal, i.e., a low level signal, and the third transistor M3 is turned on; the first scan line S1, the second scan line S2, and the emission control signal line EM transmit off signals, i.e., high level signals, and the first transistor M1, the second transistor M2, the fourth transistor M4, the fifth transistor M5, and the sixth transistor M6 are turned off. The reset voltage Vref is transmitted to the gate of the driving transistor Td through the turned-on third transistor M4, completing the reset of the gate of the driving transistor Td. Since the first capacitor C1 is connected to the gate of the driving transistor Td, the reset voltage Vref can be stored at the gate of the driving transistor Td.

In the data writing phase E1 of the first phase T1, the first scan line S1 transmits an on signal, i.e., a low level signal, and the first transistor M1 and the sixth transistor M6 are turned on; the second scan line S2 transmits a turn-on signal, i.e., a low level signal, and the second transistor M2 is turned on; the third scan line S3 and the light emission control signal line EM transmit off signals, i.e., high level signals, and the third transistor M3, the fourth transistor M4, and the fifth transistor M5 are turned off. Meanwhile, the source of the first transistor M1 receives the data voltage Vdata, which is transmitted to the source of the driving transistor Td through the turned-on first transistor M1. At the starting point of the data writing phase E1, the gate potential of the driving transistor Td is the reset voltage Vref, the source potential of the driving transistor Td is the data voltage signal Vdata, the potential difference between the source and the gate of the driving transistor Td is (Vdata-Vref), and the potential difference between the source and the gate of the driving transistor Td is greater than 0, so that the driving transistor Td is turned on, and the data voltage Vdata is transmitted to the gate of the driving transistor Td through the turned-on driving transistor Td and the turned-on second transistor M2, so that the gate potential of the driving transistor Td gradually increases. When the gate potential of the driving transistor Td is equal to (Vdata- | Vth |), the driving transistor Td is turned off, and at this time, due to the existence of the first capacitor C1, the gate potential of the driving transistor Td is maintained at (Vdata- | Vth |) during the data writing period E1.

Meanwhile, the source of the sixth transistor M6 receives a reset voltage Vref, and the reset voltage Vref resets the first electrode 31 of the light emitting device 30 through the turned-on sixth transistor M6. Alternatively, the light emitting device 30 includes an organic light emitting diode, and the reset voltage Vref resets the anode of the organic light emitting diode through the turned-on sixth transistor M6.

In the light emitting period E2 of the first period T1, the first scan line S1, the second scan line S2 and the third scan line S3 all transmit turn-off signals, i.e., high level signals, and the first transistor M1, the second transistor M2, the third transistor M3 and the sixth transistor M6 are all turned off; the emission control signal line EM transmits an on signal, i.e., a low level signal, and the fourth transistor M4 and the fifth transistor M5 are turned on. Meanwhile, the power supply voltage signal line DL1 transmits the power supply voltage VDD, i.e., the source potential of the driving transistor Td is the power supply voltage VDD. Since the power voltage VDD has a potential greater than that of the data voltage Vdata, the driving transistor Td generates a light emission driving current and transmits the same to the light emitting device 30 through the fifth transistor M5, controlling the light emitting device 30 to emit light.

In the adjusting phase E3 of the second phase T2, the first scan line S1 transmits a turn-on signal, i.e., a low level signal, and the first transistor M1 and the sixth transistor M6 are turned on; the second scan line S2, the third scan line S3 and the light emitting control signal line EM transmit turn-off signals, i.e., high level signals, and the second transistor M2, the third transistor M3, the fourth transistor M4 and the fifth transistor M5 are all turned off. Meanwhile, the source of the first transistor M1 receives the adjustment voltage V1, and the adjustment voltage V1 corresponds to the threshold voltage Vth of the driving transistor Td. The regulated voltage V1 is transmitted to the source of the driving transistor Td through the turned-on first transistor M1, thereby adjusting the bias state of the driving transistor Td. Meanwhile, the source of the sixth transistor M6 receives a reset voltage Vref, which resets the first electrode 31 of the light emitting device 30 through the turned-on sixth transistor M6.

It is understood that, during the adjusting phase E3, the reset voltage Vref resets the first electrode 31 of the light emitting device 30 through the turned-on sixth transistor M6, and does not affect the adjustment of the bias state of the driving transistor Td. And the light emitting device 30 is reset once by the reset voltage Vref before the light emission starts in both the first phase T1 and the second phase T2, which is advantageous for further reducing the difference in the light emission luminance of the light emitting device 30 in the first phase T1 and the second phase T2.

The light-emitting period E2 of the second period T2 is the same as the light-emitting period E2 of the first period T1, and will not be described herein again.

Referring to fig. 1, in an embodiment of the present application, the display device 100 includes a first area AA and a second area BB, the first area AA and the second area BB may be display areas each including the pixel circuit 10, and the threshold detection module 20 may detect a threshold voltage Vth of the driving transistor Td in the pixel circuit 10 in the first area AA and the second area BB.

Among the threshold voltages Vth of the driving transistors Td detected by the threshold detecting module 20, a difference between the threshold voltage Vth of the driving transistors Td at least partially located in the first area AA and the threshold voltage Vth of the driving transistors Td at least partially located in the second area BB is greater than or equal to a first preset value. When the difference between the threshold voltages Vth of the two driving transistors Td is greater than or equal to a first preset value, the characteristics of the two driving transistors Td are greatly different.

Specifically, when the difference between the threshold voltages Vth of the two driving transistors Td is equal to or greater than the first preset value, the operating characteristics of the two driving transistors have a significant difference, for example, the speeds at which the two driving transistors generate light emission driving currents have a significant difference. When the difference between the threshold voltages Vth of the two driving transistors Td is smaller than the first preset value, the difference in the operating characteristics of the two driving transistors is small, for example, the difference in the ramp-up speed of the light emission driving currents generated by the two driving transistors is small.

Optionally, the first preset value is 0.25V.

The pixel circuits 10 in the first area AA receive a different adjustment voltage V1 than the pixel circuits 10 in the second area BB receive an adjustment voltage V1. That is, the driving transistor Td in the first region AA and the driving transistor Td in the second region BB may receive different regulation voltages V1.

The embodiment of the application can reduce the bias state difference of the driving transistor Td in the first area AA and the driving transistor Td in the second area BB in the second stage T2 and the first stage T1 of the same frame picture respectively to the maximum extent, so that the brightness difference of the first area AA and the second area BB in the first stage T1 and the second stage T2 respectively can be smaller, the requirement of fine control on different display areas in the display device 100 is realized, and the overall display effect of the display device 100 is improved.

It should be noted that, when the difference between the threshold voltage Vth of the driving transistor Td in the first area AA and the threshold voltage Vth of the driving transistor Td in the second area BB is smaller than the first preset value, i.e., the difference between the characteristics of the driving transistor Td in the first area AA and the characteristics of the driving transistor Td in the second area BB is smaller, in order to reduce the power consumption of the display device 100, the driving transistor Td in the first area AA and the driving transistor Td in the second area BB may receive the same adjustment voltage V1.

Fig. 5 is a timing diagram of a display device according to an embodiment of the present disclosure.

In one embodiment of the present application, the display device 100 displays frames including a first frame H1 and a second frame H2, and the difference between the threshold voltage Vth of the driving transistor Td detected by the threshold detection module 20 in the first frame H1 and the threshold voltage Vth in the second frame H2 is greater than or equal to a second predetermined value. When the difference between the threshold voltages Vth of the driving transistor Td in two frames is greater than or equal to the second preset value, the operating characteristics of the driving transistor Td in the two frames are greatly different.

Specifically, when the difference between the threshold voltages Vth of the driving transistor Td in two frames is greater than or equal to the second preset value, the operating characteristics of the driving transistor Td in the two frames are greatly different, for example, the speed at which the driving transistor Td generates the light-emitting driving current in the two frames is significantly different. When the difference between the threshold voltages Vth of the driving transistor Td for two frames is smaller than the second preset value, the difference in the operating characteristics of the driving transistor Td in the two frames is smaller, for example, the difference in the speed at which the driving transistor Td generates the light emitting driving current in the two frames is smaller.

Optionally, the second preset value is the same as the first preset value.

The pixel circuit 10 to which the driving transistor Td belongs receives a different adjustment voltage V1 in the first frame H1 than the adjustment voltage V1 in the second frame H2.

For example, as shown in fig. 5, the threshold voltage of the driving transistor Td detected by the threshold detection module 20 in the first frame H1 is a first threshold voltage Vth1, the threshold voltage of the driving transistor Td in the second frame H2 is a second threshold voltage Vth2, the difference between the first threshold voltage Vth1 and the second threshold voltage Vth2 is | Vth1-Vth2|, and | Vth1-Vth2| is greater than or equal to a second preset value. The pixel circuit 10 to which the driving transistor Td belongs receives the first adjustment voltage V1 as the first adjustment voltage V11 in the first frame H1, and receives the second adjustment voltage V1 as the second adjustment voltage V12 in the second frame H2, and the first adjustment voltage V11 is different from the second adjustment voltage V12.

It should be noted that, when the difference between the threshold voltage Vth of the driving transistor Td detected by the threshold detection module 20 in the first frame H1 and the threshold voltage Vth of the driving transistor Td in the second frame H2 is smaller than the second predetermined value, the adjusting voltage V1 received by the pixel circuit 10 to which the driving transistor Td belongs in the first frame H1 and the adjusting voltage V1 received in the second frame H2 can be the same.

Further, the threshold voltage Vth of the driving transistor Td in the first frame H1 can be detected by the threshold detection module 20 in the first frame H1, or detected by the threshold detection module 20 in a frame before the first frame H1.

Specifically, when the frequency of the threshold detection module 20 detecting the threshold voltage Vth of the driving transistor Td is less than the refresh frequency of the frame, that is, when the threshold detection module 20 detects the threshold voltage Vth of the driving transistor Td only in a part of the frame, the threshold voltage Vth of the driving transistor Td detected by the threshold detection module 20 in one frame can be used as the threshold voltage Vth of the frame to which the driving transistor Td belongs before being detected next time.

For example, the frames displayed by the display device 100 include a third frame, a fourth frame, a fifth frame and a sixth frame, which are consecutive, the threshold detection module 20 detects the threshold voltage Vth of the driving transistor Td only in the third frame and the fifth frame, the threshold voltage Vth of the driving transistor Td in the third frame and the fourth frame is the threshold voltage Vth of the driving transistor Td detected by the threshold detection module 20 in the third frame, and the threshold voltage Vth of the driving transistor Td in the fifth frame and the sixth frame is the threshold voltage Vth of the driving transistor Td detected by the threshold detection module 20 in the fifth frame.

Fig. 6 is a circuit diagram illustrating the threshold detection module of fig. 1 detecting the threshold voltage of the driving transistor, and fig. 7 is a timing diagram illustrating the circuit of fig. 6.

In an embodiment of the application, with reference to fig. 6 and 7, the display device 100 includes a plurality of detection phases T0, and in the detection phase T0, the threshold detection module 20 detects the threshold voltage Vth of the driving transistor Td in the pixel circuit 10.

Before the pixel circuit 10 performs the first stage T1, the threshold detection module 20 detects a threshold voltage Vth of the driving transistor Td in the pixel circuit 10.

That is, the detecting stage T0 can be performed before the first stage T1 in a frame. It should be noted that the detecting stage T0 can be performed before the first stage T1 in each frame, or can be performed only before the first stage T1 in the partial frame.

The embodiment of the application can avoid the influence of the detection stage T0 on the working process of the pixel circuit 10, thereby ensuring that the driving transistor Td in the pixel circuit 10 receives the accurate data voltage Vdata, and further generating the light-emitting driving current meeting the requirement.

Fig. 8 is yet another timing diagram for the circuit of fig. 6.

In an embodiment of the present application, with reference to fig. 6 and 8, the detecting phase T0 includes a third phase F1 and a fourth phase F2.

The threshold detection module 20 transmits the detection voltage Vsense to the first pole of the driving transistor Td in the third stage F1, i.e., the first pole of the driving transistor Td receives the detection voltage Vsense in the third stage F1. The second pole of the driving transistor Td receives the first reset voltage Vref1 at the third stage F1, and the driving transistor Td is turned on at the third stage F1.

The driving transistor Td is turned off in the fourth phase F2, and the threshold detection module 20 collects the potential of the second pole of the driving transistor Td in the fourth phase F2.

Specifically, as shown in fig. 6, taking the driving transistor Td as a P-type transistor as an example, a first pole of the driving transistor Td may be a source of the driving transistor Td, and a second pole of the driving transistor Td may be a gate of the driving transistor Td. In the third stage F1, the second transistor M2, electrically connected between the gate and the drain of the driving transistor Td, is turned on. In the initial stage of the third stage F1, the first electrode potential of the driving transistor Td is the detection voltage Vsense, the second electrode potential of the driving transistor Td is the first reset voltage Vref1, and since the driving transistor Td is turned on in the third stage F1, the detection voltage Vsense is transmitted to the second electrode of the driving transistor Td through the turned-on driving transistor Td and the second transistor M2, so that the second electrode potential of the driving transistor Td gradually increases. When the second polarity level of the driving transistor Td is equal to (Vsense | Vth |), the driving transistor Td turns off, and the display device 100 starts to enter the fourth phase F2 of the detection phase T0.

In the fourth stage F2, the second transistor M2 electrically connected between the gate and the drain of the driving transistor Td may be kept turned on. Of course, the second transistor M2 may also be turned off in the fourth stage F2.

In the fourth phase F2, due to the existence of the first capacitor C1, the second pole of the driving transistor Td is kept at (Vsense- | Vth |), and the threshold detection module 20 collects the second pole of the driving transistor Td in the fourth phase F2. That is, the threshold detection module 20 collects the voltage (Vsense | Vth |), and since the detection voltage Vsense is transmitted by the threshold detection module 20 itself, the threshold detection module 20 collects the voltage (Vsense | Vth |), and then obtains the threshold voltage Vth of the driving transistor Td.

It is understood that the threshold detection module 20 is electrically connected to the display chip 40, and the display chip 40 generates the adjustment voltage V1 corresponding to the threshold voltage Vth detected by the threshold detection module 20 in the adjustment phase E2.

Fig. 9 is a schematic diagram of another circuit for detecting the threshold voltage of the driving transistor by the threshold detection module in fig. 1, and fig. 10 is a timing diagram of the circuit shown in fig. 9.

In an embodiment of the present invention, as shown in fig. 6 or fig. 9, the data voltage writing module 11 is electrically connected to the first pole of the driving transistor Td, the data voltage writing module 11 is turned on at a third stage F1, and the threshold detecting module 20 transmits the detection voltage Vsense to the first pole of the driving transistor Td through the turned-on data voltage writing module 11 at the third stage F1.

Further, the input terminal 111 of the data voltage writing module 11 is electrically connected to the first signal line XL1, and the output terminal 112 is electrically connected to the first pole of the driving transistor Td. The display device 100 further includes a first switch K1, wherein a first terminal of the first switch K1 is electrically connected to the threshold detection module 20, a second terminal of the first switch K1 is electrically connected to the first signal line XL1, and the first switch K1 is turned on at a third stage F1.

That is, in the third stage F1, the first switch K1 and the data voltage writing module 11 are both turned on, and the detection voltage Vsense transmitted by the threshold detection module 20 is transmitted to the first pole of the driving transistor Td through the turned-on first switch K1 and the data voltage writing module 11.

Specifically, the control terminal of the first switch K1 is electrically connected to the first control line SW1, and in the third stage F1, the first control line SW1 transmits an active signal to control the first switch K1 to turn on.

Optionally, the first switch K1 is a P-type transistor. Of course, the first switch K1 may be an N-type transistor.

It should be noted that the first switch K1 can be kept in the on state during the fourth phase F2, and kept in the off state during the first phase T1 and the second phase T2.

With reference to fig. 6 or fig. 9, the pixel circuit 10 further includes a first reset module 15, an input terminal 151 of the first reset module 15 is electrically connected to the second signal line XL2, an output terminal 152 is electrically connected to the second pole of the driving transistor Td, the first reset module 15 is turned on in the third stage F1, and the first reset module 15 transmits a first reset voltage Vref1 to the second pole of the driving transistor Td in the third stage F1. That is, in the third stage F1, the first reset voltage Vref1 is transmitted to the second pole of the driving transistor Td through the turned-on first reset module 15.

It should be noted that the first reset voltage Vref1 transmitted by the first reset module 15 in the third phase F1 may be the same as or different from the reset voltage Vref transmitted by the first reset module in the reset phase E0 of the first phase T1.

Further, the display device 100 further includes a fourth switch K4, a first terminal of the fourth switch K4 is electrically connected to the first reset voltage signal line SL1, and a second terminal is electrically connected to the second signal line XL 2. The fourth switch K4 is turned on in the third stage F1, the fourth switch K4 transmits the first reset voltage Vref1 to the second signal line XL2, and the fourth switch K4 is turned off in the fourth stage F2.

That is, in the third stage F1, the first reset voltage Vref1 transmitted by the first reset voltage signal line SL1 is transmitted to the second pole of the driving transistor Td through the turned-on fourth switch K4 and the first reset module 15. And at the fourth stage F2, the fourth switch K4 is turned off, and the second pole of the driving transistor Td stops receiving the first reset voltage Vref 1.

Specifically, the control terminal of the fourth switch K4 is electrically connected to the fourth control line SW4, and in the third stage F1, the fourth switch K4 transmits an active signal to control the fourth switch K4 to be turned on; in the fourth phase F2, the fourth control line SW4 transmits an active signal to control the fourth switch K4 to be turned off.

In the third stage F1, the fourth switch K4 is turned off after the second pole potential of the driving transistor Td is the first reset voltage Vref 1.

In addition, in an implementation manner of the present disclosure, as shown in fig. 6, the display device 100 further includes a third switch K3, wherein a first end of the third switch K3 is electrically connected to the threshold detection module 20, and a second end of the third switch K3 is electrically connected to the second signal line XL 2. The first reset module 15 and the third switch K3 are turned on in the fourth phase F2, and the threshold detection module 20 collects the second pole potential of the driving transistor Td through the turned-on first reset module 15 and the turned-on third switch K3.

That is, in the fourth phase F2, the threshold detection module 20 collects the second pole potential (Vsense | Vth | of the driving transistor Td) through the turned-on first reset module 15 and the turned-on third switch K3, thereby obtaining the threshold voltage Vth of the driving transistor Td.

Specifically, the control terminal of the third switch K3 is electrically connected to the third control line SW3, and in the fourth stage F2, the third control line SW3 transmits the active signal to control the third switch K3 to turn on. In the first and second phases T1 and T2, the third control line SW3 transmits an active signal to control the third switch K3 to be turned off.

In another implementation manner of the present disclosure, with reference to fig. 9 and 10, the display device 100 further includes a third switch K3 and a third signal line XL3, wherein the third signal line XL3 is electrically connected to the second pole of the driving transistor Td. The third switch K3 has a first terminal electrically connected to the threshold detection module 20 and a second terminal electrically connected to the third signal line XL 3.

The third switch K3 is turned on during the fourth phase F2, the first reset module 15 is turned off during the fourth phase F2, and the threshold detection module 20 collects the voltage of the second pole of the driving transistor Td through the third switch K3 during the fourth phase F2.

In the above two implementation manners, optionally, the third switch K3 is turned off during the first stage T1 and the second stage T2, so as to prevent the threshold detection module 20 from affecting the operation process of the pixel circuit 10.

It should be noted that the circuit shown in fig. 9 differs from the circuit shown in fig. 6 only in that: in the circuit shown in fig. 9, a third signal line XL3 is provided, and a third switch K3 is electrically connected to the third signal line XL 3. The timing shown in FIG. 10 is changed from that shown in FIG. 7 in that: in a fourth phase F2, the first reset module 15 is turned off.

In the present embodiment, in the third phase F1 of the detection phase T0, the threshold detection module 20 transmits the detection voltage Vsense to the first pole of the driving transistor Td through the turned-on first switch K1 and the data voltage writing module 11; meanwhile, the first reset voltage Vref1 transmitted by the first reset voltage signal line SL1 is transmitted to the second pole of the driving transistor Td through the turned-on fourth switch K4 and the first reset module 15. The driving transistor Td is turned on under the control of its first and second electrode potentials Vsense and Vref1, i.e., the driving transistor Td is turned on under the control of its source and gate potentials Vsense and Vref 1. Meanwhile, the second transistor M2 electrically connected between the gate and the drain of the driving transistor Td is turned on, the detection voltage Vsense is transmitted to the second pole of the driving transistor Td through the turned-on driving transistor Td and the second transistor M2 until the second pole of the driving transistor Td is (Vsense- | Vth |), the driving transistor Td is turned off, and the display device 100 starts to enter the fourth stage F2 of the detection stage T0.

In the fourth phase F2 of the detection phase T0, the fourth switch K4 is turned off, the third switch K3 is turned on, and the threshold detection module 20 collects the second-pole potential (Vsense-Vth |) of the driving transistor Td through the turned-on third switch K3 and the first reset module 15, or collects the second-pole potential (Vsense-Vth |) of the driving transistor Td through only the turned-on third switch K3, thereby obtaining the threshold voltage Vth of the driving transistor Td.

In one embodiment of the present application, as shown in fig. 6 or 9, the display device 100 further includes a second switch K2, wherein a first end of the second switch K2 is electrically connected to the first signal line XL1, and a second end is electrically connected to the display chip 40. The second switch K2 is turned on and transmits the data voltage Vdata during the first period T1, the second switch K2 is turned on and transmits the adjustment voltage V1 during the second period T2, and the second switch K2 is turned off during the detection period T0.

Specifically, the control terminal of the second switch K2 is electrically connected to the second control line SW2, and in the first stage T1 and the second stage T2, the second control line SW2 transmits an active signal to control the second switch K2 to be turned on; during the detecting period T0, the second control line SW2 transmits an active signal to control the second switch K2 to close.

In conjunction with the operation of the pixel circuit 10, in the data writing phase E1, the data voltage Vdata transmitted by the data voltage writing module 11 to the driving transistor Td is the data voltage Vdata transmitted by the second switch K2 in the first phase T1, and in the adjusting phase E3, the adjusting voltage V1 transmitted by the data voltage writing module 11 to the driving transistor Td is the adjusting voltage V1 transmitted by the second switch K2 in the second phase T2.

The embodiment of the application can prevent the data voltage Vdata or the adjustment voltage V1 from affecting the detection stage T0 of the display device 100 while ensuring that the data voltage Vdata and the adjustment voltage V1 are transmitted to the pixel circuit 10.

FIG. 11 is a circuit diagram illustrating another circuit diagram of the threshold detection module of FIG. 1 for detecting the threshold voltage of the driving transistor.

With continued reference to fig. 6 or fig. 9, in an embodiment of the present application, the display device 100 further includes a fifth switch K5, wherein a first terminal of the fifth switch K5 is electrically connected to the second reset voltage signal line SL2, and a second terminal thereof is electrically connected to the second signal line XL 2. The fifth switch K5 is turned off during the detecting period T0, and the fifth switch K5 transmits the second reset voltage Vref2 to the second signal line XL2 during the first period T1. In addition, the fifth switch K5 can also transmit the second reset voltage Vref2 to the second signal line XL2 in the second stage T2.

Specifically, the control terminal of the fifth switch K5 is electrically connected to the fifth control line SW5, and in the first stage T1 and the second stage T2, the fifth control line SW5 transmits an active signal to control the fifth switch K5 to be turned on.

In conjunction with the operation of the pixel circuit 10, the second reset voltage Vref2 transmitted by the fifth switch K5 can be the reset voltage Vref received by the first reset module 15 in the reset phase E0. Of course, the second reset voltage Vref2 may be the reset voltage Vref transmitted by the second reset module 16 in the pixel circuit 10 to the light emitting device 30.

Note that, as shown in fig. 6 or fig. 9, the input terminal 161 of the second reset module 16 may be electrically connected to the second signal line XL 2. As shown in fig. 11, the input terminal 161 of the second reset module 16 may be electrically connected to a second reset voltage signal line SL 2.

Fig. 12 is another schematic diagram of the pixel circuit shown in fig. 2, and fig. 13 is a timing diagram of the pixel circuit shown in fig. 12.

The pixel circuit 10 shown in fig. 12 differs from the pixel circuit 10 shown in fig. 3 only in that the second transistor M2 and the fifth transistor M5 are N-type transistors including metal oxide active layers.

Compared to the timing shown in FIG. 4, the timing shown in FIG. 13 changes in that: the on signal transmitted by the second scan line S2 and the third scan line S3 is a high level signal, and the off signal is a low level signal.

Fig. 14 is a flowchart of a driving method of a display device according to an embodiment of the present disclosure.

The embodiment of the present application further provides a driving method of a display device, for driving the display device 100 provided in the above embodiment. The display device 100 includes a pixel circuit 10 and a threshold voltage detection module 20, the structure of the pixel circuit 10 can refer to the schematic diagrams in fig. 2, fig. 3 and fig. 12, and the circuit for detecting the threshold voltage Vth of the driving transistor Td in the pixel circuit 10 by the threshold voltage detection module 20 can refer to the schematic diagrams in fig. 6, fig. 9 and fig. 11. The corresponding driving method can be understood by combining the operation process of the pixel circuit 10 and the process of the threshold voltage detection module 20 detecting the threshold voltage Vth of the driving transistor Td in the above embodiments.

As shown in fig. 14, the driving method includes:

step B1: in the data write phase E1, the data voltage write module 11 transmits the data voltage Vdata to the driving transistor Td.

Step B2: in the adjusting phase E3, the data voltage writing module 11 transmits an adjusting voltage V1 corresponding to the threshold voltage Vth of the driving transistor Td to the driving transistor Td.

In the driving method provided by the embodiment of the application, in the adjusting stage E3 of the second stage T2, the data voltage writing module 11 transmits the adjusting voltage V1 to the driving transistor Td, so that the bias state of the driving transistor Td can be corrected, and the difference between the bias states of the driving transistor Td in the second stage T2 and the driving transistor Td in the first stage T1 can be reduced. Thereby reducing the difference of the climbing speeds of the currents received by the light emitting device 30 in the first stage T1 and the second stage T2, further reducing the difference of the brightness of the display apparatus 100 in the first stage T1 and the second stage T2, and improving the display effect of the display apparatus 100. Moreover, since the adjusting voltage V1 transmitted to the driving transistor Td by the data voltage writing module 11 in the adjusting phase E3 corresponds to the threshold voltage Vth of the driving transistor Td, the adjusting voltage V1 received by the driving transistor Td can be changed along with the characteristic change of the driving transistor Td, thereby minimizing the difference of the bias states of the driving transistor Td in the second phase T2 and the first phase T1 belonging to the same frame, and further improving the display effect of the display device 100.

Fig. 15 is a flowchart of a driving method of a display device according to another embodiment of the present disclosure, and fig. 16 is a flowchart of an operation in step B0 in fig. 15.

In one embodiment of the present application, the display device 100 includes a plurality of detection stages T0, the detection stage T0 is performed before the pixel circuit 10 performs the first stage T1. As shown in fig. 15, the driving method further includes:

step B0: in the detection phase T0, the threshold detection module 20 detects the threshold voltage Vth of the driving transistor Td in the pixel circuit 10.

Wherein step B0 is performed before step B1.

Specifically, as shown in fig. 16, the detecting phase T0 includes a third phase F1 and a fourth phase F2, and the threshold detecting module 20 detects the threshold voltage Vth of the driving transistor Td in the pixel circuit 10, which includes:

step B01: in the third stage F1, the threshold detection module 20 transmits the detection voltage Vsense to the first pole of the driving transistor Td, the second pole of the driving transistor Td receives the first reset voltage Vref1, and the driving transistor Td is turned on.

Step B02: in the fourth phase F2, the driving transistor Td stops receiving the first reset voltage Vref1, and the driving transistor Td is turned off, and the threshold detection module 20 collects the potential of the second pole of the driving transistor Td.

Wherein a first pole of the driving transistor Td may be a source of the driving transistor Td, and a second pole of the driving transistor Td may be a gate of the driving transistor Td. In the third stage F1, the second transistor M2, electrically connected between the gate and the drain of the driving transistor Td, is turned on. In the initial stage of the third stage F1, the first electrode potential of the driving transistor Td is the detection voltage Vsense, the second electrode potential of the driving transistor Td is the first reset voltage Vref1, and since the driving transistor Td is turned on in the third stage F1, the detection voltage Vsense is transmitted to the second electrode of the driving transistor Td through the turned-on driving transistor Td and the second transistor M2, so that the second electrode potential of the driving transistor Td gradually increases. When the second polarity level of the driving transistor Td is equal to (Vsense | Vth |), the driving transistor Td turns off, and the display device 100 starts to enter the fourth phase F2 of the detection phase T0.

In the fourth phase F2, due to the existence of the first capacitor C1, the second pole of the driving transistor Td is kept at (Vsense- | Vth |), and the threshold detection module 20 collects the second pole of the driving transistor Td in the fourth phase F2. That is, the threshold detecting module 20 collects the voltage level (Vsense- | Vth |), thereby obtaining the threshold voltage Vth of the driving transistor Td.

In an embodiment of the present application, as shown in fig. 6 or fig. 9, the data voltage writing module 11 is electrically connected to a first pole of the driving transistor Td, and the driving method further includes:

in the third stage F1, the data voltage writing module 11 is turned on, and the threshold detection module 20 transmits the detection voltage Vsense to the first pole of the driving transistor Td through the data voltage writing module 11.

Further, with continued reference to fig. 6 or fig. 9, the input end 111 of the data voltage writing module 11 is electrically connected to the first signal line XL1, and the output end 112 is electrically connected to the first pole of the driving transistor Td. In addition, the display device 100 further includes a first switch K1, wherein a first terminal of the first switch K1 is electrically connected to the threshold detection module 20, and a second terminal thereof is electrically connected to the first signal line XL 1. The driving method further includes:

in the third stage F1, the first switch K1 is turned on.

That is, in the third stage F1, the threshold detection module 20 transmits the detection voltage Vsense to the first pole of the driving transistor Td through the turned-on first switch K1 and the data voltage writing module 11.

With continued reference to fig. 6 or fig. 9, the pixel circuit 10 further includes a first reset module 15, wherein an input terminal 151 of the first reset module 15 is electrically connected to the second signal line XL2, and an output terminal 152 is electrically connected to the second pole of the driving transistor Td. The driving method further includes:

in the third stage F1, the first reset module 15 is turned on and transmits the first reset voltage Vref1 to the second pole of the driving transistor Td.

Further, the display device 100 further includes a fourth switch K4, a first terminal of the fourth switch K4 is electrically connected to the first reset voltage signal line SL1, and a second terminal is electrically connected to the second signal line XL 2. The driving method further includes:

in the third stage F1, the fourth switch K4 is turned on, and the fourth switch K4 transmits the first reset voltage Vref1 to the second signal line XL 2.

During a fourth phase F2, the fourth switch K4 is closed.

That is, in the third stage F1, the first reset voltage Vref1 transmitted by the first reset voltage signal line SL1 is transmitted to the second pole of the driving transistor Td through the turned-on fourth switch K4 and the first reset module 15. And, in the fourth phase F2, the fourth switch K4 is turned off, and the second pole of the driving transistor Td is electrically disconnected from the first reset voltage signal line SL 1.

In addition, in an implementation manner of the present disclosure, as shown in fig. 6, the display device 100 further includes a third switch K3, wherein a first end of the third switch K3 is electrically connected to the threshold detection module 20, and a second end of the third switch K3 is electrically connected to the second signal line XL 2. The driving method further includes:

in the fourth phase F2, the first reset module 15 and the third switch K3 are turned on, and the threshold detection module 20 collects the voltage of the second pole of the driving transistor Td through the first reset module 15 and the third switch K3.

In another implementation manner of the present disclosure, as shown in fig. 9, the display device 100 further includes a third switch K3 and a third signal line XL3, wherein the third signal line XL3 is electrically connected to the second pole of the driving transistor Td. The third switch K3 has a first terminal electrically connected to the threshold detection module 20 and a second terminal electrically connected to the third signal line XL 3. The driving method further includes:

in the fourth phase F2, the third switch K3 is turned on and the first reset module 15 is turned off, and the threshold detection module 20 collects the voltage of the second pole of the driving transistor Td through the third switch K3.

In both implementations described above, optionally, the third switch K3 is closed during the first and second phases T1 and T2.

In the present embodiment, in the third phase F1 of the detection phase T0, the threshold detection module 20 transmits the detection voltage Vsense to the first pole of the driving transistor Td through the turned-on first switch K1 and the data voltage writing module 11; meanwhile, the first reset voltage Vref1 transmitted by the first reset voltage signal line SL1 is transmitted to the second pole of the driving transistor Td through the turned-on fourth switch K4 and the first reset module 15. The driving transistor Td is turned on under the control of its first and second electrode potentials Vsense and Vref1, i.e., the driving transistor Td is turned on under the control of its source and gate potentials Vsense and Vref 1. Meanwhile, the second transistor M2 electrically connected between the gate and the drain of the driving transistor Td is turned on, the detection voltage Vsense is transmitted to the second pole of the driving transistor Td through the turned-on driving transistor Td and the second transistor M2 until the second pole of the driving transistor Td is (Vsense-Vth), the driving transistor Td is turned off, and the display device 100 starts to enter the fourth stage F2 of the detection stage T0.

In an embodiment of the present application, please refer to fig. 6 or fig. 9, the display device 100 further includes a second switch K2, wherein a first terminal of the second switch K2 is electrically connected to the first signal line XL1, and a second terminal thereof is electrically connected to the display chip 40. The driving method further includes:

in the first stage T1, the second switch K2 is turned on and transmits the data voltage Vdata;

in a second phase T2, the second switch K2 is turned on and delivers the regulated voltage V1;

during the detection period T0, the second switch K2 is closed.

With continued reference to fig. 6 or fig. 9, in an embodiment of the present application, the display device 100 further includes a fifth switch K5, a first terminal of the fifth switch K5 is electrically connected to the second reset voltage signal line SL2, and a second terminal thereof is electrically connected to the second signal line XL 2. The driving method further includes:

in the detection period T0, the fifth switch K5 is turned off;

in the first period T1, the fifth switch K5 is turned on, and the fifth switch K5 transmits the second reset voltage Vref2 to the second signal line XL 2.

It should be noted that the fifth switch K5 can also transmit the second reset voltage Vref2 to the second signal line XL2 in the second stage T2.

In conjunction with the operation of the pixel circuit 10, the second reset voltage Vref2 transmitted by the fifth switch K5 can be the reset voltage Vref received by the first reset module 15 in the reset phase E0. Of course, the second reset voltage Vref2 may also be the reset voltage Vref transmitted by the second reset module 16 in the pixel circuit 10 to the light emitting device 30.

To sum up, the display device and the driving method thereof provided by the embodiment of the present application have at least the following beneficial effects: in the adjusting stage E3 of the second stage T2, the data voltage writing module 11 transmits the adjusting voltage V1 to the driving transistor Td, so that the bias state of the driving transistor Td can be corrected, and the difference in the bias state of the driving transistor Td between the second stage T2 and the first stage T1 can be reduced. Thereby reducing the difference of the climbing speeds of the currents received by the light emitting device 30 in the first stage T1 and the second stage T2, further reducing the difference of the brightness of the display apparatus 100 in the first stage T1 and the second stage T2, and improving the display effect of the display apparatus 100. Moreover, since the adjusting voltage V1 transmitted to the driving transistor Td by the data voltage writing module 11 in the adjusting phase E3 corresponds to the threshold voltage Vth of the driving transistor Td, the adjusting voltage V1 received by the driving transistor Td can be changed along with the characteristic change of the driving transistor Td, thereby minimizing the difference of the bias states of the driving transistor Td in the second phase T2 and the first phase T1 belonging to the same frame, and further improving the display effect of the display device 100.

The above description is only exemplary of the present application and should not be taken as limiting the present application, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present application should be included in the scope of protection of the present application.

Claims

1. A display device, comprising:

a plurality of pixel circuits, the pixel circuits comprising:

a driving transistor for generating a light emission driving current;

the output end of the data voltage writing module is electrically connected with the driving transistor;

a threshold detection module for detecting a threshold voltage of the driving transistor;

the working process of the pixel circuit comprises a first phase and a second phase, and the second phase is carried out after the first phase; the first phase includes a data writing phase and a light emitting phase performed after the data writing phase; the second phase comprises a conditioning phase and a lighting phase performed after the conditioning phase;

wherein, in the data writing phase, the data voltage writing module transmits a data voltage to the driving transistor; in the adjusting stage, the data voltage writing module transmits an adjusting voltage to the driving transistor, wherein the adjusting voltage corresponds to the threshold voltage of the driving transistor detected by the threshold detecting module.

2. The display device according to claim 1, wherein the display device includes a first region and a second region; in the threshold voltages of the driving transistors detected by the threshold detection module, the difference between the threshold voltage of the driving transistor at least partially located in the first region and the threshold voltage of the driving transistor at least partially located in the second region is greater than or equal to a first preset value;

wherein the pixel circuits located in the first region receive a different adjustment voltage than the pixel circuits located in the second region.

3. The display device according to claim 1, wherein the pictures displayed by the display device include a first frame picture and a second frame picture; the difference value between the threshold voltage of the driving transistor in the first frame picture and the threshold voltage of the driving transistor in the second frame picture, which is detected by the threshold detection module, is greater than or equal to a second preset value;

the pixel circuit to which the driving transistor belongs receives a regulating voltage in the first frame picture different from a regulating voltage received in the second frame picture.

4. The display device according to claim 1, wherein the display device comprises a plurality of detection stages; in the detection stage, the threshold detection module detects the threshold voltage of the driving transistor in the pixel circuit;

before the pixel circuit performs the first stage, the threshold detection module detects the threshold voltage of the driving transistor in the pixel circuit.

5. The display device according to claim 4, wherein the detecting stage comprises a third stage and a fourth stage;

the threshold detection module transmits a detection voltage to the first pole of the driving transistor in the third stage, and the second pole of the driving transistor receives a first reset voltage in the third stage; the driving transistor is turned on at the third stage;

the driving transistor is turned off in the fourth stage, and the threshold detection module collects the potential of the second pole of the driving transistor in the fourth stage.

6. The display device according to claim 5, wherein the data voltage writing module is electrically connected to the first electrode of the driving transistor, the data voltage writing module is turned on in the third stage, and the threshold detection module transmits the detection voltage to the first electrode of the driving transistor through the data voltage writing module in the third stage.

7. The display device according to claim 6, wherein an input terminal of the data voltage writing module is electrically connected to a first signal line, and an output terminal thereof is electrically connected to a first pole of the driving transistor;

the display device also comprises a first switch, wherein the first end of the first switch is electrically connected with the threshold detection module, and the second end of the first switch is electrically connected with the first signal wire; the first switch is turned on at the third stage.

8. The display device according to claim 7, further comprising a second switch; the first end of the second switch is electrically connected with the first signal wire, and the second end of the second switch is electrically connected with the display chip;

the second switch is turned on in the first phase and transmits a data voltage, the second switch is turned on in the second phase and transmits a regulated voltage, and the second switch is turned off in the detection phase.

9. The display device according to claim 5, wherein the pixel circuit further comprises a first reset module;

the input end of the first reset module is electrically connected with the second signal line, the output end of the first reset module is electrically connected with the second pole of the driving transistor, the first reset module is started in the third stage, and the first reset module transmits a first reset voltage to the second pole of the driving transistor in the third stage.

10. The display device according to claim 9, further comprising a third switch, wherein a first terminal of the third switch is electrically connected to the threshold detection module and a second terminal of the third switch is electrically connected to the second signal line;

the first reset module and the third switch are turned on at the fourth stage, and the threshold detection module collects the potential of the second pole of the driving transistor through the first reset module and the third switch.

11. The display device according to claim 9, further comprising a fourth switch having a first terminal electrically connected to the first reset voltage signal line and a second terminal electrically connected to the second signal line;

the fourth switch is turned on in the third stage, and the fourth switch transmits the first reset voltage to the second signal line; the fourth switch is closed in the fourth phase.

12. The display device according to claim 11, further comprising a fifth switch having a first terminal electrically connected to a second reset voltage signal line and a second terminal electrically connected to the second signal line;

the fifth switch is turned off in the detection phase, and the fifth switch transmits a second reset voltage to the second signal line in the first phase.

13. The display device according to claim 9, further comprising a third switch and a third signal line, wherein the third signal line is electrically connected to the second pole of the driving transistor; the first end of the third switch is electrically connected with the threshold detection module, and the second end of the third switch is electrically connected with the third signal line;

the third switch is turned on at the fourth stage, the first reset module is turned off at the fourth stage, and the threshold detection module collects the potential of the second pole of the driving transistor through the third switch at the fourth stage.

14. The display device according to claim 10 or 13, wherein the third switch is turned off in the first stage and the second stage.

15. A driving method of a display device, for driving the display device according to any one of claims 1 to 14;

the driving method includes:

in the data writing phase, the data voltage writing module transmits a data voltage to the driving transistor;

16. The driving method according to claim 15, wherein the display device comprises a plurality of detection stages, the detection stages being performed before the pixel circuits perform the first stage; the driving method further includes:

in the detection stage, the threshold detection module detects the threshold voltage of the driving transistor in the pixel circuit.

17. The driving method according to claim 16,

the detecting stage includes a third stage and a fourth stage, and the detecting module detects a threshold voltage of the driving transistor in the pixel circuit, including:

in the third stage, the threshold detection module transmits a detection voltage to the first pole of the driving transistor, the second pole of the driving transistor receives a first reset voltage, and the driving transistor is turned on;

in the fourth stage, the driving transistor stops receiving the first reset voltage, the driving transistor is turned off, and the threshold detection module collects the potential of the second pole of the driving transistor.

18. The driving method according to claim 17, wherein the data voltage writing module is electrically connected to the first pole of the driving transistor, the driving method further comprising:

at the third stage, the data voltage writing module is turned on, and the threshold detection module transmits a detection voltage to the first electrode of the driving transistor through the data voltage writing module.

19. The driving method according to claim 18, wherein an input terminal of the data voltage writing module is electrically connected to a first signal line, and an output terminal is electrically connected to a first pole of the driving transistor; the display device also comprises a first switch, wherein the first end of the first switch is electrically connected with the threshold detection module, and the second end of the first switch is electrically connected with the first signal wire;

the driving method further includes:

in the third phase, the first switch is turned on.

20. The driving method according to claim 19, wherein the display device further includes a second switch; the first end of the second switch is electrically connected with the first signal wire, and the second end of the second switch is electrically connected with the display chip;

the driving method further includes:

in the first stage, the second switch is turned on and transmits a data voltage;

in the second stage, the second switch is turned on and transmits a regulated voltage;

in the detection phase, the second switch is closed.

21. The driving method according to claim 17, wherein the pixel circuit further includes a first reset block; the input end of the first reset module is electrically connected with the second signal line, and the output end of the first reset module is electrically connected with the second pole of the driving transistor;

the driving method further includes:

in the third phase, the first reset module is turned on and transmits a first reset voltage to the second pole of the driving transistor.

22. The driving method according to claim 21, wherein the display device further comprises a third switch, a first end of the third switch is electrically connected to the threshold detection module, and a second end of the third switch is electrically connected to the second signal line; the driving method further includes:

in the fourth stage, the first reset module and the third switch are turned on, and the threshold detection module collects the potential of the second pole of the driving transistor through the first reset module and the third switch.

23. The driving method according to claim 21, wherein the display device further comprises a fourth switch, a first terminal of which is electrically connected to the first reset voltage signal line and a second terminal of which is electrically connected to the second signal line; the driving method further includes:

in the third phase, the fourth switch is turned on, and the fourth switch transmits the first reset voltage to the second signal line;

in the fourth phase, the fourth switch is turned off.

24. The driving method according to claim 23, wherein the display device further comprises a fifth switch, a first terminal of which is electrically connected to a second reset voltage signal line and a second terminal of which is electrically connected to the second signal line; the driving method further includes:

in the detection stage, the fifth switch is closed;

in the first stage, the fifth switch is turned on, and the fifth switch transmits a second reset voltage to the second signal line.

25. The driving method according to claim 21, wherein the display device further comprises a third switch and a third signal line, and wherein the third signal line is electrically connected to the second pole of the driving transistor; the first end of the third switch is electrically connected with the threshold detection module, and the second end of the third switch is electrically connected with the third signal line;

the driving method further includes:

in the fourth stage, the third switch is turned on and the first reset module is turned off, and the threshold detection module collects the potential of the second pole of the driving transistor through the third switch.

26. The driving method according to claim 22 or 25, wherein the third switch is turned off in the first phase and the second phase.