CN114914347A - Light-emitting chip manufacturing method and light-emitting chip - Google Patents
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Abstract
本发明公开一种发光芯片制作方法,首先将具有多孔洞结构的第一基板的厚度减薄至目标厚度,然后,再往厚度减薄至目标厚度之后的第一基板的至少部分孔洞中填充量子点,以及将第一基板与一具有多个晶粒的第二基板键合,晶粒发出的第一光色通过量子点转换为目标光色。本发明可以避免减薄第一基板的过程中,研磨、抛光时的高温条件、研磨液、抛光液等的影响导致量子点失效或性能下降,确保量子点的色转换效率。同时,本发明还提供一种采用该制作方法制成的发光芯片。
The invention discloses a method for manufacturing a light-emitting chip. First, the thickness of a first substrate having a porous structure is reduced to a target thickness, and then at least part of the holes of the first substrate after the thickness is reduced to the target thickness are filled with quantum and bonding the first substrate with a second substrate having a plurality of crystal grains, and the first light color emitted by the crystal grains is converted into the target light color through the quantum dots. In the process of thinning the first substrate, the invention can avoid the failure or performance degradation of quantum dots caused by the influence of high temperature conditions during grinding and polishing, grinding liquid, polishing liquid, etc., and ensure the color conversion efficiency of quantum dots. At the same time, the present invention also provides a light-emitting chip manufactured by the manufacturing method.
Description
技术领域technical field
本发明涉及显示技术领域,具体涉及一种发光芯片制作方法及发光芯片。The present invention relates to the field of display technology, in particular to a method for manufacturing a light-emitting chip and a light-emitting chip.
背景技术Background technique
量子点(quantum dot,简称QD)材料由于其优异的光电特性,具有色纯度高、发光颜色可调和荧光量子产率高等特点,目前,量子点材料的显示应用主要是基于其色转换特性,通常,用紫外光或蓝光作为激发源,采用绿光、红光量子点将激发光线转换为所需的绿光或红光。Quantum dot (QD) materials have the characteristics of high color purity, tunable emission color and high fluorescence quantum yield due to their excellent optoelectronic properties. At present, the display application of quantum dot materials is mainly based on their color conversion properties, usually , using ultraviolet light or blue light as the excitation source, and using green light and red light quantum dots to convert the excitation light into the desired green or red light.
但是,量子点遇水分、遇热会导致荧光性能急剧下降,同时稳定性也会降低,量子点怕水怕热这一特性很大程度上制约了量子点发光芯片的工艺制程。However, when quantum dots are exposed to moisture and heat, the fluorescence performance will drop sharply, and the stability will also be reduced.
发明内容SUMMARY OF THE INVENTION
本发明的目的在于提供一种可以避免温度、水分等因素影响量子点的发光芯片制作方法及采用该制作方法制成的发光芯片。The purpose of the present invention is to provide a light-emitting chip fabrication method that can avoid factors such as temperature, moisture and other factors affecting quantum dots, and a light-emitting chip fabricated by the fabrication method.
为实现上述目的,本发明提供了一种发光芯片制作方法,包括:To achieve the above purpose, the present invention provides a method for manufacturing a light-emitting chip, comprising:
将具有多孔洞结构的第一基板的厚度减薄至目标厚度;reducing the thickness of the first substrate with the porous structure to a target thickness;
往厚度减薄至所述目标厚度之后的所述第一基板的至少部分孔洞中填充量子点,filling quantum dots into at least part of the holes of the first substrate after the thickness is reduced to the target thickness,
以及,将厚度减薄至所述目标厚度之后的所述第一基板与一具有多个晶粒的第二基板键合,所述晶粒发出的第一光色通过所述量子点转换为目标光色。And, the first substrate after the thickness is reduced to the target thickness is bonded to a second substrate having a plurality of crystal grains, and the first light color emitted by the crystal grains is converted into the target through the quantum dots light color.
在一些实施例中,先往厚度减薄至所述目标厚度之后的所述第一基板的至少部分孔洞中填充量子点,再将填充有量子点的所述第一基板与所述第二基板键合。In some embodiments, quantum dots are filled in at least part of the holes of the first substrate after the thickness is reduced to the target thickness, and then the first substrate and the second substrate filled with quantum dots are filled with quantum dots. Bond.
在一些实施例中,所述第一基板具有相对的第一面和第二面,所述多孔洞结构设置于所述第一基板的第一面,所述第二基板具有相对的第三面和第四面,所述多个晶粒设置于所述第二基板的第三面;将所述第一基板的第一面与所述第二基板的第三面键合。In some embodiments, the first substrate has an opposite first surface and a second surface, the porous structure is disposed on the first surface of the first substrate, and the second substrate has an opposite third surface and the fourth surface, the plurality of crystal grains are arranged on the third surface of the second substrate; the first surface of the first substrate is bonded to the third surface of the second substrate.
在一些实施例中,先将厚度减薄至所述目标厚度之后的所述第一基板与所述第二基板键合,再往与所述第二基板键合之后的所述第一基板的至少部分孔洞中填充量子点。In some embodiments, the first substrate after being thinned to the target thickness is bonded to the second substrate, and then the first substrate after being bonded to the second substrate is bonded to the first substrate. At least some of the holes are filled with quantum dots.
在一些实施例中,所述第一基板具有相对的第一面和第二面,所述多孔洞结构设置于所述第一基板的第一面,所述第二基板具有相对的第三面和第四面,所述多个晶粒设置于所述第二基板的第三面;将所述第一基板的第二面与所述第二基板的第三面键合。In some embodiments, the first substrate has an opposite first surface and a second surface, the porous structure is disposed on the first surface of the first substrate, and the second substrate has an opposite third surface and a fourth surface, the plurality of crystal grains are arranged on the third surface of the second substrate; the second surface of the first substrate is bonded to the third surface of the second substrate.
在一些实施例中,所述发光芯片制作方法还包括:制备所述具有多个晶粒的第二基板,包括:提供一生长衬底,在所述生长衬底上制备出多个晶粒;将所述多个晶粒背离所述生长衬底的一侧与一第二基板粘接固定;将所述生长衬底剥离,获得所述具有多个晶粒的第二基板。In some embodiments, the light-emitting chip manufacturing method further includes: preparing the second substrate having a plurality of crystal grains, including: providing a growth substrate, and preparing a plurality of crystal grains on the growth substrate; Adhering and fixing the side of the plurality of crystal grains away from the growth substrate with a second substrate; peeling off the growth substrate to obtain the second substrate with the plurality of crystal grains.
在一些实施例中,所述多个晶粒与所述第二基板粘接固定,在将具有所述多孔洞结构的所述第一基板与具有所述多个晶粒的所述第二基板键合之后,还包括:解除所述多个晶粒与所述第二基板的粘接。In some embodiments, the plurality of die and the second substrate are adhered and fixed, and the first substrate having the porous structure and the second substrate having the plurality of die are bonded together. After the bonding, the method further includes: releasing the bonding between the plurality of die and the second substrate.
在一些实施例中,在往所述第一基板的至少部分孔洞中填充量子点以及解除所述多个晶粒与所述第二基板的粘接之后,还包括:沿所述晶粒之间的间隙进行切割,获得包含有至少一个所述晶粒的发光芯片。In some embodiments, after filling quantum dots into at least part of the holes of the first substrate and releasing the bonding between the plurality of die and the second substrate, the method further includes: along the gap between the die The gap is cut to obtain a light-emitting chip containing at least one of the die.
在一些实施例中,所述第一基板具有相对的第一面和第二面,所述多孔洞结构设置于所述第一基板的第一面,所述将具有多个孔洞的第一基板的厚度减薄至目标厚度包括:提供一支撑结构,上蜡将所述第一基板的第一面与所述支撑结构固定;研磨、抛光所述第一基板的第二面,以将所述第一基板的厚度减薄至目标厚度;去除蜡,使所述第一基板的第一面与所述支撑结构分离。In some embodiments, the first substrate has opposite first and second surfaces, the porous structure is disposed on the first surface of the first substrate, and the first substrate will have a plurality of holes Thinning the thickness of the first substrate to the target thickness includes: providing a support structure, waxing to fix the first surface of the first substrate and the support structure; grinding and polishing the second surface of the first substrate to The thickness of the first substrate is reduced to a target thickness; the wax is removed to separate the first side of the first substrate from the support structure.
在一些实施例中,所述具有多个孔洞的第一基板的翘曲值小于或等于35微米。In some embodiments, the warpage value of the first substrate having the plurality of holes is less than or equal to 35 microns.
为实现上述目的,本发明还提供了一种发光芯片,所述发光芯片采用如上所述的制作方法制成。In order to achieve the above object, the present invention also provides a light-emitting chip, the light-emitting chip is manufactured by the above-mentioned manufacturing method.
与现有技术相比,本发明首先将具有多孔洞结构的第一基板的厚度减薄至目标厚度,然后,再进行量子点填充和进行第一基板与具有多个晶粒的第二基板的键合,可以避免减薄第一基板的过程中,研磨、抛光时的高温条件、研磨液、抛光液等的影响导致量子点失效或性能下降,确保量子点的色转换效率。Compared with the prior art, the present invention firstly reduces the thickness of the first substrate with the porous structure to the target thickness, and then performs quantum dot filling and bonding between the first substrate and the second substrate having a plurality of crystal grains. Bonding can avoid the failure or performance degradation of quantum dots caused by the influence of high temperature conditions during grinding and polishing, grinding fluid, polishing fluid, etc. in the process of thinning the first substrate, so as to ensure the color conversion efficiency of quantum dots.
附图说明Description of drawings
图1为本发明一实施例发光芯片制作方法的过程示意图。FIG. 1 is a schematic process diagram of a method for fabricating a light-emitting chip according to an embodiment of the present invention.
图2为本发明另一实施例发光芯片制作方法的过程示意图。FIG. 2 is a schematic process diagram of a method for fabricating a light-emitting chip according to another embodiment of the present invention.
具体实施方式Detailed ways
为详细说明本发明的内容、构造特征、所实现目的及效果,下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。In order to describe the content, structural features, achieved objects and effects of the present invention in detail, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described implementation The examples are only a part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.
以下,结合附图对本发明实施例的技术方案进行详细说明:Hereinafter, the technical solutions of the embodiments of the present invention will be described in detail with reference to the accompanying drawings:
实施例一:Example 1:
请参阅图1,本发明一实施例提供的发光芯片制作方法,包括以下步骤S1-S5。Referring to FIG. 1 , a method for fabricating a light-emitting chip provided by an embodiment of the present invention includes the following steps S1-S5.
S1,提供具有多孔洞结构1的第一基板2,如图1中(a1)所示;并将该具有多孔洞结构1的第一基板2的厚度减薄至目标厚度,减薄至目标厚度后的第一基板2如图1中(a4)所示。S1, providing the first substrate 2 with the porous structure 1, as shown in FIG. 1 (a1); and reducing the thickness of the first substrate 2 with the porous structure 1 to the target thickness, and then to the target thickness The resulting first substrate 2 is shown in FIG. 1( a4 ).
其中,多孔洞结构1的孔洞占整个多孔洞结构1的表面积的比例达到70%以上,孔洞的直径为500nm~1.5um,孔洞的深度为8-10um,光线可以在孔洞中不断反射,可以达到更佳的光色转换效果。Among them, the holes of the porous structure 1 account for more than 70% of the surface area of the entire porous structure 1, the diameter of the holes is 500nm-1.5um, the depth of the holes is 8-10um, and the light can be continuously reflected in the holes, which can reach Better light-color conversion effect.
在一个实施例中,具有多孔洞结构1的第一基板2的翘曲值小于或等于35微米。由于第一基板2的翘曲值较小,在填充量子点7、将第一基板2与具有多个晶粒4的第二基板5键合之前,便将第一基板2的厚度减薄至目标厚度,也不会因为第一基板2的整体厚度小,强度、稳定性较弱而在减薄过程中出现裂片的情况。In one embodiment, the warpage value of the first substrate 2 with the porous structure 1 is less than or equal to 35 microns. Since the warpage value of the first substrate 2 is small, the thickness of the first substrate 2 is reduced to The target thickness will not cause cracks during the thinning process because the overall thickness of the first substrate 2 is small and its strength and stability are weak.
在一个实施例中,首先提供一加厚的生长衬底(如蓝宝石衬底、碳化硅衬底等),加厚的生长衬底的厚度可以例如为800um;然后,通过物理气相沉积(physical vapordeposition,PVD)法在生长衬底上生长出一层加厚的AlN缓冲层,AlN缓冲层的厚度可以例如为200nm;然后,再通过氢化物气相外延(Hydride Vapor Phase Epitaxy,HVPE)法在AlN缓冲层之上生长出N-GaN外延层,N-GaN外延层的厚度可以例如为5um;至此,便制备出了没有设置孔洞的基板,由于AlN缓冲层的厚度较厚,可以降低生长N-GaN外延层时的应力影响,从而可以降低制成的基板的翘曲值;然后,再通过激光蚀刻、电化学蚀刻、光刻等方式在基板的N-GaN外延层形成多个孔洞,获得翘曲值小于或等于35微米的第一基板2。In one embodiment, a thickened growth substrate (such as a sapphire substrate, a silicon carbide substrate, etc.) is first provided, and the thickness of the thickened growth substrate may be, for example, 800 μm; , PVD) method to grow a thickened AlN buffer layer on the growth substrate, the thickness of the AlN buffer layer can be, for example, 200nm; An N-GaN epitaxial layer is grown on top of the layer, and the thickness of the N-GaN epitaxial layer can be, for example, 5um; so far, a substrate without holes is prepared. Due to the thick AlN buffer layer, the growth of N-GaN can be reduced. The stress of the epitaxial layer can reduce the warpage value of the fabricated substrate; then, multiple holes are formed in the N-GaN epitaxial layer of the substrate by laser etching, electrochemical etching, photolithography, etc. to obtain warpage. The value of the first substrate 2 is less than or equal to 35 microns.
第一基板2具有相对的第一面(即是,N-GaN外延层背离生长衬底的一面)和第二面(即是,生长衬底背离N-GaN外延层的一面),多孔洞结构1设置在第一基板2的第一面。在一个实施例中,在减薄第一基板2时,首先,提供一支撑结构,上蜡将第一基板2的第一面(多孔洞结构1)与支撑结构固定,上蜡后的第一基板2如图1中(a2)所示;然后,利用抛光研磨设备研磨、抛光第一基板2的第二面,从而将第一基板2的厚度减薄至目标厚度,减薄后的第一基板2如图1中(a3)所示;然后,去除蜡3,使第一基板2的第一面与支撑结构分离,具体可以通过去蜡溶液清洗蜡,再烘干第一基板2,去除蜡之后的第一基板2如图1中(a4)所示。The first substrate 2 has an opposite first side (that is, the side of the N-GaN epitaxial layer facing away from the growth substrate) and a second side (that is, the side of the growth substrate facing away from the N-GaN epitaxial layer), a porous structure 1 is provided on the first surface of the first substrate 2 . In one embodiment, when the first substrate 2 is thinned, first, a support structure is provided, and the first surface (the porous structure 1 ) of the first substrate 2 is fixed with the support structure by waxing. The substrate 2 is shown in (a2) in FIG. 1 ; then, the second surface of the first substrate 2 is ground and polished by a polishing and grinding device, thereby reducing the thickness of the first substrate 2 to the target thickness, and the thinned first substrate 2 The substrate 2 is shown in (a3) in FIG. 1 ; then, the wax 3 is removed to separate the first surface of the first substrate 2 from the support structure. Specifically, the wax can be cleaned with a wax removal solution, and then the first substrate 2 is dried to remove the The first substrate 2 after waxing is shown in FIG. 1( a4 ).
在一个实施例中,在减薄第一基板2之前,具有多孔洞结构1的第一基板2的总厚度大约为600-800um,在减薄第一基板2之后,具有多孔洞结构1的第一基板2的总厚度为100um以下,即是,目标厚度为100um以下。当然,具体实施中不以第一基板2减薄前后的具体厚度为限制。In one embodiment, before the first substrate 2 is thinned, the total thickness of the first substrate 2 with the porous structure 1 is about 600-800 μm, and after the first substrate 2 is thinned, the first substrate 2 with the porous structure 1 The total thickness of a substrate 2 is less than 100um, that is, the target thickness is less than 100um. Of course, the specific implementation is not limited by the specific thickness of the first substrate 2 before and after the thinning.
S2,将厚度减薄至目标厚度之后的第一基板2与一具有多个晶粒4的第二基板5键合,晶粒4用于发出第一光色,第一基板2与具有多个晶粒4的第二基板5键合获得的结构如图1中(c1)所示。S2, the first substrate 2 after the thickness is reduced to the target thickness is bonded to a
可以是用匀胶机在第一基板2的第二面旋涂一层键合胶6,如3-5um的键合胶,旋涂一层键合胶6后的第一基板2如图1中(a5)所示。旋涂键合胶6时,匀胶机的转速可以例如为3500-4500RPM,旋涂时间可以例如为2分钟,键合胶6可以是热固化胶、UV固化胶等,通过键合胶6将厚度减薄至目标厚度之后的第一基板2与具有多个晶粒4的第二基板5键合。It can be to spin a layer of
当然,也可以是在具有多个晶粒4的第二基板5用于与第一基板2键合的表面旋涂一层键合胶。Of course, a layer of bonding glue may also be spin-coated on the surface of the
在一个实施例中,厚度减薄至目标厚度之后的第一基板2与具有多个晶粒4的第二基板5键合时,所采用键合胶6为热固化胶,键合时温度为80-150℃,由于温度越高所需键合固化时间越短,键合时间为20min以上即可,由于此时还未将量子点7注入孔洞,高温也不会影响到量子点7。在一个实施例中,厚度减薄至目标厚度之后的第一基板2与具有多个晶粒4的第二基板5键合时,所采用键合胶6为UV固化胶,能量大于1000mj,以实现快速键合第一基板2与具有多个晶粒4的第二基板5,同样的,由于还未将量子点7注入孔洞,能量较大也不会影响到量子5。In one embodiment, when the first substrate 2 after the thickness is reduced to the target thickness is bonded to the
在一个实施例中,多个晶粒4粘接在第二基板5上,第二基板5可以是一面设有粘接胶的基板,如一面设有粘接胶的玻璃基板。晶粒4可以是能够发出蓝光的晶粒。In one embodiment, the plurality of die 4 are bonded on the
在一些实施例中,通过以下方式制备具有多个晶粒4的第二基板5:首先,提供一生长衬底8,在生长衬底8,如蓝宝石衬底上制备出多个晶粒4,如图1中(b1)所示;然后,在真空环境下将多个晶粒4背离生长衬底8的一侧与第二基板5粘接固定,如图1中(b2)所示;最后,将生长衬底8剥离,获得具有多个晶粒4的第二基板5,如图1中(b3)所示。In some embodiments, the
S3,往与具有多个晶粒4的第二基板5键合之后的第一基板2的至少部分孔洞中填充量子点7,通过量子点7将晶粒4发出的第一光色转换为目标光色,填充量子点7之后的第一基板2如图1中(c2)所示。S3, filling quantum dots 7 into at least part of the holes of the first substrate 2 after bonding with the
量子点7可以是将晶粒4发出的第一光色转换为红光的量子点,可以是将晶粒4发出的第一光色转换为绿光的量子点等。晶粒4发出的第一光色可以例如为蓝光等。The quantum dots 7 may be quantum dots that convert the first light color emitted by the die 4 into red light, or may be quantum dots that convert the first light color emitted by the die 4 into green light, or the like. The first light color emitted by the die 4 may be, for example, blue light or the like.
可以是在第一基板2的全部孔洞中均填充量子点7,制成的发光芯片所对应的所有晶粒4均可以通过量子点7将其发出的第一光色转换成目标光色;也可以是仅在第一基板2的部分孔洞中均填充量子点7,制成的发光芯片所对应的部分晶粒4可以通过量子点7将其发出的第一光色转换成目标光色,而部分晶粒4因出光侧没有设置量子点7而保持为发出第一光色的原本光色。It can be that all the holes of the first substrate 2 are filled with quantum dots 7, and all the crystal grains 4 corresponding to the produced light-emitting chip can convert the first light color emitted by the quantum dots 7 into the target light color; The quantum dots 7 may be filled only in part of the holes of the first substrate 2, and some of the crystal grains 4 corresponding to the fabricated light-emitting chip can convert the first light color emitted by the quantum dots 7 into the target light color, and Since the quantum dots 7 are not provided on the light-emitting side, some of the die 4 remain in the original light color that emits the first light color.
S4,解除多个晶粒4与第二基板5的连接,获得包含有多个晶粒4和量子点7的发光模块,如图1中(c3)所示。解除多个晶粒4与第二基板5的连接以去除第二基板5,便于后续步骤S5中切割发光模块,与此同时,也使得制成的发光芯片的厚度更薄。当然,在一些实施例中,也可以省略该步骤S4。S4 , releasing the connection of the plurality of die 4 and the
S5,沿晶粒4之间的间隙切割发光模块,获得包含有至少一个晶粒4的发光芯片。S5 , cutting the light-emitting module along the gaps between the die 4 to obtain a light-emitting chip including at least one die 4 .
发光芯片可以仅包括有一个晶粒4,如图1中(c4)所示。发光芯片也可以包括有例如三个晶粒,例如,晶粒发出的第一光色为蓝光,发光芯片中对应其中一晶粒的孔洞中填充红光量子点,对应其中一晶粒的孔洞中填充绿光量子点,对应其中一晶粒的孔洞中未填充量子点,制成的发光芯片可以实现RGB全彩显示。The light-emitting chip may include only one die 4, as shown in (c4) in FIG. 1 . The light-emitting chip may also include, for example, three dies. For example, the first light color emitted by the dies is blue light, and the hole corresponding to one of the die in the light-emitting chip is filled with red light quantum dots, and the hole corresponding to one of the die is filled with red light quantum dots. The green quantum dots, corresponding to one of the crystal grains, are not filled with quantum dots, and the light-emitting chip made can realize RGB full-color display.
在上述实施例中,多孔洞结构1设置于第一基板2的第一面,第二基板5具有相对的第三面和第四面,多个晶粒4设置于第二基板5的第三面,将第一基板2的第二面与第二基板5的第三面键合。第一基板2与具有多个晶粒4的第二基板5键合之后,第一基板2的多孔洞结构1位于远离具有多个晶粒4的第二基板5的一侧,多孔洞结构1是外露的,因此量子点注入孔洞步骤可以在第一基板2与具有多个晶粒4的第二基板5键合之后进行,量子点7不受步骤S1中研磨抛光以减薄第一基板2时的影响,例如研磨液、抛光液的接触腐蚀,研磨抛光产生的热、水的影响,上蜡、去蜡过程中温度的影响,以及步骤S2中将第一基板2与具有多个晶粒4的第二基板5键合时对应的加工条件和键合材料的影响,可以有效确保最终量子点7的性能,进而确保量子点7的色转换效率。In the above embodiment, the porous structure 1 is disposed on the first surface of the first substrate 2 , the
实施例二:Embodiment 2:
请参阅图2,本发明一实施例提供的发光芯片制作方法,包括以下步骤S1-S5。Referring to FIG. 2 , a method for fabricating a light-emitting chip provided by an embodiment of the present invention includes the following steps S1-S5.
S1,提供具有多孔洞结构1的第一基板2,并将该具有多孔洞结构1的第一基板2的厚度减薄至目标厚度,减薄至目标厚度后的第一基板2如图2中(a4)所示。S1, providing the first substrate 2 with the porous structure 1, and reducing the thickness of the first substrate 2 with the porous structure 1 to the target thickness, and the first substrate 2 after thinning to the target thickness is shown in FIG. 2 (a4).
S2,往厚度减薄至目标厚度之后的第一基板2的至少部分孔洞中填充量子点7,填充量子点7之后的第一基板2如图2中(a5)所示。S2 , filling quantum dots 7 into at least part of the holes of the first substrate 2 after the thickness is reduced to the target thickness, and the first substrate 2 after filling the quantum dots 7 is shown in FIG. 2 ( a5 ).
S3,将填充有量子点7的第一基板2与具有多个晶粒4的第二基板5键合,晶粒4用于发出第一光色,通过量子点7将第一光色转换为目标光色,具有多个晶粒4的第二基板5如图2中(b3)所示,第一基板2与具有多个晶粒4的第二基板5键合获得的结构如图2中(c1)所示。S3, bonding the first substrate 2 filled with the quantum dots 7 with the
在图2所示实施例中,第一基板2具有相对的第一面和第二面,多孔洞结构1设置于第一基板2的第一面,第二基板5具有相对的第三面和第四面,多个晶粒4设置于第二基板5的第三面,将填充有量子点7的第一基板2的第一面与第二基板5的第三面键合,如图2中(c1)所示。In the embodiment shown in FIG. 2 , the first substrate 2 has opposite first and second surfaces, the porous structure 1 is disposed on the first surface of the first substrate 2 , and the
将第一基板2的第一面与第二基板5的第三面键合时,可以是先用匀胶机在第一基板2的第一面旋涂一层键合胶6,如图2中(a6)所示,通过键合胶6将第一基板2与第二基板5的第三面键合。也可以是用匀胶机在具有多个晶粒4的第二基板5的第三面旋涂一层键合胶。When bonding the first surface of the first substrate 2 and the third surface of the
S4,解除多个晶粒4与第二基板5的连接,获得包含有多个晶粒4和量子点7的发光模块,如图2中(c2)所示。S4 , releasing the connection of the plurality of die 4 and the
S5,沿晶粒4之间的间隙切割发光模块,获得包含有至少一个晶粒4的发光芯片,如图1中(c3)所示。S5 , cutting the light-emitting module along the gaps between the die 4 to obtain a light-emitting chip including at least one die 4 , as shown in (c3) in FIG. 1 .
与上述实施例一不同的是,在该实施例中,是先往厚度减薄至目标厚度之后的第一基板2的至少部分孔洞中填充量子点7,再将填充有量子点7的第一基板2与具有多个晶粒4的第二基板5键合,由于量子点注入步骤在减薄第一基板2之后、键合第一基板2与具有多个晶粒4的第二基板5之前,不要求将第一基板2的孔洞外露,因此可以使第一基板2的孔洞面(第一面)与具有多个晶粒4的第二基板5键合,键合之后的晶粒4与量子点7之间距离更小(不再间隔着第一基板2没有设置多孔洞结构1的部分,如生长衬底),可以更好地避免漏光,提高色转换的效果,与此同时,第一基板2没有设置多孔洞结构1的部分遮覆在量子点7背离晶粒4的一侧,可以起到保护量子点7的作用。当然,在一些实施例中,第一基板2与具有多个晶粒4的第二基板5键合时也可以仍然是第一基板2的孔洞面处于背离晶粒4的一侧,以进一步减小键合时对应的加工条件和键合材料对量子点7的影响。The difference from the above-mentioned first embodiment is that in this embodiment, the quantum dots 7 are first filled into at least part of the holes of the first substrate 2 after the thickness is reduced to the target thickness, and then the first substrate filled with the quantum dots 7 is filled. The substrate 2 is bonded to the
至于发光芯片更为具体的制作过程,可以参阅上述实施例一中的描述,在此不再赘述。As for the more specific manufacturing process of the light-emitting chip, reference may be made to the description in the above-mentioned first embodiment, which will not be repeated here.
综上,本发明首先将具有多孔洞结构1的第一基板2的厚度减薄至目标厚度,然后,再进行量子点填充和进行第一基板2与具有多个晶粒4的第二基板5的键合,可以避免减薄第一基板2的过程中,研磨、抛光时的高温条件、研磨液、抛光液等的影响导致量子点7失效或性能下降,确保量子点7的色转换效率。To sum up, the present invention firstly reduces the thickness of the first substrate 2 with the porous structure 1 to the target thickness, and then performs quantum dot filling and the first substrate 2 and the
以上所揭露的仅为本发明的较佳实例而已,不能以此来限定本发明之权利范围,因此依本发明权利要求所作的等同变化,均属于本发明所涵盖的范围。The above disclosures are only preferred examples of the present invention, and cannot be used to limit the scope of rights of the present invention. Therefore, the equivalent changes made according to the claims of the present invention all belong to the scope covered by the present invention.
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Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20160081881A (en) * | 2016-06-27 | 2016-07-08 | 서울반도체 주식회사 | Wafer-level light emitting diode package and method of fabricating the same |
KR20160108726A (en) * | 2015-03-05 | 2016-09-20 | 울산과학기술원 | Manufacturing method of flexible color sheet for lighting , flexible color sheet manufacutred thereby and lighting device using flexible color sheet |
WO2017197392A1 (en) * | 2016-05-13 | 2017-11-16 | Osram Sylvania Inc. | Wavelength converters including a porous matrix, lighting devices including the same, and methods of forming the same |
US20180366515A1 (en) * | 2014-12-30 | 2018-12-20 | Aledia | Optoelectronic device with light-emitting diodes |
CN109545910A (en) * | 2018-10-10 | 2019-03-29 | 华中科技大学 | A kind of direct White-light LED chip manufacturing method having high thermal stability |
KR20190141512A (en) * | 2018-06-14 | 2019-12-24 | 주식회사 소프트에피 | Wafer for light emitting device and method of manufacturing a panel with the same |
US20210351239A1 (en) * | 2020-05-11 | 2021-11-11 | Samsung Electronics Co., Ltd. | Electronic device, method for manufacturing same, and display device including the same |
-
2022
- 2022-05-19 CN CN202210546705.8A patent/CN114914347A/en active Pending
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20180366515A1 (en) * | 2014-12-30 | 2018-12-20 | Aledia | Optoelectronic device with light-emitting diodes |
KR20160108726A (en) * | 2015-03-05 | 2016-09-20 | 울산과학기술원 | Manufacturing method of flexible color sheet for lighting , flexible color sheet manufacutred thereby and lighting device using flexible color sheet |
WO2017197392A1 (en) * | 2016-05-13 | 2017-11-16 | Osram Sylvania Inc. | Wavelength converters including a porous matrix, lighting devices including the same, and methods of forming the same |
KR20160081881A (en) * | 2016-06-27 | 2016-07-08 | 서울반도체 주식회사 | Wafer-level light emitting diode package and method of fabricating the same |
KR20190141512A (en) * | 2018-06-14 | 2019-12-24 | 주식회사 소프트에피 | Wafer for light emitting device and method of manufacturing a panel with the same |
CN109545910A (en) * | 2018-10-10 | 2019-03-29 | 华中科技大学 | A kind of direct White-light LED chip manufacturing method having high thermal stability |
US20210351239A1 (en) * | 2020-05-11 | 2021-11-11 | Samsung Electronics Co., Ltd. | Electronic device, method for manufacturing same, and display device including the same |
Non-Patent Citations (1)
Title |
---|
王亚东, 叶志镇, 黄靖云: "硅基量子点器件", 半导体杂志, no. 03, 30 September 2000 (2000-09-30) * |
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