CN114896917A - Circuit topology and parameter representation method based on linear coding - Google Patents
Circuit topology and parameter representation method based on linear coding Download PDFInfo
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Abstract
The invention relates to the technical field of circuit design, and discloses a circuit topology and parameter representation method based on linear coding, which comprises the following steps: s1, component information defining, S2, component adding, S3, component pin connection, S4, unit connection, S5, checking and output circuit, S6, parameter optimization, S7 and topology optimization. The circuit topology and parameter representation method based on linear coding can modify the connection relation and parameter information of elements by representing the connection relation and parameter information of the elements in a circuit, support the storage and reading of the circuit, check the correctness of the connection relation and parameter information of the circuit, convert codes into a circuit netlist to perform circuit simulation by being capable of mutually converted with the circuit netlist, represent a circuit to be optimized and a fixed circuit to enable the codes to adapt to a circuit topology structure optimization algorithm, and has the advantages of strong integration integrity and the like.
Description
Technical Field
The invention relates to the technical field of circuit design, in particular to a circuit topology and parameter representation method based on linear coding.
Background
The integrated circuit is a circuit miniaturization mode, namely, a certain process is adopted, elements such as transistors, resistors, capacitors, inductors and the like required in a circuit and wiring are interconnected together, and are manufactured on a small or a plurality of small semiconductor wafers or medium substrates and then are packaged in a tube shell to form a micro structure with required circuit functions.
In the existing integrated circuit design, the connection relation and parameter information of elements in the circuit are generally displayed not clearly enough, accordingly, the connection relation and parameter information of the elements cannot be modified quickly in the using process, the circuit is not generally supported to be stored and read, and the problem that the completeness of the whole integrated system is not strong is solved.
Disclosure of Invention
Technical problem to be solved
Aiming at the defects of the prior art, the invention provides a circuit topology and parameter representation method based on linear coding, which supports the interconversion with a netlist, the optimization of the parameters of an adaptive circuit, the optimization of the topological structure of the adaptive circuit, has the advantages of strong integration integrity and the like, and solves the problems that in the design of the existing integrated circuit, the connection relation of elements in the circuit and the parameter information are generally displayed not clearly enough, accordingly, the connection relation of the elements and the parameter information cannot be rapidly modified in the using process, the circuit is generally not supported to be stored and read, and the completeness of the whole integrated system is not strong.
(II) technical scheme
In order to realize the purposes of strong integration integrity, support of mutual conversion with a netlist, optimization of parameters of an adaptive circuit and optimization of a topological structure of the adaptive circuit, the invention provides the following technical scheme:
a circuit topology and parameter representation method based on linear coding comprises the following steps:
s1, defining element information
Initializing the component type, defining the number, the number prefix, the name, the pin number and the parameter number of the component, and determining the physical meanings of the pins and the parameters according to the storage sequence of the pins and the parameters.
S2, element addition
According to the element type index acquired when the element type is initialized, a storage space with a corresponding size is opened up in an array of a storage circuit to store information of a corresponding element, the process is seen in detail as the total information length of the element is the element type information length + the element pin number + the element parameter number, the element pin number and the element parameter number which are defined in advance can be inquired and acquired according to the element type index, wherein the element type information length is 1, and therefore the storage space with a specified size can be opened up by acquiring the total information length of the element.
S3, component pin connection
According to the adding sequence of the components, the components are assigned with numbers, and the corresponding component types can be obtained according to the numbers, so that the connection relations of the components are assigned, and are expressed as follows: when adding components, a storage space corresponding to the connection relationship of the components has been applied. We assign a number to the line, the line number is 0 if one end of the line is connected to ground, and the line number starts from 1 if one end of the line is not connected to ground, and the line counter is incremented by one each time a line is added that is not connected to an existing line, thereby assigning the line number to the pin of the corresponding component.
S4, connection of units
After connecting element pins, if the line numbers are to be merged, loading the line numbers to be merged into an array, traversing each element pin in the array of the storage circuit, and if the line numbers are the line numbers in the array, setting the corresponding line numbers as the values of the first elements of the line number array;
after the element is added into the array of the storage circuit, the parameter setting is needed, namely the element type, the number of pins of the corresponding type and the number of the parameters are obtained through the element number, so that the parameter of the element is modified, different element types have parameters with different physical meanings and numbers, and the parameter of each element has a standard unit;
when the circuit is well built and the name of the circuit is determined, the corresponding line can be set as a port, the line number corresponding to the array of the storage circuit can be changed into the name of the port, and after the name of the circuit is determined and the port is set, the array of the storage circuit can be stored as a file of 'name, cir' in a binary format;
after the circuit is saved as a file, when the circuit is read, in order to prevent the line number of the original circuit from colliding with the line number of the read circuit, the following measures are taken: when the circuit is read into the array of the storage circuit, except that the line number 0 corresponding to the ground and the line name set as the port are not changed, the other line numbers are added with the value-1 of the current line counter, namely the line number is equal to the line number plus the value-1 of the line counter, the current maximum line number is obtained, the line counter is set as the maximum line number plus 1, the read circuit array is connected with the array storing the original circuit, after the file of the circuit with the port is read into the array of the storage circuit, the port needs to be connected, and the port can be connected according to the steps.
S5, checking and outputting circuit
When the circuit is checked, traversing an array of a storage circuit to judge whether pins of each element are connected and whether parameters of the elements are meaningful, if the pins of each element are connected and the parameters of the elements are meaningful, the circuit is complete, otherwise, the circuit is incomplete, when the circuit is output, the output circuit has two modes, namely, an output circuit code and an output netlist, wherein the netlist is a necessary file in circuit simulation, when the circuit code is output, the array of the storage circuit is returned, when the netlist is output, the circuit code is processed, and the circuit code is converted into a format of the netlist and output according to the number, the number prefix, the name, the number of the pins, the number of the parameters and the circuit code of the elements.
S6, optimizing parameters
When parameter optimization is performed, the parameters can be divided into an optimizable parameter, a fixed parameter and a variable parameter, the optimizable parameter is an integer or floating point type, the fixed parameter and the variable parameter are string types, that is, 10 and 10.0 are optimizable parameters, and "10", "10.0" are fixed parameters, "a (10)", and "a (10.0)" are variable parameters.
S7 topological structure optimization
When topology optimization is performed, the circuit needs to be divided into a part to be optimized and a fixed part, that is, according to the port number of the circuit to be optimized, the type of a circuit element to be optimized is added into the defined element information, and according to the element adding state and the connection element pins, a plurality of lines are added into the circuit and connected with the current circuit when being connected.
Preferably, in step S1, the number prefix, name, pin number, and parameter number of the correspondingly defined component type are stored in the component information array, and then the number of the component type is automatically allocated according to the sequence of adding the component type and the number of the currently added component type.
Preferably, in step S2, when adding components, the components are stored in the array of the storage circuit according to the adding order, and the pin connection relation and the parameter corresponding to the components are assigned with initial values, that is, the number of pins and the number of parameters corresponding to the previous component type can be obtained through the previous component type, so as to obtain the total information length of the previous component, determine the position of the next component type in the array of the storage circuit, and so on, the whole circuit can be traversed, and the index of each component can be stored in the component index array, so as to directly modify the component information.
Preferably, in the step S3, in the process of connecting the component pins, the circuit needs to be connected by referring to a component pin storage sequence of the specification, the pins corresponding to the components are assigned with line numbers, and if the line numbers are specified, the component pins are connected to the specified lines; if no line number is assigned, the line element pins are automatically assigned a new line number.
Preferably, in step S6, when optimizing the optimizable parameter, the parameters of some circuit elements are optimized, so that i set the values of the parameters by using integer and floating point types, and the values of the parameters change with the output of the optimization algorithm during the optimization process.
Preferably, in step S6, the fixed parameter is in parameter optimization, and the parameter of part of the circuit elements is not desired to be optimized, so that the character type is used by us to set the value of the parameter, and the value of the parameter is not changed in the optimization process.
Preferably, in step S6, the variable parameters have a certain functional relationship between the parameters of the partial circuit elements in the parameter optimization, so that the parameters can be set as variables, for example, if one parameter is "a (10.0)", and the other parameter is "2 a (20.0)", it indicates that the two parameters have a 1:2 relationship, where 10.0 and 20.0 in parentheses are parameter values; a is a variable name which can be modified into different names; "a (10.0)" and "2 a (20.0)" represent functional relationships between two parameters, supporting mathematical elementary operations, and the value of a variable changes, and the variable value with the same name as the variable changes.
Preferably, in step S7, the connection relationship, the number of components, and the type of components in the portion to be optimized are changed by a topology optimization algorithm, so as to obtain a circuit structure meeting the requirement.
(III) advantageous effects
Compared with the prior art, the circuit topology and parameter representation method based on linear coding provided by the invention has the following beneficial effects:
1. according to the circuit topology and parameter representation method based on linear coding, the connection relation and parameter information of elements in a circuit can be modified by representing the connection relation and parameter information of the elements, the storage and reading of the circuit are supported, the connection relation and parameter information correctness of the circuit can be checked, the connection relation and parameter information can be mutually converted with a circuit netlist, so that coding can be converted into the circuit netlist to perform circuit simulation, and the circuit to be optimized and a fixed circuit can be represented to enable the coding to adapt to a circuit topology structure optimization algorithm.
2. According to the circuit topology and parameter representation method based on linear coding, the functions of saving and reading the circuit are supported by modifying the connection relation and parameter information of elements, so that the method has the advantages of strong integration integrity, support of mutual conversion between a netlist and a netlist, optimization of adaptive circuit parameters and optimization of an adaptive circuit topology structure.
Drawings
FIG. 1 is a schematic diagram illustrating the physical significance of pins and parameters of a current source according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of an array structure of a memory circuit according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a connection relationship according to an embodiment of the present invention;
FIG. 4 is a diagram illustrating an embodiment of an optimized parameter, a fixed parameter, and a variable parameter;
FIG. 5 is a schematic diagram of a circuit to be optimized according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1-5, the circuit topology and parameter representation method based on linear coding according to the present invention includes the following steps:
s1, defining element information
Initializing the component type, defining the number, the number prefix, the name, the pin number and the parameter number of the component, determining the physical significance of the pin and the parameter according to the storage sequence of the pin and the parameter, storing the number prefix, the name, the pin number and the parameter number of the correspondingly defined component type into a component information array, and then automatically distributing the number of the component type according to the sequence of adding the component type and the number of the currently added component type.
S2, adding elements
According to the element type index obtained when initializing the element type, opening up a storage space with a corresponding size in an array of a storage circuit to store information of a corresponding element, wherein the process is characterized in that the total information length of the element is the length of the element type information + the number of element pins + the number of element parameters, according to the element type index, the number of the element pins and the number of the element parameters which are defined in advance can be inquired and obtained, wherein the length of the element type information is 1, so that the total information length of the element can be obtained to open up the storage space with a specified size, when adding the element, the element can be stored in the array of the storage circuit according to the adding sequence, and the pin connection relation and the parameter corresponding to the element can be initialized, namely, the number of the pins and the number of the parameters corresponding to the previous element type can be obtained through the previous element type, so as to obtain the total information length of the previous element, the location of the next element type in the array of the memory circuit is determined and so on the circuit can be traversed and the index of each element is stored in the array of element indices to directly modify the element information.
S3, component pin connection
According to the adding sequence of the components, the components are assigned with numbers, and the corresponding component types can be obtained according to the numbers, so that the connection relations of the components are assigned, and are expressed as follows: when adding components, a storage space corresponding to the connection relationship of the components has been applied. Assigning a line number to a line, wherein the line number is 0 if one end of the line is connected with the ground, the line number is from 1 if the one end of the line is not connected with the ground, a line counter is increased by one every time a line which is not connected with the existing line is added, so that the line number of a corresponding element pin is assigned, in the process of connecting the element pins, the circuit is connected by referring to the storage sequence of the element pin storage of a standard, the pin corresponding to the element is assigned with the line number, and if the line number is specified, the element pin is connected to the specified line; if no line number is specified, the line element pins are automatically assigned a new line number.
S4, connection of units
After connecting element pins, if the line numbers are to be merged, loading the line numbers to be merged into an array, traversing each element pin in the array of the storage circuit, and if the line numbers are the line numbers in the array, setting the corresponding line numbers as the values of the first elements of the line number array;
after the element is added into the array of the storage circuit, the parameter setting is needed, namely the element type, the number of pins of the corresponding type and the number of the parameters are obtained through the element number, so that the parameter of the element is modified, different element types have parameters with different physical meanings and numbers, and the parameter of each element has a standard unit;
when the circuit is well built and the name of the circuit is determined, the corresponding line can be set as a port, the line number corresponding to the array of the storage circuit can be changed into the name of the port, and after the name of the circuit is determined and the port is set, the array of the storage circuit can be stored as a file of 'name, cir' in a binary format;
after the circuit is saved as a file, when the circuit is read, in order to prevent the line number of the original circuit from colliding with the line number of the read circuit, the following measures are taken: when the circuit is read into the array of the storage circuit, except that the line number 0 corresponding to the ground and the line name set as the port are not changed, the other line numbers are added with the value-1 of the current line counter, namely the line number is equal to the line number plus the value-1 of the line counter, the current maximum line number is obtained, the line counter is set as the maximum line number plus 1, the read circuit array is connected with the array storing the original circuit, after the file of the circuit with the port is read into the array of the storage circuit, the port needs to be connected, and the port can be connected according to the steps.
S5, checking and outputting circuit
When the circuit is checked, traversing an array of a storage circuit to judge whether pins of each element are connected and whether parameters of the elements are meaningful, if the pins of each element are connected and the parameters of the elements are meaningful, the circuit is complete, otherwise, the circuit is incomplete, when the circuit is output, the output circuit has two modes, namely, an output circuit code and an output netlist, wherein the netlist is a necessary file in circuit simulation, when the circuit code is output, the array of the storage circuit is returned, when the netlist is output, the circuit code is processed, and the circuit code is converted into a format of the netlist and output according to the number, the number prefix, the name, the number of the pins, the number of the parameters and the circuit code of the elements.
S6, parameter optimization
When optimizing parameters, the parameters can be divided into an optimized parameter, a fixed parameter and a variable parameter, the optimized parameter is an integer or a floating point type, the fixed parameter and the variable parameter are of a character string type, namely 10 and 10.0 are optimized parameters, the '10' and '10.0' are fixed parameters, the 'a (10)' and 'a (10.0)' are variable parameters, when optimizing the optimized parameters, the parameters of part of circuit elements are required to be optimized, so that the parameters are set by the integer and the floating point type, and the values of the parameters are changed along with the output of an optimization algorithm in the optimization process; fixed parameter in the parameter optimization, the parameters of part of circuit elements do not need to be optimized, so that the values of the parameters are set by using character types, and the values of the parameters cannot be changed in the optimization process; variable parameters in the parameter optimization, parameters of partial circuit elements have a certain functional relationship, so that the parameters can be set as variables, for example, if one parameter is "a (10.0)", and the other parameter is "2 a (20.0)", then the two parameters are in a 1:2 relationship, wherein 10.0 and 20.0 in parentheses are parameter values; a is a variable name which can be modified into different names; "a (10.0)" and "2 a (20.0)" represent functional relationships between two parameters, supporting mathematical elementary operations, and the value of a variable changes, and the variable value with the same name as the variable changes.
S7 topological structure optimization
When the topological structure is optimized, the circuit needs to be divided into a part to be optimized and a fixed part, namely, the element type of the circuit to be optimized is added into the defined element information according to the port number of the circuit to be optimized, the element type is added into the circuit and is connected with the current circuit when a plurality of lines are connected after the element adding state and the connecting element pins are added, and the connection relation, the element number and the element type of the elements in the part to be optimized are changed through a topological structure optimization algorithm, so that the circuit structure meeting the requirements is obtained.
The circuit topology and parameter representation method based on linear coding provided by the invention can modify the connection relation and parameter information of elements by representing the connection relation and parameter information of the elements in the circuit, support the storage and reading of the circuit, check the correctness of the connection relation and parameter information of the circuit, convert codes into a circuit netlist to perform circuit simulation by being capable of being converted into the circuit netlist by being converted into the circuit netlist, represent the circuit to be optimized and fix the circuit to enable the codes to adapt to a circuit topology structure optimization algorithm, and has the advantages of strong integration integrity and the like.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (8)
1. A circuit topology and parameter representation method based on linear coding is characterized by comprising the following steps:
s1, defining element information
Initializing component types, defining the serial numbers, serial number prefixes, names, pin numbers and parameter numbers of the components, and determining the physical meanings of the pins and the parameters according to the storage sequence of the pins and the parameters;
s2, adding elements
According to the element type index acquired when the element type is initialized, a storage space with a corresponding size is opened up in an array of a storage circuit to store information of a corresponding element, the process is seen in detail as the total information length of the element is the element type information length + the element pin number + the element parameter number, the element pin number and the element parameter number which are defined in advance can be inquired and acquired according to the element type index, wherein the element type information length is 1, and therefore the storage space with a specified size can be opened up by acquiring the total information length of the element;
s3, component pin connection
According to the adding sequence of the components, the components are assigned with numbers, and the corresponding component types can be obtained according to the numbers, so that the connection relations of the components are assigned, and are expressed as follows: when adding components, a storage space corresponding to the connection relationship of the components has been applied. Assigning a line number to a line, wherein if one end of the line is connected with the ground, the line number is 0, if one end of the line is not connected with the ground, the line number starts from 1, and each time a line which is not connected with the existing line is added, a line counter is increased by one, so that the line number of a corresponding element pin is assigned;
s4, connection of units
After connecting element pins, if the line numbers are to be merged, loading the line numbers to be merged into an array, traversing each element pin in the array of the storage circuit, and if the line numbers are the line numbers in the array, setting the corresponding line numbers as the values of the first elements of the line number array;
after the element is added into the array of the storage circuit, the parameter setting is needed, namely the element type, the number of pins of the corresponding type and the number of the parameters are obtained through the element number, so that the parameter of the element is modified, different element types have parameters with different physical meanings and numbers, and the parameter of each element has a standard unit;
when the circuit is well built and the name of the circuit is determined, the corresponding line can be set as a port, the line number corresponding to the array of the storage circuit can be changed into the name of the port, and after the name of the circuit is determined and the port is set, the array of the storage circuit can be stored as a file of 'name, cir' in a binary format;
after the circuit is saved as a file, when the circuit is read, in order to prevent the line number of the original circuit from colliding with the line number of the read circuit, the following measures are taken: when the circuit is read into the array of the memory circuit, except that the line number 0 corresponding to the ground and the line name set as the port are not changed, other line numbers are added with the value-1 of the current line counter, namely the line number is the line number plus the value-1 of the line counter, the current maximum line number is obtained, the line counter is set as the maximum line number plus 1, the read circuit array is connected with the array storing the original circuit, after the file of the circuit with the port is read into the array of the memory circuit, the port needs to be connected, and the port can be connected according to the steps;
s5, checking and outputting circuit
When the circuit is checked, traversing an array of a storage circuit to judge whether pins of each element are connected and whether parameters of the elements are meaningful, if the pins of each element are connected and the parameters of the elements are meaningful, the circuit is complete, otherwise, the circuit is incomplete, when the circuit is output, the output circuit has two modes, namely, an output circuit code and an output netlist, wherein the netlist is a necessary file in circuit simulation, when the circuit code is output, the array of the storage circuit is returned, when the netlist is output, the circuit code is processed, and the circuit code is converted into a format of the netlist and output according to the number, the number prefix, the name, the number of the pins, the number of the parameters and the circuit code of the elements;
s6, optimizing parameters
When parameter optimization is performed, the parameters can be divided into an optimizable parameter, a fixed parameter and a variable parameter, the optimizable parameter is an integer or floating point type, the fixed parameter and the variable parameter are character string types, namely 10 and 10.0 are optimizable parameters, and "10", "10.0" are fixed parameters, "a (10)", and "a (10.0)" are variable parameters;
s7 topological structure optimization
When topology optimization is carried out, the circuit needs to be divided into a part to be optimized and a fixed part, namely, according to the port number of the circuit to be optimized, the type of a circuit element to be optimized is added into the defined element information, and according to the adding state of the element and the pins of the connected element, a plurality of lines are added into the circuit and are connected with the current circuit when being connected.
2. The method as claimed in claim 1, wherein in step S1, the number prefix, name, pin number and parameter number of the corresponding component type are stored in the component information array, and then the component type number is automatically assigned according to the sequence of adding component types and the number of the currently added component types.
3. The method of claim 1, wherein in step S2, when adding elements, the elements are stored in the array of the storage circuit according to the adding order, and the pin connection relationship and parameters corresponding to the elements are initialized, that is, the number of pins and parameters corresponding to a previous element type can be obtained by the previous element type, so as to obtain the total information length of the previous element, determine the position of a next element type in the array of the storage circuit, and so on, the whole circuit can be traversed, and the index of each element is stored in the element index array, so as to directly modify the element information.
4. The circuit topology and parameter representation method based on linear coding of claim 1, wherein in the step S3, during the connection of component pins, the circuit is connected with reference to a component pin storage sequence of specification, the pins corresponding to the components are assigned with line numbers, and if the line numbers are specified, the component pins are connected to the specified lines; if no line number is specified, the line element pins are automatically assigned a new line number.
5. The method of claim 1, wherein in step S6, when optimizing the optimizable parameter, the parameters of some circuit elements are optimized, so that the parameters are set by integer and floating point types, and the values of the parameters change with the output of the optimization algorithm during the optimization process.
6. The circuit topology and parameter representation method based on linear coding of claim 1, wherein in step S6, the fixed parameter is a parameter optimized parameter, and the parameters of some circuit elements do not want to be optimized, so that the character type is used to set the value of the parameter, and the value of the parameter is not changed during the optimization process.
7. The circuit topology and parameter representation method based on linear coding according to claim 1, wherein in the step S6, the variable parameters have a certain functional relationship between the parameters of the partial circuit elements in the parameter optimization, so that the parameters can be set as variables, such as "a (10.0)" for one parameter and "2 a (20.0)" for another parameter, which indicates that the two parameters have a 1:2 relationship, where 10.0 and 20.0 in parentheses are parameter values; a is a variable name which can be modified into different names; "a (10.0)" and "2 a (20.0)" represent functional relationships between two parameters, supporting mathematical elementary operations, and the value of a variable changes, and the variable value with the same name as the variable changes.
8. The circuit topology and parameter representation method based on linear coding of claim 1, wherein in step S7, the connection relationship, the number of components, and the types of components in the part to be optimized are changed by a topology optimization algorithm, so as to obtain a circuit structure meeting the requirement.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116629199A (en) * | 2023-06-13 | 2023-08-22 | 合芯科技有限公司 | Automatic modification method, device, equipment and storage medium of circuit schematic diagram |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN116629199A (en) * | 2023-06-13 | 2023-08-22 | 合芯科技有限公司 | Automatic modification method, device, equipment and storage medium of circuit schematic diagram |
| CN116629199B (en) * | 2023-06-13 | 2023-11-24 | 合芯科技有限公司 | Automatic modification method, device, equipment and storage medium of circuit schematic diagram |
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