CN114890375A - CMOS-MEMS integrated acoustic transducer and preparation method thereof - Google Patents

Abstract

The invention provides a CMOS-MEMS integrated acoustic transducer and a preparation method thereof. The sensor can be used as a microphone sensor and an ultrasonic transducer, and sequentially comprises a substrate layer, alternately arranged dielectric layers, metal layers and passivation layers from bottom to top, wherein a cavity is etched on the nth dielectric layer, a vibrating diaphragm and an upper electrode are formed at the top of the cavity, and a lower electrode is formed at the bottom of the cavity. During preparation, a back end of the COMS (back end of line) layer is used as a structural layer of the MEMS device, a COMS electronic layer is integrated below the MEMS device layer, all metal layers are interconnected through tungsten plugs, and finally, a cavity is formed on a dielectric layer through dry etching. The sensor has the characteristics of good reliability, small volume, wide frequency band, high sensitivity, easiness in batch production and the like, and can be applied to various fields of medicine, military, industry, agriculture and the like.

Description

CMOS-MEMS integrated acoustic transducer and preparation method thereof

Technical Field

The invention relates to the technical field of CMOS-MEMS integrated sensor manufacturing, in particular to a CMOS-MEMS integrated acoustic transducer and a preparation method thereof.

Background

Both the capacitive microphone sensor and the capacitive ultrasonic transducer are common sensor devices at present, and the applications in real life are more and more extensive.

The capacitance microphone sensor comprises two corresponding (upper and lower) electrodes and a diaphragm, when sound waves act on the diaphragm from the outside, the diaphragm deforms, and the distance between the (upper) electrode attached to the diaphragm and the fixed (lower) electrode changes, so that the capacitance value is changed. The condenser microphone sensor measures sound pressure based on an electric signal generated in the above process.

Capacitive ultrasonic transducers (CMUTs) were generated in the 90's of the 20 th century, and their principle is that they are applied to the fields of medical imaging, nondestructive testing, distance measurement, flow measurement, etc. by using ultrasonic waves as carriers for information transfer, and the integration of capacitive ultrasonic transducers (CMUTs) on a single chip has attracted much attention.

In recent years, rapid advances in Complementary Metal Oxide Semiconductor (CMOS) and microelectromechanical systems (MEMS) technologies have led to rapid advances in monolithic integration of sensors. The sensor manufactured by the integrated CMOS-MEMS technology has the characteristics of good reliability, small volume, high-density array element integration, wide frequency band, high sensitivity, low manufacturing cost, easiness in batch production and the like, has advantages in the aspect of preparing small-size, large-scale arrays and low-parasitic-effect ultrasonic probes, and is a sensor with wide application prospect.

Disclosure of Invention

It is an object of the present invention to provide a CMOS-MEMS integrated acoustic transducer that can be used as a microphone sensor as well as an ultrasonic transducer based on the above-mentioned background art.

The invention is realized by the following technical scheme:

a CMOS-MEMS integrated acoustic transducer, namely: a CMOS-MEMS integration-based microphone sensor comprises a substrate layer, wherein a first dielectric layer, a first metal layer, a second dielectric layer, a second metal layer, an n-1 dielectric layer, an n-1 metal layer, an n-1 dielectric layer and an n-metal layer are sequentially arranged on the substrate layer from bottom to top, and n is more than or equal to 3; the adjacent metal layers are interconnected through tungsten plugs, a passivation layer is arranged on the nth metal layer, and an upper electrode welding spot and a lower electrode welding spot are arranged on the passivation layer; a cavity is etched on the nth dielectric layer; the passivation layer and the nth metal layer at the top of the cavity form a vibrating diaphragm, the nth metal layer in the vibrating diaphragm is used as an upper electrode, the (n-1) th metal layer at the bottom of the cavity is used as a lower electrode, and the upper electrode at the top of the cavity and the lower electrode at the bottom of the cavity are interconnected through a tungsten plug; the first to (n-2) th metal layers serve as electron shells.

As a preferred technical scheme, in the microphone sensor, the cavity is a cylindrical cavity, and the cavity is internally vacuum; the vibrating diaphragm at the top of the cavity is also a circular vibrating diaphragm, a plurality of circular through holes which are arranged in an array mode are uniformly distributed on the vibrating diaphragm, and the circular through holes are internally vacuumized; the lower electrode at the bottom of the cavity is a circular electrode, and the radius of the circular electrode is half of that of the cylindrical cavity.

A CMOS-MEMS integrated acoustic transducer, namely: an ultrasonic transducer based on CMOS-MEMS integration comprises a substrate layer, wherein a first dielectric layer, a first metal layer, a second dielectric layer, a second metal layer, an n-1 dielectric layer, an n-1 metal layer, an n-dielectric layer and an n-metal layer are sequentially arranged on the substrate layer from bottom to top, and n is more than or equal to 3; the adjacent metal layers are interconnected through tungsten plugs, a passivation layer is arranged on the nth metal layer, and an upper electrode welding spot and a lower electrode welding spot are arranged on the passivation layer; a plurality of cavities which are arranged in an array are etched on the nth dielectric layer, the passivation layer at the top of each cavity and the nth metal layer partially form respective corresponding diaphragms, the nth metal layer in the diaphragm at the top of each cavity is used as an upper electrode, the (n-1) th metal layer at the bottom of each cavity is used as a lower electrode, and the upper electrode at the top of each cavity and the lower electrode at the bottom of each cavity are interconnected through a tungsten plug; the first to (n-2) th metal layers serve as electron shells.

As a preferred technical scheme, in the ultrasonic transducer, each cavity is a cylindrical cavity, and a vacuum is formed in each cavity; the vibrating diaphragm at the top of each cavity is also a circular vibrating diaphragm, a plurality of circular through holes which are arranged in an array mode are uniformly distributed on each vibrating diaphragm, and the circular through holes are internally vacuumized; the lower electrode at the bottom of each cavity is a circular electrode with a radius of half the radius of the cylindrical cavity, and the lower electrodes at the bottom of all the cavities are interconnected together.

In a preferred embodiment, in the microphone sensor and the ultrasonic transducer, the substrate layer is a silicon wafer, the silicon wafer is a lightly doped P-type (100) silicon wafer, and the typical doping concentration N is _A ≈10 ¹⁵ cm ^-3 (ii) a The dielectric layer is made of silicon oxide, the metal layer is made of aluminum, and the passivation layer is made of silicon nitride.

As a preferred technical solution, in the microphone sensor and the ultrasonic transducer, the electronic layer includes a CMOS signal processing circuit.

Further, another object of the present invention is to provide a method for manufacturing the above microphone sensor and ultrasonic transducer.

The invention is realized by the following technical scheme:

the preparation method of the microphone sensor based on the CMOS-MEMS integration comprises the following steps:

1) selecting a silicon wafer as an initial substrate layer, and completing the manufacture of a CMOS active region, an n-layer dielectric layer, an n-layer metal layer and a passivation layer on the substrate layer by utilizing a CMOS process, wherein the metal layers are interconnected through a tungsten (W) plug; the diaphragm structure comprises a diaphragm structure body, a passivation layer, a metal layer, a dielectric layer and a plurality of circular through holes, wherein the nth metal layer is used as an upper electrode layer, the (n-1) th metal layer is used as a lower electrode layer, the nth dielectric layer is used as an etching cavity sacrificial layer, the passivation layer and the nth metal layer are used as diaphragm structure bodies, the passivation layer and the nth metal layer are provided with the circular through holes which are arranged in an array manner, the circular through holes are uniformly distributed in the range of the circular boundary of a cavity, and the bottom ends of the circular through holes extend to the nth dielectric layer;

2) etching the nth dielectric layer to form a cavity through the circular through hole by using dry etching;

3) and carrying out vacuum packaging on the whole structure, wherein a cavity on the structure forms a vacuum closed cavity.

The preparation method of the ultrasonic transducer based on the CMOS-MEMS integration comprises the following steps:

1) the method comprises the following steps of selecting a silicon wafer as an initial substrate layer, and completing the manufacture of a CMOS active region, an n-layer dielectric layer, an n-layer metal layer and a passivation layer on the substrate layer by utilizing a CMOS process, wherein the metal layers are interconnected through a tungsten (W) plug; the diaphragm structure comprises a diaphragm structure body, a passivation layer, a n-1 th metal layer, a dielectric layer, a plurality of groups of through holes, a plurality of circular through holes, a plurality of metal layers and a plurality of metal layers, wherein the n-th metal layer is used as an upper electrode layer, the n-1 th metal layer is used as a lower electrode layer, the n-th dielectric layer is used as an etching cavity sacrificial layer, the passivation layer and the n-th metal layer are used as diaphragm structure bodies, the passivation layer and the n-th metal layer are provided with the through hole groups which are arranged in an array manner, each group of through hole group consists of a plurality of circular through holes, the circular through holes are uniformly distributed in the circular boundary range of a cavity, and the bottom ends of the circular through holes extend to the n-th dielectric layer;

2) etching the nth layer of dielectric layer to form a cavity through the circular through holes of each group of through holes by using dry etching; etching the lower part of the group of through holes to form a cavity, and finally forming a plurality of cavities which are arranged in an array on the nth dielectric layer;

3) and carrying out vacuum packaging on the whole structure, wherein a cavity on the structure forms a vacuum closed cavity.

As a preferred technical scheme, in the above-mentioned preparation method of the microphone sensor and the ultrasonic transducer, dry etching is performed by using hydrofluoric acid gas, and vacuum packaging is performed by depositing parylene to form a vacuum sealed cavity.

The invention has the following beneficial effects:

1) the microphone sensor and the ultrasonic transducer have the characteristics of high stability, wide working frequency band, high sensitivity, low working voltage, low packaging difficulty, suitability for complex working environment, easiness in batch production and the like;

2) the radius of the lower electrode of the microphone sensor and the ultrasonic transducer is half of the radius of the cavity, so that the parasitic capacitance is reduced, and the sensitivity of the microphone sensor and the ultrasonic transducer is improved;

3) in the ultrasonic transducer, each cavity, the vibrating diaphragm, the upper electrode and the lower electrode form a single micro element, and the plurality of single micro elements form an array structure, so that structures with different array sizes can be designed according to actual use requirements, and the ultrasonic transducer has high ductility and applicability.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and it will be apparent to those skilled in the art that other relevant drawings can be obtained from the drawings without inventive effort.

Fig. 1 is a schematic top view (not packaged) of a microphone sensor in example 1.

Fig. 2 is a schematic cross-sectional view (not packaged) of the microphone sensor in embodiment 1.

Fig. 3 is a schematic top view (not packaged) of the ultrasound transducer in example 2.

Fig. 4 is a schematic top view (not packaged) of a single micro element in the ultrasonic transducer in embodiment 2.

Fig. 5 is a schematic cross-sectional structure diagram (not packaged) of a single micro element in the ultrasonic transducer in embodiment 2.

In the figure: 1-a substrate layer, 2-a tungsten plug, 3-a passivation layer, 4-an upper electrode welding spot, 5-a lower electrode welding spot, 6-a cavity, 7-a circular through hole and 8-a single infinitesimal element;

l1-first dielectric layer, L (n-1) -n-1 th dielectric layer, Ln-nth dielectric layer, M1-first metal layer, M (n-1) -n-1 th metal layer and Mn-nth metal layer.

Detailed Description

The technical solutions in the embodiments of the present invention are clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present invention without making any creative effort, shall fall within the protection scope of the present invention.

In the description of the present invention, it is to be understood that the terms "central," "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like are used in the orientation or positional relationship illustrated in the integrated drawings for convenience in describing the present invention and for simplicity in description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed in a particular orientation, and be operated in a particular manner, and are not to be considered limiting. Furthermore, the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or quantity or location.

In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.

Example 1

As shown in fig. 1 and fig. 2, a CMOS-MEMS integrated acoustic transducer, i.e. a microphone sensor based on CMOS-MEMS integration, includes a substrate layer 1, where the substrate layer 1 is a silicon wafer, and the silicon wafer is a lightly doped P-type (100) silicon wafer, typically with a doping concentration N _A ≈10 ¹⁵ cm ^-3 (ii) a A first dielectric layer L1, a first metal layer M1, a second dielectric layer, a second metal layer, an (n-1) th dielectric layer L (n-1), an (n-1) The metal layer M (n-1), the dielectric layer Ln and the metal layer Mn are arranged, wherein n is more than or equal to 3, the dielectric layer is made of silicon oxide, and the metal layer is made of aluminum; adjacent metal layers are interconnected through a tungsten plug 2, a passivation layer 3 is arranged on the nth metal layer Mn, the passivation layer 3 is made of silicon nitride, and an upper electrode welding spot 4 and a lower electrode welding spot 5 are arranged on the passivation layer 3; a cavity 6 is etched on the nth dielectric layer Ln, the cavity 6 is a cylindrical cavity 6, and the cavity 6 is vacuum; the passivation layer 3 and the nth metal layer Mn on the top of the cavity 6 form a vibrating diaphragm, the nth metal layer Mn in the vibrating diaphragm is used as an upper electrode, the vibrating diaphragm is a circular vibrating diaphragm, a plurality of circular through holes 7 which are distributed in an array mode and communicated with the cavity 6 are uniformly distributed on the vibrating diaphragm, and the circular through holes 7 are vacuum; the (n-1) th metal layer M (n-1) at the bottom of the cavity 6 is used as a lower electrode, the lower electrode is a circular electrode, and the radius of the lower electrode is half of that of the cylindrical cavity 6; the upper electrode at the top of the cavity 6 is interconnected with the lower electrode at the bottom of the cavity through a tungsten plug 2, and the edge of the cavity 6 is supported by metal tungsten and silicon oxide; the first-layer metal layer M1 to the (n-2) th-layer metal layer M (n-2) are used as electron shells, and a CMOS signal processing circuit is included on the electron shells.

The preparation method of the microphone sensor based on CMOS-MEMS integration uses a back end of the CMOS (complementary metal oxide semiconductor) -MEMS technology (BEOL) layer as a structural layer of an MEMS device, a COMS electronic layer is integrated below the MEMS device layer, and all metal layers are interconnected through a tungsten plug 2, and the preparation method specifically comprises the following steps:

1) selecting a silicon wafer as an initial substrate layer 1, and completing the manufacture of a CMOS active region, an n-layer dielectric layer, an n-layer metal layer and a passivation layer 3 on the substrate layer 1 by utilizing a CMOS process, wherein the metal layers are interconnected through a tungsten plug 2; the n-th metal layer Mn is used as an upper electrode layer, the n-1-th metal layer M (n-1) is used as a lower electrode layer, the n-th dielectric layer Ln is used as a sacrificial layer of an etching cavity 6, the passivation layer 3 and the n-th metal layer Mn are used as a vibrating diaphragm structure main body, a plurality of circular through holes 7 which are arranged in an array mode are formed in the passivation layer 3 and the n-th metal layer Mn, the circular through holes 7 are uniformly distributed in the circular boundary range of the cavity, and the bottom ends of the circular through holes 7 extend to the n-th dielectric layer Ln;

in this step, the substrate layer 1 is applied to almost any surfaceFlat substrates, such as silicon wafers, glass wafers, etc., for example, silicon wafers are selected as the substrate layer 1 in order to adapt the CMOS process, which silicon wafers are lightly doped P-type (100) silicon wafers, typically with a doping concentration N _A ≈10 ¹⁵ cm ^-3 ；

The CMOS process includes a 0.18um process and an advanced process with smaller feature line widths, utilizing four basic microfabrication techniques of the CMOS process: the deposition, the photoetching, the doping and the etching are combined to finish the manufacture of the CMOS active region, the n dielectric layers, the n metal layers and the passivation layer 3 layer by layer; when the dielectric layer is deposited, silicon oxide can be deposited by using Plasma Enhanced Chemical Vapor Deposition (PECVD); forming a metal layer on each dielectric layer by sputtering metal aluminum, spin coating a layer of photoresist on the metal layer, transferring a mask pattern onto the photoresist by utilizing a photoetching technology, defining each metal layer pattern by taking the photoresist pattern as a mask and then using a wet etching process to realize the functions of different metal layers; the metal layer is usually used for electrical interconnection, electrode material, resistance, etc., and in the present invention, the metal layer is used for upper and lower electrodes and an electron layer.

2) Etching the nth dielectric layer Ln through the circular through hole 7 by using a dry etching method to form a cavity 6; the dry etching adopts hydrofluoric acid gas for etching, silicon oxide in the sacrificial layer is etched through the circular through hole 7 in an isotropic dry way by using the hydrofluoric acid gas, the metal layer is selected by the hydrofluoric acid gas in a high ratio, and the metal layer is not corroded in the dry etching process.

3) Carrying out vacuum packaging on the whole structure, wherein a cavity 6 on the structure forms a vacuum closed cavity 6; wherein, the vacuum packaging forms a vacuum closed cavity 6 by depositing parylene; in order to ensure the tightness of the working environment of the device, the device needs to be subjected to vacuum sealing packaging, the circular through hole 7 can be sealed by Chemical Vapor Deposition (CVD) oxide or nitride, and particularly the device can be subjected to sealing treatment in a parylene plating manner.

Example 2

As shown in fig. 3 to 5, a CMOS-MEMS integrated acoustic transducer, that is, an ultrasonic transducer based on CMOS-MEMS integration, includes a substrate layer 1, and the substrate layer 1 is a silicon wafer, a silicon waferRound lightly doped P-type (100) silicon wafer, typical doping concentration N _A ≈10 ¹⁵ cm ^-3 (ii) a A first dielectric layer L1, a first metal layer M1, a second dielectric layer, a second metal layer, an (n-1) th dielectric layer L (n-1), an (n-1) th metal layer M (n-1), an nth dielectric layer Ln and an nth metal layer Mn are sequentially arranged on the substrate layer 1 from bottom to top, wherein n is more than or equal to 3, the dielectric layer is made of silicon oxide, and the metal layer is made of aluminum; adjacent metal layers are interconnected through a tungsten plug 2, a passivation layer 3 is arranged on the nth metal layer Mn, the passivation layer 3 is made of silicon nitride, and an upper electrode welding spot 4 and a lower electrode welding spot 5 are arranged on the passivation layer 3; a plurality of cavities 6 which are arrayed are etched on the nth dielectric layer Ln, the cavities 6 are cylindrical cavities 6, and the cavities 6 are vacuum; the passivation layer 3 and the nth metal layer Mn at the top of each cavity 6 form respective corresponding vibrating diaphragms, the nth metal layer Mn in the vibrating diaphragm at the top of each cavity 6 is used as an upper electrode, the vibrating diaphragm is a circular vibrating diaphragm, six circular through holes 7 communicated with the cavity 6 are uniformly distributed on the vibrating diaphragm, and the circular through holes 7 are internally vacuumized; the (n-1) th metal layer M (n-1) at the bottom of each cavity 6 is used as a lower electrode, the lower electrode is a circular electrode, the radius of the circular electrode is half of the radius of the cylindrical cavity 6, and the lower electrodes at the bottoms of all the cavities 6 are interconnected together; the upper electrode at the top of each cavity 6 is interconnected with the lower electrode at the bottom through a tungsten plug 2, and the edge of each cavity 6 is supported by metal tungsten and silicon oxide; each cavity 6, the vibrating diaphragm on the top of the cavity, the upper electrode on the top of the cavity and the lower electrode on the bottom of the cavity form a single infinitesimal 8, a plurality of single infinitesimals 8 are arranged in an array structure, and the structure of each single infinitesimal 8 is shown in fig. 2 and 3; the first-layer metal layer M1 to the (n-2) th-layer metal layer M (n-2) are used as electron shells, and CMOS signal processing circuits are included on the electron shells.

The preparation method of the CMUT device based on CMOS-MEMS integration uses a back end of the CMOS process (BEOL) layer as a structural layer of the MEMS device, a COMS electronic layer is integrated below the MEMS device layer, and all metal layers are interconnected through a tungsten plug 2, and the preparation method specifically comprises the following steps:

1) selecting a silicon wafer as an initial substrate layer 1, and completing the manufacture of a CMOS active region, an n-layer dielectric layer, an n-layer metal layer and a passivation layer 3 on the substrate layer 1 by utilizing a CMOS process, wherein the metal layers are interconnected through a tungsten plug 2; the n-th metal layer Mn is used as an upper electrode layer, the n-1-th metal layer M (n-1) is used as a lower electrode layer, the n-th dielectric layer Ln is used as a sacrificial layer of an etching cavity 6, the passivation layer 3 and the n-th metal layer Mn are used as a vibrating diaphragm structure main body, a plurality of groups of through hole groups which are arranged in an array mode are formed on the passivation layer 3 and the n-th metal layer Mn, each group of through hole groups is composed of a plurality of circular through holes 7, the circular through holes 7 are uniformly distributed in the circular boundary range of the cavity, and the bottom ends of the circular through holes 7 extend to the n-th dielectric layer Ln;

in this step, the substrate layer 1 is almost suitable for any negative film with a flat surface, such as a silicon wafer, a glass sheet and the like, and in order to adapt to the CMOS process, a silicon wafer is selected as the substrate layer 1, and the silicon wafer adopts a lightly doped P-type (100) silicon wafer, which has a typical doping concentration N _A ≈10 ¹⁵ cm ^-3 ；

The CMOS process includes a 0.18um process and an advanced process with smaller feature line width, utilizing four basic microfabrication techniques of the CMOS process: the deposition, the photoetching, the doping and the etching are combined to finish the manufacture of a CMOS active region, n dielectric layers, n metal layers and a passivation layer 3 layer by layer; when the dielectric layer is deposited, silicon oxide can be deposited by using Plasma Enhanced Chemical Vapor Deposition (PECVD); forming a metal layer on each dielectric layer by sputtering metal aluminum, spin coating a layer of photoresist on the metal layer, transferring a mask pattern onto the photoresist by utilizing a photoetching technology, defining each metal layer pattern by taking the photoresist pattern as a mask and then using a wet etching process to realize the functions of different metal layers; the metal layer is usually used for electrical interconnection, electrode material, resistance, etc., and in the present invention, the metal layer is used for upper and lower electrodes and an electron layer.

2) Etching the nth dielectric layer Ln through the circular through holes 7 of each group of through holes by using a dry etching method to form a cavity 6; etching the lower part of the group of through holes to form a cavity 6, and finally forming a plurality of cavities 6 which are arranged in an array on the nth dielectric layer Ln; the dry etching adopts hydrofluoric acid gas for etching, silicon oxide in the sacrificial layer is etched through the circular through hole 7 in an isotropic dry way by using the hydrofluoric acid gas, the metal layer is selected by the hydrofluoric acid gas in a high ratio, and the metal layer is not corroded in the dry etching process.

3) Carrying out vacuum packaging on the whole structure, wherein a cavity 6 on the structure forms a vacuum closed cavity 6; wherein, the vacuum packaging forms a vacuum closed cavity 6 by depositing parylene; in order to ensure the tightness of the working environment of the device, the device needs to be subjected to vacuum sealing packaging, the circular through hole 7 can be sealed by Chemical Vapor Deposition (CVD) oxide or nitride, and particularly the device can be subjected to sealing treatment in a parylene plating manner.

The ultrasonic transducer prepared by the invention has the characteristics of good reliability, small volume, high density array element integration, wide frequency band, high sensitivity, low manufacturing cost, easiness in batch production and the like, has advantages in preparing small-size and large-scale array ultrasonic probes, and can be applied to various fields of medicine, military, industry, agriculture and the like.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (9)

1. A CMOS-MEMS integrated acoustic transducer, characterized by: the high-temperature-resistant and high-temperature-resistant composite material comprises a base layer, wherein a first dielectric layer, a first metal layer, a second dielectric layer, a second metal layer, an (n-1) th dielectric layer, an (n-1) th metal layer, an nth dielectric layer and an nth metal layer are sequentially arranged on the base layer from bottom to top, and n is more than or equal to 3; the adjacent metal layers are interconnected through tungsten plugs, a passivation layer is arranged on the nth metal layer, and an upper electrode welding spot and a lower electrode welding spot are arranged on the passivation layer; a cavity is etched on the nth dielectric layer; the passivation layer and the nth metal layer at the top of the cavity form a vibrating diaphragm, the nth metal layer in the vibrating diaphragm is used as an upper electrode, the (n-1) th metal layer at the bottom of the cavity is used as a lower electrode, and the upper electrode at the top of the cavity and the lower electrode at the bottom of the cavity are interconnected through a tungsten plug; the first to (n-2) th metal layers serve as electron shells.

2. A CMOS-MEMS integrated acoustic transducer, characterized by: the high-temperature-resistant and high-temperature-resistant composite material comprises a base layer, wherein a first dielectric layer, a first metal layer, a second dielectric layer, a second metal layer, an (n-1) th dielectric layer, an (n-1) th metal layer, an nth dielectric layer and an nth metal layer are sequentially arranged on the base layer from bottom to top, and n is more than or equal to 3; the adjacent metal layers are interconnected through tungsten plugs, a passivation layer is arranged on the nth metal layer, and an upper electrode welding spot and a lower electrode welding spot are arranged on the passivation layer; a plurality of cavities which are arranged in an array are etched on the nth dielectric layer, the passivation layer at the top of each cavity and the nth metal layer partially form respective corresponding diaphragms, the nth metal layer in the diaphragm at the top of each cavity is used as an upper electrode, the (n-1) th metal layer at the bottom of each cavity is used as a lower electrode, and the upper electrode at the top of each cavity and the lower electrode at the bottom of each cavity are interconnected through a tungsten plug; the first to (n-2) th metal layers serve as electron shells.

3. The CMOS-MEMS integrated acoustic transducer of claim 1 or 2, wherein: the substrate layer is made of silicon wafer which is lightly doped P-type (100) silicon wafer with typical doping concentration N _A ≈10 ¹⁵ cm ^-3 (ii) a The dielectric layer is made of silicon oxide, the metal layer is made of aluminum, and the passivation layer is made of silicon nitride.

4. The CMOS-MEMS integrated acoustic transducer of claim 1 or 2, wherein: the electronic layer comprises a CMOS signal processing circuit.

5. The CMOS-MEMS integrated acoustic transducer of claim 1, wherein: the cavity is a cylindrical cavity, and vacuum is formed in the cavity; the vibrating diaphragm at the top of the cavity is also a circular vibrating diaphragm, a plurality of circular through holes which are arranged in an array mode are uniformly distributed on the vibrating diaphragm, and the circular through holes are internally vacuumized; the lower electrode at the bottom of the cavity is a circular electrode, and the radius of the circular electrode is half of that of the cylindrical cavity.

6. The CMOS-MEMS integrated acoustic transducer of claim 2, wherein: each cavity is a cylindrical cavity, and the inside of each cavity is vacuum; the vibrating diaphragm at the top of each cavity is also a circular vibrating diaphragm, a plurality of circular through holes which are arranged in an array mode are uniformly distributed on each vibrating diaphragm, and the circular through holes are internally vacuumized; the lower electrode at the bottom of each cavity is a circular electrode with a radius of half the radius of the cylindrical cavity, and the lower electrodes at the bottom of all the cavities are interconnected together.

7. The method for fabricating the CMOS-MEMS integrated acoustic transducer of claim 5, comprising the steps of:

1) selecting a silicon wafer as an initial substrate layer, and completing the manufacture of a CMOS active region, an n-layer dielectric layer, an n-layer metal layer and a passivation layer on the substrate layer by utilizing a CMOS process, wherein the metal layers are interconnected through a tungsten (W) plug; the diaphragm structure comprises a diaphragm structure body, a passivation layer, a metal layer, a dielectric layer and a plurality of circular through holes, wherein the nth metal layer is used as an upper electrode layer, the (n-1) th metal layer is used as a lower electrode layer, the nth dielectric layer is used as an etching cavity sacrificial layer, the passivation layer and the nth metal layer are used as diaphragm structure bodies, the passivation layer and the nth metal layer are provided with the circular through holes which are arranged in an array manner, the circular through holes are uniformly distributed in the range of the circular boundary of a cavity, and the bottom ends of the circular through holes extend to the nth dielectric layer;

2) etching the nth dielectric layer to form a cavity through the circular through hole by using dry etching;

3) and carrying out vacuum packaging on the whole structure, wherein a cavity on the structure forms a vacuum closed cavity.

8. The method for fabricating a CMOS-MEMS integrated acoustic transducer according to claim 6, comprising the steps of:

1) the method comprises the following steps of selecting a silicon wafer as an initial substrate layer, and completing the manufacture of a CMOS active region, an n-layer dielectric layer, an n-layer metal layer and a passivation layer on the substrate layer by utilizing a CMOS process, wherein the metal layers are interconnected through a tungsten (W) plug; the diaphragm structure comprises a diaphragm structure body, a passivation layer, a n-1 th metal layer, a dielectric layer, a plurality of groups of through holes, a plurality of circular through holes, a plurality of metal layers and a plurality of metal layers, wherein the n-th metal layer is used as an upper electrode layer, the n-1 th metal layer is used as a lower electrode layer, the n-th dielectric layer is used as an etching cavity sacrificial layer, the passivation layer and the n-th metal layer are used as diaphragm structure bodies, the passivation layer and the n-th metal layer are provided with the through hole groups which are arranged in an array manner, each group of through hole group consists of a plurality of circular through holes, the circular through holes are uniformly distributed in the circular boundary range of a cavity, and the bottom ends of the circular through holes extend to the n-th dielectric layer;

2) etching the nth layer of dielectric layer to form a cavity through the circular through holes of each group of through holes by using dry etching; etching the lower part of the group of through holes to form a cavity, and finally forming a plurality of cavities which are arranged in an array on the nth dielectric layer;

3) and carrying out vacuum packaging on the whole structure, wherein a cavity on the structure forms a vacuum closed cavity.

9. The method for manufacturing a CMOS-MEMS integrated acoustic transducer according to claim 7 or 8, wherein: the dry etching adopts hydrofluoric acid gas for etching, and vacuum packaging forms a vacuum closed cavity by depositing parylene.

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