CN219765916U

CN219765916U - Ultrasonic transducer device

Info

Publication number: CN219765916U
Application number: CN202223066986.1U
Authority: CN
Inventors: D·朱斯蒂; M·费雷拉; L·滕托里
Original assignee: STMicroelectronics SRL
Current assignee: STMicroelectronics SRL
Priority date: 2021-11-19
Filing date: 2022-11-18
Publication date: 2023-09-29
Anticipated expiration: 2032-11-18

Abstract

Embodiments of the present disclosure provide an ultrasound transducer device comprising a semiconductor body having a first major surface and a second major surface and comprising: a first chamber extending into the semiconductor body at a distance from the first main surface; a film formed by the semiconductor body between the first major surface and the first chamber; a piezoelectric element on the membrane; a second chamber extending into the semiconductor body between the first chamber and the second major surface; a central fluid channel extending into the semiconductor body from the second major surface to the first chamber and traversing the second chamber; and one or more lateral fluid channels extending from the second major surface into the semiconductor body to the second chamber. The minimum detectable relative distance between the object to be detected and the ultrasound transducer device is advantageously improved with embodiments of the present disclosure.

Description

Ultrasonic transducer device

Technical Field

The present disclosure relates to at least one MEMS Ultrasonic Transducer (MUT) device having improved damping of oscillations of its membrane. In particular, the present disclosure relates to at least one MUT device formed in a semiconductor body and including one or more MUT elements, each MUT element having a fluid recirculation path facing a surface of the semiconductor body opposite one or more respective diaphragms of the one or more MUT elements relative to the semiconductor body.

Background

Proximity sensors are well known, including time-of-flight sensors. In particular, the time-of-flight sensor may be an ultrasonic transducer manufactured, for example, using MEMS ("microelectromechanical system") technology.

In use, the ultrasonic transducer is immersed in a fluid (typically having a low density, such as air) and is controlled to generate and detect ultrasonic waves (e.g. having a frequency comprised between 20kHz and 500MHz, for example equal to 2 or 3 MHz). In detail, as exemplarily shown in fig. 1, the ultrasonic transducer T generates ultrasonic waves (or emission waves, denoted by reference numeral W in fig. 1) _e Indicated), in the presence of an object O arranged in the direction of propagation of the acoustic wave, this ultrasonic wave is reflected, forming an ultrasonic echo (or reflected wave, indicated with W in fig. 1) detectable by the same ultrasonic transducer T _r A representation); transmitted wave W _e Is a reflected wave W _r The time distance between receptions of (a) represents the relative distance D between the ultrasonic transducer T and the object of detection O. As a result, by measuring the time of flight, it is possible to have information about the object O to be detected. In more detail, the ultrasonic transducer T comprises a membrane that is controllably oscillated, e.g. piezoelectrically or capacitively, in order to generate the emitted wave W _e . The film is also configured to reflect wave W _r Oscillating when impinging on the ultrasonic transducer T; this thus allows, for example, piezoelectrically or capacitively detecting the reflected wave W _r 。

Fig. 2 shows the displacement (denoted by reference number Xm in fig. 2) of the membrane of the ultrasound transducer T relative to the rest position of the membrane (i.e. the position assumed by the membrane when the membrane is not oscillating and thus when the ultrasound transducer T is neither transmitting nor detecting). As can be noted, the graph of fig. 2 shows a first waveform X _m,e And a second waveform X _m,r First waveform X _m,e Representing generation of transmitted wave W _e Is a displacement of the emitted film of the second waveform X _m,r Representing reception of reflected waves W by being continuous with each other _r And the resulting displacement of the membrane. First waveform X _m,e Having a first portion with a ringing interval T along the ringing interval T and a second portion _up In which the first waveform X _m,e Has a maximum amplitude that increases as a function of time, the second portion being continuous with the first portion and having a peak amplitude that increases as a function of time _down In which the first waveform X _m,e Has a maximum amplitude that decreases as a function of time (e.g., exponentially). Ringing interval T _up Corresponding to causing the film to emit wave W _e For a time interval required for oscillation of the desired transmission frequency of (a), while the ringing interval T _down Corresponding to the time interval required to interrupt the membrane oscillation (e.g. ringing interval T when the membrane oscillation has a maximum amplitude less than a maximum threshold amplitude, e.g. comparable to measurement noise) _down End). Second waveform X _m,r Instead have a distance T along the echo _echo Wherein the second waveform X _m,r Has a first maximum amplitude increase and then decrease as a function of time. Typically, in the transmitted wave W _e Is a reflected wave W _r In other words, during the ringing interval T _down End and echo interval T of (2) _echo Between the beginning of (c) there is a dead zone interval T _blind During proper operation of the ultrasonic transducer T, the dead zone interval T _blind Is not zero. In detail, ringing interval T _up Ringing interval T _down And dead zone interval T _blind Sum of (a) and define ultrasoundTime of flight T of transducer T _TOF . As a result, the blind area interval T _blind Is related to the relative distance D of the object O with respect to the ultrasound transducer T.

However, when the relative distance D is smaller than the threshold relative distance, the wave W is emitted _e And reflected wave W _r Final partial overlap (i.e. blind zone spacing T _blind Zero) such that it is difficult to convert the reflected wave W _r And transmit wave W _e Distinguishing and thus making it complicated or impossible to measure the relative distance D. In other words, the threshold relative distance (also referred to as a blind zone) is the minimum detectable relative distance D between the object O and the ultrasonic transducer T, without being due to the emitted wave W _e And reflected wave W _r Any loss of information due to superposition of (c) is provided.

The known ultrasonic transducers T are optimized during design to have a high quality factor (e.g., greater than 150) in order to reduce their energy loss during operation. However, a smaller bandwidth of the energy spectrum of the membrane oscillation and a lower damping of this oscillation correspond to an increased quality factor. In other words, a larger ringing interval T _down Corresponds to a larger figure of merit, and thus the dead zone interval T _blind And (3) reducing. Due to the dead zone spacing T _blind Reducing, transmitting wave W _e And reflected wave W _r The risk of overlap and thus the risk of being unable to detect the relative distance D increases. As a result, the minimum detectable threshold relative distance increases as the figure of merit increases. This is mainly due to the fact that the ultrasonic transducer T is typically immersed in a low density propagation medium, such as a medium (e.g. air), which does not allow an effective damping of the membrane oscillations, especially at the typical operating oscillation frequency of the membrane (e.g. about 2 MHz), and thus has the fact that the known ultrasonic transducer T is not able to detect objects O that are too close thereto.

Known solutions to increase the damping of membrane oscillations include the use of passive dampers (e.g. layers of suitable polymer material arranged on the membrane) or active dampers (e.g. providing an inverse excitation to the membrane after an active pulse causing the membrane oscillation) or algorithms to detect the wave W reflected by _r The first waveform X is caused _m,e Attenuation variation of the envelope of the second part of (2) in order to compensate forCompensating for its effects. However, these solutions have a number of key points, such as identifying a suitable damper that allows for a correct coupling between the impedance of the ultrasound transducer T and the power dissipation of the fluid, or a problem of coupling between the impedance of the ultrasound transducer T and the power dissipation of the fluid, or for the second waveform X, even when the environmental conditions of the fluid having the ultrasound transducer T immersed therein vary _m,r Is dependent on the shape of the object O to be detected.

Disclosure of Invention

It is an object of the present disclosure to provide an ultrasound transducer device to at least partially solve the above-mentioned problems of the prior art.

An aspect of the present disclosure provides an ultrasonic transducer device comprising: a semiconductor body of semiconductor material having a first major surface and a second major surface and integrating a first MUT element, the first MUT element comprising: a first chamber extending into the semiconductor body at a distance from the first main surface; a film formed by the semiconductor body between the first major surface and the first chamber; a piezoelectric element extending over the membrane on the first major surface of the semiconductor body; a second chamber extending into the semiconductor body between the first chamber and the second major surface; a central fluid channel extending from the second major surface into the semiconductor body to the first chamber and traversing the second chamber; and one or more lateral fluid channels extending from the second major surface into the semiconductor body to the second chamber, wherein the one or more lateral fluid channels, the central fluid channel, and the second chamber define a fluid recirculation path fluidly connecting the first chamber with an exterior of the semiconductor body.

According to one or more embodiments, configured to be immersed in a liquid or gaseous propagation medium extending from the exterior of the semiconductor body to the first chamber, wherein the fluid recirculation path is configured to allow recirculation of the propagation medium between the first chamber and the exterior of the semiconductor body, the recirculation being caused by alternating successive expansion and contraction of the volumes of the first chamber and the second chamber, the expansion and contraction being caused by the oscillation of the membrane and the expansion and contraction pumping the propagation medium into and out of the first chamber, respectively.

The one or more embodiments, wherein the first chamber and the second chamber are concentric and aligned along a central axis of the first MUT element orthogonal to the first major surface, wherein the central fluid channel is centrally disposed with respect to the first chamber and the second chamber and aligned along the central axis, and wherein the one or more lateral fluid channels are radially external with respect to the central fluid channel about the central axis.

According to one or more embodiments, the device comprises a plurality of said lateral fluid channels arranged around said central fluid channel.

According to one or more embodiments, wherein the lateral fluid channel has a curved shape parallel to the second main surface and laterally surrounds the central fluid channel at a distance from the central fluid channel.

According to one or more embodiments, wherein the first chamber and the second chamber have a circular shape or have a polygonal shape.

According to one or more embodiments, the device further comprises a plurality of electrical connection lines configured to selectively couple at least one of the first and second electrodes of the first MUT element to the control unit, and wherein the piezoelectric element comprises a stack comprising first and second electrodes and a thin film piezoelectric region disposed between the first and second electrodes.

According to one or more embodiments, wherein the central fluid channel is formed by a central groove defining a central opening in the second main surface, and wherein the one or more lateral fluid channels are formed by one or more respective lateral grooves, each lateral groove defining a respective lateral opening in the second main surface.

In accordance with one or more embodiments, the device further includes one or more second MUT elements, each of the one or more second MUT elements comprising: a respective first chamber extending into the semiconductor body at a distance from the first main surface; a respective membrane formed by the semiconductor body between the first major surface and the first chamber of the second MUT element; a respective piezoelectric element extending over the membrane of the second MUT element on the first major surface of the semiconductor body; a respective second chamber extending into the semiconductor body between the first chamber and the second major surface of the second MUT element; a respective central fluid channel extending from the second major surface into the semiconductor body to the first chamber of the second MUT element and traversing the second chamber of the second MUT element; and one or more respective lateral fluid channels extending from the second major surface into the semiconductor body to the second chamber of the second MUT element, wherein the one or more lateral fluid channels, the central fluid channel, and the second chamber of the second MUT element define respective fluid recirculation paths that fluidly connect the first chamber of the second MUT element with an exterior of the semiconductor body.

The minimum detectable relative distance between the object to be detected and the ultrasound transducer device is advantageously improved with embodiments of the present disclosure.

Drawings

For a better understanding of the present disclosure, preferred embodiments will now be described, by way of non-limiting example only, with reference to the accompanying drawings, in which:

FIG. 1 schematically illustrates an ultrasonic transducer that generates a transmitted wave and receives the reflected wave to detect object distance;

FIG. 2 is a graph showing the displacement of the membrane of the ultrasound transducer of FIG. 1 with respect to its resting position as a function of time, indicating the emitted and reflected waves;

FIG. 3 is a top view of an embodiment of the present ultrasound transducer device;

fig. 4 shows a cross section of a portion of the ultrasound transducer device of fig. 3 involving a plurality of actuator elements arranged side by side;

fig. 5 shows an enlarged cross-section of a portion of the ultrasound transducer device of fig. 3, involving a single actuator element;

FIGS. 6A and 6B are enlarged top and bottom views, respectively, of the actuator element of FIG. 5;

FIG. 7 is an enlarged cross-section of a portion of the actuator element of FIG. 5;

8A-8H illustrate cross-sections of the actuator element of FIG. 5 at subsequent manufacturing steps of an embodiment of the manufacturing process;

9A-9F illustrate cross-sections of the actuator element of FIG. 5 at subsequent manufacturing steps of different embodiments of the manufacturing process;

FIG. 10 is a graph showing the trend of bandwidth of the ultrasound transducer device of FIG. 3 as a function of some of its physical quantities; and

fig. 11 is a top view of a different embodiment of the present ultrasound transducer device.

Detailed Description

Fig. 3 schematically shows an ultrasound transducer device 1 manufactured using MEMS technology, and is therefore also referred to as MUT ("micro-mechanical ultrasound transducer") device in the following. For example, the MUT device 1 is integrated into the die 2.

The MUT device 1 comprises one or more MEMS ultrasonic transducer elements (or MUT elements) 5. In the exemplary embodiment shown in fig. 1, the MUT device 1 comprises a plurality of MUT elements 5 arranged side by side with each other, for example aligned in rows and columns. In the embodiment of fig. 1, the MUT element 5 has a circular shape (see also fig. 6).

Each MUT element 5 is independently connected to a control unit 8 by means of schematically shown electrical connections 6 and pads 7, the control units 8 typically being formed in different dies 9, for example as ASICs (application specific integrated circuits). Alternatively, the MUT elements 5 may be connected to a group, wherein the MUT elements 5 of the group are individually controlled and the group is individually controllable to reduce the number and simplify the electrical connections.

Referring to fig. 4, a die 2 includes a semiconductor body 3 of semiconductor material (e.g., silicon, such as monolithic) having first and second major faces 3a,3b and forming a plurality of MUT elements 5.

Each MUT element 5 comprises a central fluid channel 13 and one or more lateral fluid channels 10. For each MUT element 5, a central fluid channel 10 and one or more lateral fluid channels 10 open onto the second major surface 3B through a central opening 11 and one or more lateral openings 12 (one for each lateral fluid channel 10), respectively. Optionally, the lateral opening 12 may be connected to an external fluid circuit, not shown, for example to allow the intake of a liquid or gas contained in the tank, or directly in communication with the external environment, for example for the intake of air from the environment; similarly, the central opening 11 may be connected to an external fluid circuit, not shown, or to the outside, depending on the intended application.

As shown in detail in fig. 5, each MUT element 5 further comprises a first chamber 15 arranged in proximity of the first main face 3A of the semiconductor body 3, and a second chamber 20 extending between the first chamber 15 and the second main face 3B of the semiconductor body 3.

Each MUT element 5 further comprises a lateral slot 21 (one for each lateral opening 12) extending between the lateral opening 12 and the second chamber 20, and a central slot 22 extending between the first chamber 15 and the central opening 11 through the second chamber 20. In the case where each MUT element 5 comprises a single transverse trench 21, the central trench 22 and the transverse trenches 21 are arranged side by side at a distance from each other; in addition, in the case where each MUT element 5 includes two or more lateral grooves 21, the central groove 22 is interposed between the lateral grooves 21 (in particular, in a bottom view, the central groove 22 is located centrally with respect to the lateral grooves 21, which are arranged around the central groove 22, i.e., they are located radially outside with respect to the central groove 22).

Each lateral groove 21 defines a respective lateral fluid channel 10, and the central groove 22 defines a central fluid channel 13.

The lateral grooves 21, the central groove 22 and the second chamber 20 define a fluid recirculation path (not shown) that fluidly connects the first chamber 15 with the exterior of the MUT device 1. The fluid recirculation path is configured to allow recirculation of fluid or gas present in the first chamber 15, as better described below.

The portion of the semiconductor body 3 between the cavity 15 of the semiconductor body 3 and the first main surface 3A of the die 2 forms a respective membrane 18, and on each membrane 18 a respective piezoelectric element 19 is arranged above the first main surface 3A.

The first and second chambers 15, 20 (here illustratively having a circular shape) have centers aligned with each other along a central axis 25. Thus, the membrane 18 is concentric with the chambers 15, 20 and in the example considered it also has a circular shape. According to the embodiment shown in fig. 6A and 6B, the first chamber 15 has a larger area (in the top view in fig. 6A or in the bottom view in fig. 6B) than the second chamber 20, so that one of its peripheral regions (here in the shape of a circular ring) protrudes laterally with respect to the second chamber 20. Nevertheless and in a manner not shown, the first chamber 15 may also have an area smaller than or equal to the second chamber 20.

The lateral trenches 21 extend vertically (perpendicular to the first and second main faces 3a,3b of the semiconductor body 3) between the lateral openings 12 and the second chamber 20. In the embodiment shown in fig. 6B, the lateral openings 12 are four for each MUT element 5 and have a curved shape with circular crown sectors, aligned with each other circumferentially. Here, the lateral grooves 21 have the same shape and area as the lateral openings 12 and have a smaller inner diameter than the second chambers 20, so that the second chambers 20 surround them at a distance.

Here, the central groove 22 of each MUT element 5 has a cylindrical shape parallel and concentric to the central axis 25 of the respective MUT element 5, has the same area (in bottom view) as the respective central opening 11, and traverses the second chamber 20 to reach the first chamber 15.

The piezoelectric element 19 may have a structure shown in the cross section of fig. 7.

In detail, the piezoelectric element 19 is formed onThe insulating layer 181 is formed, for example, by superposition of a thermally grown silicon oxide layer and a dielectric layer, as discussed in detail below with reference to fig. 8A-8H, and the piezoelectric element 19 covers the entire first main face 3A of the semiconductor body 3. Above the insulating layer 181 extends a stack 182, the stack 182 comprising: a bottom electrode 183 made of a conductive material, such as titanium (Ti) or platinum (Pt); a thin film piezoelectric region 191; and a top electrode 184, such as TiW. The bottom electrode 183 is in electrical contact with the first contact line 188 (e.g., it is formed in the same layer and patterned by known photolithographic steps). First and second dielectric layers 185, 186 of silicon oxide and silicon nitride, for example deposited by CVD (chemical vapor deposition), extend over the stack 182. A second contact line 189 of electrically conductive material (e.g., aluminum and/or copper) extends over the dielectric layers 185, 186 and into the opening 187 thereof to electrically contact the top electrode 184. Optionally, a passivation layer 190 of silicon oxide and/or silicon nitride deposited, for example by CVD, covers the entire top surface of the die 2 except for the electrical connection openings (over the pads 7). In practice, the contact lines 188, 189 form the electrical connection 6 of fig. 3 and allow: to generate the transmitted wave W by the MUT element 5 _e One of the electrodes 183, 184 (e.g., the bottom electrode 183 of all actuator elements 5) is electrically connected to a reference potential, typically ground, and the other of the electrodes 183, 184 (e.g., the top electrode 184) is biased to an ac excitation voltage; alternatively, to detect reflected wave W _r Between the electrodes 183 and 184, a reflected wave W is obtained _r The potential difference is detected by an impact on the membrane 18.

The operation of the MUT device 1 is similar to known devices (e.g., the ultrasonic transducer T of fig. 1). In particular, in use, the MUT device 1 is surrounded by a propagation medium (a fluid such as a liquid or a gas, in particular air), wherein sound waves (in detail, ultrasonic waves) generated or detected by the MUT device 1 propagate.

When the MUT elements 5 operate in their own transmission mode (i.e., they function as actuators), the membrane 18 is vibrated by the piezoelectric element 19, and the vibration of the membrane 18 causes generation and propagation in the acoustic wave propagation medium. Specifically, an alternating excitation voltage (e.g., at a frequency comprised between about 20kHz and about 100MHz and having a voltage equal to about 40V) is applied across electrodes 183 and 184. Application of an ac excitation voltage between electrodes 183 and 184 causes contraction and expansion of thin film piezoelectric region 191 and consequent deflection of thin film 18 in the vertical direction, alternately moving away from and toward chambers 15 and 20, causing the volumes of chambers 15 and 20 to correspondingly increase and decrease. These volume changes cause the propagation medium (hereinafter referred to as air) present in the first chamber 15 to move pneumatically and to be recirculated with respect to the environment external to the MUT device 1. In practice, this volume variation allows for a partial depletion step and a filling step (alternately in succession with respect to each other) of the first chamber 15. Each partial depletion step of the first chamber 15 comprises sucking the air present in the first chamber 15 towards the second chamber 20 and through the central channel 22 and then discharging it to the external environment through the central channel 22 and the lateral channels 21. Instead, each partial filling step of the first chamber 15 comprises sucking the air present in the external environment through the central groove 22 and the lateral grooves 21 and towards the second chamber 20, and then introducing it into the first chamber 15 through the central groove 22.

When the MUT elements 5 operate in their own receive mode (i.e., they operate as sensors), acoustic waves from the propagation medium (i.e., reflected waves W _r ) Striking the membrane 18 and causing it to vibrate. This induced vibration of each membrane 18 causes recirculation of air in the first cavity 15 (similar to that previously described) and stress in the piezoelectric element 19, which in turn generates a detected potential difference between the electrodes 183 and 184 indicative of vibration of the membrane 18 caused by impinging sound waves.

The reception mode and the transmission mode alternate with each other: thus, the MUT device 1 may operate in reception only, transmission only, or both reception and transmission, but in alternating time periods with each other.

According to one embodiment, the MUT device 1 may be provided as described below with reference to fig. 8A-8H, with exemplary fabrication of a single MUT element 5 being shown (other MUT elements 5 of the MUT device 1 being fabricated simultaneously in a manner not shown, arranged laterally side by side).

First, fig. 8A, a second chamber 20 of each MUT element 5 is formed in a wafer 100 of semiconductor material, such as monocrystalline silicon. For example, the manufacturing process described in european patent EP1577656 (corresponding to patent US 8173513) and briefly outlined below can be used for this purpose.

In detail, a resist mask 101 having honeycomb cell openings is formed over the wafer 100. Using the mask 101, anisotropic etching of the wafer 100 is performed so as to form a plurality of trenches 102 having a depth of, for example, 15 μm, communicating with each other and defining a plurality of silicon pillars 103.

Subsequently, in fig. 8B, the mask 101 is removed and epitaxial growth is performed in a reducing atmosphere. As a result, an epitaxial layer, for example, of N-type and 30 μm in thickness, is grown over the pillars 103, thereby closing the trenches 102 upward.

An annealing step is then carried out, for example at 1190 ℃ for 30 minutes, preferably under a hydrogen or optionally nitrogen atmosphere.

As discussed in the aforementioned patent, the annealing step causes migration of silicon atoms, which tend to move to lower energy positions. As a result, the silicon atoms of the pillars 103 migrate completely and form the second chamber 20, also due to the close distance between the pillars. A silicon layer remains over the second chamber 20, partially formed of epitaxially grown silicon atoms, partially formed of migrated silicon atoms, and forms a closed layer 105 of monocrystalline silicon.

Then, in fig. 8C, another epitaxial growth is performed from the encapsulation layer 105, with a thickness of several tens micrometers, for example equal to 50 μm. In this manner, wafer 100 includes a first thick region 108 of monocrystalline silicon overlying second chamber 20.

Subsequently, in fig. 8D, a first chamber 15 is formed in the first thick region 108, for example by repeating the manufacturing process described in european patent EP1577656 and previously described with reference to fig. 8A and 8B. In this way, the wafer 100 has first and second surfaces corresponding to the first and second main faces 3a,3b of the semiconductor body 3 and accommodates the first chamber 15 and the membrane 18 above the second chamber 20.

Then, in fig. 8E, using a mask layer, not shown, holes 115 are formed, one hole for each first chamber 15, each hole extending from the first surface 3A of the wafer 100 to the corresponding first chamber 15. Holes 115 having a diameter of, for example, 2 μm are preferably formed near the outer edges of the respective films 18 so as not to change the elastic characteristics thereof.

Then, in fig. 8F, thermal oxidation is performed to form an oxide layer having a thickness of, for example, 1 μm. Specifically, a coated oxide portion 116A is formed on the side of each first chamber 15, first and second surface oxide portions 116B and 116C are formed on the faces 3A and 3B of the wafer 100, respectively, and a closed oxide portion 116D is formed within each hole 115. Then, the first chamber 15 is completely covered with the coating oxide portion 116A, and the hole 115 is closed with the closing oxide portion 116D.

Subsequently, fig. 8G, a layer 117 of dielectric material, such as TEOS (tetraethylorthosilicate), is deposited over the first surface oxide portion 116B, which together with the first surface portion 116B forms the insulating layer 181 of fig. 7. The dielectric material layer 117 may have a thickness of, for example, 1 μm.

Then, the piezoelectric element 19 is formed on the dielectric material layer 117. For example, referring to fig. 7, electrode 183 and first contact line 188 are first formed using known deposition and masking techniques. Then, a thin film piezoelectric layer (e.g., pzt—pb, zr, tiO 3) and an electrode layer are sequentially deposited, which are defined by known masking and definition techniques, so as to form a thin film piezoelectric region 191 and a top electrode 184. First and second dielectric layers 186, 186 are then deposited and defined, thereby forming openings 187; a second contact line 189 is formed and a passivation layer 190 is deposited and defined, the passivation layer 190 thus opening over the pads (not shown).

Then, in fig. 8H, a first deep etch of silicon is performed from the backside through the second surface oxide portion 116C until reaching the second chamber 20, thereby forming the lateral trenches 22 and the lateral openings 11. In addition, the etching also forms a central trench 22 (until reaching the second chamber 20) and a portion of the central opening 12. In this step, the coated oxide portion 116A serves as an etch stop layer.

Further, in fig. 8H, a second deep etch of silicon is performed from the backside through the central opening 22 until the first chamber 15 is reached (i.e., through the coated oxide portion 116A), ending the formation of the central trench 22 and placing it in fluid communication with the first chamber 15.

After performing the final manufacturing steps including opening the contacts and dicing the wafer 100, the MUT device 1 of fig. 3-6B is obtained.

According to another embodiment shown in fig. 9A-9F, a MUT device 1 is provided by using porous silicon and a sacrificial region.

In detail, referring to fig. 9A, a wafer 200 includes a substrate 201 of semiconductor material (here, silicon, e.g., single crystal), and a first sacrificial region 204 thermally grown or deposited on the substrate 201 (e.g., on a first surface 201A of the substrate 201). The first sacrificial region 204 is used to form the second cavity 20 and may be, for example, silicon oxide, BPSG (borophosphosilicate glass) or silicon nitride.

In fig. 9B, a first structural layer 210 of porous silicon is deposited on the first surface 201A of the substrate 201 and covers the first sacrificial region 204. For example, the first structural layer 210 may be deposited by an LPCVD ("low pressure chemical vapor deposition") process from a pure silane gas at a pressure of 550mtorr at 600 ℃. The first structural layer 210 may for example have a thickness comprised between 100 and 150 nm.

In a manner known to the person skilled in the art, the porous silicon of the first structural layer 210 is identified by the presence of micropores which make it permeable to liquids, in particular etchants such as HF (hydrofluoric acid).

Further, referring to fig. 9B, the second sacrificial region 204 is formed in the first structural layer 210, for example, by thermal growth. The second sacrificial region 205 is in contact with the first sacrificial region 204 for forming a portion of the central trench 22 comprised between the first and second cavities 15, 20 and may be, for example, silicon oxide, BPSG (borophosphosilicate glass) or silicon nitride.

Then, fig. 9C, a second structural layer 211 of porous silicon is deposited over the first structural layer 210 and the second sacrificial region 205. In addition, a third sacrificial region 204 is formed in the second structural layer 211, for example by thermal growth. The third sacrificial region 206 is in contact with the second sacrificial region 205, extends over the second sacrificial region 205 and over the second sacrificial region 204 for forming the first cavity 15, and may be, for example, silicon oxide, BPSG or silicon nitride. The first, second and third sacrificial regions 204, 205, 206 together form a sacrificial region 207 of silicon oxide, BPSG or silicon nitride.

In fig. 9D, a third structural layer 212 of porous silicon is deposited over the second structural layer 211 and the third sacrificial region 206. The portion of the third structural layer 212 overlying the third sacrificial region 206 is used to form the film 18. The first, second and third structural layers 210, 211 and 212 together form the structural region 202 of porous silicon. The structural region 202 forms together with the substrate 201 a semiconductor body 3 (with the first main surface 3A at the structural region 202 and the second main surface 3B at the substrate 201).

Further, fig. 9D, the piezoelectric element 19 is formed on the second structural layer 212, similarly to that described previously with reference to fig. 8G.

Next, in fig. 9E, a first etching back of silicon from the second main surface 3B until reaching the sacrifice region 207 is performed, thereby forming the lateral groove 22 and the lateral opening 11. In addition, the etching also forms a central trench 22 (until the location of the second chamber 20 is reached) and a portion of the central opening 12.

In fig. 9F, a second etch (chemical etch, e.g. by HF) is performed to remove the sacrificial region 207, e.g. from the first main surface 3A and through the structural region 202. Since this type of etching allows silicon oxide to be removed (i.e., removal of the sacrificial region 207), but does not remove silicon, at the end of the etching, the first and second cavities 15 and 20 and the portion of the central trench 22 contained therebetween are formed in the wafer 200, thereby obtaining the MUT device 1.

The advantages that they provide are apparent from a review of the features of the present disclosure made in accordance with the present disclosure.

In particular, the MUT device 1 allows recirculation of the air present in the first cavity 15, thanks to the second chamber 20 and the trenches 21 and 22 of each MUT element 5. It has been shown that this increases the damping of the oscillations of the membrane 18, thereby reducing the ringing interval T _down . This reduces the transmitted wave W _e And reflected wave W _r And improves the minimum detectable relative distance between the object to be detected and the MUT device 1. In detail, this is due to the air recirculation creating energy losses in the oscillations of the membrane 18 and avoiding the occurrence of vibrations due to the membrane 18The oscillations heat the air present in the first chamber 15 and the oscillations of the membrane 18 periodically compress the volume of the first chamber 15. Since the ring-down oscillation of the membrane 18 is a function of the air temperature in the first cavity 15, preventing a temperature rise in the first cavity 15 avoids amplification of the oscillation of the membrane 18, thereby improving the measurement accuracy of the MUT device 1. In other words, the bandwidth of the energy spectrum of the oscillations of the membrane 18 increases and may for example exceed 35% (unlike known ultrasound transducers, in which it is typically less than 5%).

Furthermore, the structure of each MUT element 5 is specifically designed to improve its frequency response. In particular, although the recirculation of air in the first chamber 15 may introduce parasitic peaks in the spectrum of sound pressure present on the membrane 18 (i.e. with respect to the signal indicative of the wave W emitted _e And by reflected wave W _r Additional peaks of the desired peaks of the oscillations of the film 18 caused), but having the film 18 at the first main surface 3A of the semiconductor body 3 and the central and lateral grooves 22, 21 facing the second main surface 3B of the semiconductor body 3 minimizes the number and amplitude of these parasitic peaks and indicates the emitted wave W with respect to _e And reflected wave W _r Increasing its frequency distance; this prevents such a possible spurious peak from being superimposed on the indication transmitted wave W _e And reflected wave W _r And thus prevents affecting the measurement of the distance of the object to be detected (this would occur if at least a portion of the grooves 21 and 22 were facing the first main surface 3A, and also the film 18 were facing the first main surface 3A).

The structure of the MUT element 5 allows to detect the distance of an object to be detected without the need for post-processing algorithms using detection signals and minimizes the dependence of the measurement on external variable factors, such as the characteristics of the propagation medium (unlike known solutions).

The MUT device 1 has a small external size and high flexibility and versatility.

For example, with the described solution, a die 2 with sides s=20mm can be formed, comprising 1600 (40×40) MUT elements 5, each MUT element 5 having a diameter K of 460 μm (the dimensions of the second chamber 20, see fig. 3) arranged at a distance L of 40 μm. The thickness of the die 2 (thickness of the semiconductor body 3) may be between 200 and 710 μm.

Furthermore, in each MUT element 5, the first chamber 15 may have a diameter of 350 μm and a thickness of 3.5 μm, the second chamber 20 may have a diameter of 460 μm and a thickness of 3 μm, and the distance d between the first chamber 15 and the second chamber 20 _cc (fig. 5) may vary between about 3 μm and about 40 μm, and the film 18 may have a thickness of, for example, about 6 μm. The central trench 21 may have a diameter d comprised between about 3 μm and about 60 μm _t And the lateral grooves 22 have a smaller diameter than the central groove 21 and may have a diameter of 13 μm, for example. The thin film piezoelectric region 191 may have a thickness of 2 μm, and the piezoelectric element 19 may have a total thickness comprised between 2.1 and 3 μm.

In particular, FIG. 10 shows as distance d _cc And diameter d _t The dependence of the bandwidth BW (e.g., at-3 dB) of the energy spectrum of the oscillations of the membrane 18 as a function of (a). When distance d _cc When increasing, the maximum value of the bandwidth BW increases, and when the diameter d _t The bandwidth BW has a tendency to increase and then decrease when increasing, where when the diameter d _t The more the maximum value of the bandwidth BW decreases when increasing. In particular, when the diameter d _t Comprising a distance d between about 10 μm and about 35 μm _cc The bandwidth BW is maximized between about 5 μm and about 30 μm included.

However, the above values are merely indicative, and in particular, the shape and size of the chambers 15, 20 and grooves 21, 22 may vary widely depending on the application and the desired flow rate.

For example, according to various embodiments (fig. 11), the MUT device 1 comprises a plurality of quadrangular MUT elements 5, for example square, with sides of k=350 μm (sides of the second chamber 20), arranged at a distance l=40 μm. The piezo element 19 is also square here. However, other shapes (e.g., oval, hexagonal, octagonal, etc.) and other dimensions are also possible.

Finally, it is clear that modifications and variations may be made to the present disclosure described and illustrated herein without departing from the scope of the present disclosure as defined in the appended claims.

For example, the shape of the lateral grooves 21 and the lateral openings 12, and their number, may vary (e.g., each MUT element 5 has three or more lateral openings 12, and has a curved shape, has a circular crown-like sector, is circumferentially aligned with each other, or two lateral openings 12 opposite each other relative to the central opening 11, or even just one lateral opening 12). Furthermore, the transverse grooves 21 may be connected to a single supply channel leading to the outside.

A MEMS ultrasonic transducer MUT device (1) may be summarized as comprising a semiconductor body (3) of semiconductor material, the semiconductor body (3) having a first main surface (3A) and a second main surface (3B), and integrating a first MUT element (5), the first MUT element (5) comprising a first chamber (15) extending into the semiconductor body (3) at a distance from the first main surface (3A); -a film (18) formed by the semiconductor body (3) between the first main surface (3A) and the first chamber (15); -a piezoelectric element (19) extending over the membrane (18) on the first main surface (3A) of the semiconductor body (3); -a second chamber (20) extending into the semiconductor body (3) between the first chamber (15) and the second main surface (3B); -a central fluid channel (22) extending from the second main surface (3B) into the semiconductor body (3), reaching the first chamber (15) and traversing the second chamber (20); and one or more lateral fluid channels (21), the one or more lateral fluid channels (21) extending from the second main surface (3B) into the semiconductor body (3) into the second chamber (20), wherein the one or more lateral fluid channels (21), the central fluid channel (22) and the second chamber (20) define a fluid recirculation path fluidly connecting the first chamber (15) with the outside of the semiconductor body (3).

The fluid recirculation path may be configured to allow recirculation of the propagation medium between the first chamber (15) and the exterior of the semiconductor body (3), said recirculation being caused by alternating successive expansions and contractions of the volumes of the first and second chambers (15, 20) resulting from oscillations of the membrane (18) and pumping the propagation medium into and out of the first chamber (15), respectively.

The first chamber (15) and the second chamber (20) may be concentric and aligned along a central axis (25) of the first MUT element (5), perpendicular to the first major surface (3A), wherein the central fluid channel (22) may be centrally arranged with respect to the first chamber (15) and the second chamber (20), and may be aligned along the central axis (25), and the one or more lateral fluid channels (21) may be radially external with respect to the central fluid channel (22) about the central axis (25).

The MUT device may comprise a plurality of said lateral fluid channels (21) arranged around a central fluid channel (22).

The transverse fluid channel (21) may have a curved shape parallel to the second main surface (3B) and laterally surrounds the central fluid channel (22) at a distance.

The first and second chambers (15, 20) may have a circular shape or have a polygonal shape.

The piezoelectric element (19) may comprise a stack (182), the stack (182) comprising first and second electrodes (183, 184) and a thin film piezoelectric region (191) arranged between the first and second electrodes, the MUT device may further comprise a plurality of electrical connection lines (6), the electrical connection lines (6) being configured to selectively connect at least one of the first and second electrodes (183, 184) of the first MUT element (5) to the control unit (8).

The central fluid channel (22) may be formed by a central groove defining a central opening (11) in the second main surface (3B), and the one or more lateral fluid channels (21) may be formed by one or more respective lateral grooves, each lateral groove defining a respective lateral opening (12) in the second main surface (3B).

The MUT device may further comprise integrating one or more second MUT elements (5), each second MUT element (5) comprising a respective first cavity (15) extending into the semiconductor body (3) at a distance from the first main surface (3A); -a respective film (18) formed by the semiconductor body (3) between the first main surface (3A) and the first chamber (15) of the second MUT element (5); -a respective piezoelectric element (19) extending over the membrane (18) of the second MUT element (5) on the first main surface (3A) of the semiconductor body (3); -a respective second chamber (20) extending into the semiconductor body (3) between the first chamber (15) and the second main surface (3B) of the second MUT element (5); -a respective central fluid channel (22), the central fluid channel (22) extending from the second main surface (3B) into the semiconductor body (3), reaching the first chamber (15) of the second MUT element (5), and traversing the second chamber (20) of the second MUT element (5); and one or more respective lateral fluid channels (21) extending from the second main surface (3B) into the semiconductor body (3) to the second chamber (20) of the second MUT element (5), wherein the one or more lateral fluid channels (21), the central fluid channel (22) and the second chamber (20) of the second MUT element (5) define respective fluid recirculation paths fluidly connecting the first chamber (15) of the second MUT element (5) with the outside of the semiconductor body (3).

A method for manufacturing a MEMS ultrasonic transducer MUT device (1) may be summarized as comprising the steps of: forming a first chamber (15) in a semiconductor body (3) of semiconductor material having a first main surface (3A) and a second main surface (3B), the first chamber (15) extending into the semiconductor body (3) at a distance from the first main surface (3A), wherein a portion of the semiconductor body (3) extending between the first main surface (3A) and the first chamber (15) forms a film (18); -forming a second chamber (20) in the semiconductor body (3) extending between the first chamber (15) and the second main surface (3B); forming a piezoelectric element (19) on the first main surface (3A) of the semiconductor body (3) and over the membrane (18); -forming a central fluid channel (22) in the semiconductor body (3), the central fluid channel (22) extending from the second main surface (3B) to the first chamber (15) and traversing the second chamber (20); and forming one or more lateral fluid channels (21) in the semiconductor body (3) extending from the second main surface (3B) to the second chamber (20), wherein the first chamber (15), the membrane (18), the piezoelectric element (19), the second chamber (20), the central fluid channel (22) and the one or more lateral fluid channels (21) define a first MUT element (5) of the MUT device (1), and wherein the one or more lateral fluid channels (21), the central fluid channel (22) and the second chamber (20) define a fluid recirculation path fluidly connecting the first chamber (15) with an exterior of the semiconductor body (3).

Forming the central fluid channel (22) may include removing a selective portion of the semiconductor material wafer (100) from the second surface (3B) through the second chamber (20) to the first chamber (15), and forming the one or more lateral fluid channels (21) may include removing one or more corresponding selective portions of the semiconductor material wafer (100) from the second surface (3B) to the second chamber (20).

Forming the second chamber (20) may include forming a plurality of first trenches (102) in the substrate (100) of semiconductor material separated from one another by first pillar structures (103); performing epitaxial growth in a reducing atmosphere to form a first semiconductor material surface layer (105) upwardly closing the first trench (102); annealing to migrate atoms of semiconductor material of the first pillar structure (103) to form a second chamber (20), forming the first chamber (15) may include performing a second epitaxial growth to form a thick region (108); forming a plurality of second trenches in the thick region separated from each other by the second pillar structures; performing a second epitaxial growth in a reducing ambient to form a second semiconductor material surface layer upwardly closing the second trench; and performing an anneal such that it causes migration of atoms of semiconductor material of the second pillar structure and formation of the first chamber (15) and the film (18).

The process may include, prior to forming the central fluid channel (22), forming one or more holes (115) extending from the first surface (3A) of the wafer (100) of semiconductor material to the first chamber (15), and forming an oxide layer (16A) coating the first chamber (15) and closing the one or more holes (115).

Forming the first chamber (15) and forming the second chamber (20) may include forming a first sacrificial region (204) on a first surface (201A) of a substrate (201) of semiconductor material adapted to form the second chamber (20); -forming a first structural layer (210) of porous silicon and a second sacrificial region (205) on the first surface (201A) of the substrate (201) and on the first sacrificial region (204), the second sacrificial region (205) overlying the first sacrificial region (204) and being in contact with the first sacrificial region (204) and being adapted to form a portion of the central fluid channel (22) between the first chamber (15) and the second chamber (20), the first structural layer (210) extending laterally to the second sacrificial region (205); -forming a second structural layer (211) of porous silicon and a third sacrificial region (206) on the first structural layer (210) and the second sacrificial region (205), the third sacrificial region (206) overlying and being in contact with a portion of the second sacrificial region (205) and the first structural layer (210) and being adapted to form the first cavity (15), the second structural layer (211) extending laterally to the third sacrificial region (206); -forming a third structural layer (212) of porous silicon suitable for forming said membrane (18) on said second structural layer (211) and on said third sacrificial region (206); and removing the first, second and third sacrificial regions (204, 205, 206) by etching through the first, second and third structural layers (210, 211, 212), respectively forming a first chamber (15), a portion of the central fluid channel (22) between the first chamber (15) and the second chamber (20), and the second chamber (20).

The present utility model provides at least one MEMS ultrasonic transducer device and a process for manufacturing the same that overcomes the shortcomings of the prior art.

For example, in at least one embodiment of the present disclosure, a MEMS ultrasonic transducer device comprises: a semiconductor body of semiconductor material having a first major surface and a second major surface and integrating a first MUT element, the first MUT element comprising: a first chamber extending into the semiconductor body at a distance from the first main surface; a film formed by the semiconductor body between the first major surface and the first chamber; a piezoelectric element extending over the membrane on the first major surface of the semiconductor body; a second chamber extending into the semiconductor body between the first chamber and the second major surface; a central fluid channel extending from the second major surface into the semiconductor body to the first chamber and traversing the second chamber; and one or more lateral fluid channels extending from the second major surface into the semiconductor body, wherein the one or more lateral fluid channels, the central fluid channel and the second chamber define a fluid recirculation path fluidly connecting the first chamber with an exterior of the semiconductor body.

An aspect of the present disclosure provides a method comprising: forming a first cavity in a semiconductor body of semiconductor material having a first major surface and a second major surface in the semiconductor body at a distance from the first major surface, and a portion of the semiconductor body extending between the first major surface and the first cavity to form a film; forming a second cavity in the semiconductor body extending between the first cavity and the second major surface; forming a piezoelectric element overlapping the film on the first main surface of the semiconductor body; forming a central fluid channel in the semiconductor body, the central fluid channel extending from the second major surface to the first chamber and traversing the second chamber; and forming one or more lateral fluid channels in the semiconductor body extending from the second major surface to the second chamber, wherein the first chamber, the membrane, the piezoelectric element, the second chamber, the central fluid channel, and the one or more lateral fluid channels define a first MUT element, and wherein the one or more lateral fluid channels, the central fluid channel, and the second chamber define a fluid recirculation path fluidly connecting the first chamber with an exterior of the semiconductor body.

In accordance with one or more embodiments, wherein forming the central fluid passage comprises: removing a selective portion of the semiconductor body from the second surface, the selective portion traversing the second chamber to the first chamber, and wherein forming the one or more lateral fluid channels comprises: one or more respective selective portions of the semiconductor body from the second surface to the second chamber are removed.

According to one or more embodiments: forming the second chamber includes: forming a plurality of first trenches in the semiconductor body separated from each other by first pillar structures; performing epitaxial growth in a reducing environment to form a first semiconductor material layer upwardly closing the first trench; and performing an anneal to cause migration of atoms of semiconductor material of the first pillar structure and form the second chamber, and forming the first chamber comprises: performing a second epitaxial growth to form a thick region; forming a plurality of second trenches in the thick region separated from each other by second pillar structures; performing a second epitaxial growth in a reducing ambient to form a second semiconductor material layer that upwardly encloses the second trench; and performing an anneal to cause migration of atoms of semiconductor material of the second pillar structure and form the first chamber and form a film.

In accordance with one or more embodiments, a method includes: prior to forming the central fluid channel, one or more holes extending from the first surface of the semiconductor body to the first chamber are formed, and an oxide layer coating the first chamber and closing the one or more holes is formed.

According to one or more embodiments: forming the first chamber further includes forming the first chamber with a first dimension extending in a direction transverse to the first and second major surfaces of the semiconductor body; forming the central fluid passage further includes forming the central fluid passage at a second dimension in the direction, the second dimension being smaller than the first dimension; forming the second chamber further includes forming the second chamber with a third dimension in the direction, the third dimension being smaller than the first dimension and larger than the second dimension.

In accordance with one or more embodiments, a method includes: forming a first sacrificial region on a first surface of a substrate of semiconductor material; forming a first structural layer and a second sacrificial region on the first surface of the substrate and on the first sacrificial region, the first structural layer and the second sacrificial region being in contact with the first sacrificial region, and the first structural layer extending laterally along the first sacrificial region to the second sacrificial region; forming a second structural layer and a third sacrificial region on the first structural layer and the second sacrificial region, the second structural layer and the third sacrificial region being in contact with the second sacrificial region and the first structural layer, and the second structural layer extending laterally through the first structural layer to the third sacrificial region; forming a third structural layer over the second structural layer and the third sacrificial region; and removing the first, second and third sacrificial regions by etching the first, second and third sacrificial regions, thereby forming a first cavity, a second cavity and a first portion of a central fluid passage between the first and second cavities.

According to one or more embodiments: removing the first sacrificial region to form the second cavity; removing the second sacrificial region to form the portion of the central fluid passage; and removing the third sacrificial region to form the first cavity.

According to one or more embodiments: forming the first sacrificial region includes forming the first sacrificial region with a first dimension extending in a direction transverse to the first surface of the substrate; forming the second sacrificial region includes forming the second sacrificial region with a second dimension extending in the direction, the second dimension being smaller than the first dimension; forming a third sacrificial region includes forming the third sacrificial region with a third dimension extending in the direction, the third dimension being greater than the first dimension and the second dimension, respectively.

In accordance with one or more embodiments, a method includes: the first sacrificial region is exposed by forming a plurality of trenches extending into a second surface of the substrate opposite the first surface, before the first, second and third sacrificial layers are removed by etching the first, second and third sacrificial layers.

In accordance with one or more embodiments, wherein forming the plurality of trenches further comprises: forming a first trench closer to a first end of the first sacrificial region than a second end of the first sacrificial region, the second end being opposite the first end; forming a second trench closer to a second end of the first sacrificial region; a second portion of the central fluid passage is formed that is aligned with and overlaps the first portion of the central fluid passage.

In accordance with one or more embodiments, wherein the removal of the first sacrificial region, the second sacrificial region, and the third sacrificial region defines a film of the third structural layer.

The various embodiments described above may be combined to provide further embodiments. Aspects of the embodiments can be modified, if necessary, to employ concepts of the various patents, applications and publications to provide yet further embodiments.

These and other changes can be made to the embodiments in light of the above-detailed description. In general, in the following claims, the terms used should not be construed to limit the claims to the specific embodiments disclosed in the specification and the claims, but should be construed to include all possible embodiments along with the full scope of equivalents to which such claims are entitled. Accordingly, the claims are not limited by the present disclosure.

Claims

1. An ultrasonic transducer device, comprising:

a semiconductor body of semiconductor material having a first major surface and a second major surface and integrating a first MUT element, the first MUT element comprising:

a first chamber extending into the semiconductor body at a distance from the first main surface;

a film formed by the semiconductor body between the first major surface and the first chamber;

a piezoelectric element extending over the membrane on the first major surface of the semiconductor body;

a second chamber extending into the semiconductor body between the first chamber and the second major surface;

a central fluid channel extending from the second major surface into the semiconductor body to the first chamber and traversing the second chamber; and

one or more lateral fluid channels extending from the second main surface into the semiconductor body to the second chamber,

wherein the one or more lateral fluid channels, the central fluid channel and the second chamber define a fluid recirculation path fluidly connecting the first chamber with an exterior of the semiconductor body.

2. The device of claim 1, configured to be immersed in a liquid or gaseous propagation medium extending from an exterior of the semiconductor body to the first chamber,

wherein the fluid recirculation path is configured to allow recirculation of the propagation medium between the first chamber and the exterior of the semiconductor body, the recirculation being caused by alternating successive expansion and contraction of the volumes of the first and second chambers, the expansion and contraction being caused by oscillations of the membrane and the expansion and contraction pumping the propagation medium into and out of the first chamber, respectively.

3. The device of claim 1 wherein the first chamber and the second chamber are concentric and aligned along a central axis of the first MUT element orthogonal to the first major surface,

wherein the central fluid passage is centrally arranged with respect to the first and second chambers and aligned along the central axis, and

wherein the one or more lateral fluid channels are radially outward about the central axis relative to the central fluid channel.

4. A device according to claim 3, comprising a plurality of said lateral fluid channels arranged around said central fluid channel.

5. The device of claim 4, wherein the lateral fluid channel has a curved shape parallel to the second major surface and laterally surrounds the central fluid channel at a distance from the central fluid channel.

6. The device of claim 1, wherein the first chamber and the second chamber have a circular shape or have a polygonal shape.

7. The device of claim 1, further comprising a plurality of electrical connection lines configured to selectively couple at least one of a first electrode and a second electrode of the first MUT element to the control unit, and wherein the piezoelectric element comprises a stack comprising the first electrode and the second electrode and a thin film piezoelectric region disposed between the first electrode and the second electrode.

8. The device of claim 1, wherein the central fluid channel is formed by a central groove defining a central opening in the second major surface, and

Wherein the one or more lateral fluid channels are formed by one or more respective lateral grooves, each lateral groove defining a respective lateral opening in the second major surface.

9. The device of claim 1, further comprising one or more second MUT elements, each of the one or more second MUT elements comprising:

a respective first chamber extending into the semiconductor body at a distance from the first main surface;

a respective membrane formed by the semiconductor body between the first major surface and the first chamber of the second MUT element;

a respective piezoelectric element extending over the membrane of the second MUT element on the first major surface of the semiconductor body;

a respective second chamber extending into the semiconductor body between the first chamber and the second major surface of the second MUT element;

a respective central fluid channel extending from the second major surface into the semiconductor body to the first chamber of the second MUT element and traversing the second chamber of the second MUT element; and

One or more corresponding lateral fluid channels extending from the second major surface into the semiconductor body to the second chamber of the second MUT element,

wherein the one or more lateral fluid channels, the central fluid channel, and the second chamber of the second MUT element define respective fluid recirculation paths fluidly connecting the first chamber of the second MUT element with an exterior of the semiconductor body.