CN114859210A - CMOS chip open-short circuit test system and test method - Google Patents

CMOS chip open-short circuit test system and test method Download PDF

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CN114859210A
CN114859210A CN202210429302.5A CN202210429302A CN114859210A CN 114859210 A CN114859210 A CN 114859210A CN 202210429302 A CN202210429302 A CN 202210429302A CN 114859210 A CN114859210 A CN 114859210A
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pin
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宋凯
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Shanghai Yanding Information Technology Co ltd
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Shanghai Yanding Information Technology Co ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2853Electrical testing of internal connections or -isolation, e.g. latch-up or chip-to-lead connections
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/50Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
    • G01R31/52Testing for short-circuits, leakage current or ground faults
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/50Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
    • G01R31/54Testing for continuity

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Abstract

The application aims to provide a CMOS chip open-short circuit test system and a test method, and realizes the open-short circuit test of a pin to be tested in the CMOS chip through input forward preset test current, so that the CMOS chip cannot be damaged no matter the pin to be tested is open or short, and the safety of the CMOS chip is ensured; meanwhile, the open-short circuit test of the pin to be tested can be completed by inputting the forward preset test current and the corresponding test output voltage at one time, so that the condition of twice measurement modes of firstly testing open circuit and then testing short circuit in the prior art is avoided, and the test efficiency of the open-short circuit test of the CMOS chip is greatly improved.

Description

CMOS chip open-short circuit test system and test method
Technical Field
The application relates to the technical field of computers, in particular to a CMOS chip open-short circuit test system and a test method.
Background
OPEN/SHORT circuit test (also called OPEN/SHORT test, O/S test) is mainly used for testing the connection condition of electronic devices, and as the name suggests, OPEN/SHORT circuit test is to test OPEN circuit and SHORT circuit, and is widely applied, for example: the testing method comprises the steps of testing a PCB, testing an IC bonding line, testing the encapsulation of an IC, testing a wire rod, testing an FPC, testing a membrane switch, testing a connector and the like, wherein different applications have special requirements.
The invention discloses a Chinese patent authorization publication No. CN103076530A, which discloses an automatic open-short circuit test system and a test method for a CMOS chip, and specifically comprises the following steps: a. the open circuit test comprises the steps that firstly, a main control chip inputs 1.5V test signals to a GND pin of a CMOS chip to be tested through a multiplexing module, then the main control chip sequentially collects conduction voltage drop signals of protection diodes of all pins of the CMOS chip to be tested through the multiplexing module, if the conduction voltage drop signals are not collected by the protection diodes of the current pin, the current pin is judged to be open, otherwise, the current pin is judged to be normal, and open circuit test information is stored through a storage module; b. the short circuit test comprises the steps that firstly, a main control chip inputs a 1.5v test signal to one pin of a CMOS chip to be tested in sequence through a multiplexing module, then the main control chip acquires and compares whether output signals of other pins except an input signal pin are the same as the input signal through the multiplexing module, if the signals are the same, the pin which is acquired and compared currently is judged to be short-circuited with the signal input pin, if the signals are different, the current pin is judged to be normal, and short circuit test information is stored through a storage module; c. and displaying the open circuit information and the short circuit information through the liquid crystal display module. Although the scheme can realize the automatic open-short circuit test of the CMOS chip, the open circuit is tested by using a method of measuring voltage drop by using an input voltage signal, and the short circuit is tested by comparing the difference of output voltages of different pins, so that the damage of the internal structure of the pins can be caused because large current is generated when the short circuit occurs under the condition of fixed voltage; in addition, the scheme adopts two measurement modes of testing open circuit and then testing short circuit, so that the measurement efficiency is low; since the pin voltage comparison method is used in the short circuit test, if there is a large number of short circuits of the pins, the judgment cannot be realized.
Disclosure of Invention
In order to overcome the defects in the prior art, the application provides a CMOS chip open/short circuit test system and a test method, so as to improve the test efficiency while ensuring the safety of the CMOS chip.
According to one aspect of the present application, there is provided a CMOS chip open-short circuit test system, which includes a CMOS chip to be tested, a multiplexing circuit, an analog-to-digital converter, a micro control unit, and a display device, wherein,
the multiplexing circuit is connected with the CMOS chip to be tested and used for selecting and outputting any pin to be tested in at least one pin in the CMOS chip;
inputting a forward preset test current between the pin to be tested and a VSS end in the CMOS chip, wherein a protection diode in the CMOS chip is arranged between the pin to be tested and the VSS end;
the analog-digital converter is respectively connected with the multiplexing circuit and the VSS end and is used for collecting test output voltage between the pin to be tested and the VSS end and carrying out analog-digital conversion on the test output voltage;
the micro control unit is connected with the analog-digital converter and used for analyzing the converted test output voltage and determining the test result of the pin to be tested, wherein the test result of the pin to be tested comprises normal, short circuit or open circuit of the pin to be tested;
the display equipment is connected with the micro control unit and used for receiving and displaying the test result of the pin to be tested, which is sent by the micro control unit.
Further, in the CMOS chip open/short circuit test system, the preset test current is a current corresponding to a preset current value or a current corresponding to a preset current interval.
Further, in the above CMOS chip open/short circuit test system, the micro control unit is configured to:
judging whether the converted test output voltage is greater than a preset open circuit threshold corresponding to the pin to be tested, if so, determining that the test result of the pin to be tested is the open circuit of the pin to be tested;
judging whether the converted test output voltage is smaller than a preset short-circuit threshold corresponding to the pin to be tested, if so, determining that the test result of the pin to be tested is the short circuit of the pin to be tested;
and if the converted test output voltage is greater than or equal to the preset short-circuit threshold value corresponding to the pin to be tested and is less than or equal to the preset open-circuit threshold value corresponding to the pin to be tested, the test result of the pin to be tested is that the pin to be tested is normal.
Further, in the above CMOS chip open/short circuit test system, different pins in at least one pin in the CMOS chip are provided with different preset open circuit thresholds and preset short circuit thresholds;
the micro control unit stores a preset open circuit threshold and a preset short circuit threshold corresponding to each pin.
Further, in the above CMOS chip open/short circuit test system, the micro control unit is connected to the multiplexing circuit, and is configured to control the multiplexing circuit.
The micro control unit is connected with the input end of the preset test current and used for controlling the preset test current.
According to another aspect of the present application, there is also provided a testing method of a CMOS chip open/short circuit testing system, comprising:
selecting any pin to be tested from at least one pin in the CMOS chip to be tested through a multiplexing circuit to be connected;
inputting a forward preset test current between the pin to be tested and a VSS end in the CMOS chip, wherein a protection diode in the CMOS chip is arranged between the pin to be tested and the VSS end;
collecting a test output voltage between the pin to be tested and the VSS end through an analog-digital converter, and carrying out analog-digital conversion on the test output voltage;
analyzing the converted test output voltage through the micro control unit, and determining a test result of the pin to be tested, wherein the test result of the pin to be tested comprises normal, short circuit or open circuit of the pin to be tested;
and displaying the test result of the pin to be tested through the display equipment.
Further, in the testing method of the MOS chip open/short circuit testing system, the determining the test result of the pin to be tested by analyzing the converted test output voltage by the micro control unit includes:
judging whether the converted test output voltage is greater than a preset open circuit threshold corresponding to the pin to be tested, if so, determining that the test result of the pin to be tested is the open circuit of the pin to be tested;
judging whether the converted test output voltage is smaller than a preset short-circuit threshold corresponding to the pin to be tested, if so, determining that the test result of the pin to be tested is the short circuit of the pin to be tested;
and if the converted test output voltage is greater than or equal to the preset short-circuit threshold value corresponding to the pin to be tested and is less than or equal to the preset open-circuit threshold value corresponding to the pin to be tested, the test result of the pin to be tested is that the pin to be tested is normal.
Further, in the testing method of the MOS chip open/short circuit testing system, different pins in at least one pin in the CMOS chip are provided with different preset open circuit thresholds and preset short circuit thresholds;
the micro control unit stores a preset open circuit threshold value and a preset short circuit threshold value corresponding to each pin
Compared with the prior art, the CMOS chip open-short circuit test system comprises a CMOS chip to be tested, a multiplexing circuit, an analog-digital converter, a micro control unit and a display device, wherein the multiplexing circuit is connected with the CMOS chip to be tested and used for selecting and outputting any pin to be tested in at least one pin in the CMOS chip; inputting a forward preset test current between the pin to be tested and a VSS end in the CMOS chip, wherein a protection diode in the CMOS chip is arranged between the pin to be tested and the VSS end; the analog-digital converter is respectively connected with the multiplexing circuit and the VSS end and is used for collecting test output voltage between the pin to be tested and the VSS end and carrying out analog-digital conversion on the test output voltage; the micro control unit is connected with the analog-digital converter and used for analyzing the converted test output voltage and determining the test result of the pin to be tested, wherein the test result of the pin to be tested comprises normal, short circuit or open circuit of the pin to be tested; the display equipment is connected with the micro control unit and used for receiving and displaying the test result of the pin to be tested, which is sent by the micro control unit. The open-short circuit test of the pin to be tested in the CMOS chip is realized through the input forward preset test current, so that the CMOS chip cannot be damaged no matter the pin to be tested is open or short-circuited, and the safety of the CMOS chip is ensured; meanwhile, the open-short circuit test of the pin to be tested can be completed by inputting the forward preset test current and the corresponding test output voltage at one time, so that the condition of twice measurement modes of firstly testing open circuit and then testing short circuit in the prior art is avoided, and the test efficiency of the open-short circuit test of the CMOS chip is greatly improved.
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Other features, objects and advantages of the present application will become more apparent upon reading of the following detailed description of non-limiting embodiments thereof, made with reference to the accompanying drawings in which:
FIG. 1 illustrates a block diagram of a CMOS chip open-short test system according to one aspect of the present application;
FIG. 2 is a schematic diagram illustrating a CMOS chip and a connection between a protection diode and an input predetermined test current in the CMOS chip open/short circuit test system according to an aspect of the present application;
FIG. 3 illustrates a flow diagram of a method for testing a CMOS chip open-short circuit test system according to one aspect of the present application.
The same or similar reference numbers in the drawings identify the same or similar elements.
Detailed Description
The present application is described in further detail below with reference to the attached figures.
As shown in fig. 1, a CMOS chip open/short circuit test system provided in an embodiment of the present application includes a CMOS chip to be tested (corresponding to the DUT in fig. 1), a multiplexing circuit (corresponding to the MUX in fig. 1), an analog-to-digital converter (corresponding to the ADC in fig. 1), a micro control unit (corresponding to the MCU in fig. 1), and a display device (corresponding to the PC in fig. 1), wherein, as shown in fig. 1,
the multiplexing circuit is connected with the CMOS chip to be tested, and in order to test one or more pins in the CMOS chip, the multiplexing circuit is required to select and output any pin to be tested in at least one pin in the CMOS chip when the pin to be tested is required to be selected for testing each time; a positive preset test current is input between the pin to be tested and the VSS terminal in the CMOS chip, where the preset test current may be a current corresponding to a preset current value or a current corresponding to a preset current interval, that is, the preset test current may be a constant value or a range interval, and in a preferred embodiment of the present application, the preset current interval is preferably 10-1000 uA. As shown in fig. 2, a protection diode in the CMOS chip is connected between the pin to be tested and the VSS end of the CMOS chip, and the protection diode has a specific voltage drop effect, so that after a forward preset test current is input, a test voltage output can be provided between the pin to be tested and the VSS end of the CMOS chip, so as to determine a test result of the pin to be tested by testing the output voltage, and in the preferred embodiment of fig. 2, the preset test current between the pin to be tested and the VSS end of the CMOS chip is preferably 100 uA; the analog-digital converter is respectively connected with the multiplexing circuit and the VSS end and is used for collecting test output voltage between the pin to be tested and the VSS end and carrying out analog-digital conversion on the test output voltage; the micro control unit is connected with the analog-digital converter and used for analyzing the converted test output voltage and determining the test result of the pin to be tested, wherein the test result of the pin to be tested comprises normal, short circuit or open circuit of the pin to be tested; the display equipment is connected with the micro control unit and used for receiving and displaying the test result of the pin to be tested, which is sent by the micro control unit. The open-short circuit test of the pin to be tested in the CMOS chip is realized through the input forward preset test current, so that the CMOS chip cannot be damaged no matter the pin to be tested is open or short-circuited, and the safety of the CMOS chip is ensured; meanwhile, the open-short circuit test of the pin to be tested can be completed by inputting the forward preset test current and the corresponding test output voltage at one time, so that the condition of twice measurement modes of firstly testing open circuit and then testing short circuit in the prior art is avoided, and the test efficiency of the open-short circuit test of the CMOS chip is greatly improved.
Here, the display device includes, but is not limited to, a display screen, a PC, a computer, and the like, which can perform display.
Next, in the open/short circuit testing system for a CMOS chip provided in the above embodiment of the present application, in the process of analyzing the converted test output voltage output by the analog-to-digital converter, the micro control unit includes:
judging whether the converted test output voltage is greater than a preset open circuit threshold corresponding to the pin to be tested, if so, determining that the test result of the pin to be tested is the open circuit of the pin to be tested;
judging whether the converted test output voltage is smaller than a preset short-circuit threshold corresponding to the pin to be tested, if so, determining that the test result of the pin to be tested is the short circuit of the pin to be tested;
and if the converted test output voltage is greater than or equal to the preset short-circuit threshold value corresponding to the pin to be tested and is less than or equal to the preset open-circuit threshold value corresponding to the pin to be tested, the test result of the pin to be tested is that the pin to be tested is normal. Here, the preset short-circuit threshold corresponding to the pin to be tested is far smaller than the preset open-circuit threshold corresponding to the pin to be tested.
As shown in fig. 2, after a forward preset test current is input between a pin to be tested of a CMOS chip and a VSS terminal of the CMOS chip, a test output voltage between the pin to be tested and the VSS terminal is collected, and after analog-to-digital conversion is performed on the collected test output voltage through an analog-to-digital converter, it is necessary to determine whether the converted test output voltage is greater than a preset open-circuit threshold corresponding to the pin to be tested, that is, it can be known from ohm's law that if the test output voltage between the pin to be tested and the VSS terminal is very large (close to an upper output limit of a current source voltage), and is greater than the preset open-circuit threshold corresponding to the pin to be tested, the pin to be tested is indicated to be open-circuited; according to ohm's law, if the test output voltage between the pin to be tested and the VSS terminal is less than the preset short-circuit voltage (close to 0V) corresponding to the pin to be tested, the short circuit of the pin to be tested is indicated; according to the volt-ampere characteristic of the protection diode between the pin to be tested and the VSS end, a voltage close to the voltage drop of the protection diode can be detected between the pin to be tested and the VSS end, namely, if the converted test output voltage between the pin to be tested and the VSS end is in a range of a preset short-circuit threshold value and a preset open-circuit threshold value (namely, the test output voltage is greater than or equal to the preset short-circuit threshold value corresponding to the pin to be tested and is less than or equal to the preset open-circuit threshold value corresponding to the pin to be tested), the pin to be tested is indicated to be normal, so that the normal, open-circuit or short-circuit test of the pin to be tested is realized and the determination is realized.
Next, in the CMOS chip open/short circuit test system provided in the above embodiment of the present application, different pins in at least one pin in the CMOS chip are provided with different preset open circuit thresholds and preset short circuit thresholds; if there are N pins, pin 1, pin 2, … …, pin (N-1), and pin N, respectively, in the CMOS chip, a corresponding preset open threshold and a preset short threshold are set for each pin, and a corresponding preset open threshold V is set for pin 1, respectively 01 And a preset short circuit threshold V 01’ And a preset open circuit threshold V corresponding to the pin 2 02 And a preset short circuit threshold V 02’ … …, and preset open circuit threshold V corresponding to pin (N-1) 0(N-1) And a preset short circuit threshold V 0(N-1) ' and a predetermined open circuit threshold V corresponding to pin N 0N And a preset short circuit threshold V 0N’ The method ensures that different pins in the CMOS chip have corresponding preset open circuit threshold values and preset short circuit threshold values, and the preset open circuit threshold values and the preset short circuit threshold values corresponding to the pins in the CMOS chip are stored in the micro control unit MCU, namely, the micro control unit MCU is used for micro controlPreset open circuit threshold V corresponding to storage pin 1 in unit MCU 01 And a preset short circuit threshold V 01’ And a preset open circuit threshold V corresponding to the pin 2 02 And a preset short circuit threshold V 02’ … …, and preset open circuit threshold V corresponding to pin (N-1) 0(N-1) And a preset short circuit threshold V 0(N-1) ' and the preset open circuit threshold V corresponding to pin N 0N And a preset short circuit threshold V 0N’ Therefore, the method and the device can be more convenient and accurate when the normal, open circuit or short circuit conditions of each pin are tested subsequently, the condition that the pins cannot be distinguished when a large number of pins are short-circuited in the prior art is avoided being processed in a pin voltage comparison mode, and the accuracy of the open circuit and short circuit test of the CMOS chip is improved.
Further, in the above CMOS chip open/short circuit test system, as shown in fig. 1, the micro control unit is further connected to the multiplexing circuit, and is configured to control the multiplexing circuit connected to a preset test current. The micro control unit is also connected with the input end of the preset test current and is used for controlling the preset test current so as to achieve the purpose of adjusting the preset input current.
Next, an embodiment of the present application provides a testing method for a CMOS chip open/short circuit testing system, as shown in fig. 3, including the following steps:
firstly, after an open short circuit test is started, selecting any pin to be tested from at least one pin in a CMOS chip to be tested through a multiplexing circuit for connection;
then, inputting a forward preset test current between the pin to be tested and a VSS end in the CMOS chip, wherein a protection diode in the CMOS chip is arranged between the pin to be tested and the VSS end; here, the preset test current may be a current corresponding to a preset current value, or may be a current corresponding to a preset current interval, that is, the preset test current may be a fixed value, or may be a range interval, in a preferred embodiment of the present application, as shown in fig. 3, the preset current interval is preferably 10 to 1000uA, where values are only explained in the preferred embodiment, and other current intervals are still included in the protection range of the present application.
Then, collecting a test output voltage (corresponding to the voltage output between the pin to be tested and the VSS terminal in fig. 3) between the pin to be tested and the VSS terminal through an analog-digital converter, and performing analog-digital conversion on the test output voltage;
then, analyzing the converted test output voltage through the micro control unit to determine a test result of the pin to be tested, wherein the test result of the pin to be tested comprises normal, short circuit or open circuit of the pin to be tested;
and finally, displaying the test result of the pin to be tested through the display equipment, for example, uploading the test result of the pin to be tested to equipment which can be displayed such as a computer by the micro control unit so that the display equipment displays and records the test result of the pin to be tested.
Further, in a test method of a CMOS chip open/short circuit test system provided in an embodiment of the present application, the determining a test result of the pin to be tested by analyzing the converted test output voltage by the micro control unit specifically includes:
judging whether the converted test output voltage is greater than a preset open circuit threshold corresponding to the pin to be tested, if so, determining that the test result of the pin to be tested is the open circuit of the pin to be tested; that is, if the voltage (test output voltage) in fig. 3 is higher than the predetermined open threshold, the pin to be tested is open. Judging whether the converted test output voltage is smaller than a preset short-circuit threshold corresponding to the pin to be tested, if so, determining that the test result of the pin to be tested is the short circuit of the pin to be tested; that is, if the voltage (test output voltage) in fig. 3 is lower than the preset short-circuit threshold, the pin to be tested is short-circuited. And if the converted test output voltage is greater than or equal to the preset short-circuit threshold value corresponding to the pin to be tested and is less than or equal to the preset open-circuit threshold value corresponding to the pin to be tested, the test result of the pin to be tested is that the pin to be tested is normal, and the normal, open-circuit or short-circuit test of the pin to be tested is realized and confirmed.
Further, in the short circuit test of the open short circuit test of the CMOS chip in the prior art, a pin voltage comparison mode is used, if a large number of pin short circuits exist, a situation that cannot be distinguished occurs, and in order to avoid the situation that cannot be distinguished caused by the prior art, in the test method of the open short circuit test system of the CMOS chip provided in an embodiment of the present application, different pins in at least one pin in the CMOS chip are provided with different preset open circuit thresholds and preset short circuit thresholds, and the preset open circuit thresholds and the preset short circuit thresholds corresponding to each pin are stored in the micro control unit, so that when the open short circuit test is performed on different pins in the CMOS chip, different preset open circuit thresholds and different preset short circuit thresholds corresponding to different pins to be tested can be distinguished, and further, the test accuracy is ensured.
To sum up, the CMOS chip open/short circuit test system provided by the present application includes a CMOS chip to be tested, a multiplexing circuit, an analog-to-digital converter, a micro control unit, and a display device, where the multiplexing circuit is connected to the CMOS chip to be tested and is configured to select and output any one of at least one pin of the CMOS chip to be tested; inputting a forward preset test current between the pin to be tested and a VSS end in the CMOS chip, wherein a protection diode in the CMOS chip is arranged between the pin to be tested and the VSS end; the analog-digital converter is respectively connected with the multiplexing circuit and the VSS end and is used for collecting test output voltage between the pin to be tested and the VSS end and carrying out analog-digital conversion on the test output voltage; the micro control unit is connected with the analog-digital converter and used for analyzing the converted test output voltage and determining the test result of the pin to be tested, wherein the test result of the pin to be tested comprises normal, short circuit or open circuit of the pin to be tested; the display equipment is connected with the micro control unit and used for receiving and displaying the test result of the pin to be tested, which is sent by the micro control unit. The open-short circuit test of the pin to be tested in the CMOS chip is realized through the input forward preset test current, so that the CMOS chip cannot be damaged no matter the pin to be tested is open or short-circuited, and the safety of the CMOS chip is ensured; meanwhile, the open-short circuit test of the pin to be tested can be completed by inputting the forward preset test current and the corresponding test output voltage at one time, so that the condition of twice measurement modes of firstly testing open circuit and then testing short circuit in the prior art is avoided, and the test efficiency of the open-short circuit test of the CMOS chip is greatly improved.
It should be noted that the present application may be implemented in software and/or a combination of software and hardware, for example, implemented using Application Specific Integrated Circuits (ASICs), general purpose computers or any other similar hardware devices. In one embodiment, the software programs of the present application may be executed by a processor to implement the steps or functions described above. Likewise, the software programs (including associated data structures) of the present application may be stored in a computer readable recording medium, such as RAM memory, magnetic or optical drive or diskette and the like. Additionally, some of the steps or functions of the present application may be implemented in hardware, for example, as circuitry that cooperates with the processor to perform various steps or functions.
In addition, some of the present application may be implemented as a computer program product, such as computer program instructions, which when executed by a computer, may invoke or provide methods and/or techniques in accordance with the present application through the operation of the computer. Program instructions which invoke the methods of the present application may be stored on a fixed or removable recording medium and/or transmitted via a data stream on a broadcast or other signal bearing medium and/or stored in a working memory of a computer device operating in accordance with the program instructions. An embodiment according to the present application comprises an apparatus comprising a memory for storing computer program instructions and a processor for executing the program instructions, wherein the computer program instructions, when executed by the processor, trigger the apparatus to perform a method and/or a solution according to the aforementioned embodiments of the present application.
It will be evident to those skilled in the art that the present application is not limited to the details of the foregoing illustrative embodiments, and that the present application may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the application being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned. Furthermore, it is obvious that the word "comprising" does not exclude other elements or steps, and the singular does not exclude the plural. A plurality of units or means recited in the apparatus claims may also be implemented by one unit or means in software or hardware. The terms first, second, etc. are used to denote names, but not any particular order.

Claims (8)

1. A CMOS chip open-short circuit test system is characterized by comprising a CMOS chip to be tested, a multiplexing circuit, an analog-digital converter, a micro control unit and a display device, wherein,
the multiplexing circuit is connected with the CMOS chip to be tested and used for selecting and outputting any pin to be tested in at least one pin in the CMOS chip;
inputting a forward preset test current between the pin to be tested and a VSS end in the CMOS chip, wherein a protection diode in the CMOS chip is arranged between the pin to be tested and the VSS end;
the analog-digital converter is respectively connected with the multiplexing circuit and the VSS end and is used for collecting test output voltage between the pin to be tested and the VSS end and carrying out analog-digital conversion on the test output voltage;
the micro control unit is connected with the analog-digital converter and used for analyzing the converted test output voltage and determining the test result of the pin to be tested, wherein the test result of the pin to be tested comprises normal, short circuit or open circuit of the pin to be tested;
the display equipment is connected with the micro control unit and used for receiving and displaying the test result of the pin to be tested, which is sent by the micro control unit.
2. The CMOS chip open-short circuit test system of claim 1, wherein the predetermined test current is a current corresponding to a predetermined current value or a current corresponding to a predetermined current interval.
3. The CMOS chip open-short circuit test system of claim 1, wherein the micro control unit is configured to:
judging whether the converted test output voltage is greater than a preset open circuit threshold corresponding to the pin to be tested, if so, determining that the test result of the pin to be tested is the open circuit of the pin to be tested;
judging whether the converted test output voltage is smaller than a preset short-circuit threshold corresponding to the pin to be tested, if so, determining that the test result of the pin to be tested is the short circuit of the pin to be tested;
and if the converted test output voltage is greater than or equal to the preset short-circuit threshold value corresponding to the pin to be tested and is less than or equal to the preset open-circuit threshold value corresponding to the pin to be tested, the test result of the pin to be tested is that the pin to be tested is normal.
4. The CMOS chip open-short circuit test system of claim 3, wherein different ones of at least one pin in the CMOS chip are provided with different preset open circuit thresholds and preset short circuit thresholds;
the micro control unit stores a preset open circuit threshold and a preset short circuit threshold corresponding to each pin.
5. The CMOS chip open-short circuit test system of claim 1,
the micro control unit is connected with the multiplexing circuit and is used for controlling the multiplexing circuit.
The micro control unit is connected with the input end of the preset test current and used for controlling the preset test current.
6. A testing method of the CMOS chip open-short circuit testing system according to any one of claims 1 to 5, comprising the steps of:
selecting any pin to be tested from at least one pin in the CMOS chip to be tested through a multiplexing circuit to be connected;
inputting a forward preset test current between the pin to be tested and a VSS end in the CMOS chip, wherein a protection diode in the CMOS chip is arranged between the pin to be tested and the VSS end;
collecting test output voltage between the pin to be tested and the VSS end through an analog-digital converter, and carrying out analog-digital conversion on the test output voltage;
analyzing the converted test output voltage through the micro control unit, and determining a test result of the pin to be tested, wherein the test result of the pin to be tested comprises normal, short circuit or open circuit of the pin to be tested;
and displaying the test result of the pin to be tested through the display equipment.
7. The method according to claim 6, wherein the analyzing the converted test output voltage by the micro control unit to determine the test result of the pin to be tested comprises:
judging whether the converted test output voltage is greater than a preset open circuit threshold corresponding to the pin to be tested, if so, determining that the test result of the pin to be tested is the open circuit of the pin to be tested;
judging whether the converted test output voltage is smaller than a preset short-circuit threshold corresponding to the pin to be tested, if so, determining that the test result of the pin to be tested is the short circuit of the pin to be tested;
and if the converted test output voltage is greater than or equal to the preset short-circuit threshold value corresponding to the pin to be tested and is less than or equal to the preset open-circuit threshold value corresponding to the pin to be tested, the test result of the pin to be tested is that the pin to be tested is normal.
8. The test method according to claim 6, wherein different ones of the at least one pin in the CMOS chip are provided with different preset open threshold values and preset short threshold values;
the micro control unit stores a preset open circuit threshold and a preset short circuit threshold corresponding to each pin.
CN202210429302.5A 2022-04-22 2022-04-22 CMOS chip open-short circuit test system and test method Pending CN114859210A (en)

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