CN114787710A

CN114787710A - Method for device fabrication

Info

Publication number: CN114787710A
Application number: CN202080078841.8A
Authority: CN
Inventors: 林庆煌; G·里斯朋斯
Original assignee: ASML Holding NV
Current assignee: ASML Holding NV
Priority date: 2019-11-15
Filing date: 2020-10-20
Publication date: 2022-07-22
Also published as: WO2021094064A1; KR20220100594A

Abstract

The present invention relates to an improved method of fabricating devices, such as integrated circuits, using high sensitivity Extreme Ultraviolet (EUV) resists. The invention also relates to an integrated wafer processing system for performing such a method. The method includes fabricating a device, the method including: a. exposing an Extreme Ultraviolet (EUV) resist wafer to EUV radiation to produce an exposed EUV resist wafer; b. baking the exposed EUV resist wafer in an oxygen-rich gas environment at a temperature in a range of about 20 ℃ to about 450 ℃; c. processing the exposed EUV resist wafer to produce a device; wherein the oxygen-rich gas environment comprises an oxygen content of greater than about 21.0% by volume, and wherein the EUV resist comprises one or more of Sn, Sb, Cd, Cr, Zn, Hf, Po, Pd, and Te.

Description

Method for device fabrication

Cross Reference to Related Applications

This application claims priority to US application 62/935,949 filed on 2019, 11, 15, which is incorporated herein by reference in its entirety.

Technical Field

The present invention relates to a method for manufacturing a device, such as an integrated circuit. The invention also relates to an integrated wafer processing system for manufacturing devices. The invention is particularly relevant for the manufacture of devices using Extreme Ultraviolet (EUV) lithographic apparatus.

Background

A lithographic apparatus is a machine configured to apply a desired pattern onto a substrate. For example, a lithographic apparatus can be used to fabricate devices such as Integrated Circuits (ICs). The lithographic apparatus may, for example, project a pattern from a patterning device (e.g., a mask) onto a layer of radiation-sensitive material (resist) provided on the substrate.

The wavelength of radiation used by the lithographic apparatus to project a pattern onto a substrate determines the minimum size of features that can be formed on the substrate. Lithographic apparatus using EUV radiation (i.e., electromagnetic radiation having a wavelength in the range of 4-20 nm) may be used to form smaller features on a substrate than lithographic apparatus using Deep Ultraviolet (DUV) radiation (e.g., having a wavelength of 193 nm).

As the size of features to be formed in a lithographic process decreases, the performance requirements for all aspects of the lithographic apparatus and materials become more stringent.

The most commonly used resist material for modern integrated circuit fabrication is Chemically Amplified Resist (CAR). However, chemically amplified resist materials when used for EUV lithography suffer from insurmountable problems associated with the immediate problem of sensitivity-resolution-line edge roughness or random effect trade-off. This trade-off limits the ability to further improve lithographic methods using CAR.

Non-chemically amplified resists (non-CAR), such as spin-on metal oxide resists, tend to suffer from high defect densities. However, they show the promise that they exhibit high resolution and relatively higher EUV lithographic sensitivity than CARs.

In view of the above, there remains a need to develop improved methods of manufacturing devices (e.g., integrated circuits), and in particular, improved methods of EUV lithography using highly sensitive EUV resists that exhibit high EUV photon absorption and more efficient solubility switching. There is also a need for an integrated wafer processing system to perform such a method.

Disclosure of Invention

The invention relates to a method for manufacturing a device, the method comprising:

a. exposing an Extreme Ultraviolet (EUV) resist wafer to EUV radiation to produce an exposed EUV resist wafer;

b. baking the exposed EUV resist wafer in an oxygen-rich gas environment at a temperature in a range of about 20 ℃ to about 450 ℃;

c. processing the exposed EUV resist wafer to produce a device;

wherein the oxygen-rich gas environment comprises an oxygen content of greater than about 21.0% by volume, and wherein the EUV resist comprises one or more of Sn, Sb, Cd, Cr, Zn, Hf, Po, Pd, and Te.

The invention also relates to an integrated wafer processing system for processing an EUV resist wafer, comprising an EUV lithographic apparatus and a processing device comprising an illumination system, a heating element, an oxygen inlet, an oxygen control device and a vacuum device.

Such methods and systems allow high resolution lithography with a non-chemically amplified resist platform, advantageously increasing the solubility switching efficiency after exposure of the wafer to EUV radiation, reducing resist blur and reducing random defects.

Drawings

FIG. 1 is a schematic diagram of a lithographic system including a lithographic apparatus and a radiation source.

FIG. 2 depicts a schematic overview of a lithography unit.

Figure 3 is a diagram illustrating an embodiment of an integrated wafer processing system of the present invention.

FIG. 4 shows the increase in resist sensitivity caused by the method of the present invention as the average number of ligands per metal core increases.

Detailed Description

FIG. 1 is a schematic diagram of a lithography system. The lithographic system comprises a radiation source SO and a lithographic apparatus LA. The radiation source SO is configured to generate a beam B of Extreme Ultraviolet (EUV) radiation. The lithographic apparatus LA comprises an illumination system IL, a support structure MT configured to support a patterning device MA, a projection system PS, and a substrate table WT configured to support a substrate W. The illumination system IL is configured to condition the radiation beam B before it is incident on the patterning device MA. The projection system is configured to project a radiation beam B (now patterned by patterning device MA) onto a substrate W. The substrate W may include a previously formed pattern. In this case, the lithographic apparatus aligns the patterned radiation beam with a pattern previously formed on the substrate W.

The source SO, the illumination system IL and the projection system PS can all be constructed and arranged such that they can be isolated from the external environment. A gas (e.g. hydrogen) at a pressure much lower than atmospheric pressure may be provided in the radiation source SO. A vacuum may be provided in the illumination system IL and/or the projection system PS. A small amount of gas (e.g. hydrogen) at a pressure substantially below atmospheric pressure may be provided in the illumination system IL and/or the projection system PS.

The radiation source SO shown in fig. 1 is of the type that may be referred to as a Laser Produced Plasma (LPP) source. Laser 1 (which may be, for example, CO)₂A laser) is arranged to deposit energy into the fuel, such as tin (Sn) provided by the fuel emitter 3, via a laser beam 2. Although reference is made to tin in the following description, any suitable fuel may be used. The fuel may for example be in liquid form and may for example be a metal or an alloy. The fuel emitter 3 may comprise a nozzle configured to direct tin along a trajectory towards the plasma formation region 4, for example in the form of droplets. The laser beam 2 is incident on the tin of the plasma-forming region 4. Laser energy is deposited into the tin such that a plasma 7 is generated in the plasma formation region 4. During deexcitation and recombination of ions of the plasma, radiation including EUV radiation is emitted from the plasma 7.

EUV radiation is collected and focused by a near-normal incidence radiation collector 5 (sometimes more generally referred to as a normal incidence radiation collector). The collector 5 may have a multilayer structure arranged to reflect EUV radiation (e.g. EUV radiation having a desired wavelength such as 13.5 nm). The collector 5 may have an elliptical configuration with two elliptical foci. The first focus may be at the plasma formation region 4 and the second focus may be at the intermediate focus 6, as discussed below.

In other embodiments of a Laser Produced Plasma (LPP) source, the collector 5 may be a so-called grazing incidence collector configured to receive EUV radiation at a grazing incidence angle and focus the EUV radiation at an intermediate focus. For example, the grazing incidence collector may be a nested collector comprising a plurality of grazing incidence reflectors. The grazing incidence reflectors may be arranged axially symmetrically about the optical axis O.

The radiation source SO may comprise one or more contaminant traps (not shown). For example, a contaminant trap may be located between the plasma formation region 4 and the radiation collector 5. The contaminant trap may be, for example, a rotating foil trap, or may be any other suitable form of contaminant trap.

The laser 1 may be separate from the radiation source SO. In this case, the laser beam 2 may be delivered from the laser 1 to the radiation source SO by means of a beam delivery system (not shown) and/or other optics comprising, for example, suitable directing mirrors and/or a beam expander. The laser 1 and the radiation source SO may together be considered a radiation system.

The radiation reflected by the collector 5 forms a radiation beam B. The radiation beam B is focused at point 6 to form an image of the plasma formation region 4, which serves as a virtual radiation source for the illumination system IL. The spot 6 on which the radiation beam B is focused may be referred to as an intermediate focus. The radiation source SO is arranged such that the intermediate focus 6 is located at or adjacent to the opening 8 in the enclosing structure 9 of the radiation source.

The radiation beam B passes from the radiation source SO to the illumination system IL, which is configured to condition the radiation beam. The illumination system IL may comprise a facet field mirror device 10 and a facet pupil mirror device 11. The faceted field mirror device 10 and the faceted pupil mirror device 11 together provide the radiation beam B with a desired cross-sectional shape and a desired intensity distribution. The radiation beam B passes through the illumination system IL and is incident on the patterning device MA, which is held by the support structure MT. The patterning device MA (which may, for example, be a mask) reflects and patterns the radiation beam B. The illumination system IL may comprise other mirrors or devices in addition to or instead of the facet field mirror device 10 and the facet pupil mirror device 11.

After reflection from the patterning device MA, the patterned radiation beam B enters the projection system PS. The projection system comprises a plurality of

mirrors

13, 14, the plurality of

mirrors

13, 14 being configured to project the radiation beam B onto a substrate W held by the substrate table WT. The

mirrors

13, 14 forming the projection system may be configured as reflective lens elements. The projection system PS can apply a reduction factor to the radiation beam to form an image having features smaller than corresponding features on the patterning device MA. For example, a reduction factor of 4 may be applied. Although in fig. 1 the projection system PS has two

mirrors

13, 14, the projection system may comprise any number of mirrors (e.g. six mirrors).

The lithographic apparatus may be used, for example, in a scan mode, in which a pattern imparted to the radiation beam is projected onto the substrate W (i.e. dynamic exposure) while the support structure (e.g. mask table) MT and the substrate table WT are scanned synchronously. The velocity and direction of the substrate table WT relative to the support structure (e.g. mask table) MT may be determined by the demagnification and image reversal characteristics of the projection system PS. The patterned beam of radiation incident on the substrate W may comprise a band of radiation. The band of radiation may be referred to as an exposure slit. During a scanning exposure, movement of the substrate table WT and support structure MT may cause an exposure slit to travel over an exposure field of the substrate W.

The radiation source SO and/or the lithographic apparatus shown in FIG. 1 may comprise components that are not shown. For example, a spectral filter may be provided in the radiation source SO. The spectral filter may substantially transmit EUV radiation, but substantially block other wavelengths of radiation (such as infrared radiation).

In other embodiments of the lithography system, the radiation source SO may take other forms. For example, in an alternative embodiment, the radiation source SO may comprise one or more free electron lasers. The one or more free electron lasers may be configured to emit EUV radiation that may be provided to one or more lithographic apparatuses.

As shown in fig. 2, the lithographic apparatus LA may form part of a lithographic cell LC (sometimes also referred to as a lithographic cell or (lithographic) cluster), and typically also includes an apparatus for performing pre-exposure and post-exposure processing on the substrate W. Conventionally, these apparatuses include a spin coater SC to deposit a resist layer, a developer DE to develop an exposed resist, a chill plate CH and a bake plate BK for, for example, adjusting the temperature of the substrate W to, for example, adjust the solvent in the resist layer. The substrate handling device or robot RO picks up the substrate W from the input/output ports I/O1, I/O2, moves the substrate W between different process tools, and transfers the substrate W to the feed table LB of the lithographic apparatus LA. The devices (also commonly referred to as tracks) in the lithographic cell are typically under the control of a track control unit TCU, which itself may be controlled by a supervisory control system SCS, which may also control the lithographic apparatus LA, e.g. via the lithographic control unit LACU.

The present invention stems from the following surprising findings: by baking exposed EUV resist wafers in an oxygen-rich gas environment at elevated temperatures, highly sensitive EUV lithographic processes for device fabrication may be provided. Post-exposure baking in an oxygen-rich gas environment enhances the sensitivity of the EUV resist, resulting in faster throughput during EUV lithography.

The wafer may be made of any semiconductor material known in the art that may be used to produce a wafer. For example, the wafer may be a silicon wafer, a silicon carbide wafer, a gallium nitride wafer, or a gallium arsenide wafer. Preferably, the wafer is a silicon wafer or a silicon carbide wafer.

Metal oxide EUV resists comprise core-shell nanoparticles, wherein the core is an EUV absorbing metal core (typically about 1nm in diameter) and the organic shell comprises one or more types of ligands. The core and shell are connected by a chemical bond that is susceptible to cracking by EUV radiation.

Metal oxide EUV resists comprise one or more metals capable of absorbing EUV radiation, resulting in ligand cleavage. Preferably, the metal oxide EUV resist comprises one or more metals selected from Sn, Sb, Cd, Cr, Zn, Hf, Po, Pd, Te, and the like. Preferably, the EUV resist comprises Sn, Zr, Hf and combinations thereof.

Metal oxide EUV resists include one or more types of ligands capable of forming a bond (e.g., a coordination bond) with a central metal core. Examples of suitable ligands are amino, aliphatic, aromatic, acrylic, linear or cyclic hydrocarbon ligands, etc., which are easily cleavable by EUV radiation. Preferably, the ligand is selected from one or more of amino, aliphatic, acrylic, linear or cyclic hydrocarbon ligands.

The metal oxide EUV resist may be deposited on the wafer including an organic underlayer (e.g., an aromatic hydrocarbon underlayer as known to those skilled in the art) by any method known in the art, preferably by a dry or wet process, to form an EUV resist wafer.

EUV resist wafers are exposed to EUV radiation by breaking the chemical bond between the metal core (M) and the organic ligand comprising the organic shell, activating the otherwise inert core-shell nanoparticles. Thus, upon exposure of the EUV resist wafer to EUV radiation, one or more types of ligands are cleaved from the metal core of the nanoparticle.

The mask is used to expose only a specific region of the EUV resist wafer to EUV radiation such that only the ligands in the specific region of the EUV resist wafer are cleaved.

After exposure to EUV radiation, the exposed EUV resist wafer is baked in an oxygen rich environment at an elevated temperature. In this disclosure, this is referred to as a post-exposure bake. The post-exposure bake activates the ligands for subsequent crosslinking reactions, thereby facilitating solubility switching.

And (4) baking after exposure in an oxygen-rich environment to form a crosslinkable functional group. These crosslinkable functional groups are formed as ligands around the metal center of the nanoparticles of the metal oxide EUV resist. Preferably, the crosslinkable functional group includes one or more of-OH, -COOH, -SH, and-CHO.

The crosslinkable functional groups can undergo a condensation reaction with the crosslinkable functional groups on adjacent metal nanoparticles to form a network of crosslinked nanoparticles. Once a sufficient number of crosslinks have formed (at the critical point P)_c) The network of crosslinked nanoparticles may become insoluble in a given solvent, i.e., a solubility switch is deemed to have occurred.

Thus, the portion of the EUV resist wafer exposed to EUV light is rendered insoluble in the developer.

During post-exposure bake, the oxygen-rich environment has an oxygen content that is higher than that of air or artificial air used in clean rooms. Preferably, the oxygen-enriched environment comprises greater than about 21% oxygen by volume, preferably greater than about 23% oxygen by volume, preferably greater than about 25% oxygen by volume, preferably greater than about 30% oxygen by volume, preferably greater than about 40% oxygen by volume, and preferably greater than about 50% oxygen by volume.

The EUV resist wafer is baked at a temperature in a range from about room temperature to about 450 ℃. The baking temperature is preferably greater than about 25 deg.C, preferably greater than about 30 deg.C, preferably greater than about 35 deg.C, preferably greater than about 40 deg.C, preferably greater than about 45 deg.C, preferably greater than about 50 deg.C, preferably greater than about 55 deg.C, preferably greater than about 60 deg.C, preferably greater than about 65 deg.C, preferably greater than about 70 deg.C, preferably greater than about 75 deg.C, and most preferably greater than about 80 deg.C. The baking temperature is preferably no more than about 425 deg.C, preferably no more than about 400 deg.C, preferably no more than about 375 deg.C, preferably no more than about 350 deg.C, preferably no more than about 325 deg.C, preferably no more than about 300 deg.C, preferably no more than about 275 deg.C, preferably no more than about 250 deg.C, preferably no more than about 225 deg.C, and most preferably no more than about 200 deg.C.

In a preferred aspect, the EUV resist wafer is baked at a temperature in the range of about 80 ℃ to about 200 ℃.

The time to bake the EUV resist wafer is in a range of about 10 seconds to about 10 minutes. The baking time is preferably greater than about 15 seconds, preferably greater than about 20 seconds, preferably greater than about 25 seconds, and most preferably greater than about 30 seconds. The baking time is preferably no more than about 8 minutes, preferably no more than about 6 minutes, preferably no more than about 4 minutes, and most preferably no more than about 2 minutes.

In a preferred aspect, the time to bake the EUV resist wafer is in a range from about 30 seconds to about 2 minutes.

In a preferred aspect, the EUV resist wafer is baked at a temperature of about 80 ℃ to about 200 ℃ for a time of about 30 seconds to about 2 minutes in an atmosphere comprising greater than about 21% by volume of oxygen gas. These conditions enable activation of a high proportion of ligands prior to the crosslinking step, thereby achieving high EUV resist sensitivity and high yield.

Preferably, one or more simple molecular compounds are formed as a by-product of the condensation reaction that occurs during the post-exposure bake. Preferably, the simple molecular compound comprises a compound selected from H₂O、NH₃、CH₄HCl and/or CH₃One or more compounds of COOH. Most preferably, the one or more simple molecular compounds comprise H₂O。

Preferably, during the post-exposure bake, the byproducts of the condensation crosslinking reaction are removed from the bake chamber to drive more efficient crosslinking and high EUV lithographic throughput. Preferably, the simple molecular compounds are removed by using a vacuum, for example by establishing a partial vacuum in the baking chamber using a vacuum pump.

Removal of the simple molecular compound from the bake chamber during the post-exposure bake pushes the crosslinking reaction to completion, i.e., promotes more efficient crosslinking. This reduces the time required to achieve solubility switching during the post-exposure bake, resulting in higher yield during device production.

After the post-exposure bake, the EUV resist wafer may be treated with a wet developer method or a dry etching method to leave the exposed resist, so that a circuit pattern is formed on the organic underlayer of the wafer.

The wafer may be further processed by any method known in the art to fabricate devices (e.g., integrated circuits).

The present invention is also directed to providing an integrated wafer processing system (100) for performing the method of the present invention, as shown in fig. 3. Preferably, the integrated wafer processing system comprises an EUV lithography apparatus (101) and a processing device (102), the processing device (102) comprising a heating element (103), an oxygen inlet (104), an oxygen control device (105) and a vacuum device (106).

The vacuum apparatus is configured to remove one or more simple molecular compounds formed as a byproduct of a condensation reaction that occurs during the post-exposure bake.

The oxygen control device is configured to maintain an oxygen level of a gaseous environment of an interior chamber of the treatment device at an oxygen level that is higher than an oxygen level of air or an oxygen level of artificial air used in a clean room. Preferably, the oxygen control device maintains the gaseous environment at greater than about 21% oxygen by volume, preferably greater than about 23% oxygen by volume, preferably greater than about 26% oxygen by volume, preferably greater than about 30% oxygen by volume, preferably greater than about 40% oxygen by volume, and preferably greater than about 50% oxygen by volume.

The heating element is configured to maintain a temperature of an interior chamber of the processing apparatus within a range of about room temperature to about 450 ℃. The heating element is preferably configured to maintain the temperature of the chamber at greater than about 25 ℃, preferably greater than about 30 ℃, preferably greater than about 35 ℃, preferably greater than about 40 ℃, preferably greater than about 45 ℃, preferably greater than about 50 ℃, preferably greater than about 55 ℃, preferably greater than about 60 ℃, preferably greater than about 65 ℃, preferably greater than about 70 ℃, preferably greater than about 75 ℃, and most preferably greater than about 80 ℃. The heating element is preferably configured to maintain the temperature of the chamber at no more than about 425 ℃, preferably no more than about 400 ℃, preferably no more than about 375 ℃, preferably no more than about 350 ℃, preferably no more than about 325 ℃, preferably no more than about 300 ℃, preferably no more than about 275 ℃, preferably no more than about 250 ℃, preferably no more than about 225 ℃, and most preferably no more than about 200 ℃.

In a preferred aspect, the heating element is configured to maintain the temperature of the interior chamber of the processing device in a range of about 80 ℃ to about 200 ℃.

In a preferred aspect, the oxygen control device is configured to maintain an oxygen level of a gaseous environment of an interior chamber of the processing device at greater than about 40% oxygen by volume, and the heating element is configured to maintain a temperature of the interior chamber in a range of about 80 ℃ to about 200 ℃.

The dose of the printed metal oxide EUV resist is given by:

wherein D is_PPrint dose (mJ/cm)²)

Absorption coefficient (1/cm)

S_cChemical sensitivity (cm)³/mJ) -the volume of resist from which a positive resist or a negative resist remains is removed by one EUV photon.

In the elevated oxygen gas environment of the present invention, the chemical sensitivity of an EUV resist without a post-exposure bake is given by:

wherein n is_oNumber of crosslinked metal oxide nanoparticles without post-exposure baking in an elevated oxygen atmosphere

v_oUnit volume of metal oxide resist that is retained as a negative resist by one EUV photon.

The chemical sensitivity of an EUV resist after a post-exposure bake under the elevated oxygen gas environment of the present invention is given by:

S_c＝nv₀＝βn₀v₀

wherein n is the number of crosslinked metal oxide nanoparticles in the case of a post-exposure bake under an elevated oxygen gas atmosphere

β ═ solubility switching accelerator resulting from post-exposure bake in an elevated oxygen atmosphere due to an increased number of activated cross-linkable ligand sites.

Calculate the critical fraction of units forming the gel, i.e. the point at which the system becomes insoluble:

wherein, P_cCritical fraction of units that form a gel (at which point the system becomes insoluble)

Z ═ m, where m is the number of ligands per metal core of the metal oxide resist.

Therefore, the number of the first and second electrodes is increased,

in summary, the chemical sensitivity of the system after the post-exposure bake in an elevated oxygen atmosphere is given by:

S_c＝βn₀v₀＝(m-1)n₀v₀

wherein m is the number of ligands per core of the metal oxide resist and m > 2.

As a result of the post-exposure bake under an elevated oxygen gas environment, the overall EUV resist sensitivity improvement (%) is:

as shown in fig. 4, a significant increase in resist sensitivity can be achieved by applying the method of the present invention compared to using an equivalent EUV resist without a post-exposure bake in a gaseous environment with an elevated oxygen level. The improvement of the present invention is particularly pronounced at higher average numbers of ligands per metal core.

The term "EUV radiation" may be considered to encompass electromagnetic radiation having a wavelength in the range of 4-20nm, for example in the range of 13-14 nm. The EUV radiation may have a wavelength of less than 10nm, for example a wavelength in the range of 4-10nm, such as a wavelength of 6.7nm or 6.8 nm.

The term "resist" refers to a photosensitive film that is coated on top of a wafer and allows for the transfer of a pattern onto the wafer during semiconductor fabrication.

The term "ligand" can be considered to encompass ions or molecules capable of forming bonds (e.g., coordination bonds) with the central metal core.

The term "condensation reaction" can be considered to encompass a chemical reaction that combines two species to form a larger species, and that produces small molecules as a byproduct.

The term "baking" can be considered to encompass a process comprising subjecting a substance to a temperature above ambient temperature.

The term "sensitivity" refers to the minimum energy required to produce a well-defined feature in the photoresist on a substrate, in mJ/cm²And (4) measuring.

The term "resolution" refers to the smallest feature that can be printed on a substrate.

The term "line edge roughness" refers to the variation in the position of the edge of a resist feature over the length of the feature.

Although specific reference may be made in this text to the use of lithographic apparatus in the manufacture of ICs, it should be understood that the lithographic apparatus described herein may have other applications. Other possible applications include the manufacture of integrated optical systems, guidance and detection patterns for magnetic domain memories, flat panel displays, Liquid Crystal Displays (LCDs), thin film magnetic heads, etc.

While specific embodiments of the invention have been described above, it will be appreciated that the invention may be practiced otherwise than as described. The above description is intended to be illustrative, and not restrictive. Thus, it will be apparent to one skilled in the art that modifications may be made to the invention as described without departing from the scope of the claims set out below.

Claims

1. A method for fabricating a device, the method comprising:

c. processing the exposed EUV resist wafer to produce a device;

wherein the oxygen-rich gas environment comprises an oxygen content greater than about 21.0% by volume, and wherein the EUV resist comprises one or more of Sn, Sb, Cd, Cr, Zn, Hf, Po, Pd, and Te.

2. The method of claim 1, wherein the EUV resist comprises one or more of Sn, Zr, and Hf.

3. The method of claim 1 or 2, wherein the method additionally comprises removing one or more by-products during the baking step.

4. The method of claim 3, wherein the one or more byproducts comprise one or more byproducts selected from H₂O、NH₃、CH₄HCl and/or CH₃One or more compounds of COOH.

5. The method of any of the preceding claims, wherein the EUV resist wafer is baked at a temperature in a range of about 80 ℃ to about 200 ℃.

6. The method of any of the preceding claims, wherein the EUV resist wafer is baked for a time in a range from about 10 seconds to about 10 minutes.

7. The method of any of the preceding claims, wherein the EUV resist wafer is baked for a time in a range from about 30 seconds to about 2 minutes.

8. The method of any of the preceding claims, wherein the temperature at which the EUV resist wafer is baked is in the range of about 80 ℃ to about 200 ℃ and the time at which the EUV resist wafer is baked is in the range of about 30 seconds to about 2 minutes.

9. The method of any of the preceding claims, wherein the oxygen-enriched gas environment comprises an oxygen content of greater than about 25.0% by volume.

10. The method of any of the preceding claims, wherein the oxygen-enriched gas environment comprises an oxygen content of greater than about 30.0% by volume.

11. The method of any of the preceding claims, wherein the oxygen-enriched gas environment comprises an oxygen content of greater than about 40.0% by volume.

12. The method of claim 3 or 4, wherein the one or more byproducts are removed by vacuum.

13. An integrated wafer processing system for processing an EUV resist wafer, the integrated wafer processing system comprising an EUV lithographic apparatus and a processing device, the processing device comprising a heating element, an oxygen inlet, an oxygen control device, and a vacuum device.

14. The integrated wafer processing system of claim 13, wherein said heating element is configured to maintain a temperature of an interior chamber of said processing apparatus within a range of about 20 ℃ to about 450 ℃.

15. The integrated wafer processing system of claim 13 or 14, wherein said oxygen control device is configured to maintain an oxygen level of a gaseous environment of an interior chamber of said processing device at least 21.0% by volume.