CN114785712B - Error code meter-based jitter tolerance testing method and device and electronic equipment - Google Patents
Error code meter-based jitter tolerance testing method and device and electronic equipment Download PDFInfo
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- CN114785712B CN114785712B CN202210678176.7A CN202210678176A CN114785712B CN 114785712 B CN114785712 B CN 114785712B CN 202210678176 A CN202210678176 A CN 202210678176A CN 114785712 B CN114785712 B CN 114785712B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
- H04L43/0852—Delays
- H04L43/087—Jitter
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/50—Testing arrangements
Abstract
The invention provides a jitter tolerance testing method and device based on an error code meter and electronic equipment, and relates to the technical field of testing and measuring, wherein the method comprises the following steps: displaying a jitter signal configuration interface; responding to a first configuration operation of a jitter signal configuration control in a jitter signal configuration interface, and determining a jitter signal configuration parameter; generating jitter signal test data according to the jitter signal configuration parameters and triggering a test code generation module of the error code instrument to generate a test sequence carrying a jitter signal according to the jitter signal test data; and generating and outputting a jitter tolerance test result of the tested system according to an error code detection result obtained by testing the tested system by the error code meter based on the test sequence carrying the jitter signal. The technical scheme provided by the invention can simulate various working environments in a real scene, and pre-study and judge the tolerance degree of the tested system to various jitter environments, thereby avoiding the situation that the tested system does not reach the standard after the tested system passes the laboratory test and is deployed on the spot.
Description
Technical Field
The invention relates to the technical field of test measurement, in particular to a jitter tolerance test method and device based on an error code meter and electronic equipment.
Background
An error tester, also called an error tester, is a metering instrument that can test the error rate of a communication system. Before engineering deployment, laboratory performance test verification is carried out on communication equipment, communication links and the like of the communication system, and the communication equipment, the communication links and the like are deployed in the field after the verification is passed. However, due to the complex and various deployed environments, various environmental factors inevitably cause jitter, so that the situation that the communication system cannot reach the standard after passing the laboratory test and being deployed in the field occurs, and the operation of the communication system is abnormal.
Disclosure of Invention
The invention provides a method and a device for testing jitter tolerance based on an error code meter and electronic equipment, which are used for solving the defect that a tested system in the prior art cannot reach the standard after passing a laboratory test and being deployed on the spot, and realizing the jitter tolerance test of the tested system.
The invention provides a jitter tolerance testing method based on an error code meter, which comprises the following steps:
displaying a jitter signal configuration interface, wherein the jitter signal configuration interface comprises a jitter signal configuration control;
determining a dither signal configuration parameter in response to a first configuration operation facing the dither signal configuration control;
generating jitter signal test data according to the jitter signal configuration parameters, and triggering a test code generation module of the error code detector to generate a test sequence carrying a jitter signal according to the jitter signal test data;
obtaining an error code detection result obtained by the error code tester testing the tested system based on the test sequence carrying the jitter signal;
generating a jitter tolerance test result of the tested system according to the error code detection result;
and outputting the jitter tolerance test result of the tested system.
According to the jitter tolerance testing method based on the error code instrument provided by the invention, the jitter signal configuration parameters comprise a jitter type, a jitter frequency range and a jitter amplitude range, the jitter signal test data is generated according to the jitter signal configuration parameters, and a test code generation module triggering the error code instrument generates a test sequence carrying a jitter signal according to the jitter signal test data, and the method comprises the following steps:
performing frequency scanning in the jitter frequency range according to a set frequency scanning mode and a set jitter frequency point number to obtain jitter frequency data;
generating jitter amplitude data step by step according to the jitter amplitude range and the set jitter amplitude;
and a test code generation module of the trigger error code meter generates a test sequence carrying a jitter signal according to the jitter type, the jitter frequency data and the jitter amplitude data.
According to the jitter tolerance testing method based on the error code meter provided by the invention, the jitter signal configuration control comprises a first configuration control for configuring a jitter type, a third configuration control for configuring a jitter amplitude range and a jitter frequency input control, and the step of determining the configuration parameters of the jitter signal in response to the first configuration operation facing the jitter signal configuration control comprises the following steps:
determining a jitter type and a jitter amplitude range in response to configuration operations facing the first configuration control and the third configuration control; responding to the input operation facing to the jitter frequency input control, and generating a jitter frequency list;
the generating of the jitter signal test data according to the jitter signal configuration parameters and the triggering of the test code generation module of the error code detector according to the jitter signal test data to generate the test sequence carrying the jitter signal comprises:
reading jitter frequency data from the list of jitter frequencies;
generating jitter amplitude data step by step according to the jitter amplitude range and the set jitter amplitude;
and a test code generation module of the triggering error code instrument generates a test sequence carrying a jitter signal according to the jitter type, the jitter frequency data and the jitter amplitude data.
According to the jitter tolerance testing method based on the error code instrument provided by the invention, the step of generating the test sequence carrying the jitter signal by the test code generating module of the trigger error code instrument according to the jitter type, the jitter frequency data and the jitter amplitude data comprises the following steps:
sequentially reading the jitter amplitude in the jitter amplitude data at each jitter frequency in the jitter frequency data;
and when a jitter amplitude is read, injecting the jitter frequency and the read jitter amplitude into a test code generation module of the error code detector, triggering the test code generation module of the error code detector to generate a test sequence according to the jitter type, the jitter frequency and the read jitter amplitude, and obtaining the test sequence carrying jitter signals.
According to the jitter tolerance testing method based on the error code instrument provided by the invention, the step of generating the jitter tolerance testing result of the tested system according to the error code detection result comprises the following steps:
acquiring the number of error codes in the error code detection result to obtain a first number of error codes;
determining whether the jitter amplitude read at the jitter frequency passes the test or not according to the first error code number, the set confidence coefficient, the set maximum error code number and the set error rate to obtain a confidence coefficient test result;
and determining the maximum jitter amplitude passing the test under each jitter frequency in the jitter type and the jitter frequency range based on the confidence test result to obtain the jitter tolerance test result of the tested system.
According to the jitter tolerance testing method based on the error code instrument provided by the invention, the jitter signal configuration interface further comprises a confidence coefficient configuration control, and the jitter tolerance testing method based on the error code instrument further comprises the following steps:
determining a confidence level of the setting in response to a second configuration operation facing the confidence level configuration control.
According to the jitter tolerance testing method based on the error code instrument provided by the invention, the jitter signal configuration interface further comprises a code element number configuration control and an error code number threshold configuration control, and the step of generating the jitter tolerance testing result of the tested system according to the error code detection result comprises the following steps:
acquiring the number of error codes in a specified number of code elements in the error code detection result to obtain a second number of error codes, wherein the specified number is determined based on the configuration operation in the code element number configuration control;
acquiring an error code number threshold, wherein the error code number threshold is determined based on configuration operation in the error code number threshold configuration control;
determining whether the jitter amplitude read under the jitter frequency passes the test or not according to the second error code number and the error code number threshold value to obtain a test result to be processed;
and determining the maximum jitter amplitude passing the test under each jitter frequency in the jitter type and the jitter frequency range based on the test result to be processed to obtain the jitter tolerance test result of the tested system.
According to the jitter tolerance testing method based on the error code instrument provided by the invention, the jitter signal configuration interface further comprises a frequency scanning mode configuration control, and the jitter tolerance testing method based on the error code instrument further comprises the following steps:
and determining the set frequency scanning mode in response to a fourth configuration operation facing the frequency scanning mode configuration control.
According to the jitter tolerance testing method based on the error code meter provided by the invention, the jitter tolerance testing method based on the error code meter further comprises the following steps:
obtaining the test time of the tested data in the jitter frequency data and the jitter amplitude data to obtain test reference time;
calculating the test time of the data which is not tested in the test according to the test reference time, the jitter frequency data and the data which is not tested in the jitter amplitude data to obtain the test residual time;
and displaying the test remaining time.
The invention also provides a jitter tolerance testing device based on the error code meter, which comprises:
the display module is used for displaying a jitter signal configuration interface, and the jitter signal configuration interface comprises a jitter signal configuration control;
the configuration module is used for responding to a first configuration operation facing the jitter signal configuration control and determining a jitter signal configuration parameter;
the first generation module is used for generating jitter signal test data according to the jitter signal configuration parameters and triggering a test code generation module of the error code detector to generate a test sequence carrying a jitter signal according to the jitter signal test data;
the acquisition module is used for acquiring an error code detection result obtained by testing the tested system by the error code tester based on the test sequence carrying the jitter signal;
the second generation module is used for generating a jitter tolerance test result of the tested system according to the error code detection result;
and the output module is used for outputting the jitter tolerance test result of the tested system.
The invention also provides an electronic device, which comprises a memory, a processor and a computer program stored on the memory and capable of running on the processor, wherein the processor executes the computer program to realize the jitter tolerance testing method based on the error code detector.
The present invention also provides a non-transitory computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements a method for error-resilient jitter tolerance testing as described in any of the above.
The present invention also provides a computer program product comprising a computer program which, when executed by a processor, implements the method for error-resilient-based jitter tolerance testing as described in any of the above.
The invention provides a jitter tolerance testing method, a device and electronic equipment based on an error code meter, which are characterized in that a jitter signal configuration interface is displayed, a first configuration operation facing a jitter signal configuration control in the jitter signal configuration interface is responded, a jitter signal configuration parameter is determined, then jitter signal test data is generated according to the jitter signal configuration parameter, a test code generation module of the error code meter is triggered to generate a test sequence carrying a jitter signal according to the jitter signal test data, then an error code detection result obtained by testing a tested system by the error code meter based on the test sequence carrying the jitter signal is obtained, and a tolerance jitter test result of the tested system is generated according to the error code detection result and is output, so that the jitter tolerance test of the tested system is realized. By providing a jitter signal configuration function and taking a jitter signal as a variable, various working environments and working conditions under a real scene can be simulated, so that the tolerance of the system to be tested to various jitter environments can be researched and judged in advance before the system to be tested is deployed on the spot, the performance of the system to be tested is improved in advance, and the situation that the system to be tested does not reach the standard after the system to be tested passes a laboratory test and is deployed on the spot is avoided.
Drawings
In order to more clearly illustrate the technical solutions of the present invention or the prior art, the drawings needed for the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and those skilled in the art can also obtain other drawings according to the drawings without creative efforts.
FIG. 1 is a schematic diagram of an application scenario of the jitter tolerance testing method based on an error detector according to the present invention;
FIG. 2 is a schematic flow chart of a jitter tolerance testing method based on an error detector according to the present invention;
FIG. 3 is a graphical representation of jitter tolerance test results for a system under test;
FIG. 4 is a diagram of a jitter tolerance test result output from a system under test in the form of a data table according to the present invention;
FIG. 5 is a second schematic flowchart of the error-detector-based jitter tolerance testing method according to the present invention;
FIG. 6 is a schematic structural diagram of an error-detector-based jitter tolerance testing apparatus according to the present invention;
fig. 7 is a schematic structural diagram of an electronic device provided by the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is obvious that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without inventive step based on the embodiments of the present invention, are within the scope of protection of the present invention.
The code error meter, also called code error tester, is composed of two parts of sending and receiving, the test code generation module of the sending part produces a known digital test sequence, the digital test sequence is sent to the input end of the tested system after being coded, the digital test sequence is received and decoded by the code error detection module of the code error meter receiving part after passing through the channel of the tested system, and the code sequence to be tested is obtained. The error code meter compares the received code sequence to be tested with the digital test sequence sent by the sending part code by code, if a certain code element is not consistent, the error code count is increased by one. And counting and storing the number of error codes in a period of time, calculating the error code rate in the period of time according to the stored data, and analyzing and displaying the result of the error code test.
In the related engineering practices of high-speed serial link testing, high-speed interconnection characteristic verification, optical communication systems and the like, as equipment in the system is under various working environments, various environmental factors inevitably cause jitter, and the jitter tolerance of various equipment in the system is limited, so that errors are inevitably caused when various jitters are confronted. Therefore, the problem that some test projects cannot reach the standard after the system passes long-term test verification in a laboratory and is deployed in various complex environments can occur. Therefore, if the system can be subjected to jitter tolerance test in the experimental test stage, the system can better cope with various working environments, and the performance of the system is improved.
In the embodiment of the invention, a jitter tolerance test scheme based on an error code instrument is provided, which can display a jitter signal configuration interface, determine a jitter signal configuration parameter in response to a first configuration operation facing a jitter signal configuration control in the jitter signal configuration interface, generate jitter signal test data according to the jitter signal configuration parameter and trigger a test code generation module of the error code instrument to generate a test sequence carrying a jitter signal according to the jitter signal test data, then obtain an error code detection result obtained by the error code instrument by testing a tested system based on the test sequence carrying the jitter signal, and generate and output a jitter tolerance test result of the tested system according to the error code detection result.
The jitter tolerance testing method based on the error code instrument of the invention is described below. The jitter tolerance testing method based on the error code instrument can be applied to the error code instrument, can also be applied to electronic equipment such as a server, a mobile phone, a computer and the like, and can also be applied to an error code instrument-based jitter tolerance testing device arranged in the electronic equipment such as the server, the mobile phone, the computer and the like or the error code instrument, and the error code instrument-based jitter tolerance testing device can be realized by software, hardware or the combination of the software and the hardware. When the error code meter-based jitter tolerance testing method is applied to electronic equipment, the electronic equipment can communicate with the error code meter. Exemplarily, taking the application of the error-code-meter-based jitter tolerance testing method to electronic devices such as servers, mobile phones, computers, and the like as an example, fig. 1 shows one of application scenarios of the error-code-meter-based jitter tolerance testing method of the present invention, referring to fig. 1, an electronic device 110 may be in communication connection with an error code meter 120, the electronic device 110 may display a jitter signal configuration interface to a user, and the user may configure a jitter signal through a jitter signal configuration control in the jitter signal configuration interface; the electronic device 110 determines a jitter signal configuration parameter configured by a user in response to a first configuration operation of the user facing the jitter signal configuration control, then generates jitter signal test data according to the jitter signal configuration parameter, and triggers a test code generation module of the error code analyzer 120 to generate a test sequence carrying a jitter signal based on the jitter signal test data. The error code meter 120 sends the test sequence carrying the jitter signal to the system under test 130, the test sequence carrying the jitter signal passes through the system under test 130 and then loops back to the error code meter 120, and the error code meter 120 compares and analyzes the sent test sequence carrying the jitter signal and the received signal to obtain an error code detection result. The electronic device 110 obtains the error detection result from the error detector 120, and then generates a jitter tolerance test result of the system under test 130 according to the error detection result.
Fig. 2 schematically shows one of the flow diagrams of the error-detector-based jitter tolerance testing method according to the embodiment of the present invention, and referring to fig. 2, the error-detector-based jitter tolerance testing method may include the following steps 210 to 260.
Step 210: and displaying a jitter signal configuration interface, wherein the jitter signal configuration interface comprises a jitter signal configuration control.
The error detector or an electronic device communicatively coupled to the error detector may display a dither signal configuration interface on a display screen, where the dither signal configuration interface may include a dither signal configuration control. For example, a first configuration control for configuring a jitter type, a second configuration control for configuring a jitter frequency range, and a third configuration control for configuring a jitter amplitude range may be included in the jitter signal configuration interface.
Step 220: in response to a first configuration operation of the dither-signal-oriented configuration control, a dither-signal configuration parameter is determined.
Illustratively, the jitter signal configuration parameters may include a jitter type, a jitter frequency range and a jitter amplitude range, and accordingly, the jitter signal configuration interface may include a first configuration control for configuring the jitter type, a second configuration control for configuring the jitter frequency range and a third configuration control for configuring the jitter amplitude range. A user can configure the jitter type of the jitter signal through the first configuration control, configure the jitter frequency range of the jitter signal through the second configuration control, configure the jitter amplitude range of the jitter signal through the third configuration control, and the error code meter or an electronic device in communication connection with the error code meter can determine the jitter type, the jitter frequency range and the jitter amplitude range of the jitter signal in response to the configuration operations.
For example, the first configuration control may provide the user with selectable jitter types in a menu-selected manner, the jitter types may include random jitter and deterministic jitter, wherein deterministic jitter may include at least one of periodic jitter, data dependent jitter, and duty cycle jitter, and a user may select one of the jitter types to complete the configuration of the jitter signal for the jitter type.
Step 230: and generating jitter signal test data according to the jitter signal configuration parameters, and triggering a test code generation module of the error code analyzer to generate a test sequence carrying the jitter signal according to the jitter signal test data.
In an exemplary embodiment, the jitter signal configuration parameters may include a jitter type, a jitter frequency range, and a jitter amplitude range, and the jitter signal test data may be automatically generated according to the jitter signal configuration parameters, and the jitter signal test data may be generated at a fast speed, and may be applied to various practical environments with high test efficiency. Specifically, generating jitter signal test data according to the jitter signal configuration parameters, and triggering a test code generation module of the error code analyzer to generate a test sequence carrying a jitter signal according to the jitter signal test data may include: performing frequency scanning within a jitter frequency range according to a set frequency scanning mode and a set jitter frequency point number to obtain jitter frequency data; generating jitter amplitude data step by step according to the configured jitter amplitude range and the set jitter amplitude; and a test code generation module of the trigger error code meter generates a test sequence carrying the jitter signal according to the jitter type, the jitter frequency data and the jitter amplitude data. For example, the test code generation module of the error detector may include a jitter signal generation circuit, where the jitter signal generation circuit may inject a jitter signal into the test code generation module, and may control the jitter signal generation circuit to inject a corresponding jitter signal into the test code generation module by using the configured jitter type and the generated jitter frequency data and jitter amplitude data, so that the test code generation module of the error detector generates a test sequence carrying the jitter signal.
The set frequency scanning mode may include a logarithmic scanning mode or a linear scanning mode, for example. For example, the set frequency scanning mode may be configured by a user, for example, a frequency scanning mode configuration control may be provided for the user in the dither signal configuration interface, and the user may perform a fourth configuration operation through the frequency scanning mode configuration control, for example, select a desired frequency scanning mode from the provided selectable frequency scanning modes through the frequency scanning mode configuration control, and determine the set frequency scanning mode in response to the fourth configuration operation.
For example, the set jitter frequency point may be a default jitter frequency point of an error code meter or an electronic device, or may be configured by a user, and correspondingly, the jitter signal configuration interface may further include a jitter frequency point configuration control, and the user may configure the jitter frequency point through the jitter frequency point configuration control to obtain the set jitter frequency point.
For example, the set step of the jitter amplitude may be a default step of the jitter amplitude of the error detector or the electronic device, or may be configured by a user, and accordingly, the configuration interface of the jitter signal may further include a step configuration control of the jitter amplitude, and the user may configure the step of the jitter amplitude through the step configuration control of the jitter amplitude, so as to obtain the set step of the jitter amplitude.
In an example embodiment, the configuration of the frequency points of the desired test may be performed by the user. Specifically, the dither signal configuration control in the dither signal configuration interface may include a first configuration control configured with a dither type, a third configuration control configured with a dither amplitude range, and a dither frequency input control, and accordingly, determining the dither signal configuration parameter in response to the first configuration operation facing the dither signal configuration control may include: responding to configuration operation facing to the first configuration control and the third configuration control, and determining a jitter type and a jitter amplitude range; and generating a dither frequency list in response to an input operation oriented to the dither frequency input control. Correspondingly, generating jitter signal test data according to the jitter signal configuration parameters, and triggering a test code generation module of the error code analyzer to generate a test sequence carrying the jitter signal according to the jitter signal test data may include: reading jitter frequency data from the jitter frequency list; generating jitter amplitude data step by step according to the jitter amplitude range and the set jitter amplitude; and a test code generation module of the trigger error code meter generates a test sequence carrying the jitter signal according to the jitter type, the jitter frequency data and the jitter amplitude data. In this way, the user can configure the frequency points to be tested, so that only the frequency points concerned can be tested, and the frequency points not required to be tested can be skipped, thereby having strong pertinence. For example, when a system to be tested is tested for the first time, a mode of automatically generating jitter signal test data may be adopted for testing, for example, 10 test frequency points are automatically generated, a subsequent test may be adjusted according to the test results of the 10 frequency points, for example, the second frequency point and the sixth frequency point do not pass the test, a frequency list may be manually configured in the subsequent test, only the two frequency points are tested, the 10 frequency points may be fully tested once after the two frequency points pass the test or the test frequency points may be configured as required, the test is flexible, and various test scenarios may be handled.
For example, the step of generating, by the test code generation module of the trigger error detector, a test sequence carrying a jitter signal according to the jitter type, the jitter frequency data, and the jitter amplitude data may include: sequentially reading the jitter amplitude in the jitter amplitude data at each jitter frequency in the jitter frequency data; and when a jitter amplitude is read, injecting the jitter frequency and the read jitter amplitude into a test code generation module of the error code meter, triggering the test code generation module of the error code meter to generate a test sequence according to the jitter frequency, the jitter amplitude and the jitter type, and obtaining the test sequence carrying the jitter signal.
Step 240: and obtaining an error code detection result obtained by testing the tested system by the error code tester based on the test sequence carrying the jitter signal.
After a test code generation module of the error code instrument generates a test sequence carrying the jitter signal according to the jitter signal test data, the test sequence carrying the jitter signal is sent to a receiving end of a tested system and returns to the error code instrument after passing through the tested system, and the error code instrument can compare the received signal with the sent test sequence carrying the jitter signal, detect the error code in the signal and obtain an error code detection result.
Step 250: and generating a jitter tolerance test result of the tested system according to the error code detection result.
After the error code detection result is obtained, the error code detection result can be judged to determine whether the current test is passed, if the current test is passed, the passing jitter frequency and jitter amplitude are recorded and polling is carried out to the next test data for continuous judgment until the maximum passing jitter amplitude is obtained.
In an example embodiment, generating the jitter tolerance test result of the system under test based on the error detection result may include: acquiring the number of error codes in an error code detection result to obtain a first number of error codes; determining whether the current jitter amplitude passes the test under the current jitter frequency according to the first error code number, the set confidence coefficient, the set maximum error code number and the set error rate to obtain a confidence coefficient test result; and determining the maximum jitter amplitude passing the test under each jitter frequency within the configured jitter type and jitter frequency range based on the confidence test result to obtain the jitter tolerance test result of the tested system.
For example, for each jitter frequency, sequentially reading jitter amplitude in the jitter amplitude data, when a jitter amplitude is read, generating a test sequence carrying a jitter signal according to a configured jitter type by using the jitter frequency and the jitter amplitude as current test data, sending the test sequence to a tested system, returning to an error code meter after the tested system, comparing the received signal with the sent test sequence by the error code meter, and if a certain bit element is inconsistent, adding one to the error code count to obtain a first error code number. The total number of the code elements required to be detected for completing one test can be limited through the set confidence degree, the set error rate and the set maximum number of the error codes, wherein the set maximum number of the error codes represents the maximum number of the error codes allowed to be generated in the total number of the code elements. In one test, if the first error code number exceeds the set maximum error code number, the current test data fails to pass the test, and the test can be ended; if all code elements in the test are detected, the first error code number is not more than the set maximum error code number all the time, and then the current test data passes the test. By using confidence levels for testing, more data points can be tested at the same time while ensuring the quality of the test.
Assuming that the set confidence is P, the set error rate is Q, and the set maximum number of error codes is E, the total number N of symbols to be detected for completing one test can be determined according to a confidence formula, where the confidence formula can be expressed as:
where k is the sum variable.
For example, the set confidence level may be a preset default confidence level, or may be configured by the user as needed. For example, a confidence level configuration control may be provided for a user in the dither signal configuration interface, and the user may perform a second configuration operation through the confidence level configuration control, such as inputting a confidence level or selecting a confidence level from an optional confidence level list, and the set confidence level may be determined according to the second configuration operation of the user.
For example, the set error rate may be a preset default error rate, or may be configured by a user as needed. For example, a bit error rate configuration control may be provided in the jitter signal configuration interface for a user, and the user may perform a third configuration operation through the bit error rate configuration control, such as inputting a bit error rate or selecting a bit error rate from an optional bit error rate list, and the set bit error rate may be determined in response to the third configuration operation of the user.
For example, the set maximum number of errors may be a preset default value, or may be configured by the user according to the test requirement. For example, a maximum error code number configuration control may be provided in the dither signal configuration interface, and the user may input the maximum error code number through the maximum error code number configuration control, and in response to the input operation of the user, the set maximum error code number may be determined.
In an example embodiment, the number of detected symbols and the maximum number of errors allowed in the symbols of the number of symbols may be directly configured by the user. Specifically, the jitter signal configuration interface may further include a symbol number configuration control and an error number threshold configuration control, and generating a jitter tolerance test result of the system under test according to the error detection result may include: acquiring the number of error codes in a specified number of code elements in the error code detection result to obtain a second number of error codes, wherein the specified number is determined based on configuration operation in the code element number configuration control; acquiring an error code number threshold, wherein the error code number threshold is determined based on configuration operation in an error code number threshold configuration control; determining whether the jitter amplitude read under the jitter frequency passes the test or not according to the second error code number and the error code number threshold value to obtain a test result to be processed; and determining the maximum jitter amplitude passing the test under each jitter frequency in the range of the jitter type and the jitter frequency based on the test result to be processed to obtain the jitter tolerance test result of the tested system. The specified number configured in the code element number configuration control represents the number of detected code elements, and the error code number threshold represents the maximum allowable error code number in the code elements with the specified number.
For example, a second error number in a specified number of code elements in the error detection result may be compared with the error number threshold, if the second error number exceeds the error number threshold, the current test data fails to be tested, and if the second error number does not exceed the error number threshold, the current test data passes to be tested.
In an example embodiment, in the testing process, the testing time of the tested data in the jitter frequency data and the jitter amplitude data may be obtained in real time or periodically to obtain the testing reference time, the testing time of the data which has not been tested is calculated according to the testing reference time and the data which has not been tested in the jitter frequency data and the jitter amplitude data to obtain the testing remaining time, and then the testing remaining time is displayed. Therefore, the time required by the test can be displayed to the user in real time, so that the user can conveniently make reasonable test arrangement and the test efficiency is improved. For example, the jitter frequency data and the jitter amplitude data together form M test data, the time taken to acquire M (M is less than M) data of the test data is t, the average time for testing one data is t/M, and the time taken to test the remaining M-M data is t/M (M-M). It should be noted that, this is only an example, and is not used to limit the calculation method of the test remaining time, and the test remaining time may be obtained by other methods.
Step 260: and outputting the jitter tolerance test result of the tested system.
For example, the jitter tolerance test result of the system under test may be output in the form of a graph. For example, fig. 3 is a diagram illustrating a jitter tolerance test result of a system under test in a graph, where the graph represents a jitter tolerance curve depicting a maximum jitter amplitude that the system under test may pass at each jitter frequency within a configured jitter type and a configured jitter frequency range. By way of example, all the possible jitter amplitudes at the respective jitter frequencies can also be shown in the graph, for example in the form of dots in fig. 3. Illustratively, a certain point may also be selected in fig. 3, and specific values of the jitter frequency and the jitter amplitude corresponding to the point are displayed.
For another example, fig. 4 exemplarily shows a schematic diagram that outputs the jitter tolerance test result of the system under test in the form of a data table, in which specific values of the maximum jitter amplitude that the system under test can pass through at each jitter frequency within the configured jitter frequency range and the configured jitter type can be checked. Illustratively, the graph shown in fig. 3 and the data table shown in fig. 4 may be output simultaneously.
The jitter tolerance testing method based on the error code meter can realize the jitter tolerance test of the tested system, can simulate various working environments and various working conditions under a real scene by providing a jitter signal configuration function and taking the jitter signal as a variable, and further can pre-judge the tolerance of the tested system to various jitter environments before the tested system is deployed on the spot so as to improve the performance of the tested system in advance, avoid the situation that the tested system does not reach the standard after passing the laboratory test and being deployed on the spot, simultaneously can reduce the test frequency of homogenization and optimize the test efficiency.
Fig. 5 illustrates a second flowchart of the error-detector-based jitter tolerance testing method according to the embodiment of the present invention, and referring to fig. 5, the error-detector-based jitter tolerance testing method may include the following steps 501 to 513.
Step 501: and displaying a jitter signal configuration interface.
Step 502: and determining a jitter signal configuration parameter in response to a first configuration operation of a jitter signal configuration control in the jitter signal configuration-oriented interface.
Step 503: and generating jitter signal test data according to the jitter signal configuration parameters, wherein the jitter signal test data comprises jitter frequency data and jitter amplitude data.
Step 504: it is determined whether the frequency index value is greater than the total number of dithering frequency data. If yes, ending the test; otherwise, step 505 is performed.
Step 505: and reading the jitter frequency corresponding to the frequency index value from the jitter frequency data.
Step 506: it is determined whether the amplitude index value is greater than the total number of dither amplitude data. If yes, go to step 507, otherwise go to step 508.
Step 507: the frequency index value is incremented by 1. Thereafter, execution returns to step 504.
Step 508: and reading the jitter amplitude corresponding to the amplitude index value from the jitter amplitude data.
Step 509: and triggering a test code generation module of the error code meter to generate a test sequence carrying the jitter signal according to the read jitter frequency and the read jitter amplitude.
Step 510: and obtaining an error code detection result obtained by testing the tested system by the error code tester based on the test sequence carrying the jitter signal.
Step 511: and determining whether the jitter amplitude passes the test under the jitter frequency according to the error code detection result and the set confidence coefficient to obtain a confidence coefficient test result.
Step 512: and recording a confidence test result.
Step 513: the amplitude index value is incremented by 1. Thereafter, execution returns to step 506.
And the above steps are executed in a circulating way until the jitter signal test data is tested, and at the moment, the maximum jitter amplitude which can pass the test of the tested system under the jitter frequencies in the set jitter type and jitter frequency range can be obtained according to the recorded confidence test result, so that the jitter tolerance test result of the tested system is obtained.
On one hand, the jitter tolerance testing method based on the error code instrument provided by the embodiment of the invention can generate all jitter signal testing data before the error code instrument is tested, thereby being convenient for data acquisition in subsequent testing and also being capable of accurately estimating the testing completion time, for example, the time required by the test of the residual untested data can be estimated according to the time spent by the tested data in the testing process and then displayed to a user. On the other hand, a user can configure the jitter signal according to different configuration modes, flexibly obtain a plurality of test schemes, enable a plurality of tested systems or devices in the tested systems to correspond to the same test scheme, and also test the performance of one tested system or one device in the tested system under different environments. Moreover, the jitter tolerance testing method based on the error code instrument provided by the embodiment of the invention can be realized by using different programming languages, can also be designed into a dynamic library, can be conveniently transplanted into different environments, and can be smoothly transplanted and efficiently operated no matter the system is a general computer platform or an embedded system, or no matter the Windows platform or a Linux platform. In addition, the jitter tolerance testing method based on the error code detector provided by the embodiment of the invention can be executed in parallel in multi-channel equipment, so that the testing efficiency is improved.
The jitter tolerance testing device based on the error code instrument provided by the invention is described below, and the jitter tolerance testing device based on the error code instrument described below and the jitter tolerance testing method based on the error code instrument described above can be referred to correspondingly.
Fig. 6 is a schematic structural diagram illustrating an apparatus for testing jitter tolerance based on an error code analyzer according to the present invention, and referring to fig. 6, the apparatus 600 for testing jitter tolerance based on an error code analyzer may include a display module 610, a configuration module 620, a first generation module 630, an acquisition module 640, a second generation module 650, and an output module 660. The display module 610 may be configured to display a jitter signal configuration interface, where the jitter signal configuration interface may include a jitter signal configuration control; the configuration module 620 may be configured to determine a dither signal configuration parameter in response to a first configuration operation of the dither-signal-oriented configuration control; the first generating module 630 may be configured to generate jitter signal test data according to the jitter signal configuration parameter, and trigger a test code generating module of the error code analyzer to generate a test sequence carrying a jitter signal according to the jitter signal test data; the obtaining module 640 may be configured to obtain an error code detection result obtained by the error code tester testing the system under test based on the test sequence carrying the jitter signal; the second generating module 650 may be configured to generate a jitter tolerance test result of the system under test according to the error detection result; the output module 660 may be used to output jitter tolerance test results of the system under test.
In an example embodiment, the jitter signal configuration parameters may include a jitter type, a jitter frequency range, and a jitter amplitude range, and the first generating module 630 may include a scanning unit, a first generating unit, and a triggering unit; the scanning unit can be used for carrying out frequency scanning in a jitter frequency range according to a set frequency scanning mode and a set jitter frequency point number to obtain jitter frequency data; the first generating unit may be configured to generate dither amplitude data step by step according to the dither amplitude range and the set dither amplitude; the triggering unit can be used for triggering a test code generation module of the error code instrument to generate a test sequence carrying a jitter signal according to the jitter type, the jitter frequency data and the jitter amplitude data.
In an example embodiment, the dither signal configuration control may include a first configuration control configured with a dither type, a third configuration control configured with a dither amplitude range, and a dither frequency input control, and the configuration module 620 may be specifically configured to determine the dither type and the dither amplitude range in response to a configuration operation facing the first configuration control and the third configuration control, and generate the dither frequency list in response to an input operation facing the dither frequency input control. The first generation module 630 may include a reading unit, a second generation unit, and a trigger unit; wherein the reading unit may be configured to read the dithering frequency data from the dithering frequency list; the second generating unit may be configured to generate dither amplitude data step by step according to the dither amplitude range and the set dither amplitude; the triggering unit can be used for triggering a test code generation module of the error code instrument to generate a test sequence carrying a jitter signal according to the jitter type, the jitter frequency data and the jitter amplitude data.
In one example embodiment, the trigger unit may include a read subunit and a trigger subunit. The reading subunit may be configured to, at each dither frequency in the dither frequency data, sequentially read the dither amplitude in the dither amplitude data; the trigger subunit may be configured to inject the jitter frequency and the read jitter amplitude into a test code generation module of the error code analyzer every time the read subunit reads a jitter amplitude, and the test code generation module of the error code analyzer generates a test sequence according to the jitter type, the jitter frequency, and the read jitter amplitude, so as to obtain a test sequence carrying a jitter signal.
In an example embodiment, the second generating module 650 may include a first obtaining unit, a first determining unit, and a second determining unit. The first obtaining unit may be configured to obtain the number of error codes in the error code detection result to obtain a first number of error codes; the first determining unit may be configured to determine whether the jitter amplitude read at the jitter frequency passes the test according to the first number of error codes, the set confidence level, the set maximum number of error codes, and the set error rate, so as to obtain a confidence level test result; the second determining unit may be configured to determine, based on the confidence test result, a maximum jitter amplitude that the test passes at each jitter frequency within the range of the jitter type and the jitter frequency, and obtain a jitter tolerance test result of the system under test.
In an example embodiment, a confidence configuration control may be further included in the dither signal configuration interface, and the configuration module 620 may be further configured to determine the set confidence level in response to a second configuration operation facing the confidence configuration control.
In an example embodiment, the jitter signal configuration interface may further include a symbol number configuration control and an error number threshold configuration control, and the second generating module 650 may include a second obtaining unit, a third determining unit, and a fourth determining unit. The second obtaining unit may be configured to obtain the number of error codes in a specified number of code elements in the error code detection result, to obtain a second number of error codes, where the specified number is determined based on the configuration operation in the code element number configuration control; the third obtaining unit may be configured to obtain an error number threshold, where the error number threshold is determined based on a configuration operation in the error number threshold configuration control; the third determining unit may be configured to determine whether the jitter amplitude read at the jitter frequency passes the test according to the second error code number and the error code number threshold, so as to obtain a test result to be processed; the fourth determining unit may be configured to determine, based on the test result to be processed, a maximum jitter amplitude that passes the test at each jitter frequency within the range of the jitter type and the jitter frequency, so as to obtain a jitter tolerance test result of the system under test.
In an example embodiment, the jitter signal configuration interface may further include a frequency scanning mode configuration control, and the configuration module 620 may be further configured to determine the set frequency scanning mode in response to a fourth configuration operation facing the frequency scanning mode configuration control.
In an example embodiment, the error-detector-based jitter tolerance testing apparatus 600 may further include a calculation module. The obtaining module 640 may further be configured to obtain test time of the tested data in the jitter frequency data and the jitter amplitude data, so as to obtain test reference time; the calculation module can be used for calculating the test time of the data which is not tested completely according to the test reference time, the jitter frequency data and the data which is not tested completely in the jitter amplitude data to obtain the test remaining time; the display module 610 may also be used to display the test remaining time.
Fig. 7 illustrates a physical structure diagram of an electronic device, and as shown in fig. 7, the electronic device may include: a processor (processor) 710, a Communication Interface (Communication Interface) 720, a memory (memory) 730 and a Communication bus 740, wherein the processor 710, the Communication Interface 720 and the memory 730 communicate with each other via the Communication bus 740. Processor 710 may invoke logic instructions in memory 730 to perform the steps of the error-detector-based jitter tolerance testing methods provided by the above embodiments, which may include, for example: displaying a jitter signal configuration interface, wherein the jitter signal configuration interface comprises a jitter signal configuration control; determining a dither signal configuration parameter in response to a first configuration operation of a dither signal-oriented configuration control; generating jitter signal test data according to the jitter signal configuration parameters, and triggering a test code generation module of the error code instrument to generate a test sequence carrying a jitter signal according to the jitter signal test data; obtaining an error code detection result obtained by testing a tested system by an error code tester based on a test sequence carrying a jitter signal; generating a jitter tolerance test result of the tested system according to the error code detection result; and outputting the jitter tolerance test result of the tested system.
In addition, the logic instructions in the memory 730 can be implemented in the form of software functional units and stored in a computer readable storage medium when the software functional units are sold or used as independent products. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
In another aspect, the present invention also provides a computer program product, where the computer program product includes a computer program, the computer program may be stored on a non-transitory computer readable storage medium, and when the computer program is executed by a processor, the computer is capable of executing the steps of the error-detector-based jitter tolerance testing method provided in the foregoing embodiments, for example, the steps may include: displaying a jitter signal configuration interface, wherein the jitter signal configuration interface comprises a jitter signal configuration control; determining a dither signal configuration parameter in response to a first configuration operation of a dither signal-oriented configuration control; generating jitter signal test data according to the jitter signal configuration parameters, and triggering a test code generation module of the error code detector to generate a test sequence carrying a jitter signal according to the jitter signal test data; obtaining an error code detection result obtained by testing a tested system by an error code tester based on a test sequence carrying a jitter signal; generating a jitter tolerance test result of the tested system according to the error code detection result; and outputting the jitter tolerance test result of the tested system.
In yet another aspect, the present invention further provides a non-transitory computer-readable storage medium, on which a computer program is stored, and the computer program, when executed by a processor, implements the steps of the error-detector-based jitter tolerance testing method provided by the above methods, for example, the method may include: displaying a jitter signal configuration interface, wherein the jitter signal configuration interface comprises a jitter signal configuration control; determining a dither signal configuration parameter in response to a first configuration operation of a dither signal-oriented configuration control; generating jitter signal test data according to the jitter signal configuration parameters, and triggering a test code generation module of the error code detector to generate a test sequence carrying a jitter signal according to the jitter signal test data; obtaining an error code detection result obtained by testing a tested system by an error code tester based on a test sequence carrying a jitter signal; generating a jitter tolerance test result of the tested system according to the error code detection result; and outputting the jitter tolerance test result of the tested system.
The above-described embodiments of the apparatus are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment may be implemented by software plus a necessary general hardware platform, and may also be implemented by hardware. With this understanding in mind, the above-described technical solutions may be embodied in the form of a software product, which can be stored in a computer-readable storage medium such as ROM/RAM, magnetic disk, optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the methods described in the embodiments or some parts of the embodiments.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (12)
1. A jitter tolerance testing method based on an error code detector is applied to the error code detector or an electronic device which is in communication connection with the error code detector, and the method comprises the following steps:
displaying a jitter signal configuration interface, wherein the jitter signal configuration interface comprises a jitter signal configuration control, and the jitter signal configuration control comprises a first configuration control for configuring a jitter type, a second configuration control for configuring a jitter frequency range, a third configuration control for configuring a jitter amplitude range and a jitter frequency input control for configuring a frequency point;
determining a dither signal configuration parameter in response to a first configuration operation facing the dither signal configuration control;
generating jitter signal test data according to the jitter signal configuration parameters, and triggering a test code generation module of the error code detector to generate a test sequence carrying a jitter signal according to the jitter signal test data;
obtaining an error code detection result, wherein the error code detection result is obtained by comparing the test sequence carrying the jitter signal with a signal received from a tested system after the test sequence carrying the jitter signal is sent to the tested system by the error code meter;
generating a jitter tolerance test result of the tested system according to the error code detection result;
outputting a jitter tolerance test result of the system under test;
wherein said determining a dither signal configuration parameter in response to a first configuration operation facing said dither signal configuration control comprises:
responding to configuration operations facing the first configuration control, the second configuration control and the third configuration control, and determining a jitter type, a jitter frequency range and a jitter amplitude range to obtain a jitter signal configuration parameter;
or, in response to the configuration operations facing the first configuration control and the third configuration control, determining a jitter type and a jitter amplitude range, and in response to the input operation facing the jitter frequency input control, generating a jitter frequency list, and determining the jitter type, the jitter amplitude range, and the jitter frequency list as the jitter signal configuration parameters.
2. The method of claim 1, wherein the jitter signal configuration parameters include a jitter type, a jitter frequency range, and a jitter amplitude range, and wherein the generating the jitter signal test data according to the jitter signal configuration parameters and triggering the test code generation module of the error detector to generate the test sequence carrying the jitter signal according to the jitter signal test data comprises:
performing frequency scanning in the jitter frequency range according to a set frequency scanning mode and a set jitter frequency point number to obtain jitter frequency data;
generating dithering amplitude data step by step according to the dithering amplitude range and the set dithering amplitude;
and a test code generation module of the triggering error code instrument generates a test sequence carrying a jitter signal according to the jitter type, the jitter frequency data and the jitter amplitude data.
3. The method of claim 1, wherein the jitter signal configuration parameters include a jitter type, a jitter amplitude range, and a jitter frequency list, and the generating the jitter signal test data according to the jitter signal configuration parameters and triggering the test code generating module of the error detector to generate the test sequence carrying the jitter signal according to the jitter signal test data comprises:
reading jitter frequency data from the list of jitter frequencies;
generating dithering amplitude data step by step according to the dithering amplitude range and the set dithering amplitude;
and a test code generation module of the trigger error code meter generates a test sequence carrying a jitter signal according to the jitter type, the jitter frequency data and the jitter amplitude data.
4. The error-code-instrument-based jitter tolerance testing method of claim 2 or 3, wherein the step of generating the test sequence carrying the jitter signal by the test code generation module of the trigger error-code instrument according to the jitter type, the jitter frequency data and the jitter amplitude data comprises:
sequentially reading the jitter amplitude in the jitter amplitude data at each jitter frequency in the jitter frequency data;
and when a jitter amplitude is read, injecting the jitter frequency and the read jitter amplitude into a test code generation module of the error code detector, triggering the test code generation module of the error code detector to generate a test sequence according to the jitter type, the jitter frequency and the read jitter amplitude, and obtaining the test sequence carrying jitter signals.
5. The method of claim 4, wherein the generating the jitter tolerance test result of the system under test according to the error detection result comprises:
acquiring the number of error codes in the error code detection result to obtain a first number of error codes;
determining whether the jitter amplitude read under the jitter frequency passes the test or not according to the first error code number, the set confidence coefficient, the set maximum error code number and the set error rate to obtain a confidence coefficient test result;
and determining the maximum jitter amplitude passing the test under each jitter frequency in the jitter type and the jitter frequency range based on the confidence test result to obtain the jitter tolerance test result of the tested system.
6. The error-detector-based jitter tolerance testing method of claim 5, wherein said jitter signal configuration interface further comprises a confidence level configuration control, said error-detector-based jitter tolerance testing method further comprising:
determining the set confidence level in response to a second configuration operation facing the confidence level configuration control.
7. The method of claim 4, wherein the jitter tolerance test interface further comprises a symbol number configuration control and an error number threshold configuration control, and the generating the jitter tolerance test result of the system under test according to the error detection result comprises:
acquiring the number of error codes in a specified number of code elements in the error code detection result to obtain a second number of error codes, wherein the specified number is determined based on the configuration operation in the code element number configuration control;
acquiring an error code number threshold, wherein the error code number threshold is determined based on configuration operation in the error code number threshold configuration control;
determining whether the jitter amplitude read under the jitter frequency passes the test or not according to the second error code number and the error code number threshold value to obtain a test result to be processed;
and determining the maximum jitter amplitude passing the test under each jitter frequency in the jitter type and the jitter frequency range based on the test result to be processed to obtain the jitter tolerance test result of the tested system.
8. The error-detector-based jitter tolerance testing method of claim 2, wherein the jitter signal configuration interface further comprises a frequency scanning configuration control, and the error-detector-based jitter tolerance testing method further comprises:
and determining the set frequency scanning mode in response to a fourth configuration operation facing the frequency scanning mode configuration control.
9. The error-resilient jitter tolerance testing method of claim 2 or 3, wherein the error-resilient jitter tolerance testing method further comprises:
obtaining the test time of the tested data in the jitter frequency data and the jitter amplitude data to obtain test reference time;
calculating the test time of the data which is not tested completely according to the test reference time, the jitter frequency data and the data which is not tested completely in the jitter amplitude data to obtain the test remaining time;
and displaying the test remaining time.
10. An error detector-based jitter tolerance testing apparatus, for use in an error detector or an electronic device communicatively coupled to an error detector, the apparatus comprising:
the display module is used for displaying a jitter signal configuration interface, the jitter signal configuration interface comprises a jitter signal configuration control, and the jitter signal configuration control comprises a first configuration control for configuring a jitter type, a second configuration control for configuring a jitter frequency range, a third configuration control for configuring a jitter amplitude range and a jitter frequency input control for configuring a frequency point;
the configuration module is used for responding to a first configuration operation facing the jitter signal configuration control and determining a jitter signal configuration parameter;
the first generation module is used for generating jitter signal test data according to the jitter signal configuration parameters and triggering a test code generation module of the error code detector to generate a test sequence carrying a jitter signal according to the jitter signal test data;
the error code detection result is obtained by comparing the test sequence carrying the jitter signal with a signal received from a tested system after the test sequence carrying the jitter signal is sent to the tested system by the error code meter;
the second generation module is used for generating a jitter tolerance test result of the tested system according to the error code detection result;
the output module is used for outputting a jitter tolerance test result of the system to be tested;
wherein the configuration module is specifically configured to: responding to configuration operations facing the first configuration control, the second configuration control and the third configuration control, and determining a jitter type, a jitter frequency range and a jitter amplitude range to obtain a jitter signal configuration parameter; or, in response to the configuration operations facing the first configuration control and the third configuration control, determining a jitter type and a jitter amplitude range, and in response to the input operation facing the jitter frequency input control, generating a jitter frequency list, and determining the jitter type, the jitter amplitude range, and the jitter frequency list as the jitter signal configuration parameters.
11. An electronic device comprising a memory, a processor, and a computer program stored on the memory and executed on the processor, wherein the processor, when executing the computer program, implements the error-resilient jitter tolerance testing method of any of claims 1 to 9.
12. A non-transitory computer-readable storage medium, on which a computer program is stored, wherein the computer program, when executed by a processor, implements the error-resilient jitter tolerance testing method according to any of claims 1 to 9.
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