CN114779915B

CN114779915B - Interface detection module and method, power management chip and electronic equipment

Info

Publication number: CN114779915B
Application number: CN202210377980.1A
Authority: CN
Inventors: 高桂华; 姜艳
Original assignee: Shanghai Awinic Technology Co Ltd
Current assignee: Shanghai Awinic Technology Co Ltd
Priority date: 2022-04-06
Filing date: 2022-04-06
Publication date: 2024-02-02
Anticipated expiration: 2042-04-06
Also published as: CN114779915A

Abstract

The application discloses an interface detection module and method, a power management chip and electronic equipment; the interface detection circuit includes: a control circuit, a first detection circuit and a second detection circuit; the detection end of the first detection circuit is respectively connected with a first port and a second port of the interface to be detected, the output end of the first detection circuit is connected with a first signal reading end of the control circuit and is used for detecting whether the interface to be detected is connected with opposite equipment or not, and a first detection result is sent to the control circuit; the first control end of the control circuit is connected with the control end of the second detection circuit and is used for sending a first enabling signal to the second detection circuit after the first detection result is read; the second detection circuit is connected with a second signal reading end of the control circuit and is used for detecting the interface characteristics of the interface to be detected after the interface to be detected is accessed to the opposite equipment after receiving the first enabling signal, generating a second detection result and sending the second detection result to the control circuit. The method and the device can reduce power consumption in the interface detection process.

Description

Interface detection module and method, power management chip and electronic equipment

Technical Field

The application relates to the technical field of circuits, in particular to an interface detection module and method, a power management chip and electronic equipment.

Background

The USB Type-C Power Delivery protocol (called PD protocol for short) is a Power transmission protocol based on a specific interface (such as Type-C interface). The PD protocol can support 100W (20V/5A) power transmission at maximum, and simultaneously supports power supply role conversion, so that the power supply requirements of most electronic equipment can be met, and the PD protocol can be widely applied to various electronic equipment. Taking the Type-C interface as an example for illustration, in Type-C communication of the PD protocol, the first step is to identify the connection of the Type-C device. The Type-C connection detection is realized through two CC channels of a Type-C interface and VBUS (power connection), only one path of CC d port in the corresponding cable is communicated, CC1 or CC2 is communicated, and the other path of CC is VCONN for supplying power to E-Mark. According to the PD protocol specification, the device types adopting the specific interface include an SNK (electric device), an SRC (power supply device), or a DRP (dual role port device, which can be used as an SRC to detect the SNK, or can be used as the SNK to detect the SRC), and the power is classified into several levels of 0.5A, 1.5A, 3A, and the like. The Type-C device needs to identify the Type and power of the access device according to the voltage on the CC line (e.g., the power connection using the Type-C interface) after connection. This requires a method of identifying the connection of the partner device such as the Type-C device. In the traditional interface detection scheme, although the identification circuit of the USB Type-C interface can identify Type-C equipment, the identification circuit needs to adopt a field effect transistor and an electronic switch, more components are in the circuit, the circuit structure is complex, the identification and related judgment processes are complex, and relatively high power consumption is required in the corresponding detection process. The automatic recognition circuit of the ADC Type-C is provided with the ADC, and the voltage of two CC ports is tested through the ADC (analog-to-digital conversion module), so that the voltage range of the two CC ports is judged, and the connection condition of the Type-C interface is obtained. It can be seen that the conventional interface detection scheme has a problem of high power consumption.

Disclosure of Invention

In view of this, the application provides an interface detection module and method, a power management chip and an electronic device, so as to solve the technical problem of high power consumption in the traditional interface detection scheme.

The first aspect of the application provides an interface detection circuit, which comprises a control circuit, a first detection circuit and a second detection circuit;

the detection end of the first detection circuit is respectively connected with a first port and a second port of an interface to be detected, the output end of the first detection circuit is connected with a first signal reading end of the control circuit and is used for detecting whether the interface to be detected is connected with opposite equipment or not, and after the interface to be detected is connected with the opposite equipment, a first detection result is sent to the control circuit;

the first control end of the control circuit is connected with the control end of the second detection circuit and is used for sending a first enabling signal to the second detection circuit after the first detection result is read;

the second detection circuit is connected with a second signal reading end of the control circuit and is used for detecting the interface characteristics of the interface to be detected after the interface to be detected is accessed to the opposite equipment after receiving the first enabling signal, generating a second detection result and sending the second detection result to the control circuit.

Optionally, the control circuit further includes a second control end, and the second control end is connected to the control end of the first detection circuit; the control circuit is further configured to generate a second enable signal for controlling the first detection circuit to detect whether the interface to be detected is connected to the opposite device when the first detection result is not read, and transmit the second enable signal to the first detection circuit through the second control terminal.

Optionally, the interface to be detected includes a Type-C interface; the first detection circuit comprises a first comparator, a second comparator and an AND gate; the first input end of the first comparator is connected with a first voltage, the second input end of the first comparator is connected with a first port and a second port which are respectively connected with a Type-C interface, the output end of the first comparator is connected with the first input end of the AND gate, the first input end of the second comparator is connected with the first port and the second port which are respectively connected with the Type-C interface, the second input end of the second comparator is connected with a second voltage, the output end of the second comparator is connected with the second input end of the AND gate, the output end of the AND gate is connected with a first signal reading end of the control circuit, the first port and the second port correspond to a third voltage, and the first voltage, the third voltage and the second voltage decrease in sequence.

Optionally, the first detection circuit further includes a voltage dividing unit; one side of the voltage dividing end of the voltage dividing unit is connected with the first port and the second port, and the other side of the voltage dividing end of the voltage dividing unit is connected with the second input end of the first comparator and the first input end of the second comparator and is used for providing the third voltage.

Optionally, the interface detection module further comprises a data transmission circuit; the first input end of the data transmission circuit is connected with the output end of the first detection circuit, the second input end of the data transmission circuit is connected with the output end of the second detection circuit, the first output end of the data transmission circuit is connected with the first signal reading end of the main control chip, and the second output end of the data transmission circuit is connected with the second signal reading end of the main control chip and is used for receiving and latching the first detection result and the second detection result so that the main control chip can read the first detection result and the second detection result.

Optionally, the data transmission circuit includes a latch unit corresponding to the first detection circuit and the second detection circuit, and the latch unit is used for latching the received first detection result or the second detection result.

Optionally, the latch unit includes an or gate and a D flip-flop; the first input end of the OR gate is connected with the output end of the first detection circuit or the second detection circuit, the second input end of the OR gate is connected with the Q end of the D trigger, the output end of the OR gate is connected with the D end of the D trigger, and the Q end of the D trigger is connected with the first signal reading end or the second signal reading end of the control circuit.

Optionally, the second detection circuit includes detection units corresponding to the first port and the second port respectively; the detection unit comprises a power supply enabling end and a power receiving enabling end, and is used for obtaining power supply parameters corresponding to the opposite side equipment through a pull-down resistor of a power receiving enabling end enabling corresponding port when the opposite side equipment is detected to be the power supply equipment, generating a second detection result according to the power supply parameters, and obtaining power receiving parameters corresponding to the opposite side equipment through a pull-up resistor of the power supply enabling end enabling corresponding port when the opposite side equipment is detected to be the power receiving equipment, and generating the second detection result according to the power receiving parameters.

Optionally, the detection unit includes an electronic receiving unit and an electronic supplying unit; the electronic receiving unit comprises a power receiving enabling end and at least one comparator, the enabling end of each comparator is connected with the power receiving enabling end, a first input end is connected with a corresponding reference voltage, a second input end is connected with a corresponding port, an output end is the output end of the second detection circuit, and the electronic receiving unit is used for acquiring power supply parameters corresponding to the opposite equipment through a pull-down resistor of the power receiving enabling end enabling the corresponding port when detecting that the opposite equipment is power supply equipment, and generating a second detection result according to the power supply parameters; the power supply unit comprises a power supply enabling end and at least one comparator, the enabling end of each comparator is connected with the power supply enabling end, a first input end is connected with a corresponding reference voltage, a second input end is connected with a corresponding port, an output end is the output end of the second detection circuit, and the power supply unit is used for acquiring power receiving parameters corresponding to opposite equipment through a pull-up resistor of the power supply enabling end enabling the corresponding port when the opposite equipment is detected to be powered equipment, and generating a second detection result according to the power receiving parameters.

Optionally, the electronic unit includes a third comparator, a fourth comparator and a fifth comparator, and the electronic unit includes a sixth comparator, a seventh comparator, an eighth comparator, a ninth comparator and a tenth comparator; the enabling end of the third comparator is connected with the power receiving enabling end, the first input end is connected with the fourth voltage, the second input end is connected with the corresponding port, the output end is the output end of the second detection circuit, the enabling end of the fourth comparator is connected with the power receiving enabling end, the first input end is connected with the fifth voltage, the second input end is connected with the corresponding port, the output end is the output end of the second detection circuit, the enabling end of the fifth comparator is connected with the power receiving enabling end, the first input end is connected with the sixth voltage, the second input end is connected with the corresponding port, the output end is the output end of the second detection circuit, the enabling end of the sixth comparator is connected with the power supply enabling end, the first input end is connected with the seventh voltage, the second input end is connected with the corresponding port, the output end is the output end of the second detection circuit, the enabling end of the seventh comparator is connected with the power supply enabling end, the first input end is connected with an eighth voltage, the second input end is connected with a corresponding port, the output end of the tenth comparator is connected with the power supply enabling end, the enabling end of the eighth comparator is connected with a ninth voltage, the second input end is connected with a corresponding port, the output end of the ninth comparator is connected with the power supply enabling end, the first input end is connected with a tenth voltage, the second input end is connected with a corresponding port, the output end of the tenth comparator is connected with the power supply enabling end, the first input end is connected with an eleventh voltage, the second input end is connected with a corresponding port, and the output end of the second detection circuit.

The application also provides an interface detection method, which comprises the following steps:

the first detection circuit detects whether the interface to be detected is connected with opposite equipment or not, and sends a first detection result to the control circuit after the interface to be detected is connected with the opposite equipment;

after the control circuit reads the first detection result, a first enabling signal is sent to the second detection circuit;

and the second detection circuit detects the interface characteristics of the interface to be detected after the interface to be detected is accessed to the opposite equipment after receiving the first enabling signal, generates a second detection result and sends the second detection result to the control circuit.

Optionally, the above interface detection method further includes: and when the first detection result is not read, the control circuit generates a second enabling signal for controlling the first detection circuit to detect whether the interface to be detected is connected with opposite equipment or not, and the second enabling signal is transmitted to the first detection circuit.

The application also provides a power management chip, which comprises the interface detection module in any embodiment.

The application also provides electronic equipment comprising the power management chip in any embodiment.

According to the interface detection module and method, the power management chip and the electronic equipment, whether the interface to be detected is connected to the opposite equipment or not can be detected in advance by adopting the first detection circuit, in the process of pre-detection, no matter whether the interface to be detected is in the SRC mode or the SNK mode, only one signal representing the state of the first port and the second port at the moment is connected, no additional circuit is needed for controlling the overturning time and frequency, the power consumption required by the part of work for controlling the overturning time and frequency can be saved, so that the power consumption of the corresponding interface detection module is reduced, no potential difference exists between the first port and the second port when the interface to be detected is in the standby state, the problem that the electromigration accelerates the corrosion speed among corresponding signal pins can be avoided, and the loss of the corresponding interface detection module is reduced; after the interface to be detected is connected with the opposite equipment, the control circuit sends a first enabling signal to the second detection circuit according to the first detection result, so that the second detection circuit starts to detect the interface characteristics of the interface to be detected after the interface to be detected is connected with the opposite equipment, generates a second detection result, and sends the second detection result to the control circuit, and therefore the control circuit can conduct power management of the interface to be detected according to the second detection result, and stability of the interface to be detected in various power transmission processes is guaranteed.

The first detection circuit adopts a low-power-consumption single-gear comparator to build a pre-detection circuit to complete interface pre-detection, so that the circuit structure can be simplified on the basis of ensuring the stability of the pre-detection process, and the detection power consumption is further reduced; the second detection circuit adopts a multi-gear comparator to realize the detection of the corresponding interface characteristics so as to accurately detect the interface characteristics of the interface to be detected after the interface to be detected is connected with the opposite equipment, and the accuracy in the detection process can be improved.

Therefore, the interface detection module can ensure the stability of the interface to be detected in the interface detection process from multiple aspects, can reduce the power consumption generated in the interface detection process, avoid the conditions of accelerating corrosion to damage the interface to be detected, and improve the service life of the interface to be detected.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly introduced below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIGS. 1a and 1b are schematic diagrams of conventional Type-C interface detection circuits;

FIG. 2 is a schematic diagram of an interface detection module according to an embodiment of the present application;

FIG. 3 is a schematic diagram of an interface detection module according to another embodiment of the present application;

FIGS. 4a and 4b are schematic diagrams of a first detection circuit according to an embodiment of the present application;

FIG. 5 is a schematic diagram of an interface detection module according to another embodiment of the present application;

FIG. 6a is a schematic diagram of a data transmission circuit according to an embodiment of the present application;

FIG. 6b is a schematic diagram of a latch unit according to an embodiment of the present application;

FIG. 7 is a timing diagram of a second detection circuit according to an embodiment of the present disclosure;

FIGS. 8a and 8b are schematic diagrams of the structure of a detection unit according to an embodiment of the present application;

fig. 9 is a schematic structural diagram of an interface detection method according to an embodiment of the present application.

Detailed Description

The inventor researches the detection scheme of such specific interfaces of traditional Type-C interface, and discovers that the detection scheme of the Type-C interface is provided with a Type-C connection detection unit, and the structure diagram corresponding to the detection scheme of the Type-C interface can be shown with reference to fig. 1a, and comprises a Type-C connection detection unit, an ADC voltage detection unit and a Type-C connection identification unit which are sequentially connected, wherein CC1 is respectively connected with the Type-C connection detection unit and the ADC voltage detection unit, and CC2 is respectively connected with the Type-C connection detection unit and the ADC voltage detection unit. When the Type-C interface is not connected in the standby mode, only the Type-C connection detection unit is required to be started, when the Type-C connection detection unit recognizes that equipment is connected, an awakening signal is sent to the ADC voltage detection unit, then the ADC voltage detection unit starts to detect the voltage of the CC end, the ADC voltage detection unit is not required to detect the voltage of the CC end constantly, and standby power consumption of the Type-C product is reduced to a certain extent. Specifically, the Type-C connection detection unit may refer to fig. 1b, and the corresponding connection detection process is as follows: depending on the PD protocol, TYPE-C devices may be configured in different functional modes: SNK, SRC or DRP. The charging mode corresponding to the SNK needs to provide RD (pull-down resistor) on the CC channel; the discharge mode corresponding to SRC needs to provide RP (pull-up resistor) in the CC channel; the dual-role mode corresponding to the DRP can be used as an SNK or an SRC, and needs to be dynamically switched between the SNK and the SRC. And when the Type-C interface is not connected, the circuit enters a standby detection state. In the standby detection state, the Type-C connection identification circuit only needs to start the front Type-C connection detection unit, and other circuits are in sleep so as to ensure lower standby power consumption. Wherein the operation mode signal mode_sel may be provided by a digital logic circuit or an MCU (micro control circuit), and indicates in the SNK mode when the operation mode signal mode_sel=0; mode_sel=1, indicating in SRC mode. In the SNK mode, the operation mode signal mode_sel=0, and the data selector mux_sel selects a voltage of 0.2V as a reference voltage and supplies the reference voltage to the first comparator comp1 and the second comparator comp2. When the first CC voltage is greater than 0.2V, the first comparator comp1 outputs a result comp_cc1 to be set to 1. At this time, the signals mode_sel=0, comp_cc1=1, and the output signal wake_up_cc1 after the exclusive or gate is set to 1. Similarly, when the second CC voltage is greater than 0.2V, the second comparator comp2 outputs a result comp_cc2 of 1. At this time, the signals mode_sel=0, comp_cc2=1, and the output signal wake_up_cc2 after the exclusive or gate is set to 1. In the SRC mode, the operation mode signal mode_sel=1, and the data selector mux_sel selects the voltage of 2.6V as the reference voltage and supplies the reference voltage to the first comparator comp1 and the second comparator comp2. When the first CC voltage is less than 2.6V, the first comparator comp1 outputs a result comp_cc1 to be set to 0. At this time, the signals mode_sel=1, comp_cc1=0, and the output signal wake_up_cc1 after the exclusive or gate is set to 1. Similarly, when the second CC voltage is less than 2.6V, the second comparator comp2 outputs a result comp_cc2 set to 0. At this time, the signals mode_sel=1, comp_cc2=0, and the output signal wake_up_cc2 after the exclusive or gate is set to 1. Since the wake-up signal wake-up includes the signals wake-up_cc1 and wake-up_cc2, the output signal after the OR gate is only provided that one of the signals wake-up_cc1 or wake-up_cc2 is set to 1, and the wake-up signal wake-up is set to 1, so as to trigger the ADC voltage detection unit to start working. And when standby detection is carried out, judging whether the Type-C interface is connected with other equipment according to different working modes. When RD is provided, the SNK mode is operated. In SNK mode, when the Type-C interface is not connected, the voltages on CC1 and CC2 are 0. According to the PD protocol, when the Type-C connection detection unit detects that the voltage on the CC1 or the CC2 is greater than 0.2V, the Type-C interface is judged to be connected. When providing RP, the operation is in SRC mode. In SRC mode, when the Type-C interface is not connected, the voltages of CC1 and CC2 are 5V. According to the PD protocol, when the Type-C connection detection unit detects that the voltage on the CC1 or the CC2 is smaller than 2.6V, the Type-C interface is judged to be connected. And when the Type-C interface is connected, waking up the ADC voltage detection unit. The ADC time-division AD-converts the voltages of CC1 and CC 2. And finally, the Type-C connection identification unit identifies the Type and the power of the access Type-C interface equipment according to the PD protocol and the AD conversion voltage result.

The inventor further researches the Type-C interface detection schemes shown in fig. 1a and 1b, and found that when the Type-C interface is not connected in the SRC mode when the Type-C interface is used as the DRP, the voltages on CC1 and CC2 are at a high level (e.g. 5V); in SNK mode, when the Type-C interface is not connected, the voltages on CC1 and CC2 are low (e.g. 0). Then the voltage on the CC will always be turned over continuously, and additional circuit work is needed to control the time and frequency of turning over, and additional power consumption will be generated; in addition, CC constantly toggles between high and low levels, so that CCl and CC2 pins are charged for a long period of time even in a standby state, and at the same time, since USB Type-C interface may be exposed for a long period of time during application, various foreign materials are easily entered, and some foreign materials are conductive, for example: rain, sweat, oil stains, food, etc. The conductive foreign matter adheres to the CCl pin and the CC2 pin which are electrified for a long time, so that electromigration occurs between the CCl pin and the CC2 pin for a long time, and the corrosion speed between the signal pins is accelerated. Therefore, the USB Type-C interface in the Type-C interface detection scheme also has the problem of high corrosion speed of CCl pins and CC2 pins.

According to the method and the device, whether the interface to be detected is connected to the opposite device or not is detected in advance by the first detection circuit, in the process of pre-detection, no matter whether the interface to be detected is in the SRC mode or the SNK mode, only one signal representing the state of the first port and the second port at the time is connected, no additional circuit is needed to control the time and the frequency of turning, the power consumption required by the part of work for controlling the time and the frequency of turning can be saved, so that the power consumption of a corresponding interface detection module is reduced, no potential difference exists between the first port and the second port when the interface to be detected is in the standby state, the problems that the electromigration accelerates the corrosion speed between corresponding signal pins and the like can be avoided, and the loss of the corresponding interface detection module is reduced.

The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application. The various embodiments described below and their technical features can be combined with each other without conflict.

The first aspect of the present application provides an interface detection module, referring to fig. 2, where the interface detection module includes a control circuit 110, a first detection circuit 200, and a second detection circuit 300.

The detection end of the first detection circuit 200 is respectively connected to a first port and a second port (not shown in fig. 2) of an interface to be detected, and the output end is connected to a first signal reading end of the control circuit 110, so as to detect whether the interface to be detected is connected to a counterpart device, and send a first detection result to the control circuit 110 after the interface to be detected is connected to the counterpart device; the interface to be detected may include a Type-C interface, the first port may include a CC1 port of the Type-C interface, and the second port may include a CC2 port of the Type-C interface.

The first control terminal of the control circuit 110 is connected to the control terminal of the second detection circuit 300, and is configured to send a first enable signal to the second detection circuit 300 after the first detection result is read.

The second detection circuit 300 is connected to the second signal reading end of the control circuit 110, and is configured to detect an interface characteristic of the interface to be detected after the interface to be detected is connected to the opposite device after receiving the first enable signal, generate a second detection result, and send the second detection result to the control circuit 110, so that the control circuit 110 performs power management of the corresponding interface to be detected according to the second detection result.

The opposite side equipment comprises equipment inserted into the Type-C interface waiting detection interface, and when the corresponding interface to be detected serves as a dual-role mode, the opposite side equipment can be used as an interface of power supply equipment to work in an SRC mode and can be used as an interface of power receiving equipment to work in an SNK mode, and the opposite side equipment comprises power receiving equipment or power supply equipment. Specifically, when the interface to be detected is in the SRC mode, the connected counterpart device is a powered device, and when the interface to be detected is in the SNK mode, the connected counterpart device is a power supply device. The detection end of the first detection circuit 200 is connected with the first port and the second port of the port to be detected at the same time, no matter whether the port to be detected is in the SRC mode or the SNK mode, only one signal representing the state of the first port and the second port at the moment needs to be accessed, the level of no need of turning is provided, no extra circuit is needed to control the time and the frequency of turning, and the power consumption required by the part of work of controlling the time and the frequency of turning can be saved, so that the power consumption of a corresponding interface detection module is reduced. In addition, when the first detection circuit 200 detects whether the interface to be detected is connected to the other device, the condition of level inversion does not exist, so that no potential difference exists between the first port and the second port when the interface to be detected is in a standby state, the problem that electromigration accelerates corrosion speed between corresponding signal pins can be avoided, loss of a corresponding interface detection module is reduced, and service life of the corresponding interface detection module is prolonged.

Optionally, the control circuit 110 may include an independent control chip, or may be integrated in a power management chip and/or a main control chip of an electronic device, and is configured to control each part of circuits connected to the first detection circuit 200 and the second detection circuit 300, so as to efficiently and stably obtain information about whether an interface to be detected is connected to a counterpart device, and interface characteristics after the interface is connected to the counterpart device, and perform power management according to the information, so that the port to be detected can stably operate in both the SNK mode and the SRC mode.

Optionally, after receiving the first enable signal, the second detection circuit 300 starts to work, detects an interface feature of the port to be detected after the port to be detected is connected to the other device, generates a second detection result representing the interface feature, and sends the second detection result to the control circuit 110, so that the control circuit 110 can control the port to be detected to perform stable power transmission according to the second detection result. Optionally, the interface features include a working mode (SNK mode or SRC mode) where the port to be detected is located, and features such as a power parameter after the device is plugged into the other device in each working mode.

The interface detection module firstly adopts the first detection circuit 200 to pre-detect whether the interface to be detected is connected to the opposite equipment, in the pre-detection process, no matter whether the interface to be detected is in SRC mode or SNK mode, only one signal representing the state of the first port and the second port at the time is connected, no extra circuit is needed to control the time and the frequency of turning, the power consumption required by the part of work for controlling the time and the frequency of turning can be saved, thus the power consumption of the corresponding interface detection module is reduced, no potential difference exists between the first port and the second port when the interface to be detected is in a standby state, the problems of accelerating the corrosion speed between corresponding signal pins due to electromigration can be avoided, and the loss of the corresponding interface detection module is reduced; after the interface to be detected is accessed to the opposite device, the control circuit 110 sends a first enabling signal to the second detection circuit 300 according to the first detection result, so that the second detection circuit 300 starts to detect the interface characteristics of the interface to be detected after the interface to be detected is accessed to the opposite device, generates a second detection result, and sends the second detection result to the control circuit 110, and thus the control circuit 110 can manage the power of the interface to be detected according to the second detection result, and the stability of the interface to be detected in various power transmission processes is ensured; therefore, the interface detection module not only can carry out interface detection and corresponding power management on the interface to be detected efficiently and stably, but also can reduce power consumption generated in the interface detection process, avoid the conditions of accelerating corrosion to damage the interface to be detected, and can improve the service life of the interface to be detected.

In one embodiment, referring to fig. 3, the control circuit 110 further includes a second control terminal, where the second control terminal is connected to the control terminal of the first detection circuit 200; the control circuit 110 is further configured to generate a second enable signal for controlling the first detection circuit 200 to detect whether the interface to be detected is connected to the counterpart device when the first detection result is not read, i.e. the port to be detected is not connected to the counterpart device, and transmit the second enable signal to the first detection circuit 200 through the second control terminal, so that the first detection circuit 200 can perform pre-detection (i.e. pre-detect whether the interface to be detected is connected to the counterpart device) after receiving the second enable signal, thereby improving the ordering of the pre-detection process. In this embodiment, the control circuit 110 enables the first detection circuit 200 to perform pre-detection through the second enable signal, closes the second detection circuit 300, enables the second detection circuit 300 to obtain the interface characteristic of the port to be detected after the port to be detected is connected to the opposite device through the first enable signal, closes the first detection circuit 200, and can improve the order and stability of the related control process and reduce the power consumption generated in the whole detection process.

In one embodiment, the interface to be detected comprises a Type-C interface; the first detection circuit 200 may detect the electrical signals of the Type-C interface in various working modes by using at least one comparator, and/or a simple logic device such as an and gate and/or an or gate, so as to stably and effectively identify whether the Type-C interface is connected to the opposite device by using a low-power device.

In one example, referring to fig. 4a, the first detection circuit 200 includes a first comparator comp1, a second comparator comp2, and an and gate 201; the first input end of the first comparator comp1 is connected to the first voltage ref1, the second input end is connected to the first port CC1 and the second port CC2 which are respectively connected to the Type-C interface, the output end is connected to the first input end of the and gate 201, the first input end of the second comparator comp2 is connected to the first port CC1 and the second port CC2 which are respectively connected to the Type-C interface, the second input end is connected to the second voltage ref2, the output end of the and gate 201 is connected to the second input end of the and gate 201, the output end of the and gate 201 can be connected to the first signal reading end of the control circuit 110 to output a first detection result, the first port CC1 and the second port CC2 correspond to the third voltage ref3, the first voltage ref1 and the third voltage ref3 and the second voltage ref2 decrease in sequence, that is ref1> 3> ref2, and thus the Type-C interface can identify whether the Type-C interface is connected to the opposite side interface device or not in any operation mode. Alternatively, the first detection result may be represented by a relatively simple level signal such as 1 or 0, for example, the first detection circuit 200 outputs 1 to represent that the Type-C interface is not connected to the other device, outputs 0 to represent that the Type-C interface is connected to the other device, and if the first detection result is changed from 1 to 0, the Type-C interface is represented to be connected to the other device, and at this time, a corresponding first detection result (such as a simple level signal such as 0) may be output, so that the control circuit 110 may timely and accurately read the first detection result.

Further, referring to fig. 4b, the first detection circuit 200 further includes a voltage division unit 202; one side of the voltage dividing end of the voltage dividing unit 202 is connected to the first port CC1 and the second port CC2, and the other side is connected to the second input end of the first comparator comp1 and the first input end of the second comparator comp2, for providing the third voltage ref3. Alternatively, the voltage dividing unit 202 may include a plurality of resistors connected in series, the voltage dividing ends are disposed between the resistors, for example, referring to fig. 4b, the voltage dividing unit 202 includes a first resistor R1 and a second resistor R2 connected in series, the voltage dividing ends are disposed between the first resistor R1 and the second resistor R2, one end of the first resistor R1 is connected to a set voltage, the other end is connected to the voltage dividing end, one end of the first resistor R1 is connected to the voltage dividing end, and the other end is grounded, so that the voltage dividing unit 202 can divide the set voltage (1.8V as shown in fig. 4 b) and provide the third voltage ref3 at the voltage dividing end. Alternatively, the first resistor R1 and the second resistor R2 may include large resistors having equal resistance values, such as r1=r2=1mΩ, so that the set voltage may be divided more stably.

Specifically, the first voltage ref1, the third voltage ref3 and the second voltage ref2 may be set according to relevant regulations of the Type-C protocol, for example, the first voltage ref1=1.45V, the third voltage ref3=0.9V and the second voltage ref2=0.55V may be set. Accordingly, the threshold value of the first comparator comp1 is the first voltage ref1=1.45v, the threshold value of the second comparator comp2 is the second voltage ref2=0.55v, the other ends of the two comparators are respectively connected to the third voltage ref3=0.9v, and when the first port CC1 and the second port CC2 float (are not connected to the counterpart device), the first comparator comp1 and the second comparator comp2 both output the high level 1 due to the third voltage ref3=0.9v, and the and gate 201 outputs the high level 1. According to the Type-C protocol, when the Type-C interface works in the SRC mode at the access counterpart device, the voltage on the Type-C interface is pulled up to 1.7-5.5V, when the Type-C interface works in the SNK mode at the access counterpart device, the voltage on the Type-C interface is pulled down to the ground by a 5.1K resistor, the Type-C protocol prescribes that the lowest voltage corresponding to the Type-C interface is 1.7V in the SRC mode, so that when the Type-C interface is in the SRC mode, after the power supply device is inserted, the voltage on the first port CC1 or the second port CC2 is pulled up to at least 1.7V, and if the power supply device is a strong source, the first comparator comp1 outputs 0, the second comparator comp2 outputs 1, and the AND gate 201 outputs 0; when the Type-C interface is in SNK, since the pull-down resistor corresponding to the first port CC1 or the second port CC2 is equivalent to the parallel connection of 5.1K and 1M, the voltage on the pull-down resistor is about 8mV, at this time, the first comparator comp1 outputs 1, the second comparator comp2 outputs 0, and the and gate 201 outputs 0. It can be seen that the output of AND gate 201 changes from 1 to 0 characterizes the Type-C interface to access the partner device.

In one embodiment, referring to fig. 5, the interface detection module further includes a data transmission circuit 400; the first input end of the data transmission circuit 400 is connected to the output end of the first detection circuit 200, the second input end is connected to the output end of the second detection circuit 200, the first output end is connected to the first signal reading end of the main control chip 110, and the second output end is connected to the second signal reading end of the main control chip 110, and is configured to receive and latch the first detection result and the second detection result, so that the main control chip 110 reads the first detection result and the second detection result. The data transmission circuit 400 is used to receive and latch the first detection result and the second detection result, so that the main control chip 110 reads the required first detection result or the required second detection result from the data transmission circuit 400 according to the relevant control requirement, and the stability of the first detection result or the second detection result can be ensured when the first detection result or the second detection result is transmitted, thereby ensuring the stability of the relevant control work of the main control chip 110. Alternatively, the data transmission circuit 400 may employ relatively simple signals to characterize the first detection result and/or the second detection result, such as using a first interrupt signal to characterize the first detection result, using a second interrupt signal to characterize the second detection result, and so on, so as to simplify the corresponding data reading process and improve the data reading efficiency.

In one example, the data transmission circuit 400 includes latch units respectively corresponding to the first detection circuit 200 and the second detection circuit 300, and the latch units are configured to latch the received first detection result or the second detection result. Specifically, referring to fig. 6a, in the data transmission circuit 400, the first latch unit 410 corresponding to the first detection circuit 200 and the second latch unit 420 corresponding to the second detection circuit 300 may receive and latch the first detection result, and the second latch unit 420 may receive and latch the second detection result to latch the corresponding detection result, respectively, thereby improving the stability of the detection result latching process.

Specifically, referring to fig. 6b, the latch unit may include an or gate 401 and a D flip-flop 402; the first input end of the or gate 401 is connected to the output end of the first detection circuit 200 or the second detection circuit 300, the second input end is connected to the Q end of the D flip-flop 402, the output end is connected to the D end of the D flip-flop 402, and the Q end of the D flip-flop 402 is connected to the first signal reading end or the second signal reading end of the control circuit 110. Thus, the D flip-flop 402 may be triggered in time after receiving the corresponding detection result (the first detection result or the second detection result), and latches the corresponding detection result, waiting to be read by the control circuit 110.

In other examples, the data transmission circuit 400 may also use other logic circuits such as a transmission gate to transmit the first detection result and/or the second detection result.

In one embodiment, the second detection circuit 300 includes various detection circuits capable of detecting the interface characteristics of the interface to be detected after the interface is connected to the counterpart device, such as a Type-C detection circuit or other interface detection circuit with simpler structure and lower power consumption, which is adopted in the schemes shown in fig. 1a and 1 b.

In one example, the second detection circuit 300 is analyzed using a Type-C interface as an example. The second detection circuit 300 may detect the interface characteristics of the Type-C interface after the Type-C interface is connected to the other device by using a pull-up resistor, a pull-down resistor, and the like corresponding to the Type-C interface to be opened in a time-sharing manner. Specifically, according to the Type-C protocol, when the Type-C interface is in the SRC mode, the chip may select a current source or a pull-up resistor to characterize its own power supply capability. The corresponding power supply capacity can be one of Default USB/1.5A/3A, and when the power supply of the chip is 4.75-5.5V, the pull-up resistor represents 3 power supply capacities by 56K/22K/10K; when the power supply of the chip is 3.3V, the pull-up resistor selects 36K/12K/4.7K to represent 3 power supply capacities; the chip can also select 80uA/180uA/330uA to characterize 3 power supply capabilities. The chip is connected with different pull-up resistors or the threshold value of the current source for detecting the pull-down resistor is also different, and therefore, when the Type-C interface is in SRC, one pull-down resistor (such as Rd resistor) corresponding to the Type-C interface needs to be detected by 2.6V/1.6V, and the other pull-down resistor (such as Ra resistor) corresponding to the Type-C interface needs to be detected by 0.8V/0.4V/0.2V, and at the moment, 5 comparators can be adopted for detection. Specifically, the voltage threshold values involved in the detection process may be as shown in tables 1 to 3.

TABLE 1

	Minimum voltage	Maximum voltage	Comparator threshold
				Ra resistance detection potential	0.00V	0.15V	0.20V
Rd resistance detection potential	0.25V	1.50V	1.60V
				Suspension voltage	1.60V

TABLE 2

	Minimum voltage	Maximum voltage	Comparator threshold
				Ra resistance detection potential	0.00V	0.35V	0.40V
Rd resistance detection potential	0.45V	1.50V	1.60V
				Suspension voltage	1.65V

TABLE 3 Table 3

	Minimum voltage	Maximum voltage	Comparator threshold
				Ra resistance detection potential	0.00V	0.75V	0.80V
Rd resistance detection potential	0.85V	2.45V	2.60V
				Suspension voltage	2.75V

When the Type-C interface is in the SNK mode, the second detection circuit 300 may open a pull-down resistor 5.1K corresponding to the Type-C interface, different voltage drops may be generated when the SRC with different current capabilities falls on the resistor of 5.1K, according to the Type-C protocol, there are 3 gears 0.2V/0.66V/1.23V respectively, when the voltage on the 5.1K is 0.2V-0.66V, the power supply device with the power supply capability of defaultusb is connected, when the voltage on the 5.1K is 0.66V-1.23V, the power supply device with the power supply capability of 1.5A is connected, and when the voltage on the 5.1K is greater than 1.23V, the corresponding voltage threshold may be shown in table 4.

TABLE 4 Table 4

	Minimum voltage	Maximum voltage	Comparator threshold
				Ra resistance potential	-0.25V	0.15V	0.20V
Potential when Rd resistor is connected	0.25V	2.04V
				Rd resistance potential at 500mA	0.25V	0.61V	0.66V
Rd resistance potential at 1.5A	0.70V	1.16V	1.23V
				Rd resistance potential at 3A	1.31V	2.04V

In the detection process of the second detection circuit 300, the control circuit 110 may enable the pull-up resistor (current source) and the pull-down 5.1K resistor corresponding to the Type-C interface to detect the signals on the first port CC1 and the second port CC2, and at this time, the timing diagrams corresponding to the positions of the first port CC1 and the second port CC2 by the second detection circuit 300 may be shown with reference to fig. 7, and switch (or flip) between the SRC mode and the SNK mode repeatedly, so as to identify the working mode corresponding to the Type-C interface and the power parameters in each working mode after the opposite device is inserted, so as to generate a second detection result, and complete the interface feature detection corresponding to the Type-C interface.

The inventor finds that when the Type-C interface is in the SRC mode, a part of corresponding pull-down resistors Rd have a threshold value of 2.6V/1.6V, and the other part of pull-down resistors Ra have a threshold value of 0.8V/0.4V/0.2V; at SNK, the corresponding pull-up resistor has thresholds of 1.23V,0.66V,0.2V, etc. Therefore, the second detection circuit 300 can realize the detection of the corresponding interface feature through the multi-gear comparator, so as to accurately detect the interface feature of the Type-C interface after the Type-C interface is connected to the opposite device, and improve the accuracy in the detection process.

In one example, the second detection circuit 300 includes detection units corresponding to the first port CC1 and the second port CC2, respectively; the detection unit includes a power supply enabling end en_src and a power receiving enabling end en_snk, and is configured to, when detecting that the opposite device is a power supply device, obtain a power supply parameter corresponding to the opposite device by using a pull-down resistor of a corresponding port enabled by the power receiving enabling end en_snk, generate the second detection result according to the power supply parameter, and when detecting that the opposite device is a power receiving device, obtain a power receiving parameter corresponding to the opposite device by using a pull-up resistor of a corresponding port enabled by the power supply enabling end en_src, and generate the second detection result according to the power receiving parameter.

Specifically, referring to fig. 8a, the detection unit includes an electron receiving unit 310 and an electron supplying unit 320; the electronic receiving unit 310 includes the power receiving enabling end en_snk and at least one comparator, where an enabling end of each comparator is connected to the power receiving enabling end en_snk, a first input end is connected to a corresponding reference voltage, a second input end is connected to a corresponding port, and an output end is an output end of the second detection circuit 300, and is configured to, when detecting that the opposite device is a power supply device, enable a pull-down resistor of the corresponding port through the power receiving enabling end en_snk to obtain a power supply parameter corresponding to the opposite device, and generate the second detection result according to the power supply parameter; the power supply unit 320 includes the power supply enable terminal en_src and at least one comparator, where an enable terminal of each comparator is connected to the power supply enable terminal en_src, a first input terminal is connected to a corresponding reference voltage, a second input terminal is connected to a corresponding port, and an output terminal is an output terminal of the second detection circuit 300, and is configured to enable, when detecting that the opposite device is a powered device, a pull-up resistor of the corresponding port through the power supply enable terminal en_src, obtain a power receiving parameter corresponding to the opposite device, and generate the second detection result according to the power receiving parameter. Alternatively, the first input of each comparator may comprise a positive input and the second input may comprise a negative input, and the reference voltage may be determined in accordance with the configuration characteristics of the Type-C interface wait detect interface and the associated specifications of the Type-C protocol.

Specifically, referring to fig. 8a and 8b, the electronic unit includes a third comparator comp 1, a fourth comparator comp 2, and a fifth comparator comp 3, and the electronic unit includes a sixth comparator comp 1, a seventh comparator comp 2, an eighth comparator comp 3, a ninth comparator comp 4, and a tenth comparator comp 5. The third comparator comp 1 has an enable terminal connected to the power-on enable terminal en_snk, a first input terminal connected to a fourth voltage (e.g., 1.23V in the figure), a second input terminal connected to a corresponding port (e.g., 0.2V in the figure), an output terminal connected to an output terminal of the second detection circuit 300, the fourth comparator comp 2 has an enable terminal connected to the power-on enable terminal en_snk, a first input terminal connected to a fifth voltage (e.g., 0.66V in the figure), a second input terminal connected to a corresponding port, an output terminal connected to the power-on enable terminal en_snk in the figure, a first input terminal connected to a sixth voltage (e.g., 0.2V in the figure), an output terminal connected to a corresponding port, an output terminal connected to the output terminal of the second detection circuit 300, an enable terminal connected to the first voltage src_enable terminal, a seventh input terminal connected to the voltage SRC 1 in the figure, an output terminal connected to the output terminal of the comparator, a corresponding to the output terminal V (e.g., 0.2V in the figure), an enable terminal connected to the output terminal of the comparator, a corresponding to the output terminal of the fourth comparator comp 3, an output terminal connected to the voltage (e.g., 0.2V in the figure), an output terminal connected to the output terminal of the voltage V in the eighth voltage (e.g., 0.2V in the figure), an output terminal connected to the voltage V in the graph, a corresponding to the output terminal of the comparator, a corresponding to the output terminal of the voltage V2V in the figure, a corresponding to the output terminal of the voltage V2V, and an output terminal connected to the voltage V2V in the figure, an output terminal of the voltage V is connected to the voltage V) (V1), the second input end is connected to the corresponding port, the output end is the output end of the second detection circuit 300, the enabling end of the tenth comparator comp 5 is connected to the power supply enabling end en_src, the first input end is connected to an eleventh voltage (as shown in 0.2V), the second input end is connected to the corresponding port, and the output end is the output end of the second detection circuit 300.

In the working process of the second detection circuit 300, when the second detection circuit is in the dual-role mode, in order to detect that the opposite device is a power supply device or an electric device, the corresponding Type-C interface needs to be switched between the SNK mode and the SRC mode, when the Type-C interface is in the SNK mode, a 5.1K pull-down resistor is enabled, and meanwhile, the power receiving enabling end en_snk is high, and a comp comparator is enabled, where the comp comparator includes a third comparator comp 1, a fourth comparator comp 2 and a fifth comparator comp 3. When the Type-C interface is in SRC mode, the pull-up current sources of 80 uA-330 uA will be enabled while the power enable terminal en_src is high, enabling the comp comparators, where the comp comparators include sixth comparator comp 1, seventh comparator comp 2, eighth comparator comp 3, ninth comparator comp 4 and tenth comparator comp 5. When the Type-C interface is in SNK mode, if 80uA of power supply equipment is connected, the voltage on the corresponding Type-C interface is between 0.2V and 0.66V, the fifth comparator comp 3 outputs high level, and the fourth comparator comp 2 and the third comparator comp 1 output low level. Similarly, if 180uA of power supply equipment is connected, the voltage of the corresponding Type-C interface is between 0.66V and 1.23V, the fourth comparator comp 2 and the fifth comparator comp 3 output high level, and the third comparator comp 1 outputs low level. If the power supply equipment with 330uA is connected, the outputs of the third comparator comp 1, the fourth comparator comp 2 and the fifth comparator comp 3 are all high level, so as to realize the detection of the other equipment such as the power supply equipment and the corresponding interface characteristics.

When the Type-C interface is in SRC mode, the pull-up current sources 80 uA-330 uA are enabled, and if the pull-down resistor Rd is connected, the pull-down resistor Rd is 5.1K, if the Type-C interface corresponds to the 330uA current source, the voltage on the Type-C interface is 2.6-1.6V, at the moment, the sixth comparator comp 1 outputs a low level, and the seventh comparator comp 2-tenth comparator comp 5 outputs a high level. If the Type-C interface corresponds to 180uA/80uA, the voltage on the Type-C interface is 1.6-0.8V, at this time, the sixth comparator comp 1 and the seventh comparator comp 2 output to be low, and the eighth comparator comp 3 to the tenth comparator comp 5 output to be high. If the opposite device is connected to the pull-down resistor Ra, since the pull-down resistor Ra is 1K, when the Type-C interface corresponds to the 330uA current source, the voltage on the Type-C interface is 0.8-0.4V, and at this time, the sixth comparator comp 1, the seventh comparator comp 2, and the eighth comparator comp 3 output to a low level, and the ninth comparator comp 4 and the tenth comparator comp 5 output to a high level. If the Type-C interface corresponds to the 180uA current source, the voltage on the Type-C interface is 0.4-0.2V, and the sixth comparator comp 1, the seventh comparator comp 2, the eighth comparator comp 3 and the ninth comparator comp 4 output at low level, and the tenth comparator comp 5 outputs at high level. If the Type-C interface corresponds to the 80uA current source, the voltage on the Type-C interface is 0.2-0V, and the outputs of the sixth comparator comp 1 to the tenth comparator comp 5 are all low. Thus, the detection of the other side equipment such as the powered equipment and the corresponding interface characteristics is realized.

The above interface detection module can pre-detect whether the interface to be detected is connected to the other device by using the first detection circuit 200, so as to achieve the purpose of reducing power consumption and interface loss, and after the interface to be detected is connected to the other device, the second detection circuit 300 is used to detect the interface characteristics of the interface to be detected after the interface to be detected is connected to the other device, so that the control circuit 110 performs power management corresponding to the interface to be detected according to the second detection result, and ensures the stability of the interface to be detected in various power transmission processes. The first detection circuit 200 adopts a low-power-consumption single-gear comparator to build a pre-detection circuit to complete interface pre-detection, so that the circuit structure can be simplified on the basis of ensuring the stability of the pre-detection process, and the detection power consumption is further reduced. The second detection circuit 300 adopts a multi-gear comparator to realize detection of the corresponding interface characteristics so as to accurately detect the interface characteristics of the interface to be detected after the interface to be detected is connected with the opposite device, and the accuracy in the detection process can be improved. Therefore, the interface detection module can ensure the stability of the interface to be detected in the interface detection process from multiple aspects, can reduce the power consumption generated in the interface detection process, avoid the conditions of accelerating corrosion to damage the interface to be detected, and improve the service life of the interface to be detected.

The present application provides, in a second aspect, an interface detection method, which may be applied to the interface detection module described in any one of the foregoing embodiments. Referring to fig. 9, the interface detection method includes:

s510, a first detection circuit detects whether the interface to be detected is connected with opposite equipment or not, and sends a first detection result to a control circuit after the interface to be detected is connected with the opposite equipment.

S520, the control circuit sends a first enable signal to the second detection circuit after reading the first detection result.

And S530, after receiving the first enabling signal, the second detection circuit detects the interface characteristics of the interface to be detected after the interface to be detected is accessed to the opposite equipment, generates a second detection result, and sends the second detection result to the control circuit.

In an embodiment, the method for detecting an interface further includes: and when the first detection result is not read, the control circuit generates a second enabling signal for controlling the first detection circuit to detect whether the interface to be detected is connected with opposite equipment or not, and the second enabling signal is transmitted to the first detection circuit.

The above-mentioned interface detection method can be applied to the interface detection module described in any of the above-mentioned embodiments, and the relevant features can refer to the interface detection module described in any of the above-mentioned embodiments, so that all the advantages of the interface detection module described in any of the above-mentioned embodiments are provided, and are not repeated herein.

The application provides a power management chip in a third aspect, which includes the interface detection module in any embodiment, can stably and accurately detect the interface characteristics of the Type-C interface waiting detection interface in each stage, and has relatively low power consumption and device damage speed.

The application provides electronic equipment in a fourth aspect, including the power management chip of any embodiment, can adopt low-power consumption device to carry out stable detection to the state of interface to be detected before electronic equipment inserts other side's equipment, after electronic equipment inserts other side's equipment, adopt devices such as multi-gear comparator that the consumption is relatively low to treat the interface to be detected and carry out accurate detection at the interface characteristic after inserting other side's equipment, on the basis of guaranteeing interface detection process stability and accuracy, can reduce detection power consumption and relevant device loss.

Although the application has been shown and described with respect to one or more implementations, equivalent alterations and modifications will occur to others skilled in the art based upon a reading and understanding of this specification and the annexed drawings. This application is intended to cover all such modifications and variations, and is limited only by the scope of the appended claims. In particular regard to the various functions performed by the above described components, the terms used to describe such components are intended to correspond, unless otherwise indicated, to any component which performs the specified function of the described component (e.g., that is functionally equivalent), even though not structurally equivalent to the disclosed structure which performs the function in the herein illustrated exemplary implementations of the specification.

That is, the foregoing embodiments are merely examples of the present application, and are not intended to limit the scope of the patent application, and all equivalent structures or equivalent processes using the descriptions and the contents of the present application, such as the combination of technical features of the embodiments, or direct or indirect application to other related technical fields, are included in the scope of the patent protection of the present application.

In addition, the terms "first," "second," are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more features. In the description of the present application, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.

The previous description is provided to enable any person skilled in the art to make or use the present application. In the above description, various details are set forth for purposes of explanation. It will be apparent to one of ordinary skill in the art that the present application may be practiced without these specific details. In other instances, well-known processes have not been described in detail in order to avoid unnecessarily obscuring the description of the present application. Thus, the present application is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.

Claims

1. An interface detection module is characterized by comprising a control circuit, a first detection circuit and a second detection circuit;

The second detection circuit is connected with a second signal reading end of the control circuit and is used for detecting interface characteristics of the interface to be detected after the interface to be detected is accessed to the opposite equipment after receiving the first enabling signal, generating a second detection result and sending the second detection result to the control circuit;

the interface to be detected comprises a Type-C interface; the first detection circuit comprises a first comparator, a second comparator and an AND gate; the first input end of the first comparator is connected with a first voltage, the second input end of the first comparator is connected with a first port and a second port which are respectively connected with a Type-C interface, the output end of the first comparator is connected with the first input end of the AND gate, the first input end of the second comparator is connected with the first port and the second port which are respectively connected with the Type-C interface, the second input end of the second comparator is connected with a second voltage, the output end of the second comparator is connected with the second input end of the AND gate, the output end of the AND gate is connected with a first signal reading end of the control circuit, the first port and the second port correspond to a third voltage, and the first voltage, the third voltage and the second voltage decrease in sequence.

2. The interface detection module of claim 1, wherein the control circuit further comprises a second control terminal connected to the control terminal of the first detection circuit;

The control circuit is further configured to generate a second enable signal for controlling the first detection circuit to detect whether the interface to be detected is connected to the opposite device when the first detection result is not read, and transmit the second enable signal to the first detection circuit through the second control terminal.

3. The interface detection module of claim 1, wherein the first detection circuit further comprises a voltage divider unit;

one side of the voltage dividing end of the voltage dividing unit is connected with the first port and the second port, and the other side of the voltage dividing end of the voltage dividing unit is connected with the second input end of the first comparator and the first input end of the second comparator and is used for providing the third voltage.

4. The interface detection module of claim 1, further comprising a data transmission circuit;

the first input end of the data transmission circuit is connected with the output end of the first detection circuit, the second input end of the data transmission circuit is connected with the output end of the second detection circuit, the first output end of the data transmission circuit is connected with the first signal reading end of the main control chip, and the second output end of the data transmission circuit is connected with the second signal reading end of the main control chip and is used for receiving and latching the first detection result and the second detection result so that the main control chip can read the first detection result and the second detection result.

5. The interface detection module according to claim 4, wherein the data transmission circuit includes a latch unit corresponding to the first detection circuit and the second detection circuit, respectively, the latch unit being configured to latch the received first detection result or the second detection result.

6. The interface detection module of claim 5, wherein the latch unit comprises an or gate and a D flip-flop;

the first input end of the OR gate is connected with the output end of the first detection circuit or the second detection circuit, the second input end of the OR gate is connected with the Q end of the D trigger, the output end of the OR gate is connected with the D end of the D trigger, and the Q end of the D trigger is connected with the first signal reading end or the second signal reading end of the control circuit.

7. The interface detection module of claim 1, wherein the second detection circuit comprises detection units respectively corresponding to the first port and the second port;

the detection unit comprises a power supply enabling end and a power receiving enabling end, and is used for obtaining power supply parameters corresponding to the opposite side equipment through a pull-down resistor of a power receiving enabling end enabling corresponding port when the opposite side equipment is detected to be the power supply equipment, generating a second detection result according to the power supply parameters, and obtaining power receiving parameters corresponding to the opposite side equipment through a pull-up resistor of the power supply enabling end enabling corresponding port when the opposite side equipment is detected to be the power receiving equipment, and generating the second detection result according to the power receiving parameters.

8. The interface detection module of claim 7, wherein the detection unit comprises an electronic receiver unit and an electronic supply unit;

the electronic receiving unit comprises a power receiving enabling end and at least one comparator, the enabling end of each comparator is connected with the power receiving enabling end, a first input end is connected with a corresponding reference voltage, a second input end is connected with a corresponding port, an output end is the output end of the second detection circuit, and the electronic receiving unit is used for acquiring power supply parameters corresponding to the opposite equipment through a pull-down resistor of the power receiving enabling end enabling the corresponding port when detecting that the opposite equipment is power supply equipment, and generating a second detection result according to the power supply parameters;

the power supply unit comprises a power supply enabling end and at least one comparator, the enabling end of each comparator is connected with the power supply enabling end, a first input end is connected with a corresponding reference voltage, a second input end is connected with a corresponding port, an output end is the output end of the second detection circuit, and the power supply unit is used for acquiring power receiving parameters corresponding to opposite equipment through a pull-up resistor of the power supply enabling end enabling the corresponding port when the opposite equipment is detected to be powered equipment, and generating a second detection result according to the power receiving parameters.

9. The interface detection module of claim 8, wherein the electronic unit comprises a third comparator, a fourth comparator, and a fifth comparator, and the electronic unit comprises a sixth comparator, a seventh comparator, an eighth comparator, a ninth comparator, and a tenth comparator;

the enabling end of the third comparator is connected with the power receiving enabling end, the first input end is connected with the fourth voltage, the second input end is connected with the corresponding port, the output end is the output end of the second detection circuit, the enabling end of the fourth comparator is connected with the power receiving enabling end, the first input end is connected with the fifth voltage, the second input end is connected with the corresponding port, the output end is the output end of the second detection circuit, the enabling end of the fifth comparator is connected with the power receiving enabling end, the first input end is connected with the sixth voltage, the second input end is connected with the corresponding port, the output end is the output end of the second detection circuit, the enabling end of the sixth comparator is connected with the power supply enabling end, the first input end is connected with the seventh voltage, the second input end is connected with the corresponding port, the output end is the output end of the second detection circuit, the enabling end of the seventh comparator is connected with the power supply enabling end, the first input end is connected with an eighth voltage, the second input end is connected with a corresponding port, the output end of the tenth comparator is connected with the power supply enabling end, the enabling end of the eighth comparator is connected with a ninth voltage, the second input end is connected with a corresponding port, the output end of the ninth comparator is connected with the power supply enabling end, the first input end is connected with a tenth voltage, the second input end is connected with a corresponding port, the output end of the tenth comparator is connected with the power supply enabling end, the first input end is connected with an eleventh voltage, the second input end is connected with a corresponding port, and the output end of the second detection circuit.

10. An interface detection method, wherein the interface detection method is applied to the interface detection module according to any one of claims 1 to 9, and comprises:

11. The interface detection method according to claim 10, further comprising:

and when the first detection result is not read, the control circuit generates a second enabling signal for controlling the first detection circuit to detect whether the interface to be detected is connected with opposite equipment or not, and the second enabling signal is transmitted to the first detection circuit.

12. A power management chip comprising the interface detection module of any one of claims 1 to 9.

13. An electronic device comprising the power management chip of claim 12.