CN114779915A

CN114779915A - Interface detection module and method, power management chip and electronic equipment

Info

Publication number: CN114779915A
Application number: CN202210377980.1A
Authority: CN
Inventors: 高桂华; 姜艳
Original assignee: Shanghai Awinic Technology Co Ltd
Current assignee: Shanghai Awinic Technology Co Ltd
Priority date: 2022-04-06
Filing date: 2022-04-06
Publication date: 2022-07-22
Anticipated expiration: 2042-04-06
Also published as: CN114779915B

Abstract

The application discloses an interface detection module and method, a power management chip and an electronic device; the interface detection circuit includes: the detection circuit comprises a control circuit, a first detection circuit and a second detection circuit; the detection end of the first detection circuit is respectively connected with the first port and the second port of the interface to be detected, the output end of the first detection circuit is connected with the first signal reading end of the control circuit and used for detecting whether the interface to be detected is connected with the opposite equipment or not and sending a first detection result to the control circuit; the first control end of the control circuit is connected with the control end of the second detection circuit and used for sending a first enabling signal to the second detection circuit after the first detection result is read; the second detection circuit is connected with the second signal reading end of the control circuit and used for detecting the interface characteristics of the interface to be detected after the interface to be detected is accessed to the opposite side equipment after receiving the first enabling signal, generating a second detection result and sending the second detection result to the control circuit. The power consumption in the interface detection process can be reduced.

Description

Interface detection module and method, power management chip and electronic equipment

Technical Field

The present application relates to the field of circuit technologies, and in particular, to an interface detection module and method, a power management chip, and an electronic device.

Background

The USB Type-C Power Delivery protocol (PD protocol for short) is a Power transfer protocol based on a specific interface (such as Type-C interface). The PD protocol can support 100W (20V/5A) power transmission at most, simultaneously support power supply role conversion, and can meet the power supply requirements of most electronic equipment, thereby being widely applied to various electronic equipment. Taking a Type-C interface as an example for explanation, in Type-C communication of a PD protocol, the first step is to identify the connection of a Type-C device. The Type-C connection detection is realized through two CC channels of a Type-C interface and VBUS (power supply connection), only one path of the CC ports corresponding to the CC d ports in the cable is communicated, and the CC1 or the CC2 is connected with the other path of the CC channels, is VCONN and supplies power for E-Mark. According to the PD protocol specification, the device type using a specific interface includes SNK (power consuming device), SRC (power supplying device), or DRP (dual role port device, which can be used as both the SRC and SNK to detect the SNK and the SRC), and the power is divided into several levels, such as 0.5A, 1.5A, and 3A. After the Type-C device is connected, the Type and power of the access device need to be identified according to the voltage on the CC line (e.g., the power connection using the Type-C interface). This requires a method of recognizing the connection of the counterpart device such as the Type-C device. In a traditional interface detection scheme, although a Type-C device can be identified by an identification circuit with a USB Type-C interface, the identification circuit needs to adopt a field effect transistor and an electronic switch, the number of components in the circuit is large, the circuit structure is complex, the identification and related judgment process is complex, and the corresponding detection process needs relatively high power consumption. Still some ADC Type-C automatic identification circuit is provided with the ADC, and it passes through the voltage of two CC mouths of ADC (analog-to-digital conversion module) test, judges the voltage range of two CC mouths to reacing the connection condition of Type-C interface, this Type of circuit although can realize Type-C's discernment, nevertheless under the condition that Type-C interface does not have the connection, need the incessantly detection of ADC to the CC mouth that Type-C corresponds, lead to the stand-by power consumption of product very big. It can be seen that the conventional interface detection scheme has a problem of high power consumption.

Disclosure of Invention

In view of this, the present application provides an interface detection module and method, a power management chip, and an electronic device, so as to solve the technical problem of high power consumption in the conventional interface detection scheme.

A first aspect of the present application provides an interface detection circuit, which includes a control circuit, a first detection circuit, and a second detection circuit;

the detection end of the first detection circuit is respectively connected with a first port and a second port of an interface to be detected, the output end of the first detection circuit is connected with a first signal reading end of the control circuit, and the first detection circuit is used for detecting whether the interface to be detected is accessed to opposite equipment or not and sending a first detection result to the control circuit after the interface to be detected is accessed to the opposite equipment;

the first control end of the control circuit is connected with the control end of the second detection circuit and is used for sending a first enabling signal to the second detection circuit after the first detection result is read;

the second detection circuit is connected with a second signal reading end of the control circuit and used for detecting the interface characteristics of the interface to be detected after the interface to be detected is accessed to the opposite side equipment after receiving the first enabling signal, generating a second detection result and sending the second detection result to the control circuit.

Optionally, the control circuit further includes a second control terminal, where the second control terminal is connected to the control terminal of the first detection circuit; the control circuit is further configured to generate a second enable signal for controlling the first detection circuit to detect whether the interface to be detected is connected to the opposite device or not when the first detection result is not read, and transmit the second enable signal to the first detection circuit through the second control terminal.

Optionally, the interface to be detected comprises a Type-C interface; the first detection circuit comprises a first comparator, a second comparator and an AND gate; the first input end of the first comparator is connected with a first voltage, the second input end of the first comparator is connected with a first port and a second port which are respectively connected with a Type-C interface, the output end of the first comparator is connected with a first input end of the AND gate, the first input end of the second comparator is connected with a first port and a second port which are respectively connected with a Type-C interface, the second input end of the second comparator is connected with a second voltage, the output end of the second comparator is connected with a second input end of the AND gate, the output end of the AND gate is connected with the first signal reading end of the control circuit, the first port and the second port correspond to a third voltage, and the first voltage, the third voltage and the second voltage are sequentially decreased.

Optionally, the first detection circuit further includes a voltage division unit; one side of a voltage dividing end of the voltage dividing unit is connected with the first port and the second port, and the other side of the voltage dividing end of the voltage dividing unit is connected with a second input end of the first comparator and a first input end of the second comparator, and the voltage dividing unit is used for providing the third voltage.

Optionally, the interface detection module further includes a data transmission circuit; the first input end of the data transmission circuit is connected with the output end of the first detection circuit, the second input end of the data transmission circuit is connected with the output end of the second detection circuit, the first output end of the data transmission circuit is connected with the first signal reading end of the main control chip, and the second output end of the data transmission circuit is connected with the second signal reading end of the main control chip and used for receiving and latching the first detection result and the second detection result so that the main control chip can read the first detection result and the second detection result.

Optionally, the data transmission circuit includes latch units corresponding to the first detection circuit and the second detection circuit, respectively, and the latch units are configured to latch the received first detection result or the second detection result.

Optionally, the latch unit includes an or gate and a D flip-flop; the first input end of the OR gate is connected with the output end of the first detection circuit or the second detection circuit, the second input end of the OR gate is connected with the Q end of the D trigger, the output end of the OR gate is connected with the D end of the D trigger, and the Q end of the D trigger is connected with the first signal reading end or the second signal reading end of the control circuit.

Optionally, the second detection circuit includes detection units corresponding to the first port and the second port, respectively; the detection unit comprises a power supply enabling end and a power receiving enabling end and is used for detecting that the opposite side equipment is power supply equipment, acquiring power supply parameters corresponding to the opposite side equipment through the pull-down resistor corresponding to the port enabled by the power receiving enabling end, generating a second detection result according to the power supply parameters, detecting that the opposite side equipment is power receiving equipment, acquiring the power receiving parameters corresponding to the opposite side equipment through the pull-up resistor corresponding to the port enabled by the power supply enabling end, and generating the second detection result according to the power receiving parameters.

Optionally, the detection unit comprises a power receiving electronic unit and a power supply electronic unit; the power receiving electronic unit comprises a power receiving enabling end and at least one comparator, the enabling end of each comparator is connected with the power receiving enabling end, a first input end is connected with a corresponding reference voltage, a second input end is connected with a corresponding port, and an output end is an output end of the second detection circuit and is used for acquiring a power supply parameter corresponding to the opposite equipment through a pull-down resistor of the corresponding port enabled by the power receiving enabling end when the opposite equipment is detected to be the power supply equipment, and generating a second detection result according to the power supply parameter; the power supply subunit includes power supply enable end and at least one comparator, and the enable end of each comparator is connected power supply enable end, the reference voltage that first input access corresponds, and the corresponding port is connected to the second input, and the output does second detection circuitry's output is used for detecting when the other side equipment is the powered device, through power supply enable end enables the pull-up resistance that corresponds the port, obtains the powered parameter that the other side equipment corresponds, according to the powered parameter generates the second testing result.

Optionally, the power receiving electronic unit includes a third comparator, a fourth comparator and a fifth comparator, and the power supply electronic unit includes a sixth comparator, a seventh comparator, an eighth comparator, a ninth comparator and a tenth comparator; the enabling end of the third comparator is connected with the power receiving enabling end, the first input end is connected with a fourth voltage, the second input end is connected with a corresponding port, the output end is the output end of the second detection circuit, the enabling end of the fourth comparator is connected with the power receiving enabling end, the first input end is connected with a fifth voltage, the second input end is connected with a corresponding port, the output end is the output end of the second detection circuit, the enabling end of the fifth comparator is connected with the power receiving enabling end, the first input end is connected with a sixth voltage, the second input end is connected with a corresponding port, the output end is the output end of the second detection circuit, the enabling end of the sixth comparator is connected with the power supply enabling end, the first input end is connected with a seventh voltage, the second input end is connected with a corresponding port, the output end is the output end of the second detection circuit, the enabling end of the seventh comparator is connected with the power supply enabling end, the first input end is connected with the eighth voltage, the second input end is connected with the corresponding port, the output end is the output end of the second detection circuit, the enabling end of the eighth comparator is connected with the power supply enabling end, the first input end is connected with the ninth voltage, the second input end is connected with the corresponding port, the output end is the output end of the second detection circuit, the enabling end of the ninth comparator is connected with the power supply enabling end, the first input end is connected with the tenth voltage, the second input end is connected with the corresponding port, the output end is the output end of the second detection circuit, the enabling end of the tenth comparator is connected with the power supply enabling end, the first input end is connected with the eleventh voltage, the second input end is connected with the corresponding port, and the output end is the output end of the second detection circuit.

The application also provides an interface detection method, which comprises the following steps:

the first detection circuit detects whether the interface to be detected is accessed to the opposite side equipment or not, and sends a first detection result to the control circuit after the interface to be detected is accessed to the opposite side equipment;

after the control circuit reads the first detection result, a first enabling signal is sent to the second detection circuit;

and after receiving the first enabling signal, the second detection circuit detects the interface characteristics of the interface to be detected after the interface to be detected is accessed to the opposite side equipment, generates a second detection result, and sends the second detection result to the control circuit.

Optionally, the interface detection method further includes: and when the control circuit does not read the first detection result, generating a second enabling signal for controlling the first detection circuit to detect whether the interface to be detected is accessed to the opposite side device, and transmitting the second enabling signal to the first detection circuit.

The present application further provides a power management chip, including the interface detection module according to any of the above embodiments.

The present application further provides an electronic device including the power management chip according to any of the above embodiments.

According to the interface detection module and method, the power management chip and the electronic device, the first detection circuit can be adopted to pre-detect whether the interface to be detected is connected to the opposite device, in the pre-detection process, no matter the interface to be detected is in the SRC mode or the SNK mode, only one signal representing the states of the first port and the second port at that time needs to be connected, an extra circuit is not needed to control the turning time and frequency, the power consumption required by the part of work of controlling the turning time and frequency can be saved, so that the power consumption of the corresponding interface detection module is reduced, in addition, when the interface to be detected is in the standby state, no potential difference exists between the first port and the second port, the problems that the electro-migration accelerates the corrosion speed between corresponding signal pins can be avoided, and the loss of the corresponding interface detection module is reduced; after the interface to be detected is connected to the opposite device, the control circuit sends a first enabling signal to the second detection circuit according to the first detection result, so that the second detection circuit starts to detect the interface characteristics of the interface to be detected after the interface to be detected is connected to the opposite device, a second detection result is generated, and the second detection result is sent to the control circuit, so that the control circuit can manage the power of the interface to be detected according to the second detection result, and the stability of the interface to be detected in various power transmission processes is ensured.

The first detection circuit adopts a low-power-consumption single-gear comparator to build a pre-detection circuit to complete interface pre-detection, so that the circuit structure can be simplified on the basis of ensuring the stability of the pre-detection process, and the detection power consumption is further reduced; the second detection circuit adopts the multi-gear comparator to realize the detection of the corresponding interface characteristics so as to accurately detect the interface characteristics of the interface to be detected after the interface to be detected is connected to the equipment of the other party, and the accuracy in the detection process can be improved.

Therefore, the interface detection module can guarantee the stability of the interface to be detected in the interface detection process from multiple aspects, can reduce the power consumption generated in the interface detection process, avoids the situations of accelerated corrosion to damage the interface to be detected, and prolongs the service life of the interface to be detected.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

FIGS. 1a and 1b are schematic diagrams of a conventional Type-C interface detection circuit;

FIG. 2 is a schematic structural diagram of an interface detection module according to an embodiment of the present application;

FIG. 3 is a schematic structural diagram of an interface detection module according to another embodiment of the present application;

FIGS. 4a and 4b are schematic diagrams of a first detection circuit according to an embodiment of the present application;

FIG. 5 is a block diagram of an interface detection module according to another embodiment of the present application;

FIG. 6a is a schematic diagram of a data transmission circuit according to an embodiment of the present application;

FIG. 6b is a schematic diagram of a latch unit according to an embodiment of the present application;

FIG. 7 is a timing diagram of a second detection circuit according to an embodiment of the present application;

FIGS. 8a and 8b are schematic structural diagrams of a detecting unit according to an embodiment of the present application;

fig. 9 is a schematic structural diagram of an interface detection method according to an embodiment of the present application.

Detailed Description

The inventor researches a detection scheme of a specific interface such as a traditional Type-C interface, and finds that a Type-C connection detection unit is arranged in a further Type-C interface detection scheme, a structural diagram corresponding to the Type-C interface detection scheme can be shown in fig. 1a, and the detection scheme includes a Type-C connection detection unit, an ADC voltage detection unit and a Type-C connection identification unit which are connected in sequence, wherein CC1 is connected with the Type-C connection detection unit and the ADC voltage detection unit respectively, and CC2 is connected with the Type-C connection detection unit and the ADC voltage detection unit respectively. When the Type-C interface does not have the connection under standby mode, only need to open Type-C and connect the detecting element, connect the detecting element and discern the equipment connection back when Type-C, just send wake-up signal to ADC voltage detecting element, then ADC voltage detecting element just begins to detect the voltage of CC end, does not need ADC voltage detecting element to carry out voltage detection to the CC end in the time, has reduced the stand-by power consumption of Type-C product to a certain extent. Specifically, the Type-C connection detection unit can refer to fig. 1b, and the corresponding connection detection process is as follows: according to the PD protocol, TYPE-C devices can be configured in different functional modes: SNK, SRC or DRP. Wherein, the charging mode corresponding to the SNK needs to provide RD (pull-down resistor) in the CC channel; the discharge mode corresponding to SRC needs to provide RP (pull-up resistance) in the CC channel; the dual-role mode corresponding to the DRP may be used as either SNK or SRC, and needs to be dynamically switched between SNK and SRC. When the Type-C interface is not connected, the circuit enters a standby detection state. Under the standby detection state, the Type-C connection identification circuit only needs to start a front-end Type-C connection detection unit, and other circuits are in sleep to ensure lower standby power consumption. The operation mode signal mode _ sel may be provided by a digital logic circuit or an MCU (micro control unit), and when the operation mode signal mode _ sel is equal to 0, it is indicated in the SNK mode; when mode _ sel ═ 1, it indicates the SRC mode. In the SNK mode, the operation mode signal mode _ sel is 0, and the data selector mux _ sel selects the voltage of 0.2V as the reference voltage and supplies the reference voltage to the first comparator comp1 and the second comparator comp 2. When the first CC voltage is greater than 0.2V, the first comparator comp1 outputs a result comp _ CC1 to 1. At this time, the signal mode _ sel is 0, comp _ cc1 is 1, and the output signal wake _ up _ cc1 after passing through the xor gate is set to 1. Similarly, when the second CC voltage is greater than 0.2V, the second comparator comp2 outputs a result comp _ CC2 to set 1. At this time, the signal mode _ sel is 0, comp _ cc2 is 1, and the output signal wake _ up _ cc2 after the exclusive or gate is set to 1. In the SRC mode, the operation mode signal mode _ sel is 1, and the data selector mux _ sel selects the 2.6V voltage as the reference voltage and sends the reference voltage to the first comparator comp1 and the second comparator comp 2. When the first CC voltage is less than 2.6V, the first comparator comp1 outputs a result comp _ CC1 set to 0. At this time, the signal mode _ sel is 1, comp _ cc1 is 0, and the output signal wake _ up _ cc1 after passing through the xor gate is set to 1. Similarly, when the second CC voltage is less than 2.6V, the second comparator comp2 outputs a result comp _ CC2 set to 0. At this time, the signal mode _ sel is 1, comp _ cc2 is 0, and the output signal wake _ up _ cc2 after passing through the xor gate is set to 1. Since the wake _ up signal includes the wake _ up _ cc1 signal and the wake _ up _ cc2 signal, the output signals after passing through the or gate trigger the ADC voltage detection unit to start to operate as long as one of the wake _ up _ cc1 or wake _ up _ cc2 is set to 1, and the wake _ up signal is set to 1. And when the standby detection is carried out, judging whether the Type-C interface is connected with other equipment or not according to different working modes. When RD is provided, it operates in SNK mode. In the SNK mode, when the Type-C interface is not connected, the voltage on the CC1 and the CC2 is 0. According to the PD protocol, when the Type-C connection detection unit detects that the voltage on the CC1 or the CC2 is greater than 0.2V, the Type-C interface is judged to be connected. When providing RP, it operates in SRC mode. In SRC mode, when the Type-C interface is not connected, the voltage on the CC1 and the CC2 is 5V. According to the PD protocol, when the Type-C connection detection unit detects that the voltage on the CC1 or the CC2 is less than 2.6V, the Type-C interface is judged to be connected. When the Type-C interface is connected, the ADC voltage detection unit is awakened. The ADC time-divisionally AD-converts the voltages of CC1 and CC 2. And finally, the Type-C connection identification unit identifies the Type and the power of the accessed Type-C interface equipment according to the PD protocol and the AD conversion voltage result.

The inventor further studies the Type-C interface detection scheme shown in fig. 1a and 1b to find that, when the Type-C interface is not connected in the SRC mode as DRP, the voltage on CC1 and CC2 is high (e.g. 5V); in the SNK mode, when the Type-C interface is not connected, the voltage on the CC1 and the CC2 is low (such as 0). The voltage on the CC is inevitably turned over continuously, and an extra circuit is needed to operate to control the turning time and frequency, so that extra power consumption is generated; in addition, CC is constantly turned between high level and low level, so that CCl pin and CC2 pin are charged for a long time even in standby state, and meanwhile, since USB Type-C interface may be exposed for a long time in the application process, so that various foreign matters are easily entered, some foreign matters are conductive, for example: rain, sweat, oil, food, etc. The conductive foreign matters are attached to the CCl pin and the CC2 pin which are electrified for a long time, so that electromigration occurs between the CCl pin and the CC2 pin for a long time, and the corrosion speed between the signal pins is accelerated. It can be seen that the problem that the corrosion speed of the CCl pin and the CC2 pin is high also exists in the USB Type-C interface in the Type-C interface detection scheme.

In order to solve the problems, the first detection circuit is firstly adopted to perform pre-detection on whether the interface to be detected is connected to the equipment of the other party, in the pre-detection process, no matter the interface to be detected is in an SRC mode or an SNK mode, only one signal representing the state of the current first port and the current second port needs to be connected, and no extra circuit is needed to control the time and the frequency of turnover.

The technical solutions in the embodiments of the present application are clearly and completely described below with reference to the accompanying drawings, and it is obvious that the described embodiments are only some embodiments of the present application, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application. The following embodiments and their technical features may be combined with each other without conflict.

In a first aspect of the present application, an interface detection module is provided, and as shown in fig. 2, the interface detection module includes a control circuit 110, a first detection circuit 200, and a second detection circuit 300.

The detection end of the first detection circuit 200 is connected to a first port and a second port (not shown in fig. 2) of the interface to be detected, and the output end is connected to the first signal reading end of the control circuit 110, and is configured to detect whether the interface to be detected is connected to the opposite device, and send a first detection result to the control circuit 110 after the interface to be detected is connected to the opposite device; the interface to be detected can comprise a Type-C interface, the first port can comprise a CC1 port of the Type-C interface, and the second port can comprise a CC2 port of the Type-C interface.

The first control end of the control circuit 110 is connected to the control end of the second detection circuit 300, and is configured to send a first enable signal to the second detection circuit 300 after the first detection result is read.

The second detection circuit 300 is connected to the second signal reading end of the control circuit 110, and is configured to detect an interface characteristic of the interface to be detected after the interface to be detected is accessed to the opposite device after receiving the first enable signal, generate a second detection result, and send the second detection result to the control circuit 110, so that the control circuit 110 performs power management corresponding to the interface to be detected according to the second detection result.

The opposite equipment comprises equipment which is inserted into a Type-C interface and waits for detecting the interface, when the corresponding interface to be detected serves as a dual-role mode, the opposite equipment can be used as an interface of power supply equipment to work in an SRC mode and can also be used as an interface of power receiving equipment to work in an SNK mode, and the opposite equipment comprises the power receiving equipment or the power supply equipment. Specifically, when the interface to be detected is in the SRC mode, the accessed peer device is a powered device, and when the interface to be detected is in the SNK mode, the accessed peer device is a power supply device. The detection end of the first detection circuit 200 is connected to the first port and the second port of the port to be detected, and only one signal representing the state of the first port and the second port at that time needs to be accessed no matter the port to be detected is in the SRC mode or the SNK mode, so that the level without turning is provided, an extra circuit is not needed to control the turning time and frequency, the power consumption required by the part of work of controlling the turning time and frequency can be saved, and the power consumption of the corresponding interface detection module is reduced. In addition, when the first detection circuit 200 detects whether the interface to be detected is connected to the opposite device, the condition of level inversion does not exist, so that no potential difference exists between the first port and the second port when the port to be detected is in a standby state, the problem that the electromigration accelerates the corrosion speed between corresponding signal pins can be avoided, the loss of the corresponding interface detection module is reduced, and the service life of the corresponding interface detection module is prolonged.

Optionally, the control circuit 110 may include an independent control chip, or may be integrated in a main control chip of the power management chip and/or the electronic device, and is configured to control each circuit connected to the first detection circuit 200 and the second detection circuit 300, so as to efficiently and stably obtain information, such as whether the interface to be detected is connected to the opposite device, and interface characteristics after the interface is connected to the opposite device, and perform power management according to the information, so that the port to be detected can stably operate in both the SNK mode and the SRC mode.

Optionally, the second detection circuit 300 starts to operate after receiving the first enable signal, detects the interface characteristic of the port to be detected after accessing the opposite device, generates a second detection result representing the interface characteristic, and sends the second detection result to the control circuit 110, so that the control circuit 110 can control the port to be detected to perform power transmission stably according to the second detection result. Optionally, the interface characteristics include a working mode (SNK mode or SRC mode) in which the port to be detected is located, a power parameter after the opposite device is inserted in each working mode, and other characteristics.

The interface detection module firstly adopts the first detection circuit 200 to pre-detect whether the interface to be detected is connected to the opposite equipment, only one signal representing the state of the current first port and second port needs to be connected no matter the port to be detected is in the SRC mode or the SNK mode in the pre-detection process, and no extra circuit is needed to control the time and frequency of turnover, so that the power consumption required by the part of work of controlling the time and frequency of turnover can be saved, the power consumption of the corresponding interface detection module is reduced, and in the standby state of the interface to be detected, no potential difference exists between the first port and the second port, the problem that electromigration accelerates the corrosion speed between corresponding signal pins can be avoided, and the loss of the corresponding interface detection module is reduced; after the interface to be detected is accessed to the opposite device, the control circuit 110 sends a first enabling signal to the second detection circuit 300 according to the first detection result, so that the second detection circuit 300 starts to detect the interface characteristics of the interface to be detected after the interface to be detected is accessed to the opposite device, a second detection result is generated, and the second detection result is sent to the control circuit 110, so that the control circuit 110 can manage the power of the interface to be detected according to the second detection result, and the stability of the interface to be detected in various power transmission processes is ensured; therefore, the interface detection module can not only efficiently and stably carry out interface detection and corresponding power management on the interface to be detected, but also reduce power consumption generated in the interface detection process, avoid the situations of accelerated corrosion to damage the interface to be detected, and improve the service life of the interface to be detected.

In one embodiment, referring to fig. 3, the control circuit 110 further includes a second control terminal, and the second control terminal is connected to the control terminal of the first detection circuit 200; the control circuit 110 is further configured to generate a second enable signal for controlling the first detection circuit 200 to detect whether the interface to be detected is connected to the opposite device when the first detection result is not read, that is, the port to be detected is not connected to the opposite device, and transmit the second enable signal to the first detection circuit 200 through the second control terminal, so that the first detection circuit 200 can perform pre-detection (that is, pre-detect whether the interface to be detected is connected to the opposite device) after receiving the second enable signal, and improve the orderliness of the pre-detection process. In this embodiment, the control circuit 110 enables the first detection circuit 200 to perform pre-detection through the second enable signal, closes the second detection circuit 300, enables the second detection circuit 300 through the first enable signal to obtain the interface characteristics of the port to be detected after the port to be detected is accessed to the device of the other party, and closes the first detection circuit 200, so that the orderliness and stability of the related control process can be improved, and the power consumption generated in the whole detection process can be reduced.

In one embodiment, the interface to be detected comprises a Type-C interface; the first detection circuit 200 may employ at least one comparator, and gate and/or other simple logic device to detect electrical signals of the Type-C interface in various operating modes, so as to employ a low power consumption device to stably and effectively identify whether the Type-C interface is connected to the opposite device.

In one example, referring to fig. 4a, the first detection circuit 200 includes a first comparator comp1, a second comparator comp2, and an and gate 201; a first input end of the first comparator comp1 is connected to a first voltage ref1, a second input end of the first comparator comp1 is connected to a first port CC1 and a second port CC2 which are respectively connected to a Type-C interface, an output end of the first comparator comp2 is connected to a first port CC1 and a second port CC2 which are respectively connected to a Type-C interface, a second input end of the second comparator comp 3675 is connected to a second voltage ref2, an output end of the second comparator comp2 is connected to a second input end of the and gate 201, an output end of the and gate 201 can be connected to a first signal reading end of the control circuit 110 to output a first detection result, the first port CC1 and the second port CC2 correspond to a third voltage ref3, the first voltage ref1, the third voltage ref3 and the second voltage 2 are sequentially decreased, that is ref1> ref3> ref2, so that the Type-C interface is in any operation mode, the first detection circuit 200 can accurately identify whether the Type-C interface is connected to the opposite device. Optionally, the first detection result may be represented by a relatively simple level signal such as 1 or 0, for example, the first detection circuit 200 outputs 1 to represent that the Type-C interface is not accessed to the other device, and outputs 0 to represent that the Type-C interface is accessed to the other device, and if the first detection result is changed from 1 to 0, the Type-C interface is accessed to the other device, and at this time, a corresponding first detection result (e.g., a simple level signal such as 0) may be output, so that the control circuit 110 may timely and accurately read the first detection result.

Further, referring to fig. 4b, the first detection circuit 200 further includes a voltage divider 202; one side of the voltage dividing end of the voltage dividing unit 202 is connected to the first port CC1 and the second port CC2, and the other side is connected to the second input end of the first comparator comp1 and the first input end of the second comparator comp2, so as to provide the third voltage ref 3. Optionally, the voltage dividing unit 202 may include a plurality of resistors connected in series, and the voltage dividing end is disposed between the resistors, for example, as shown in fig. 4b, the voltage dividing unit 202 includes a first resistor R1 and a second resistor R2 connected in series, the voltage dividing end is disposed between a first resistor R1 and a second resistor R2, one end of the first resistor R1 is connected to the set voltage, the other end is connected to the voltage dividing end, one end of the first resistor R1 is connected to the voltage dividing end, and the other end is grounded, so that the voltage dividing unit 202 may divide the set voltage (e.g., 1.8V as shown in fig. 4 b) and provide the third voltage ref3 at the voltage dividing end. Alternatively, the first resistor R1 and the second resistor R2 may include large resistors with equal resistance values, such as R1 — R2 — 1M Ω, so that the set voltage may be divided more stably.

Specifically, the first voltage ref1, the third voltage ref3, and the second voltage ref2 may be set according to the relevant regulations of the Type-C protocol, and for example, the first voltage ref1 may be set to 1.45V, the third voltage ref3 may be set to 0.9V, and the second voltage ref2 may be set to 0.55V. Accordingly, the threshold of the first comparator comp1 is the first voltage ref1 is 1.45V, the threshold of the second comparator comp2 is the second voltage ref2 is 0.55V, the other ends of the two comparators are respectively connected with the third voltage ref3 which is 0.9V, when the first port CC1 and the second port CC2 are floating (not connected with the other device), the first comparator comp1 and the second comparator comp2 both output a high level 1 because the third voltage ref3 is 0.9V, and the and gate 201 outputs a high level 1 at this time. According to the Type-C protocol, when the Type-C interface is connected with a counterpart device and works in an SRC mode, the voltage on the Type-C interface is pulled up to 1.7-5.5V, when the Type-C interface is connected with the counterpart device and works in an SNK mode, the voltage on the Type-C interface is pulled down to the ground by a 5.1K resistor, the Type-C protocol specifies that the lowest voltage corresponding to the Type-C interface is 1.7V in the SRC mode, so that when the Type-C interface is in the SRC mode, after the power supply device is plugged in, the voltage on the first port CC1 or the second port CC2 is pulled to at least 1.7V, if the power supply device is a strong source, the first comparator comp1 outputs 0, the second comparator comp2 outputs 1, and the AND gate 201 outputs 0; when the Type-C interface is at SNK, due to the fact that the pull-down resistors corresponding to the first port CC1 or the second port CC2 are equivalent to 5.1K and 1M connected in parallel, the voltage on the pull-down resistors is about 8mV, at this time, the first comparator comp1 outputs 1, the second comparator comp2 outputs 0, and the and gate 201 outputs 0. It can be seen that the output of the and gate 201 changes from 1 to 0 to represent that the Type-C interface accesses the counterpart device.

In one embodiment, as shown with reference to fig. 5, the interface detection module further comprises a data transmission circuit 400; the first input end of the data transmission circuit 400 is connected to the output end of the first detection circuit 200, the second input end is connected to the output end of the second detection circuit 200, the first output end is connected to the first signal reading end of the main control chip 110, and the second output end is connected to the second signal reading end of the main control chip 110, so as to receive and latch the first detection result and the second detection result, so that the main control chip 110 can read the first detection result and the second detection result. In this embodiment, the data transmission circuit 400 is adopted to receive and latch the first detection result and the second detection result, so that the main control chip 110 reads the required first detection result or second detection result from the data transmission circuit 400 according to the related control requirements, and the stability of the transmission of the first detection result or second detection result can be ensured, thereby ensuring the stability of the related control operation of the main control chip 110. Alternatively, the data transmission circuit 400 may use a relatively simple signal to represent the first detection result and/or the second detection result, for example, use a first interrupt signal to represent the first detection result, use a second interrupt signal to represent the second detection result, and so on, to simplify the corresponding data reading process and improve the data reading efficiency.

In one example, the data transmission circuit 400 includes latch units corresponding to the first detection circuit 200 and the second detection circuit 300, respectively, and the latch units are configured to latch the received first detection result or the second detection result. Specifically, referring to fig. 6a, in the data transmission circuit 400, the first latch unit 410 corresponding to the first detection circuit 200 and the second latch unit 420 corresponding to the second detection circuit 300, the first latch unit 410 can receive and latch the first detection result, and the second latch unit 420 can receive and latch the second detection result to respectively latch the corresponding detection results, thereby improving the stability of the detection result latching process.

Specifically, referring to fig. 6b, the latch unit may include an or gate 401 and a D flip-flop 402; a first input terminal of the or gate 401 is connected to an output terminal of the first detection circuit 200 or the second detection circuit 300, a second input terminal thereof is connected to a Q terminal of the D flip-flop 402, an output terminal thereof is connected to a D terminal of the D flip-flop 402, and the Q terminal of the D flip-flop 402 is connected to a first signal reading terminal or a second signal reading terminal of the control circuit 110. In this way, after receiving the corresponding detection result (the first detection result or the second detection result), the D flip-flop 402 may be triggered in time to latch the corresponding detection result and wait for the control circuit 110 to read the corresponding detection result.

In other examples, the data transmission circuit 400 may also use other logic circuits such as a transmission gate to transmit the first detection result and/or the second detection result.

In one embodiment, the second detection circuit 300 includes various detection circuits capable of detecting interface characteristics of the interface to be detected after the interface is connected to the counterpart device, for example, a Type-C detection circuit or other interface detection circuits with simpler structure and lower power consumption, which are adopted in the schemes shown in fig. 1a and fig. 1 b.

In one example, the second detection circuit 300 is analyzed using a Type-C interface as an example. The second detection circuit 300 can detect the interface characteristics of the Type-C interface after the Type-C interface is connected to the other device by opening the pull-up resistor, the pull-down resistor and other modes corresponding to the Type-C interface in a time-sharing manner. Specifically, according to the Type-C protocol, when the Type-C interface is in the SRC mode, the current source or the pull-up resistor can be selected by the chip to represent the power supply capacity of the chip. The corresponding power supply capacity can be one of Default USB/1.5A/3A, and when the power supply of the chip is 4.75-5.5V, the pull-up resistor represents 3 power supply capacities by 56K/22K/10K; when the power supply of the chip is 3.3V, the pull-up resistor selects 36K/12K/4.7K to represent 3 power supply capacities; the chip can also select 80uA/180uA/330uA to represent 3 power supply capacities. The chip is connected with different pull-up resistors or the current source is different in threshold value of the pull-down resistor, and it can be seen that when the Type-C interface is in SRC, 2.6V/1.6V is needed to detect one pull-down resistor (such as Rd resistor) corresponding to the Type-C interface, and 0.8V/0.4V/0.2V is needed to detect another pull-down resistor (such as Ra resistor) corresponding to the Type-C interface, and at this time, 5 comparators can be used for detection. Specifically, the voltage thresholds involved in the detection process can be referred to as shown in tables 1 to 3.

TABLE 1

	Minimum voltage	Maximum voltage	Comparator threshold
				Ra resistance detection potential	0.00V	0.15V	0.20V
Rd resistance detection potential	0.25V	1.50V	1.60V
				Suspended voltage	1.60V

TABLE 2

	Minimum voltage	Maximum voltage	Comparator threshold
				Ra resistance detection potential	0.00V	0.35V	0.40V
Rd resistance detection potential	0.45V	1.50V	1.60V
				Suspended voltage	1.65V

TABLE 3

	Minimum voltage	Maximum voltage	Comparator threshold
				Ra resistance detection potential	0.00V	0.75V	0.80V
Rd resistance detection potential	0.85V	2.45V	2.60V
				Suspended voltage	2.75V

When the Type-C interface is in the SNK mode, the second detection circuit 300 may open the pull-down resistor 5.1K corresponding to the Type-C interface, the SRCs with different current capabilities fall on the resistor of the 5.1K to generate different voltage drops, according to the Type-C protocol, there are 3 stages of 0.2V/0.66V/1.23V, respectively, when the voltage on the 5.1K is 0.2V to 0.66V, it indicates that the power supply device with the power supply capability of Default USB is connected, when the voltage on the 5.1K is 0.66V to 1.23V, it indicates that the power supply device with the power supply capability of 1.5A is connected, when the voltage on the 5.1K is greater than 1.23V, it indicates that the power supply device with the power supply capability of 3A is connected, and the corresponding voltage threshold may refer to table 4.

TABLE 4

	Minimum voltage	Maximum voltage	Comparator threshold
				Potential of Ra resistance	-0.25V	0.15V	0.20V
Potential at the time of connection of Rd resistance	0.25V	2.04V
				Rd resistance potential at 500mA	0.25V	0.61V	0.66V
Rd resistance potential at 1.5A	0.70V	1.16V	1.23V
				Rd resistance potential at 3A	1.31V	2.04V

In the detection process of the second detection circuit 300, the control circuit 110 may enable the pull-up resistor (current source) and the pull-down 5.1K resistor corresponding to the Type-C interface to detect signals on the first port CC1 and the second port CC2, at this time, the timing diagram of the second detection circuit 300 corresponding to the first port CC1 and the second port CC2 may be repeatedly switched (or flipped) between the SRC mode and the SNK mode, as shown in fig. 7, to identify the operating mode corresponding to the Type-C interface and the power parameter in each operating mode after the opposite device is plugged in, generate a second detection result, and complete the interface feature detection corresponding to the Type-C interface.

The inventor finds that when the Type-C interface is in the SRC mode, a corresponding part of the pull-down resistor Rd has a threshold value of 2.6V/1.6V, and the other part of the pull-down resistor Ra has a threshold value of 0.8V/0.4V/0.2V; at SNK, the corresponding pull-up resistor has thresholds of 1.23V, 0.66V, 0.2V and the like. Therefore, the second detection circuit 300 can realize the detection of the corresponding interface characteristics through the multi-gear comparator so as to accurately detect the interface characteristics of the Type-C interface after the Type-C interface is connected to the equipment of the other side, and improve the accuracy in the detection process.

In one example, the second detection circuit 300 includes detection cells corresponding to the first port CC1 and the second port CC2, respectively; the detection unit comprises a power supply enabling end EN _ SRC and a power receiving enabling end EN _ SNK, and is used for enabling a pull-down resistor of a corresponding port through the power receiving enabling end EN _ SNK when the opposite side equipment is detected to be power supply equipment, obtaining a power supply parameter corresponding to the opposite side equipment, generating a second detection result according to the power supply parameter, enabling a pull-up resistor of the corresponding port through the power supply enabling end EN _ SRC when the opposite side equipment is detected to be power receiving equipment, obtaining a power receiving parameter corresponding to the opposite side equipment, and generating the second detection result according to the power receiving parameter.

Specifically, referring to fig. 8a, the detection unit includes a power receiving unit 310 and a power supply unit 320; the powered electronic unit 310 includes the powered enable end EN _ SNK and at least one comparator, an enable end of each comparator is connected to the powered enable end EN _ SNK, a first input end is connected to a corresponding reference voltage, a second input end is connected to a corresponding port, and an output end is an output end of the second detection circuit 300, and is configured to, when it is detected that the opposite device is a power supply device, obtain a power supply parameter corresponding to the opposite device through a pull-down resistor of the port corresponding to the powered enable end EN _ SNK, and generate the second detection result according to the power supply parameter; the power supply unit 320 includes the power supply enable end EN _ SRC and at least one comparator, where an enable end of each comparator is connected to the power supply enable end EN _ SRC, a first input end of each comparator is connected to a corresponding reference voltage, a second input end of each comparator is connected to a corresponding port, and an output end of each comparator is an output end of the second detection circuit 300, and is configured to, when it is detected that the opposite device is a powered device, enable a pull-up resistor of the corresponding port through the power supply enable end EN _ SRC to obtain a powered parameter corresponding to the opposite device, and generate the second detection result according to the powered parameter. Optionally, the first input terminal of each comparator may comprise a positive input terminal, the second input terminal may comprise a negative input terminal, and the reference voltage may be determined according to the configuration characteristics of the Type-C interface waiting detection interface and the relevant specification of the Type-C protocol.

Specifically, referring to fig. 8a and 8b, the power receiving electronic unit includes a third comparator compa1, a fourth comparator compa2, and a fifth comparator compa3, and the power supplying electronic unit includes a sixth comparator compb1, a seventh comparator compb2, an eighth comparator compb3, a ninth comparator compb4, and a tenth comparator compb 5. An enable terminal of the third comparator comp1 is connected to the power receiving enable terminal EN _ SNK, a first input terminal is connected to a fourth voltage (as shown in fig. 1.23V), a second input terminal is connected to a corresponding port (first port CC1 or second port CC2), an output terminal is an output terminal of the second detection circuit 300, an enable terminal of the fourth comparator comp2 is connected to the power receiving enable terminal EN _ SNK, a first input terminal is connected to a fifth voltage (as shown in fig. 0.66V), a second input terminal is connected to a corresponding port, an output terminal is an output terminal of the second detection circuit 300, an enable terminal of the fifth comparator comp 3 is connected to the power receiving enable terminal EN _ SNK, a first input terminal is connected to a sixth voltage (as shown in fig. 0.2V), a second input terminal is connected to a corresponding port, an output terminal is an output terminal of the second detection circuit 300, an enable terminal of the sixth comparator comp1 is connected to the power supply enable terminal EN _ SNK, the first input terminal is connected to a seventh voltage (as shown in fig. 2.6V), the second input terminal is connected to a corresponding port, the output terminal is the output terminal of the second detection circuit 300, the enable terminal of the seventh comparator compb2 is connected to the power supply enable terminal EN _ SRC, the first input terminal is connected to an eighth voltage (as shown in fig. 1.6V), the second input terminal is connected to a corresponding port, the output terminal is the output terminal of the second detection circuit 300, the enable terminal of the eighth comparator compb3 is connected to the power supply enable terminal EN _ SRC, the first input terminal is connected to a ninth voltage (as shown in fig. 0.8V), the second input terminal is connected to a corresponding port, the output terminal is the output terminal of the second detection circuit 300, the enable terminal of the ninth comparator compb4 is connected to the power supply enable terminal EN _ SRC, the first input terminal is connected to a tenth voltage (as shown in fig. 0.4V), the second input terminal is connected to a corresponding port, the output terminal is the output terminal of the second detection circuit 300, an enable terminal of the tenth comparator comp 5 is connected to the power supply enable terminal EN _ SRC, a first input terminal of the tenth comparator comp 5 is connected to an eleventh voltage (as shown in fig. 0.2V), a second input terminal of the tenth comparator comp 5 is connected to a corresponding port, and an output terminal of the tenth comparator comp is an output terminal of the second detection circuit 300.

During the operation of the second detection circuit 300, in the dual role mode, in order to detect that the counterpart device is a power supply device or an electric device, the corresponding Type-C interface needs to be switched between the SNK mode and the SRC mode, when the Type-C interface is in the SNK mode, the 5.1K pull-down resistor is enabled, and the power receiving enable terminal EN _ SNK is high, so as to enable the compare comparator, where the compare comparator includes a third comparator comp1, a fourth comparator comp2, and a fifth comparator comp 3. When the Type-C interface is in the SRC mode, the pull-up current sources of 80 uA-330 uA are enabled, and meanwhile, the power supply enable terminal EN _ SRC is high, enabling the comp comparators, wherein the comp comparators comprise a sixth comparator comp1, a seventh comparator comp2, an eighth comparator comp 3, a ninth comparator comp 4 and a tenth comparator comp 5. When the Type-C interface is in the SNK mode, if the power supply equipment with 80uA is connected with the corresponding Type-C interface, the voltage on the corresponding Type-C interface is between 0.2V and 0.66V, the output of the fifth comparator compa3 is in a high level, and the output of the fourth comparator compa2 and the third comparator compa1 are in a low level. Similarly, if the power supply device with 180uA is connected, the voltage of the corresponding Type-C interface is between 0.66V and 1.23V, the output of the fourth comparator compa2 and the output of the fifth comparator compa3 are high, and the output of the third comparator compa1 is low. If the power supply device with 330uA is connected, the outputs of the third comparator comp1, the fourth comparator comp2 and the fifth comparator comp 3 are all high level, so that the detection of the counterpart device such as the power supply device and the corresponding interface characteristics is realized.

When the Type-C interface is in the SRC mode, the pull-up current sources 80uA to 330uA are enabled, and if the pull-down resistor Rd is connected to the opposite side, since the pull-down resistor Rd is 5.1K, if the Type-C interface itself corresponds to the 330uA current source, the voltage on the Type-C interface is 2.6 to 1.6V, at this time, the output of the sixth comparator compb1 is low, and the outputs of the seventh comparator compb2 to the tenth comparator compb5 are high. If the Type-C interface corresponds to 180uA/80uA, the voltage on the Type-C interface is 1.6-0.8V, at this time, the outputs of the sixth comparator compb1 and the seventh comparator compb2 are at low level, and the outputs of the eighth comparator compb3 to the tenth comparator compb5 are at high level. If the opposite device is connected with the pull-down resistor Ra, the pull-down resistor Ra is 1K, and when the Type-C interface corresponds to the 330uA current source, the voltage on the Type-C interface is 0.8-0.4V, at this time, the outputs of the sixth comparator compb1, the seventh comparator compb2 and the eighth comparator compb3 are in a low level, and the outputs of the ninth comparator compb4 and the tenth comparator compb5 are in a high level. If the Type-C interface itself corresponds to the 180uA current source, the voltage on the Type-C interface is 0.4-0.2V, and at this time, the outputs of the sixth comparator comp1, the seventh comparator comp2, the eighth comparator comp 3 and the ninth comparator comp 4 are low, and the output of the tenth comparator comp 5 is high. If the Type-C interface corresponds to the 80uA current source, the voltage on the Type-C interface is 0.2-0V, and the outputs of the sixth comparator comp 1-the tenth comparator comp 5 are all low. Thus, the detection of the counterpart device such as the power receiving device and the corresponding interface feature is realized.

The interface detection module can adopt the first detection circuit 200 to detect whether the interface to be detected is accessed to the opposite equipment in advance, so as to achieve the purposes of reducing power consumption and interface loss, and after the interface to be detected is accessed to the opposite equipment, the second detection circuit 300 is adopted to detect the interface characteristics of the interface to be detected after the interface to be detected is accessed to the opposite equipment, so that the control circuit 110 carries out power management corresponding to the interface to be detected according to the second detection result, and the stability of the interface to be detected in various power transmission processes is ensured. The first detection circuit 200 adopts a low-power-consumption single-stage comparator to build a pre-detection circuit to complete interface pre-detection, so that the circuit structure can be simplified on the basis of ensuring the stability of the pre-detection process, and the detection power consumption is further reduced. The second detection circuit 300 uses the multi-gear comparator to realize the detection of the corresponding interface characteristics, so as to accurately detect the interface characteristics of the interface to be detected after the interface to be detected is connected to the equipment of the other party, and the accuracy in the detection process can be improved. Therefore, the interface detection module can guarantee the stability of the interface to be detected during interface detection from multiple aspects, reduce the power consumption generated in the interface detection process, avoid the situations of accelerated corrosion to damage the interface to be detected, and prolong the service life of the interface to be detected.

In a second aspect, the present application provides an interface detection method, which can be applied to the interface detection module described in any of the above embodiments. Referring to fig. 9, the interface detection method includes:

s510, the first detection circuit detects whether the interface to be detected is accessed to the opposite side equipment or not, and sends a first detection result to the control circuit after the interface to be detected is accessed to the opposite side equipment.

And S520, after the control circuit reads the first detection result, the control circuit sends a first enabling signal to the second detection circuit.

S530, after receiving the first enable signal, the second detection circuit detects an interface characteristic of the interface to be detected after accessing the opposite device, generates a second detection result, and sends the second detection result to the control circuit.

In one embodiment, the interface detection method is characterized by further comprising: and when the control circuit does not read the first detection result, generating a second enabling signal for controlling the first detection circuit to detect whether the interface to be detected is accessed to the opposite side device, and transmitting the second enabling signal to the first detection circuit.

The interface detection method may be applied to the interface detection module according to any of the embodiments, and the relevant features may refer to the interface detection module according to any of the embodiments, so that all the beneficial effects of the interface detection module according to any of the embodiments are achieved, and are not described herein again.

The application provides a power management chip in a third aspect, which includes the interface detection module described in any of the above embodiments, and can stably and accurately detect the interface characteristics of the Type-C interface waiting for detection at each stage, and has relatively low power consumption and device damage speed.

The present application provides an electronic device in a fourth aspect, including any of the above embodiments, the power management chip can adopt a low power consumption device to perform stable detection on a state of an interface to be detected before the electronic device accesses to the other device, and after the electronic device accesses to the other device, adopt relatively low power consumption devices such as a multi-stage comparator to perform accurate detection on an interface characteristic of the interface to be detected after the interface accesses to the other device, and can reduce detection power consumption and loss of related devices on the basis of ensuring stability and accuracy of an interface detection process.

Although the application has been shown and described with respect to one or more implementations, equivalent alterations and modifications will occur to others skilled in the art based upon a reading and understanding of this specification and the annexed drawings. The present application includes all such modifications and alterations, and is limited only by the scope of the appended claims. In particular regard to the various functions performed by the above described components, the terms used to describe such components are intended to correspond, unless otherwise indicated, to any component which performs the specified function of the described component (e.g., that is functionally equivalent), even though not structurally equivalent to the disclosed structure which performs the function in the herein illustrated exemplary implementations of the specification.

That is, the above description is only an embodiment of the present application, and not intended to limit the scope of the present application, and all equivalent structures or equivalent flow transformations made by using the contents of the specification and the drawings of the present application, such as the combination of technical features between various embodiments, or the direct or indirect application to other related technical fields, are all included in the scope of the present application.

In addition, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.

The previous description is provided to enable any person skilled in the art to make and use the present application. In the foregoing description, various details have been set forth for the purpose of explanation. It will be apparent to one of ordinary skill in the art that the present application may be practiced without these specific details. In other instances, well-known processes have not been described in detail so as not to obscure the description of the present application with unnecessary detail. Thus, the present application is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.

Claims

1. An interface detection module is characterized by comprising a control circuit, a first detection circuit and a second detection circuit;

the first control end of the control circuit is connected with the control end of the second detection circuit and used for sending a first enabling signal to the second detection circuit after the first detection result is read;

the second detection circuit is connected with a second signal reading end of the control circuit and used for detecting the interface characteristics of the interface to be detected after the interface to be detected is accessed to the opposite equipment after receiving the first enabling signal, generating a second detection result and sending the second detection result to the control circuit.

2. The interface detection module of claim 1, wherein the control circuit further comprises a second control terminal, the second control terminal being connected to the control terminal of the first detection circuit;

the control circuit is further configured to generate a second enable signal for controlling the first detection circuit to detect whether the interface to be detected is connected to the device of the other party when the first detection result is not read, and transmit the second enable signal to the first detection circuit through the second control terminal.

3. The interface detection module of claim 1, wherein the interface to be detected comprises a Type-C interface; the first detection circuit comprises a first comparator, a second comparator and an AND gate;

the first input end of the first comparator is connected with a first voltage, the second input end of the first comparator is connected with a first port and a second port which are respectively connected with a Type-C interface, the output end of the first comparator is connected with a first input end of the AND gate, the first input end of the second comparator is connected with a first port and a second port which are respectively connected with a Type-C interface, the second input end of the second comparator is connected with a second voltage, the output end of the second comparator is connected with a second input end of the AND gate, the output end of the AND gate is connected with a first signal reading end of the control circuit, the first port and the second port correspond to a third voltage, the first voltage, the third voltage and the second voltage are sequentially decreased.

4. The interface detection module of claim 3, wherein the first detection circuit further comprises a voltage divider unit;

one side of a voltage dividing end of the voltage dividing unit is connected with the first port and the second port, and the other side of the voltage dividing end of the voltage dividing unit is connected with a second input end of the first comparator and a first input end of the second comparator, and the voltage dividing unit is used for providing the third voltage.

5. The interface detection module of claim 1, further comprising a data transmission circuit;

the first input end of the data transmission circuit is connected with the output end of the first detection circuit, the second input end of the data transmission circuit is connected with the output end of the second detection circuit, the first output end of the data transmission circuit is connected with the first signal reading end of the main control chip, and the second output end of the data transmission circuit is connected with the second signal reading end of the main control chip and used for receiving and latching the first detection result and the second detection result so that the main control chip can read the first detection result and the second detection result.

6. The interface detection module according to claim 5, wherein the data transmission circuit comprises a latch unit corresponding to each of the first detection circuit and the second detection circuit, and the latch unit is configured to latch the received first detection result or the second detection result.

7. The interface detection module of claim 6, wherein the latch unit comprises an OR gate and a D flip-flop;

the first input end of the OR gate is connected with the output end of the first detection circuit or the second detection circuit, the second input end of the OR gate is connected with the Q end of the D trigger, the output end of the OR gate is connected with the D end of the D trigger, and the Q end of the D trigger is connected with the first signal reading end or the second signal reading end of the control circuit.

8. The interface detection module according to claim 1, wherein the second detection circuit includes detection units corresponding to the first port and the second port, respectively;

the detection unit comprises a power supply enabling end and a power receiving enabling end and is used for detecting that when the opposite side equipment is power supply equipment, the opposite side equipment enables the pull-down resistor corresponding to the port through the power receiving enabling end to obtain the power supply parameters corresponding to the opposite side equipment, the power supply parameters are generated according to the second detection result, when the opposite side equipment is detected, the opposite side equipment enables the pull-up resistor corresponding to the port through the power supply enabling end to obtain the power receiving parameters corresponding to the opposite side equipment, and the second detection result is generated according to the power receiving parameters.

9. The interface detection module of claim 8, wherein the detection unit comprises a powered electronic unit and a powered electronic unit;

the power receiving electronic unit comprises a power receiving enabling end and at least one comparator, the enabling end of each comparator is connected with the power receiving enabling end, a first input end is connected with a corresponding reference voltage, a second input end is connected with a corresponding port, and an output end is an output end of the second detection circuit and is used for acquiring a power supply parameter corresponding to the opposite equipment through a pull-down resistor of the corresponding port enabled by the power receiving enabling end when the opposite equipment is detected to be the power supply equipment, and generating a second detection result according to the power supply parameter;

the power supply electronic unit comprises a power supply enabling end and at least one comparator, the enabling end of each comparator is connected with the power supply enabling end, a first input end is connected into a corresponding reference voltage, a second input end is connected with a corresponding port, and an output end of the second detection circuit is used for detecting the power supply enabling end enables a pull-up resistor corresponding to the port when the opposite side equipment is powered equipment, the pull-up resistor enables the power supply enabling end to obtain powered parameters corresponding to the opposite side equipment, and the powered parameters are generated to form a second detection result.

10. The interface detection module according to claim 9, wherein the slave electronic unit includes a third comparator, a fourth comparator, and a fifth comparator, and the supply electronic unit includes a sixth comparator, a seventh comparator, an eighth comparator, a ninth comparator, and a tenth comparator;

the enabling end of the third comparator is connected with the power receiving enabling end, the first input end is connected with a fourth voltage, the second input end is connected with a corresponding port, the output end is the output end of the second detection circuit, the enabling end of the fourth comparator is connected with the power receiving enabling end, the first input end is connected with a fifth voltage, the second input end is connected with a corresponding port, the output end is the output end of the second detection circuit, the enabling end of the fifth comparator is connected with the power receiving enabling end, the first input end is connected with a sixth voltage, the second input end is connected with a corresponding port, the output end is the output end of the second detection circuit, the enabling end of the sixth comparator is connected with the power supply enabling end, the first input end is connected with a seventh voltage, the second input end is connected with a corresponding port, the output end is the output end of the second detection circuit, the enabling end of the seventh comparator is connected with the power supply enabling end, the first input end is connected with the eighth voltage, the second input end is connected with the corresponding port, the output end is the output end of the second detection circuit, the enabling end of the eighth comparator is connected with the power supply enabling end, the first input end is connected with the ninth voltage, the second input end is connected with the corresponding port, the output end is the output end of the second detection circuit, the enabling end of the ninth comparator is connected with the power supply enabling end, the first input end is connected with the tenth voltage, the second input end is connected with the corresponding port, the output end is the output end of the second detection circuit, the enabling end of the tenth comparator is connected with the power supply enabling end, the first input end is connected with the eleventh voltage, the second input end is connected with the corresponding port, and the output end is the output end of the second detection circuit.

11. An interface detection method, comprising:

the first detection circuit detects whether the interface to be detected is accessed to the opposite equipment or not, and sends a first detection result to the control circuit after the interface to be detected is accessed to the opposite equipment;

and after receiving the first enabling signal, the second detection circuit detects the interface characteristics of the interface to be detected after the interface to be detected is accessed to the opposite equipment, generates a second detection result, and sends the second detection result to the control circuit.

12. The interface detection method of claim 11, further comprising:

and when the control circuit does not read the first detection result, generating a second enabling signal for controlling the first detection circuit to detect whether the interface to be detected is accessed to the opposite side device, and transmitting the second enabling signal to the first detection circuit.

13. A power management chip comprising the interface detection module of any one of claims 1 to 10.

14. An electronic device comprising the power management chip of claim 13.