CN106328205B - A kind of control electrical appliances for electric charge pump structure of embedded flash memory - Google Patents
A kind of control electrical appliances for electric charge pump structure of embedded flash memory Download PDFInfo
- Publication number
- CN106328205B CN106328205B CN201610704743.6A CN201610704743A CN106328205B CN 106328205 B CN106328205 B CN 106328205B CN 201610704743 A CN201610704743 A CN 201610704743A CN 106328205 B CN106328205 B CN 106328205B
- Authority
- CN
- China
- Prior art keywords
- charge pump
- pump
- pressure
- negative pressure
- clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/30—Power supply circuits
Landscapes
- Dc-Dc Converters (AREA)
- Read Only Memory (AREA)
Abstract
A kind of control electrical appliances for electric charge pump structure of embedded flash memory comprising charge pump control unit；Charge pump control unit includes positive pressure charge pump voltage detection circuit, negative pressure charge pump voltage detection circuit, charge pump enable signal generation circuit, pump pressure clock division circuits and charge pump pump pressure clock source generating circuit；It is according to the dynamic power consumption configuration information and positive pressure charge pump and negative pressure charge pump enable signal provided outside flash memory circuit, Validity control is carried out to pump pressure clock, and it is detected by the output voltage to positive pressure charge pump and negative pressure charge pump, differentiate that positive pressure charge pump and negative pressure charge pump distinguish status, the positive pressure charge pump of setting and the pump pressure clock frequency control process of negative pressure charge pump, in Voltage Establishment process, implement pump pressure clock frequency control respectively, the dynamic power consumption of real-time independent control positive pressure charge pump and negative pressure charge pump respectively, to control dynamic power consumption of the embedded flash memory when charge pump output voltage is established.
Description
Technical field
The invention belongs to electronic circuit fields, are related to the charge pump control of control circuit more particularly to a kind of embedded flash memory
Circuit processed.
Background technique
Flash memory (Flash Memory, abbreviation flash memory) is a kind of non-volatility memorizer (Non-Volatile
Memory, abbreviation NVM).Embedded flash memory is a kind of flash type that can be integrated in other designs, can pass through control ground
Location positions internal storage unit, and by the wide reading data of low bit, reading manner and on piece random access memory are logical
With.
In practical applications, embedded flash memory is widely used in active equipment and non-active equipment, for example, commonly used
In on-chip system chip (System On Chip, abbreviation SOC chip).
Active equipment has been often referred to access supply network, slightly lower to power consumption requirements to performance requirement height.Non-active equipment is logical
Supply network is not accessed in being often used, it is very sensitive to power consumption situation in the application using the equipment of rechargable power supplies.Common
SOC chip in non-active equipment, a key index of design are the dynamic power consumptions to each module in system application,
Usually also there is relatively high requirement to the power consumption of embedded flash memory.
The principle of flash data basic unit determines, needs to apply lasting high voltage differential in corresponding data cell,
To realize to data cell write-in or erase process.And in flash memory design structure, it is formed using the method for dual charge pump
Continuous high-pressure is a kind of common design method, can efficiently provide required voltage difference.But this dual charge pump structure
Drawback is that charge pump brings very high dynamic power consumption when output voltage climbs, improve entire flash memory circuit with
And the circuit power consumption of entire SOC chip, reduce the performance of entire SOC chip.
Referring to Fig. 1, traditional dual charge pump that Fig. 1 is embedded flash memory in the prior art controls signal.Such as Fig. 1 institute
Show, is typically embedded into two charge pumps used in formula flash memory circuit structure usual for generating the charge pump of positive high voltage (VPOS)
Referred to as positive pressure charge pump is expressed as PUMP_VPOS in figure, is commonly referred to as negative pressure electricity for generating the charge pump of negative high voltage (VNEG)
Lotus pumps, and is expressed as PUMP_VNEG in figure.Charge pump while enable signal and pump pressure clock by acting on forming output height
Pressure, the pump pressure clock of two charge pumps generally use identical clock source, are provided by the SOC chip outside flash memory circuit.When making
When energy signal is effective, charge pump charges with the variation of pump pressure clock signal, and output voltage is continuous also with charging process
It climbs, reaches required voltage.
In order to reduce the dynamic power consumption formed in charge pump voltage foundation, use in common flash memory design structure to charge
The method of the fixed control starting of pump: start a charge pump first and restart another charge after postponing one section of set time
Pump, thus foundation while by avoiding two charge pumps, caused by excessively high dynamic power consumption.
It is however, such method brings problem, can not be both adapted in practical application using regular time difference
Actual conditions under different process, temperature, voltage conditions can only be guarded and be estimated, too long circuit latencies, shadow are caused
Rung the performance of entire chip, meanwhile, also can not dynamic application in different application environments.
Summary of the invention
In order to overcome the above problems, the present invention is intended to provide a kind of control electrical appliances for electric charge pump structure of embedded flash memory, is
Avoid charge pump during Voltage Establishment caused by high dynamic power problems, and reduced under conditions of power consumption allows simultaneously
Voltage time, to improve chip performance.
That is, the invention discloses a kind of configurable control electrical appliances for electric charge pump for inhibiting dynamic power consumption, it can be effective
Charge pump is reduced in the dynamic power consumption of the embedded flash memory circuit of start-up course.
To achieve the above object, technical scheme is as follows:
The present invention provides a kind of control electrical appliances for electric charge pump structure of embedded flash memory comprising charge pump control unit, electricity
Lotus pump control unit is used for through pump pressure clock to the positive pressure charge pump for generating positive high voltage and the negative pressure charge pump for generating negative high voltage
Carry out Voltage Establishment；The charge pump control unit is according to the dynamic power consumption configuration information and positive pressure provided outside flash memory circuit
Charge pump and negative pressure charge pump enable signal carry out Validity control to pump pressure clock, and by positive pressure charge pump and negative pressure
The output voltage of charge pump is detected, and differentiates that positive pressure charge pump and negative pressure charge pump distinguish status, the positive piezoelectricity of setting
The pump pressure clock frequency control process of lotus pump and negative pressure charge pump implements pump pressure clock frequency control in Voltage Establishment process respectively
System, the dynamic power consumption of difference real-time independent control positive pressure charge pump and negative pressure charge pump, to control embedded flash memory in charge pump
Dynamic power consumption when output voltage is established.
Preferably, it is respectively to the defeated of positive pressure charge pump and negative pressure charge pump that described pair of pump pressure clock, which carries out Validity control,
Voltage is detected out, is compared by the partial pressure result and positive pressure reference voltage of positive charge pump output voltage, using than
Relatively result identifies positive pressure charge pump operating status, and carries out logic control to negative pressure charge pump, adaptive to trigger negative pressure charge pump
It is enabled；The dynamic power consumption of the independent control positive pressure charge pump real-time respectively and negative pressure charge pump is defeated by negative pressure charge pump
Voltage result is compared with negative pressure reference voltage out, identifies negative pressure charge pump operating status, control using comparison result
Negative pressure charge pump is pumped clock frequency, and the pump pressure of positive pressure charge pump is controlled together with positive pressure charge pump output voltage comparison result
Clock frequency, the dynamic power consumption of self adaptive control positive pressure charge pump and negative pressure charge pump.
Preferably, the charge pump control unit includes positive pressure charge pump voltage detection circuit, the inspection of negative pressure charge pump voltage
Slowdown monitoring circuit, charge pump enable signal generation circuit, pump pressure clock division circuits and charge pump are pumped clock source generating circuit,
In: the positive pressure charge pump voltage detection circuit is connected with positive pressure charge pump output voltage, exports electricity to the positive pressure charge pump
Pressure partial pressure after compared with positive pressure reference voltage, obtain voltage detecting as a result, be output to charge pump enable signal generation circuit and
Charge pump is pumped clock source generating circuit；The negative pressure charge pump voltage detection circuit, is connected with negative pressure charge pump output voltage,
After dividing to the negative pressure charge pump output voltage compared with negative pressure reference voltage, voltage detecting is obtained as a result, being output to electricity
Lotus pump pump pressure clock source generating circuit；The charge pump enable signal generation circuit, transmission input enable signal to positive pressure charge
Pump generates negative pressure charge pump enable signal by positive pressure charge pump output voltage comparison result, is transferred to negative pressure charge pump；It is described
It is pumped clock division circuits, the pump pressure clock of input is filtered according to enable signal differentiation, and different needed for generation
Clock division signal is transferred to charge pump pump pressure clock source generating circuit；The charge pump is pumped clock source generating circuit, according to
The comparison result of external personalized setting and positive pressure charge pump output voltage, selects the pump pressure clock of positive pressure charge pump input
Signal；According to the comparison result of the dynamic power consumption configuration information, positive pressure charge pump output voltage provided outside flash memory circuit and
The comparison result of negative pressure charge pump output voltage selects the pump pressure clock signal of negative pressure charge pump input.
Preferably, the pump pressure clock division circuits controls input pump pressure clock signal, only enabled in charge pump
Pump pressure clock signal can be transmitted under state, the shielded signal under the non-enabled state of charge pump；The pump pressure clock division circuits pair
The triggering state of register reset signal is controlled, and resetting only can be achieved under the non-enabled state of charge pump, make in charge pump
Reset signal can be shielded under state.
Preferably, the charge pump pump pressure clock source generating circuit open pump pressure in charge pump output voltage establishment process
Clock frequency configures control access, closes clock frequency control access after charge pump output voltage is stablized, uses input clock
Frequency.
Preferably, dynamic power consumption control range when establishing to the positive pressure charge pump or negative pressure charge pump is 12.5%~
100%.
It can be seen from the above technical proposal that the control electrical appliances for electric charge pump structure of embedded flash memory of the invention comprising
Charge pump control unit；Charge pump control unit includes positive pressure charge pump voltage detection circuit, negative pressure charge pump voltage detection electricity
Road, charge pump enable signal generation circuit, pump pressure clock division circuits and charge pump are pumped clock source generating circuit；It is according to sudden strain of a muscle
The dynamic power consumption configuration information and positive pressure charge pump and negative pressure charge pump enable signal that circuit external provides are deposited, to pump pressure clock
Validity control is carried out, and is detected by the output voltage to positive pressure charge pump and negative pressure charge pump, differentiates positive pressure charge
Pump and negative pressure charge pump distinguish status, the positive pressure charge pump of setting and the pump pressure clock frequency control stream of negative pressure charge pump
Journey implements pump pressure clock frequency control in Voltage Establishment process respectively, respectively real-time independent control positive pressure charge pump and negative pressure electricity
The dynamic power consumption of lotus pump, to control dynamic power consumption of the embedded flash memory when charge pump output voltage is established.
Detailed description of the invention
Fig. 1 show control electrical appliances for electric charge pump state machine diagram in the prior art
Fig. 2 show control electrical appliances for electric charge pump state machine diagram of the present invention
Fig. 3 show charge pump control signal schematic diagram of the present invention
Fig. 4 show control electrical appliances for electric charge pump signal graph
Fig. 5 show control electrical appliances for electric charge pump (PUMP_CONTROL) structural schematic diagram
Fig. 6 show positive pressure charge pump voltage detection circuit (VPOS_MEASURE) structural schematic diagram
Fig. 7 show positive pressure charge pump voltage detection circuit (VPOS_MEASURE) structural schematic diagram
Fig. 8 show charge pump enable signal generation circuit (PUMP_EN_GEN) structural schematic diagram
Fig. 9 show pump pressure clock division circuits (PCLK_DIV) structural schematic diagram
Figure 10 show charge pump pump pressure clock source generating circuit (PUMP_CK_GEN) structural schematic diagram
Specific embodiment
The embodiment for embodying feature of present invention and advantage will describe in detail in the explanation of back segment.It should be understood that the present invention
Can have various variations in different examples, neither depart from the scope of the present invention, and it is therein explanation and be shown in
Substantially regard purposes of discussion, rather than to limit the present invention.
As previously mentioned, charge pump control unit by the invention, for by pump pressure clock to generating positive high voltage just
It presses charge pump and generates the negative pressure charge pump progress Voltage Establishment of negative high voltage；The charge pump control unit is according to outside flash memory circuit
The dynamic power consumption configuration information and positive pressure charge pump and negative pressure charge pump enable signal that portion provides carry out pump pressure clock effective
Property control, and detected by the output voltage to positive pressure charge pump and negative pressure charge pump, differentiate positive pressure charge pump and negative pressure
Charge pump distinguishes status, the positive pressure charge pump of setting and the pump pressure clock frequency control process of negative pressure charge pump, in voltage
Establishment process implements pump pressure clock frequency control respectively, and real-time independent control positive pressure charge pump and negative pressure charge pump is dynamic respectively
State power consumption, to control dynamic power consumption of the embedded flash memory when charge pump output voltage is established.
The basic principle that charge pump control unit of the present invention is realized is as follows:
It will be apparent to those skilled in the art that the dynamic power model of the embedded flash memory of dual charge pump structure can use following public affairs
Formula indicates:
Ptotal=Ppumppos+Ppumpneg+Pothers
In formula:
PtotalFor total power consumption
PpumpposThe piezoelectricity lotus pump work that is positive consumption
PpumpnegThe piezoelectricity lotus pump work that is negative consumption
PothersFor the power consumption of other modules
Since worst power consumption depends on the start-up course of dual charge pump, it is as follows approximate above formula can be modified:
Ptotal≈Ppumppos+Ppumpneg
According to the working principle of charge pump, when enable signal is effective, dynamic of the charge pump in output voltage establishment process
The pump pressure clock signal frequency of power consumption and input charge pump is similar to proportional relation, and the power consumption formula of corresponding positive/negative-pressure charge pump is such as
Under:
Ppumppos≈αfposck+Pposlkg
Ppumpneg≈βfnegck+Pneglkg
In formula:
PposlkgAnd PneglkgIt is the electricity leakage power dissipation of positive pressure charge pump and negative pressure charge pump respectively, is approximately constant；α and β points
It is not positive and presses the power consumption of charge pump and negative pressure charge pump and be pumped the relationship of clock frequency, approximation can regard constant, occurrence as
It is related with charge pump design.
fposckAnd fnegckIt is effective pump pressure clock frequency of positive pressure charge pump and negative pressure charge pump respectively, specific value is such as
Following formula:
When charge pump enables, being effectively pumped clock frequency is front pump voltage-frequency rate, and clock frequency is effectively pumped when non-enabled
Rate is 0.
Therefore, the total power consumption situation of embedded flash memory at this moment can be expressed from the next with frequency relation in pump pressure type: Ptotal
≈αfposck+βfnegck+(Pposlkg+Pneglkg)
As previously mentioned, variable only includes f in formulaposckAnd fnegck, only have with the enabled situation of charge pump and input frequency
It closes.The present invention carries out self adaptive control by effective pump pressure clock frequency to charge pump, realizes embedded flash memory dynamic function
The reduction of consumption.
For the requirement being adapted under the conditions of different application to dynamic power consumption, the present invention devises a kind of suitable for double charge
The configurable control electrical appliances for electric charge pump for pumping embedded flash memory, can match the requirement of dynamic power consumption according in practical application
It sets, realizes the configurable dynamic power consumption automatic adjustment of on piece.
Below in conjunction with attached drawing 2-10, electricity is controlled by charge pump of the specific embodiment to a kind of embedded flash memory of the invention
Line structure is described in further detail.Before narration, input and output signal and its function are defined as follows:
1., input signal and function
Power supply signal VPWR
Ground signalling VGND
Reset signal RST: it is reset for frequency-dividing clock state
Basis pump pressure clock signal PCLK: as the pump pressure clock of benchmark, clock frequency fpclk
Enable signal PE: it is responsible for function starting
Charge pump output voltage VPOS, VNEG: for monitoring charge pump state
Reference voltage VREF0 and VREF1: the reference of the detection for charge pump output signal VPOS and VNEG
Charge pump dynamic power consumption configures TRIM_POS_CK and TRIM_NEG_CK: for configuring charge pump in the start-up conditions
Power consumption configurations
2., output signal and function:
Positive pressure charge pump enable signal POS_EN
Positive pressure charge pump is pumped clock POS_CK
Negative pressure charge pump enable signal NEG_EN
Negative pressure charge pump is pumped clock NEG_CK
Referring to Fig. 2, Fig. 2 show control electrical appliances for electric charge pump state machine diagram of the present invention.As shown, embedded sudden strain of a muscle
It deposits and is used to that generate the charge pump of positive high voltage (VPOS) be commonly referred to as positive pressure charge pump in two charge pumps used in circuit structure,
It is expressed as PUMP_VPOS in figure, is commonly referred to as negative pressure charge pump for generating the charge pump of negative high voltage (VNEG), is expressed as in figure
PUMP_VNEG.In an embodiment of the present invention, by the control to effective pump pressure clock, to single charge pump starting current into
Row control meets application system according to practical application condition independently to power consumption to make charge pump dynamic power consumption dynamic controllable
Control, dynamic power consumption control range when establishing to single charge pump are 12.5%~100%.
Incorporated by reference to Fig. 2 refering to such as following table, control electrical appliances for electric charge pump shares 6 states:
Each operating status of the invention and handover mechanism are as shown in Figure 2:
1., after power initiation, reach START condition；
2., when receiving RST=1 and PE=0, reset into RESET state: internal circuit；
3., when RST signal revocation is 0, enter IDLE state from RESET state: waiting enable signal driving；
4., as enable signal PE=1, into VPOS SETUP state: positive pressure charge pump is first begin to start, corresponding pump pressure
Clock frequency can be configured by outside, to control the dynamic power consumption under VPOS SETUP state；
5., when VPOS reaches set objective, positive pressure charge pump enters low power consumpting state, into VNEG SETUP state:
Negative pressure charge pump begins setting up output voltage VNEG, can control negative pressure by the corresponding pump pressure clock frequency of exterior arrangement and establish
When dynamic power consumption；
6., when VNEG also reaches given voltage, then enter VPOS/VNEG STABLE state: positive pressure and negative pressure charge pump
Stable power consumption is all reached, the pump pressure clock of two charge pumps all switches to PCLK, guarantees the stability of output voltage；
7., work as PE=0, state switches back into IDLE state: the enable signal of two charge pumps from VPOS/VNEG STABLE
Stop with pump pressure clock signal.
Fig. 3 and Fig. 4 are please referred to, Fig. 3 show charge pump control signal schematic diagram of the present invention, and Fig. 4 show charge pump control
Circuit signal figure processed.Some design details in the embodiment of the present invention are described in detail below:
1., the detection of charge pump state
Carrying out Validity control to pump pressure clock is to carry out respectively to the output voltage of positive pressure charge pump and negative pressure charge pump
Detection, is compared by the partial pressure result and positive pressure reference voltage of positive charge pump output voltage, is identified using comparison result
Positive pressure charge pump operating status, and logic control is carried out to negative pressure charge pump, it is adaptive to trigger the enabled of negative pressure charge pump.
The state of charge pump can be described as being not enabled on, three kinds of states of Voltage Establishment and voltage stabilization, wherein charge pump
Highest when dynamic power consumption is established with output voltage, dynamic power consumption at this time are related with charge pump itself driving capability；And when output
When voltage reaches designated value, dynamic power consumption is main related with the load of charge pump.The present invention passes through the output voltage to charge pump
It is detected, differentiates charge pump status.
The recognition methods of positive pressure charge pump state is as follows: passing through the ratio of partial pressure and reference voltage to forward voltage VPOS
Compared with generating corresponding voltage identification signal POS_VHI, by detecting to POS_VHI, judge whether the state of positive charge pump reaches
Stablize.The partial pressure of VPOS is lower than VREF0 in original state, and testing result POS_VHI is 0；After VPOS reaches designated value, i.e.,
When the partial pressure of VPOS is equal to VREF0, POS_VHI jump is 1.
The voltage detection signal expression formula of positive pressure charge pump is as follows:
In formula: n is the dividing ratios of VPOS.
The detection of negative pressure charge pump state is similar to the detection method of positive pressure charge pump.The output voltage of negative pressure charge pump is logical
It after crossing partial pressure, is compared with the reference voltage VREF1 of input, obtains the mark voltage NEG_VLO of VNEG, under original state
NEG_VLO is 0, and if VNEG reaches required voltage value, then NEG_VLO is set to 1, and expression formula is as follows:
In formula: p is the relatively more required dividing ratios of VNEG.
The dynamic power consumption of real-time independent control positive pressure charge pump and negative pressure charge pump is exported by negative pressure charge pump respectively
Voltage result is compared with negative pressure reference voltage, identifies negative pressure charge pump operating status using comparison result, control is negative
When pressing charge pump to be pumped clock frequency, and controlling the pump pressure of positive pressure charge pump together with positive pressure charge pump output voltage comparison result
Clock frequency, the dynamic power consumption of self adaptive control positive pressure charge pump and negative pressure charge pump.
2., the generation of the enable signal of positive pressure charge pump:
The enable signal of positive pressure charge pump is consistent with the enabled PE signal of input, and expression formula is as follows:
POS_EN=PE
3., the generation of negative pressure charge pump enable signal NEG_EN:
Negative pressure charge pump enable signal realizes negative pressure electricity by the collective effect with external enable signal PE and POS_VHI
The delay start of lotus pump, expression are as follows:
NEG_EN=PE&POS_VHI
4., pump pressure clock signal PCLK frequency dividing
The present invention realizes in inside and carries out doing validity filtering to input pump pressure clock signal first, when generating internal pump pressure
Clock signal CK_ORI, expression formula are as follows:
CK_ORI=PE&PCLK
As shown in above-mentioned expression formula, as PE=1, the working frequency f of CK_ORI and the pump pressure signal PCLK mono- of input
Cause it is identical, be fpclk.Meanwhile the present invention is internal based on 2 fractional frequency signal CK_D2 of CK_ORI generation, 4 fractional frequency signal CK_D4 and 8 points
Frequency signal CK_D8, corresponding working frequency is respectively fpclk/2、fpclk/4And fpclk/8。
5., the generation of the pump pressure clock signal POS_CK of positive pressure charge pump:
During Voltage Establishment, the pump pressure clock of positive charge pump uses P_STP_CK, can pass through TRIM_POS_CK signal
The corresponding pump pressure clock signal used when the output voltage of positive pressure charge pump is established of selection, when TRIM_POS_CK inputs 0 respectively
When~3, P_STP_CK chooses CK_D8, CK_D4, CK_D2, CK_ORI, corresponding expression formula respectively are as follows:
The pump pressure clock signal of positive pressure charge pump will be switched to CLK_ORI.
The expression formula of POS_CK is as follows:
6., the generation of the pump pressure clock signal NEG_CK of negative pressure charge pump:
During Voltage Establishment, the pump pressure clock of negative sense charge pump uses N_STP_CK, can be believed by TRIM_NEG_CK
Number corresponding pump pressure clock signal used when the output voltage of negative pressure charge pump is established of selection, when TRIM_NEG_CK distinguish it is defeated
When entering 0~3, N_STP_CK chooses CK_D8, CK_D4, CK_D2, CK_ORI, corresponding expression formula respectively are as follows:
When state is switched to VPOS/VNEG STABLE, the pump pressure clock signal of negative pressure charge pump will be switched to CLK_
ORI。
The expression formula of NEG_CK is as follows:
Referring to Fig. 5, Fig. 5 show control electrical appliances for electric charge pump (PUMP_CONTROL) structural schematic diagram.Charge pump control
Unit include positive pressure charge pump voltage detection circuit, negative pressure charge pump voltage detection circuit, charge pump enable signal generation circuit,
It is pumped clock division circuits and charge pump is pumped clock source generating circuit, in which: positive pressure charge pump voltage detection circuit, with positive pressure
Charge pump output voltage is connected, and after dividing to the positive pressure charge pump output voltage compared with positive pressure reference voltage, obtains electricity
Testing result is pressed, charge pump enable signal generation circuit and charge pump pump pressure clock source generating circuit are output to；Negative pressure charge pump
Voltage detecting circuit is connected with negative pressure charge pump output voltage, to electric with negative pressure reference after negative pressure charge pump output voltage partial pressure
Pressure compares, and obtains voltage detecting as a result, being output to charge pump pump pressure clock source generating circuit；The charge pump enable signal produces
Raw circuit, transmission input enable signal to positive pressure charge pump generate negative pressure electricity by positive pressure charge pump output voltage comparison result
Lotus pumps enable signal, is transferred to negative pressure charge pump；The pump pressure clock division circuits, by the pump pressure clock of input according to enabled letter
Number differentiation is filtered, and the different clock division signals needed for generating, and is transferred to charge pump pump pressure clock source generating circuit；
The charge pump is pumped clock source generating circuit, according to the comparison of external personalized setting and positive pressure charge pump output voltage
As a result, the pump pressure clock signal of selection positive pressure charge pump input；According to the dynamic power consumption configuration information provided outside flash memory circuit,
The comparison result of positive pressure charge pump output voltage and the comparison result of negative pressure charge pump output voltage select negative pressure charge pump defeated
The pump pressure clock signal entered.
That is, positive pressure charge pump voltage detection circuit, negative pressure charge pump voltage detection circuit, charge pump enable signal
Generation circuit, pump pressure clock division circuits and charge pump are pumped clock source generating circuit, can adaptively trigger positive pressure charge pump
With the starting of negative pressure charge pump.When receiving charge pump enable signal (pump enable signal), pump pressure clock division is electric
Road is started to work, and is generated frequency-dividing clock (Generated clocks) according to reference clock (Reference clock) and is transferred to
Charge pump is pumped clock source generating circuit.
Meanwhile charge pump enable signal generation circuit generates positive pressure charge pump enable signal (pump_vpos enable),
Drive positive pressure charge pump.Also, charge pump is pumped clock source generating circuit according to clock setting (clock settings), from point
In frequency clock select positive high voltage (VPOS) establishment process required for reference clock (clock for pump_vpos), VPOS into
Enter establishment process.Partial pressure and reference voltage 0 (Reference voltage 0) of the positive pressure charge pump voltage detection circuit to VPOS
It is detected, generates corresponding detection signal (VPOS measure result).It is corresponding to examine when VPOS reaches required voltage
Signal overturning is surveyed, charge pump enable signal generation circuit generates negative charge pump enable signal (Pump_vneg enable), simultaneously
Charge pump is pumped clock source generating circuit and is selected to provide negative pressure charge pump reference clock (clock for according to clock configuration information
pump_vneg).Partial pressure and reference voltage 1 (Reference voltage 1) of the negative pressure charge pump voltage detection circuit to VNEG
It is compared, generates corresponding detection of negative pressure signal (Vneg measure result), VNEG enters establishment process.When VNEG reaches
To after voltage rating, the overturning of detection of negative pressure signal, VPOS/VNEG reaches stable at this time, the clock that positive/negative-pressure charge pump uses
Frequency error factor is to reference clock frequency.
It specifically, include positive pressure charge pump voltage detection circuit VPOS_MEASURE, negative pressure electricity inside PUMP CONTROL
Lotus pump voltage detection circuit VNEG_MEASURE, charge pump enable signal generation circuit PUMP_EN_GEN, pump pressure clock division electricity
Road PCLK_DIV and charge pump are pumped clock source generating circuit PUMP_CK_GEN.The inside connection relationship of PUMP CONTROL is such as
Shown in following table:
| Source module | Port | Purpose module | Port |
| Input port | PE | PUMP_EN_GEN | PE |
| Input port | PE | PCLK_DIV | PE |
| Input port | VPOS | VPOS_MEASURE | VPOS |
| Input port | VREF0 | VPOS_MEASURE | VREF0 |
| Input port | VNEG | VNEG_MEASURE | VNEG |
| Input port | VREF1 | VNEG_MEASURE | VREF1 |
| Input port | PCLK | PCLK_DIV | PCLK |
| Input port | RST | PCLK_DIV | RST |
| Input port | TRIM_POS_CK[1:0] | PUMP_CK_GEN | TRIM_POS_CK[1:0] |
| Input port | TRIM_NEG_CK[1:0] | PUMP_CK_GEN | TRIM_NEG_CK[1:0] |
| VPOS_MEASURE | POS_VHI | PUMP_EN_GEN | POS_VHI |
| VPOS_MEASURE | POS_VHI | PUMP_CK_GEN | POS_VHI |
| VNEG_MEASURE | NEG_VLO | PUMP_CK_GEN | NEG_VLO |
| PCLK_DIV | CK_ORI | PUMP_EN_GEN | CK_ORI |
| PCLK_DIV | CK_D2 | PUMP_EN_GEN | CK_D2 |
| PCLK_DIV | CK_D4 | PUMP_EN_GEN | CK_D4 |
| PCLK_DIV | CK_D8 | PUMP_EN_GEN | CK_D8 |
| PUMP_EN_GEN | POS_EN | Output port | POS_EN |
| PUMP_EN_GEN | NEG_EN | Output port | NEG_EN |
| PUMP_CK_GEN | POS_CK | Output port | POS_CK |
| PUMP_CK_GEN | NEG_CK | Output port | NEG_CK |
Referring to Fig. 6, Fig. 6 show positive pressure charge pump voltage detection circuit (VPOS_MEASURE) structural schematic diagram.Such as
Shown in figure, the circuit structure of VPOS_MEASURE includes basic resistive module R0, basic resistive module R1 and voltage comparator
COMP0, wherein R0 and R1 is responsible for being divided from VPWR to VPOS, resistance proportion setting and reference voltage VREF0 phase
It closes, divides result VPOS_DIV input voltage comparator COMP0 compared with VREF0, comparison result is defeated by the port POS_VHI
Out.
Specific connection relationship see the table below:
| Source module | Port | Purpose module | Port |
| Input port | VPOS | R0 | VPOS |
| Input port | VREF0 | COMP0 | VREF0 |
| Input port | VPWR | R1 | VPWR |
| R0 | VPOS_DIV | R1 | VPOS_DIV |
| R0 | VPOS_DIV | COMP0 | VPOS_DIV |
| R1 | VPOS_DIV | COMP0 | VPOS_DIV |
| COMP0 | POS_VHI | Output port | POS_VHI |
Referring to Fig. 7, Fig. 7 show positive pressure charge pump voltage detection circuit (VPOS_MEASURE) structural schematic diagram.Such as
Shown in figure, the circuit structure of VNEG_MEASURE includes basic resistive module R2, basic resistive module R3 and voltage comparator
COMP1, wherein R2 and R3 is responsible for being divided from VGND to VNEG, and resistance proportion setting is related to reference voltage VREF1,
Result VNEG_DIV input voltage comparator COMP1 is divided compared with VREF1, comparison result is exported by the port NEG_VLO.
Specific connection relationship see the table below:
| Source module | Port | Purpose module | Port |
| Input port | VNEG | R3 | VNEG |
| Input port | VREF1 | COMP1 | VREF1 |
| Input port | VGND | R2 | VGND |
| R3 | VNEG_DIV | R2 | VNEG_DIV |
| R2 | VNEG_DIV | COMP1 | VNEG_DIV |
| R3 | VNEG_DIV | COMP1 | VNEG_DIV |
| COMP1 | NEG_VLO | Output port | NEG_VLO |
Referring to Fig. 8, Fig. 8 show charge pump enable signal generation circuit (PUMP_EN_GEN) structural schematic diagram.Such as figure
Shown, the circuit structure of PUMP_EN_GEN such as inside has used one 2 input and door AND3, and input is respectively connected to PE and POS_
VHI, operation result are exported by NEG_EN.Output port POS_EN is directly connected with PE.
Specific connection relationship see the table below:
| Source module | Port | Purpose module | Port |
| Input port | PE | Output port | POS_EN |
| Input port | PE | AND3 | PE |
| Input port | POS_VHI | AND3 | POS_VHI |
| AND3 | NEG_EN | Output port | NEG_EN |
Referring to Fig. 9, Fig. 9 show pump pressure clock division circuits (PCLK_DIV) structural schematic diagram.The electricity of PCLK_DIV
Line structure.As shown in figure 9, it is internal using 22 inputs and door AND0 and AND1,1 phase inverter and 3 d type flip flop DFF0,
DFF1,DFF2.AND0 inputs PCLK and PE, and operation result is exported by CLK_ORI, while connecting the clock port of DFF0.PE
PE_B signal is generated by phase inverter, 1 input as AND2.Another input of AND2 is inputted by port RST, fortune
Calculate the resetting port RST that result RST_DFF is connected respectively to DFF0, DFF1 and DFF2.The anti-phase output of DFF0, DFF1 and DFF3
Port QB is connect with the input port D of oneself respectively.The output port Q of DFF0 is connected to the clock port CK of DFF1, connects simultaneously
It is connected to the output of the port CK_D2.The output port Q of DFF1 is connected to the clock port CK of DFF2, while it is defeated to be connected to the port CK_D4
Out.The output port Q of DFF2 is connected to the output of the port CK_D8.
Specific connection relationship see the table below:
| Source module | Port | Purpose module | Port |
| Input port | PCLK | AND0 | PCLK |
| Input port | PE | Phase inverter | PE |
| Input port | PE | AND0 | PE |
| Input port | RST | AND1 | RST |
| Phase inverter | PE_B | AND1 | PE_B |
| AND1 | RST_DFF | DFF0 | RST |
| AND1 | RST_DFF | DFF1 | RST |
| AND1 | RST_DFF | DFF2 | RST |
| AND0 | CK_ORI | Output port | CK_ORI |
| AND0 | CK_ORI | DFF0 | CK |
| DFF0 | Q | DFF1 | CK |
| DFF1 | Q | DFF2 | CK |
| DFF0 | QB | DFF0 | D |
| DFF1 | QB | DFF1 | D |
| DFF2 | QB | DFF2 | D |
| DFF0 | Q | Output port | CK_D2 |
| DFF1 | Q | Output port | CK_D4 |
| DFF2 | Q | Output port | CK_D8 |
Referring to Fig. 10, Figure 10 show charge pump pump pressure clock source generating circuit (PUMP_CK_GEN) structural schematic diagram.
As shown, the circuit structure of PUMP_CK_GEN has used 24 input multiple selector MUX1 and MUX3,22 input multichannels
Selector MUX2 and MUX4,12 input and door AND2.4 option input signals of MUX1 are separately connected input port CLK_
ORI, CLK_D2, CLK_D4, CLK_D8, selection signal connect input port TRIM_POS_CK [1:0], output signal CK_STP_
1 option input signal of P connection MUX2.Other 1 option input signal of MUX2 connects input signal CK_ORI, selects defeated
Enter signal connection input signal NEG_VLO, is as a result exported by port PO S_CK.
Two inputs of AND2 are separately connected NEG_VLO and POS_VHI, the selection of operation result STP_DONE connection MUX4
Signal.4 option input signals of MUX3 are separately connected input port CLK_ORI, CLK_D2, CLK_D4, CLK_D8, selection letter
Number connection input port TRIM_NEG_CK [1:0], 1 option input signal of output signal CK_STP_P connection MUX2.MUX4
Other 1 option input signal connect input signal CK_ORI, select input signal connect AND2 output signal STP_DONE,
As a result it is exported by port NEG_CK.
Specific connection relationship see the table below:
| Source module | Port | Purpose module | Port |
| Input port | CK_D2 | MUX1 | CK_D2 |
| Input port | CK_D4 | MUX1 | CK_D4 |
| Input port | CK_D8 | MUX1 | CK_D8 |
| Input port | CK_ORI | MUX1 | CK_ORI |
| Input port | CK_D2 | MUX3 | CK_D2 |
| Input port | CK_D4 | MUX3 | CK_D4 |
| Input port | CK_D8 | MUX3 | CK_D8 |
| Input port | CK_ORI | MUX3 | CK_ORI |
| Input port | CK_ORI | MUX2 | CK_ORI |
| Input port | CK_ORI | MUX4 | CK_ORI |
| Input port | POS_VHI | AND2 | POS_VHI |
| Input port | NEG_VLO | AND2 | NEG_VLO |
| Input port | NEG_VLO | MUX2 | NEG_VLO |
| Input port | TRIM_POS_CK[1:0] | MUX1 | TRIM_POS_CK[1:0] |
| Input port | TRIM_NEG_CK[1:0] | MUX3 | TRIM_NEG_CK[1:0] |
| MUX1 | CK_STP_P | MUX2 | CK_STP_P |
| MUX3 | CK_STP_N | MUX4 | CK_STP_N |
| AND2 | STP_DONE | MUX4 | STP_DONE |
| MUX4 | NEG_CK | Output port | NEG_CK |
| MUX2 | POS_CK | Output port | POS_CK |
In conclusion the present invention is for the power problems in embedded flash memory application, disclosing a kind of dynamic power consumption can match
The embedded flash memory control electrical appliances for electric charge pump set, has the advantage that
1., enable the dynamic power consumption of embedded flash memory controllable:
The application environment of embedded flash memory is varied, and often the demand under different application environments to performance and power consumption is not
Together.When be applied in active equipment, it is higher to performance requirement；And work as and be applied in inactive component, often to dynamic power consumption
It is required that higher.Be commonly designed difference, the present invention by the control to effective pump pressure clock, to single charge pump starting current into
Row control meets application system according to practical application condition independently to power consumption to make charge pump dynamic power consumption dynamic controllable
Control, dynamic power consumption control range when establishing to single charge pump are 12.5%~100%.
2., can according to charge pump operating status, automatically switch charge pump starting state, realize various processes/voltage/
At a temperature of charge pump self-adapting start timing:
It is influenced simultaneously by voltage, technique, temperature, signal stabilization many factors when due to charge pump startup,
The starting time change of charge pump often differs greatly, and faces larger difficulty, delay time when estimating charge pump start-up study
Excessively high dynamic power consumption or delay time caused by deficiency are too long and cause because of starting overlong time forming properties waste.
The self-test of charge pump output voltage in through the invention can directly sentence charge pump output result
It is disconnected, at the same can adaptively charge pump settling time is different under various circumstances, minimum has been established from a charge pump voltage
Finish the switching time to another charge pump startup.
3., filtered by the validity to pump pressure clock signal and reset signal, reduce charge pump in the standby state
Circuit uncertainty and dynamic power consumption, and shield the improper resetting under charge pump state:
It will be apparent to those skilled in the art that pump pressure clock is usually provided by application system, due to design limitation, clock source is not
Certainty is very high, will cause the power consumption of charge pump in the standby state, stability inside actual influence to circuit and applies core
The dynamic power consumption of piece.
By enabling input signal under charge pump standby mode more stable to pump pressure filtered clock signal, internal signal is reduced
Unstable situation and bring power consumption.In charge pump start-up course, unstable, the possibility of the reset signal of input
The working condition of charge pump is influenced, the present invention shields the reset operation of charge pump voltage establishment process, avoids improper heavy
Set the influence operated to charge pump voltage establishment process.
Above only the embodiment of the present invention, the scope of patent protection that embodiment is not intended to limit the invention, therefore
It is all to change with equivalent structure made by specification and accompanying drawing content of the invention, it similarly should be included in protection of the invention
In range.
Claims (5)
1. a kind of control electrical appliances for electric charge pump structure of embedded flash memory characterized by comprising charge pump control unit is used
Clock is pumped to the positive pressure charge pump for generating positive high voltage and the negative pressure charge pump progress Voltage Establishment for generating negative high voltage in passing through；Institute
Charge pump control unit is stated according to dynamic power consumption configuration information and positive pressure charge pump and the negative pressure electricity provided outside flash memory circuit
Lotus pumps enable signal, carries out Validity control to pump pressure clock, and pass through the output electricity to positive pressure charge pump and negative pressure charge pump
Pressure is detected, and differentiates that positive pressure charge pump and negative pressure charge pump distinguish status, the positive pressure charge pump and negative pressure charge of setting
The pump pressure clock frequency control process of pump implements pump pressure clock frequency control in Voltage Establishment process respectively, independent in real time respectively
The dynamic power consumption of positive pressure charge pump and negative pressure charge pump is controlled, to control embedded flash memory when charge pump output voltage is established
Dynamic power consumption；
The charge pump control unit includes:
Positive pressure charge pump voltage detection circuit, negative pressure charge pump voltage detection circuit, charge pump enable signal generation circuit, pump pressure
Clock division circuits and charge pump are pumped clock source generating circuit, in which:
The positive pressure charge pump voltage detection circuit, is connected with positive pressure charge pump output voltage, exports to the positive pressure charge pump
After voltage compared with positive pressure reference voltage, voltage detecting is obtained as a result, being output to charge pump enable signal generation circuit
Clock source generating circuit is pumped with charge pump；
The negative pressure charge pump voltage detection circuit, is connected with negative pressure charge pump output voltage, exports to the negative pressure charge pump
After voltage compared with negative pressure reference voltage, voltage detecting is obtained as a result, being output to charge pump pump pressure clock source generates electricity
Road；
The charge pump enable signal generation circuit, transmission input enable signal are defeated by positive pressure charge pump to positive pressure charge pump
Voltage comparison result generates negative pressure charge pump enable signal out, is transferred to negative pressure charge pump；
The pump pressure clock of input is filtered by the pump pressure clock division circuits according to enable signal differentiation, and needed for generation
Different clock division signals, be transferred to charge pump pump pressure clock source generating circuit；
The charge pump is pumped clock source generating circuit, according to external personalized setting and positive pressure charge pump output voltage
Comparison result selects the pump pressure clock signal of positive pressure charge pump input；According to the dynamic power consumption configuration provided outside flash memory circuit
The comparison result of information, the comparison result of positive pressure charge pump output voltage and negative pressure charge pump output voltage selects negative pressure electricity
The pump pressure clock signal of lotus pump input.
2. control electrical appliances for electric charge pump structure according to claim 1, which is characterized in that
It is to carry out respectively to the output voltage of positive pressure charge pump and negative pressure charge pump that described pair of pump pressure clock, which carries out Validity control,
Detection, is compared by the partial pressure result and positive pressure reference voltage of positive charge pump output voltage, is identified using comparison result
Positive pressure charge pump operating status, and logic control is carried out to negative pressure charge pump, it is adaptive to trigger the enabled of negative pressure charge pump；
The dynamic power consumption of the independent control positive pressure charge pump real-time respectively and negative pressure charge pump is exported by negative pressure charge pump
Voltage result is compared with negative pressure reference voltage, identifies negative pressure charge pump operating status using comparison result, control is negative
When pressing charge pump to be pumped clock frequency, and controlling the pump pressure of positive pressure charge pump together with positive pressure charge pump output voltage comparison result
Clock frequency, the dynamic power consumption of self adaptive control positive pressure charge pump and negative pressure charge pump.
3. control electrical appliances for electric charge pump structure according to claim 1, which is characterized in that
The pump pressure clock division circuits controls input pump pressure clock signal, can only transmit under charge pump enabled state
It is pumped clock signal, the shielded signal under the non-enabled state of charge pump；
The pump pressure clock division circuits controls the triggering state of register reset signal, only in the non-enabled shape of charge pump
Resetting can be achieved under state, shield reset signal under charge pump enabled state.
4. control electrical appliances for electric charge pump structure according to claim 1, which is characterized in that
The charge pump pump pressure clock source generating circuit open pump pressure clock frequency in charge pump output voltage establishment process is matched
Control access is set, clock frequency control access is closed after charge pump output voltage is stablized, uses input clock frequency.
5. control electrical appliances for electric charge pump structure according to claim 1, which is characterized in that the positive pressure charge pump or negative pressure
Dynamic power consumption control range when charge pump is established is 12.5%~100%.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610704743.6A CN106328205B (en) | 2016-08-22 | 2016-08-22 | A kind of control electrical appliances for electric charge pump structure of embedded flash memory |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610704743.6A CN106328205B (en) | 2016-08-22 | 2016-08-22 | A kind of control electrical appliances for electric charge pump structure of embedded flash memory |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106328205A CN106328205A (en) | 2017-01-11 |
| CN106328205B true CN106328205B (en) | 2019-08-20 |
Family
ID=57742346
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610704743.6A Active CN106328205B (en) | 2016-08-22 | 2016-08-22 | A kind of control electrical appliances for electric charge pump structure of embedded flash memory |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106328205B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111800002A (en) * | 2020-06-28 | 2020-10-20 | 上海华虹宏力半导体制造有限公司 | Peak current control circuit of charge pump |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109994135B (en) * | 2017-12-29 | 2023-03-24 | 紫光同芯微电子有限公司 | Positive and negative pressure charge pump voltage stabilizing circuit |
| CN111597837A (en) * | 2019-02-21 | 2020-08-28 | 华大半导体有限公司 | Device and method for reducing starting power consumption of charge pump |
| CN111522428B (en) * | 2020-07-02 | 2020-10-27 | 南京优存科技有限公司 | Method for adjusting embedded flash memory power supply in microcontroller |
| CN112614522B (en) * | 2020-12-14 | 2022-06-21 | 武汉新芯集成电路制造有限公司 | Storage packaging chip and control method thereof |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6418040B1 (en) * | 2001-04-09 | 2002-07-09 | Cypress Semiconductor Corp. | Bi-directional architecture for a high-voltage cross-coupled charge pump |
| CN1477773A (en) * | 2003-07-11 | 2004-02-25 | 清华大学 | Electric charge pump circuit based on coupling capacitance share |
| CN103904870A (en) * | 2012-12-28 | 2014-07-02 | 北京兆易创新科技股份有限公司 | Charge pump circuit system |
| CN104091614A (en) * | 2014-07-23 | 2014-10-08 | 上海华虹宏力半导体制造有限公司 | Charge pump, charge pump system and memory |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002350500A (en) * | 2001-05-24 | 2002-12-04 | Mitsubishi Electric Corp | Semiconductor integrated circuit device |
-
2016
- 2016-08-22 CN CN201610704743.6A patent/CN106328205B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6418040B1 (en) * | 2001-04-09 | 2002-07-09 | Cypress Semiconductor Corp. | Bi-directional architecture for a high-voltage cross-coupled charge pump |
| CN1477773A (en) * | 2003-07-11 | 2004-02-25 | 清华大学 | Electric charge pump circuit based on coupling capacitance share |
| CN103904870A (en) * | 2012-12-28 | 2014-07-02 | 北京兆易创新科技股份有限公司 | Charge pump circuit system |
| CN104091614A (en) * | 2014-07-23 | 2014-10-08 | 上海华虹宏力半导体制造有限公司 | Charge pump, charge pump system and memory |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111800002A (en) * | 2020-06-28 | 2020-10-20 | 上海华虹宏力半导体制造有限公司 | Peak current control circuit of charge pump |
| CN111800002B (en) * | 2020-06-28 | 2021-11-09 | 上海华虹宏力半导体制造有限公司 | Peak current control circuit of charge pump |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106328205A (en) | 2017-01-11 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106328205B (en) | A kind of control electrical appliances for electric charge pump structure of embedded flash memory | |
| TWI234270B (en) | Semiconductor integrated circuit having controllable internal supply voltage | |
| TW201621541A (en) | Power management integrated circuit, power management method, mobile device and clock adjusting method | |
| US9252774B2 (en) | Integrated circuit wake-up control system | |
| CN109510621A (en) | A kind of adaptive voltage frequency adjustment method and device | |
| US20110133819A1 (en) | Low power charge pump and method of operation | |
| EP3084916A1 (en) | Apparatus for charge recovery during low power mode | |
| CN104076863B (en) | A kind of clock switching device | |
| CN106020176B (en) | A kind of CC logic controls chip low-power consumption connecting detection method and structure | |
| CN104808761A (en) | Power supply method, power supply system and electronic equipment | |
| CN207010317U (en) | Battery protection chip, electric supply installation and electronic cigarette | |
| CN106787693A (en) | A kind of charge pump circuit of belt switch | |
| WO2011091621A1 (en) | Ic card device | |
| CN102681450B (en) | Method and equipment for controlling chip | |
| CN109669524A (en) | The electrification reset circuit of chip | |
| TW201823925A (en) | Electronic device, electronic system, and control method | |
| CN109286313A (en) | The control method and device of voltage-multiplying circuit, storage medium | |
| CN106100291B (en) | Power adapter and its operating method | |
| CN104049549B (en) | Electricity-saving control circuit and electronic equipment | |
| CN104753798B (en) | A kind of mobile hot spot UFI equipment and starting-up method | |
| CN101944896B (en) | Charge pump and charging/discharging method capable of reducing leakage current | |
| CN107436671B (en) | Power-down protection structure and method | |
| CN107302306B (en) | A kind of Switching Power Supply | |
| CN210776579U (en) | Power-down protection circuit and electronic device | |
| CN108232346A (en) | A kind of charging method and device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |