CN114759077A

CN114759077A - Display panel, manufacturing method thereof and display device

Info

Publication number: CN114759077A
Application number: CN202210456492.XA
Authority: CN
Inventors: 郑帅; 其他发明人请求不公开姓名
Original assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
Current assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
Priority date: 2022-04-27
Filing date: 2022-04-27
Publication date: 2022-07-15

Abstract

The invention provides a display panel, a manufacturing method thereof and a display device, wherein the display panel comprises a substrate layer, an active layer positioned above the substrate layer and a conducting layer positioned above the active layer; the active layer comprises an active pattern, and the conductive layer comprises a grid electrode, a source electrode, a drain electrode and a pixel electrode which are arranged on the same layer; the grid electrode is arranged opposite to the active pattern, the source electrode and the drain electrode are electrically connected with the active pattern, and the pixel electrode is electrically connected with the drain electrode. According to the embodiment of the invention, the grid electrode, the source electrode, the drain electrode and the pixel electrode of the thin film transistor are prepared in the same layer, so that the number of light shades is reduced, and the production cost is reduced.

Description

Display panel, manufacturing method thereof and display device

Technical Field

The invention relates to the technical field of display, in particular to a display panel, a manufacturing method of the display panel and a display device.

Background

An Organic Light-Emitting Diode (OLED) has characteristics of self-luminescence, simple structure, ultra-lightness and thinness, fast response speed, wide viewing angle, low power consumption, and capability of realizing flexible display, and is therefore widely used in the display field.

At present, a Top-gate (Top-gate) Indium Gallium Zinc Oxide (IGZO) Thin Film Transistor (TFT) is generally used as a backplane in a large-size OLED, and the current backplane technology needs to prepare a gate electrode, a source/drain electrode and a pixel electrode in a layered manner, needs more photomasks, and is high in cost.

Therefore, the existing display panel has the technical problem that the grid electrode, the source drain electrode and the pixel electrode need to be prepared in a layered mode, and needs to be improved.

Disclosure of Invention

The invention provides a display panel, a manufacturing method thereof and a display device, and aims to solve the technical problem that a grid electrode, a source drain electrode and a pixel electrode need to be prepared in a layered mode in the existing display panel.

In order to solve the problems, the technical scheme provided by the invention is as follows:

an embodiment of the present invention provides a display panel, including:

a substrate layer;

an active layer over the substrate layer, including an active pattern;

the conducting layer is positioned above the active layer and comprises a grid electrode, a source electrode, a drain electrode and a pixel electrode which are arranged in the same layer; the grid is arranged opposite to the active pattern, the source electrode and the drain electrode are electrically connected to the active pattern, and the pixel electrode is electrically connected to the drain electrode.

In the display panel provided in the embodiment of the present invention, the conductive layer includes a transparent conductive layer and a metal conductive layer stacked on the transparent conductive layer; the transparent conductive layer comprises a first part of the grid electrode, a first part of the source electrode, a first part of the drain electrode and the pixel electrode, and the pixel electrode is electrically connected with the first part of the drain electrode; the metal conductive layer includes a second portion of the gate, a second portion of the source, and a second portion of the drain.

In the display panel provided by the embodiment of the invention, the material of the metal conductive layer comprises at least one of copper, aluminum, titanium and molybdenum; the material of the transparent conducting layer comprises one of indium tin oxide and indium zinc oxide.

In the display panel provided in the embodiment of the present invention, the display panel further includes: the color resistance layer is positioned between the substrate layer and the active layer and comprises a plurality of color resistance patterns; the color resistance patterns are positioned on the light emitting side of the pixel electrode.

In the display panel provided in the embodiment of the present invention, the display panel further includes: a light-shielding layer located between the color resist layer and the active layer and including a plurality of light-shielding patterns; each shading pattern is arranged at intervals with the corresponding color resistance pattern in the overlooking view angle.

In the display panel provided in the embodiment of the present invention, the display panel further includes:

a passivation layer over the conductive layer;

a pixel defining layer over the passivation layer;

and openings which are arranged opposite to the corresponding color resistance patterns are arranged above the pixel electrodes on the passivation layer and the pixel defining layer.

In the display panel provided by the embodiment of the invention, the material of the active layer comprises a metal oxide semiconductor material.

Further, an embodiment of the present invention further provides a manufacturing method of a display panel, where the manufacturing method of the display panel includes:

providing a substrate;

forming an active layer over the substrate, and patterning the active layer to form an active pattern;

forming a transparent conductive layer and a metal conductive layer stacked in order above the active pattern as a conductive layer;

patterning the conductive layer by using a halftone mask plate to obtain a grid electrode, a source electrode, a drain electrode and a pixel electrode; the gate electrode is opposite to the active pattern, the source electrode and the drain electrode are electrically connected to the active pattern, and the pixel electrode is electrically connected to the drain electrode.

In the method for manufacturing a display panel according to the embodiment of the present invention, the halftone mask includes a semi-transmissive region, a shading region, and a transmissive region, the shading region corresponds to the gate and the source/drain setting region, the semi-transmissive region corresponds to the pixel electrode setting region, and the transmissive region is located between the semi-transmissive region and the shading region.

Furthermore, an embodiment of the present invention further provides a display device, which includes the display panel in the foregoing embodiment or the display panel manufactured by the method according to the foregoing embodiment.

The beneficial effects of the invention are as follows: the invention provides a display panel, a manufacturing method thereof and a display device, wherein the display panel comprises a substrate layer, an active layer positioned above the substrate layer and a conductive layer positioned above the active layer; the active layer comprises an active pattern, and the conducting layer comprises a grid electrode, a source electrode, a drain electrode and a pixel electrode which are arranged on the same layer; the grid electrode is arranged opposite to the active pattern, the source electrode and the drain electrode are electrically connected to the active pattern, and the pixel electrode is electrically connected to the drain electrode. According to the embodiment of the invention, the grid electrode, the source electrode, the drain electrode and the pixel electrode of the thin film transistor are prepared in the same layer, so that the number of photomasks is reduced, and the production cost is reduced.

Drawings

The technical solutions and other advantages of the present application will become apparent from the following detailed description of specific embodiments of the present application when taken in conjunction with the accompanying drawings.

Fig. 1 to 10 are schematic diagrams illustrating a manufacturing process of a display panel according to an embodiment of the present invention;

fig. 11 is a schematic structural diagram of a halftone mask according to an embodiment of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without inventive step based on the embodiments of the present invention, are within the scope of protection of the present invention.

In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience of description and simplicity of description, but do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be considered as limiting the present invention. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or to implicitly indicate the number of technical features indicated. Thus, features defined as "first" and "second" may explicitly or implicitly include one or more of the described features. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.

In this application, the word "exemplary" is used to mean "serving as an example, instance, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments. The following description is presented to enable any person skilled in the art to make and use the invention. In the following description, details are set forth for the purpose of explanation. It will be apparent to one of ordinary skill in the art that the present invention may be practiced without these specific details. In other instances, well-known structures and processes are not set forth in detail in order to avoid obscuring the description of the present invention with unnecessary detail. Thus, the present invention is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.

The embodiment of the invention can solve the technical problems that the existing display panel needs to prepare the grid electrode, the source drain electrode and the pixel electrode in a layered mode, needs more light shades and is higher in cost.

Specifically, the display panel provided by the application comprises a substrate layer, an active layer positioned above the substrate layer, and a conductive layer positioned above the active layer; the active layer comprises an active pattern, and the conducting layer comprises a grid electrode, a source electrode, a drain electrode and a pixel electrode which are arranged on the same layer; the grid electrode is arranged opposite to the active pattern, the source electrode and the drain electrode are electrically connected to the active pattern, and the pixel electrode is electrically connected to the drain electrode.

In an embodiment, as shown in fig. 10, fig. 10 is a schematic cross-sectional view of a display panel according to an embodiment of the present invention, which is illustrated by taking a bottom emission structure display panel as an example, and technical problems of other bottom emission structure display panels are similar thereto and are not repeated. As shown in fig. 10, a display panel 100 according to an embodiment of the present invention includes:

a substrate layer 101;

an active layer 108 located above the substrate layer 101 and including an active pattern 108 (formed by patterning the active layer on the whole surface), wherein a light shielding pattern is disposed below the active pattern;

A conductive layer (including a transparent conductive layer 109 and a metal conductive layer 110 which are stacked) located above the active layer 108, and including a gate electrode (including a first portion 114 and a second portion 113), a source electrode (including a first portion 112 and a second portion 111), a drain electrode (including a first portion 116 and a second portion 115), and a pixel electrode 118 which are located on the same layer; the gate electrode (including the first portion 114 and the second portion 113) is disposed opposite to the active pattern 108, the source electrode (including the first portion 112 and the second portion 111) and the drain electrode (including the first portion 116 and the second portion 115) are electrically connected to the active pattern 108, and the pixel electrode 118 is electrically connected to the drain electrode (including the first portion 116 and the second portion 115). The scan line and the gate electrode are disposed on the same layer and connected to each other, the data line and the source electrode and the drain electrode are disposed on the same layer and electrically connected to the source electrode, and the light-shielding pattern is electrically connected to the drain electrode through the pixel electrode 118.

That is, the present embodiment provides a display panel, which includes a substrate layer, an active layer located above the substrate layer, and a conductive layer located above the active layer; the active layer comprises an active pattern, and the conducting layer comprises a grid electrode, a source electrode, a drain electrode and a pixel electrode which are arranged on the same layer; the grid electrode is arranged opposite to the active pattern, the source electrode and the drain electrode are electrically connected to the active pattern, and the pixel electrode is electrically connected to the drain electrode. According to the embodiment of the invention, the grid electrode, the source electrode, the drain electrode and the pixel electrode of the thin film transistor are prepared in the same layer, so that the number of photomasks is reduced, and the production cost is reduced.

In one embodiment, as shown in fig. 10, the conductive layer includes a transparent conductive layer 109 and a metal conductive layer 110 stacked on the transparent conductive layer 109; the transparent conductive layer 109 comprises a first portion 114 of the gate, a first portion 112 of the source, a first portion 116 of the drain, and the pixel electrode 118 is electrically connected to the first portion 116 of the drain; the metal conductive layer 110 includes a second portion 113 of the gate, a second portion 111 of the source, and a second portion 115 of the drain. In the embodiment of the invention, the grid electrode, the source electrode, the drain electrode and the pixel electrode are formed by patterning the conductive layer by using a half-tone mask plate, so that the number of light shades is reduced, the manufacturing process flow of the display panel is simplified, and the production cost is reduced.

In one embodiment, as shown in fig. 10, the material of the metal conductive layer 110 includes at least one of copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo); the material of the transparent conductive layer 109 includes one of Indium Tin Oxide (ITO) and Indium Zinc Oxide (IZO). Specifically, in summary, the conductive material of the conductive layer (including the transparent conductive layer 109 and the metal conductive layer 110 that are stacked) is a structure of metal + indium tin oxide or metal + indium zinc oxide.

It should be noted that only a single ito or izo layer exists in a partial region (pixel electrode 118 region) of the conductive layer.

In one embodiment, as shown in fig. 10, the display panel 100 further includes: a color resistance layer 102, located between the substrate layer 101 and the active layer 108, including a plurality of color resistance patterns; the plurality of color-resisting patterns are positioned on the light-emitting side of the pixel electrode 118.

In one embodiment, as shown in fig. 10, the display panel 100 further includes: a light-shielding layer 117 disposed between the color resist layer 102 and the active layer 108, and including a plurality of light-shielding patterns; each shading pattern is arranged at intervals with the corresponding color resistance pattern under the overlooking visual angle.

In an embodiment, as shown in fig. 10, a display panel 100 provided in an embodiment of the present invention further includes:

a passivation layer 106 located over the conductive layer (including a transparent conductive layer 109 and a metal conductive layer 110 arranged in a stacked manner);

a pixel defining layer 107 located above the passivation layer 106;

the passivation layer 106 and the pixel defining layer 107 are provided with openings 119 above the pixel electrodes 118, which are disposed opposite to the corresponding color resist patterns.

In one embodiment, the material of the active layer 108 comprises a metal oxide semiconductor material. Specifically, the metal oxide semiconductor material may be Indium Gallium Zinc Oxide (IGZO), indium tin zinc oxide (IZTO), Indium Gallium Zinc Titanium Oxide (IGZTO), or the like.

The embodiment of the present application further provides a manufacturing method of a display panel, where the manufacturing method of the display panel includes:

providing a substrate;

patterning the conductive layer by using a half-tone mask plate to obtain a grid electrode, a source electrode, a drain electrode and a pixel electrode; the gate electrode is arranged opposite to the active pattern, the source electrode and the drain electrode are electrically connected to the active pattern, and the pixel electrode is electrically connected to the drain electrode.

In one embodiment, the halftone mask includes a semi-transparent region, a shading region and a transparent region, the shading region corresponds to the gate and the setting region of the source/drain, the semi-transparent region corresponds to the setting region of the pixel electrode, and the transparent region is located between the semi-transparent region and the shading region.

Taking the bottom emission structure OLED display panel as an example, a method for manufacturing the display panel provided in the embodiment of the present application is described with reference to fig. 1 to 10.

As shown in fig. 1 to 10, the method for manufacturing a display panel provided by the present application includes the following steps:

step 1, preparing an R/G/B color resistance pattern on a substrate layer.

As shown in fig. 1, a glass substrate is provided as a substrate layer 101, the glass substrate is cleaned, an R/G/B color resist layer 102 is prepared on the glass substrate, and the color resist layer 102 is patterned to form a plurality of R/G/B color resist patterns.

And 2, preparing a Barrier layer (Barrier layer).

As shown in fig. 2, a barrier layer 103 is formed on the R/G/B photoresist layer 102, and the material of the barrier layer may be one or more of silicon oxide (SiOx) or silicon nitride (SiNx).

And 3, depositing a shading layer and patterning.

As shown in fig. 3, a metal layer is deposited on the barrier layer 103 as a light-shielding layer 117, the metal material used for the light-shielding layer 117 may be molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., or may also be an alloy, and the thickness of the light-shielding layer 117 is 500-; after the light-shielding layer 117 is deposited, it is patterned to form a plurality of light-shielding patterns.

Illustratively, each of the light shielding patterns is spaced from the corresponding color resist pattern in a top view.

And 4, preparing a Buffer layer (Buffer layer), an active layer and a gate insulation layer (GI) and opening holes in the gate insulation layer and the Buffer layer.

As shown in fig. 4, a buffer layer 104 is formed on the light-shielding layer 117 by a patterning process, wherein the buffer layer 104 may be one or multiple layers with a thickness of about 1000-; for example, when the buffer layer 104 has a one-layer structure, the material thereof may be silicon oxide (SiOx) or silicon nitride (SiNx), and when the buffer layer 104 has a two-layer or more structure, the material thereof may be a composite film of a silicon oxide layer and a silicon nitride layer.

Further, a layer of metal Oxide semiconductor material (Oxide) is deposited on the buffer layer 104 as a semiconductor layer, i.e. the active layer 108, specifically, the material of the active layer 108 may be Indium Gallium Zinc Oxide (IGZO), indium tin zinc Oxide (IZTO), Indium Gallium Zinc Titanium Oxide (IGZTO) or the like, and the thickness of the active layer 108 is about 100-1000 angstroms; the active layer 108 is then etched to form a pattern, i.e., the active layer 108 is patterned to form an active pattern.

Further, a layer of silicon oxide (SiOx) or silicon nitride (SiNx) or a multi-layer composite film of silicon oxide layer and silicon nitride layer is deposited on the active layer 108 as the gate insulating layer 105, and the thickness of the gate insulating layer 105 is about 1000-3000 angstroms.

Further, performing a yellow light process (including coating, exposure, development, and residual photoresist) on the gate insulating layer 105 and the buffer layer 104, and etching to form a gate insulating layer opening and a buffer layer opening; the gate insulating layer opening exposes the active layer 108, and the buffer layer opening exposes the light-shielding layer 117.

And 5, depositing a grid electrode and a source drain electrode conducting layer.

As shown in fig. 5, a conductive material is deposited on the gate insulating layer 105 to serve as a gate layer and a source/drain layer, wherein the conductive material is a metal + Indium Tin Oxide (ITO) or a metal + Indium Zinc Oxide (IZO) structure; in the embodiment of the present application, the conductive material is used as a conductive layer (including a transparent conductive layer 109 and a metal conductive layer 110 which are stacked), wherein the material of the transparent conductive layer 109 includes one of indium tin oxide and indium zinc oxide, and the material of the metal conductive layer 110 includes at least one of copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo).

And 6, patterning the conducting layer by using a Half-tone mask plate (Half-tone) process.

As shown in fig. 6, a pattern of a conductive layer is defined by using a Half-tone mask (Half-tone) process, wherein the transparent conductive layer 109 is patterned to form a first portion 114 of the gate, a first portion 112 of the source, a first portion 116 of the drain, and the pixel electrode 118, and the metal conductive layer 110 is patterned to form a second portion 113 of the gate, a second portion 111 of the source, and a second portion 115 of the drain; the gate electrode is disposed opposite to the active pattern, the source electrode and the drain electrode are electrically connected to the active pattern, the pixel electrode 118 only includes a transparent conductive layer, i.e., an indium zinc oxide film layer or an indium tin oxide film layer, and the pixel electrode 118 is electrically connected to the first portion 116 of the drain electrode.

As shown in fig. 11, the half-tone mask 200 includes a semi-transmissive region A3, a light-shielding region a2, and a light-transmitting region a1, where the light-shielding region a2 corresponds to the gate and the source/drain setting region, the semi-transmissive region A3 corresponds to the pixel electrode setting region, and the light-transmitting region a1 is located between the semi-transmissive region A3 and the light-shielding region a 2.

It should be noted that, in the embodiment of the present invention, the gate, the source, the drain, and the pixel electrode of the thin film transistor are fabricated in the same layer, so that the number of photomasks is reduced, the manufacturing process of the display panel is simplified, and the production cost is reduced.

Further, as a result of the treatment by Plasma (Plasma) treatment of the entire surface of the conductive layer (including the transparent conductive layer 109 and the metal conductive layer 110 which are stacked, the metal Oxide semiconductor material (Oxide) which is not protected by the Gate insulating layer (GI) and the Gate (Gate) metal (i.e., the active layer region where the Gate insulating layer opening is exposed) is treated so that the resistance is significantly reduced (i.e., becomes a conductor) after the treatment, and an N + conductive layer is formed, and the metal Oxide semiconductor material under the Gate insulating layer is not treated so as to maintain the semiconductor characteristics, and is used as a channel region of a Thin Film Transistor (TFT).

And 7, depositing a passivation layer (PV) and forming holes in the corresponding areas of the pixel electrodes.

As shown in fig. 7, depositing a passivation layer 106 on the conductive layers (including the transparent conductive layer 109 and the metal conductive layer 110 which are stacked), where the passivation layer 106 may have one or more layers, and when the passivation layer 106 has one layer structure, the material thereof may be silicon oxide (SiOx) or silicon nitride (SiNx), and when the passivation layer 106 has two or more layers, the material thereof may be a composite film of a silicon oxide layer and a silicon nitride layer; wherein the thickness of the passivation layer 106 is about 1000-5000 angstroms.

Further, an opening is designed in a passivation layer region corresponding to the pixel electrode 118 by an etching process, so as to expose the pixel electrode 118.

And 8, manufacturing a Pixel Definition Layer (PDL) and forming a hole in a region corresponding to the pixel electrode.

As shown in fig. 8, a pixel defining layer 107 is formed on the passivation layer 106, and an opening is designed in a region of the pixel defining layer corresponding to the pixel electrode 118 by an etching process, and the opening is connected to the opening of the pixel electrode 118 in the corresponding passivation layer region to form an opening 119, where the opening 119 is used to define a light emitting region of an Organic Light Emitting Diode (OLED).

And 9, evaporating or printing an organic light-emitting material in the light-emitting region.

As shown in fig. 9, an organic light emitting material is evaporated or printed in the opening 119 (i.e., the defined light emitting region).

And step 10, manufacturing a cathode.

As shown in fig. 10, a cathode material is deposited on the pixel defining layer 107 to form a cathode 120.

Thus, the manufacture of the OLED display panel with the bottom light-emitting structure is completed.

According to the above description, in the display panel manufacturing method provided by the present application, the number of times of using the photomask is reduced, the manufacturing process flow of the display panel is simplified, and the production cost is reduced.

Correspondingly, the embodiment of the invention also provides a display device, which comprises the display panel provided by the invention or the display panel manufactured by the method provided by the invention. The display device is an electronic terminal with a display function, and can be a fixed terminal such as a desktop computer and a television, a mobile terminal such as a smart phone and a tablet computer, and a wearable device such as smart glasses, a virtual display device and an enhanced display device.

According to the above embodiment:

the invention provides a display panel, a manufacturing method thereof and a display device, wherein the display panel comprises a substrate layer, an active layer positioned above the substrate layer and a conducting layer positioned above the active layer; the active layer comprises an active pattern, and the conducting layer comprises a grid electrode, a source electrode, a drain electrode and a pixel electrode which are arranged on the same layer; the grid electrode is arranged opposite to the active pattern, the source electrode and the drain electrode are electrically connected to the active pattern, and the pixel electrode is electrically connected to the drain electrode. According to the embodiment of the invention, the grid electrode, the source electrode, the drain electrode and the pixel electrode of the thin film transistor are prepared in the same layer, so that the number of light shades is reduced, and the production cost is reduced.

In view of the foregoing, it is intended that the present invention cover the preferred embodiment of the invention and not be limited thereto, but that various changes and modifications can be made therein by those skilled in the art without departing from the spirit and scope of the invention.

Claims

1. A display panel, comprising:

a substrate layer;

an active layer over the substrate layer, including an active pattern;

the conducting layer is positioned above the active layer and comprises a grid electrode, a source electrode, a drain electrode and a pixel electrode which are arranged on the same layer; the grid electrode is arranged opposite to the active pattern, the source electrode and the drain electrode are electrically connected to the active pattern, and the pixel electrode is electrically connected to the drain electrode.

2. The display panel according to claim 1, wherein the conductive layer comprises a transparent conductive layer and a metal conductive layer stacked over the transparent conductive layer; the transparent conductive layer comprises a first part of the grid electrode, a first part of the source electrode, a first part of the drain electrode and the pixel electrode, and the pixel electrode is electrically connected with the first part of the drain electrode; the metal conductive layer includes a second portion of the gate, a second portion of the source, and a second portion of the drain.

3. The display panel according to claim 2, wherein a material of the metal conductive layer comprises at least one of copper, aluminum, titanium, and molybdenum; the material of the transparent conducting layer comprises one of indium tin oxide and indium zinc oxide.

4. The display panel according to claim 2, characterized by further comprising: the color resistance layer is positioned between the substrate layer and the active layer and comprises a plurality of color resistance patterns; the plurality of color resistance patterns are positioned on the light-emitting side of the pixel electrode.

5. The display panel according to claim 4, further comprising: a light-shielding layer located between the color resist layer and the active layer and including a plurality of light-shielding patterns; each shading pattern is arranged at intervals with the corresponding color resistance pattern in the overlooking view angle.

6. The display panel according to claim 4, further comprising:

a passivation layer over the conductive layer;

a pixel defining layer located above the passivation layer;

7. The display panel of claim 1, wherein the material of the active layer comprises a metal oxide semiconductor material.

8. A manufacturing method of a display panel is characterized by comprising the following steps:

providing a substrate;

forming an active layer over the substrate and patterning the active layer to form an active pattern;

9. The method of claim 8, wherein the half-tone mask includes a semi-transmissive region, a light-shielding region and a transmissive region, the light-shielding region corresponds to a region where the gate, the source and the drain are disposed, the semi-transmissive region corresponds to a region where the pixel electrode is disposed, and the transmissive region is located between the semi-transmissive region and the light-shielding region.

10. A display device comprising a display panel according to any one of claims 1 to 7 or a display panel manufactured according to the method of any one of claims 8 to 9.