CN114743445B - Spliced A/D and system conversion demonstration system - Google Patents

Spliced A/D and system conversion demonstration system Download PDF

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Publication number
CN114743445B
CN114743445B CN202210555461.XA CN202210555461A CN114743445B CN 114743445 B CN114743445 B CN 114743445B CN 202210555461 A CN202210555461 A CN 202210555461A CN 114743445 B CN114743445 B CN 114743445B
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unit
conversion
binary
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high level
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CN114743445A (en
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万亮斌
汪振中
祝紫琴
周航锐
许佩
江翔
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Hangzhou Qilong Electronic Science & Technology Co ltd
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Hangzhou Qilong Electronic Science & Technology Co ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09BEDUCATIONAL OR DEMONSTRATION APPLIANCES; APPLIANCES FOR TEACHING, OR COMMUNICATING WITH, THE BLIND, DEAF OR MUTE; MODELS; PLANETARIA; GLOBES; MAPS; DIAGRAMS
    • G09B23/00Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes
    • G09B23/06Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes for physics
    • G09B23/18Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes for physics for electricity or magnetism
    • G09B23/183Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes for physics for electricity or magnetism for circuits
    • G09B23/186Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes for physics for electricity or magnetism for circuits for digital electronics; for computers, e.g. microprocessors
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09BEDUCATIONAL OR DEMONSTRATION APPLIANCES; APPLIANCES FOR TEACHING, OR COMMUNICATING WITH, THE BLIND, DEAF OR MUTE; MODELS; PLANETARIA; GLOBES; MAPS; DIAGRAMS
    • G09B23/00Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes
    • G09B23/06Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes for physics
    • G09B23/18Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes for physics for electricity or magnetism
    • G09B23/183Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes for physics for electricity or magnetism for circuits

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  • General Physics & Mathematics (AREA)
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  • Business, Economics & Management (AREA)
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  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
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  • Educational Administration (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

The invention discloses a spliced A/D and system conversion demonstration system, which comprises: the device comprises an external signal-voltage conversion unit, an operational amplifier comparator cascade unit, a diode coding unit, a level matching unit and a nixie tube display unit; all units are detachably spliced through connecting terminals, and through the splicing, the demonstration system can dynamically convert external data acquired by an external signal sensor into numbers for display and simultaneously carry out decimal/binary/hexadecimal dynamic conversion demonstration. The invention realizes A/D conversion and binary conversion through the disassembly and assembly of circuit hardware, can better adapt to beginners to learn by entering the door, and lays a solid foundation for the later operation of learning the singlechip.

Description

Spliced A/D and system conversion demonstration system
Technical Field
The invention belongs to the technical field of electronic technical teaching aids, and relates to a spliced A/D and system for demonstrating conversion of a digital tube, which is based on a logic circuit and an operational amplifier comparator circuit and combined with a special professional chip and a digital tube display, and realizes the A/D conversion and the digital tube system dynamic conversion through splicing and combination.
Background
Along with the continuous change and development of the Internet and big data industry, teaching materials, courses and demonstration devices of some basic knowledge become new blank points at present, and due to the tight combination with the new Internet, big data and other contemporary education, a large number of talents meeting the current market economy can be cultivated in an accelerated manner. The invention provides an entry demonstrator suitable for the current elementary electronic technology, so that a user can deepen understanding of A/D conversion and system conversion through a hardware circuit.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a spliced A/D and system for demonstrating the conversion of the system; the method can be applied to classroom teaching or demonstration of digital circuits, logic circuits, system conversion and the like.
The technical scheme adopted by the invention is as follows:
a tiled a/D and binary conversion presentation system, comprising: the device comprises an external signal-voltage conversion unit, an operational amplifier comparator cascade unit, a diode coding unit, a level matching unit and a nixie tube display unit;
wherein: the external signal-voltage conversion unit is used for converting collected external signal data into voltage signals and transmitting the voltage signals to the operational amplifier comparator cascade unit, the operational amplifier comparator cascade unit forms high-level output according to the input voltage signals, only one path of high-level output is formed by each time of voltage signals input, and the operational amplifier comparator cascade unit can form n paths of high-level output according to all input voltage signals; the n paths of high level outputs are correspondingly 1-n numbers, and the diode coding unit utilizes the diode circuit to realize that each path of high level input outputs high level on the binary bit number corresponding to the corresponding number of the high level; the level matching unit is used for carrying out level matching conversion on the output signal of the diode coding unit so as to meet the display requirement of the nixie tube and outputting the output signal to the nixie tube display unit; the nixie tube display unit comprises at least two of a decimal unit, a binary unit and a hexadecimal unit;
all units are detachably spliced through connecting terminals, and through the splicing, the demonstration system can dynamically convert external data acquired by an external signal sensor into numbers for display and simultaneously carry out decimal/binary/hexadecimal dynamic conversion demonstration.
In the above technical solution, further, the external signal-voltage conversion unit includes an external signal sensor, and the external signal used for collecting is gravity, pressure, temperature, humidity, light intensity or concentration.
Furthermore, the operational amplifier comparator cascade unit can adopt a plurality of operational amplifier chips to form a voltage comparator with at least n paths of high-level outputs.
Furthermore, the diode coding unit utilizes the complete diode combination to realize that each input path of high level outputs the high level on the binary bit number corresponding to the high level.
Furthermore, a CD4511 chip is adopted in the decimal unit, so that decimal nixie tube display is achieved by binary coding.
The beneficial effects of the invention are as follows:
according to the invention, through the detachable splicing mode of each unit, a user can more intuitively feel the digital circuit and the logic circuit in the manual splicing process, and the understanding of the system conversion rule is deepened, the product avoids the single chip microcomputer technology which is difficult to understand by a beginner, and the A/D conversion and the system conversion are realized through the disassembly and assembly of circuit hardware, so that the method can better adapt to the beginner to learn to enter the door, and lays a solid foundation for the later operation of the learning single chip microcomputer.
Drawings
FIG. 1 is a schematic diagram of a specific architecture of a tiled A/D and binary conversion demonstrator system of the invention;
fig. 2 is a schematic structural diagram of an external signal-voltage conversion unit (gravity-voltage conversion unit);
FIG. 3 is a schematic diagram of a LM324 segment comparison circuit;
FIG. 4 is a schematic diagram of an operational amplifier comparator cascade unit;
FIG. 5 is a diagram showing a portion of a decimal unit and binary unit join for a nixie tube;
FIG. 6 is a schematic diagram of a structure of a diode-encoded unit;
FIG. 7 is a schematic diagram of a level matching unit;
FIG. 8 is a schematic diagram of a display structure of a nixie tube in a decimal unit;
FIG. 9 is a schematic diagram of a display structure of a nixie tube in a binary unit;
Detailed Description
The technical scheme of the invention is further described in detail below with reference to specific embodiments.
The invention relates to a spliced A/D and system for demonstrating conversion of a system, which comprises the following components: the device comprises an external signal-voltage conversion unit, an operational amplifier comparator cascade unit, a diode coding unit, a level matching unit and a nixie tube display unit;
wherein: the external signal-voltage conversion unit is used for converting collected external signal data into voltage signals and transmitting the voltage signals to the operational amplifier comparator cascade unit, the operational amplifier comparator cascade unit forms high-level output according to the input voltage signals, only one path of high-level output is formed by each time of voltage signals input, and the operational amplifier comparator cascade unit can form n paths of high-level output according to all input voltage signals; the n paths of high level outputs are correspondingly 1-n numbers, and the diode coding unit realizes that each path of high level input by using a diode circuit outputs the high level on the binary bit number corresponding to the corresponding number of the high level according to a binary conversion rule; the level matching unit is used for carrying out level matching conversion on the output signal of the diode coding unit so as to meet the display requirement of the nixie tube and outputting the output signal to the nixie tube display unit; the nixie tube display unit comprises at least two of a decimal unit, a binary unit and a hexadecimal unit;
all units are detachably spliced through connecting terminals, and through the splicing, the demonstration system can dynamically convert external data acquired by an external signal sensor into numbers for display and simultaneously carry out decimal/binary/hexadecimal dynamic conversion demonstration.
According to a specific embodiment of the invention, the external signal data can be any one of gravity, pressure, temperature, humidity, light intensity, concentration and the like, and the detected external signal data in a specific range can be converted into a linear voltage signal through an external signal-voltage conversion unit, and the linear voltage signal forms high-level output on different bits through an operational amplifier comparator cascade unit, so that the external signals with different sizes are dynamically displayed in correspondence with different numbers.
According to one embodiment of the present invention, the op-amp comparator cascade unit of the present invention may employ several op-amp chips cascaded to form a voltage comparator having at least n high-level outputs. n may be determined according to specific presentation needs.
According to a specific embodiment of the present invention, the diode coding unit of the present invention uses only the combination of diodes to implement the coding of 1 to n high level inputs, corresponding to the high level on the output binary bit number.
The decimal/binary conversion demonstration is described below with the external signal as gravity.
FIG. 1 is a schematic diagram showing a specific structure of a spliced A/D and system conversion demonstration system in this example; comprises the following steps:
the external signal-voltage conversion unit, as shown in fig. 2, adopts a Dc-Dc conversion mode to make the voltage signal converted by gravity become an independent voltage signal, and has no direct current connection with the digital display circuit and the operational amplifier comparator cascade circuit in the example, wherein, JP3 inputs 5V direct current voltage, the voltage is converted by the B0512-1W module to output 12V direct current working voltage, the working voltage is added on the strain gauge gravity sensor of JP1 500g-1kg, the output voltage is input into the LM358 two operational amplifier circuits by the R2 and the R6, and the signal is output at the JP2 end. In order to make the circuit simple and clear, only one lm358 operational amplifier chip is used, and stable linear voltage with output of 0.5-1V is obtained.
An op-amp comparator cascade unit, as shown in fig. 3, is an LM324 four op-amp comparison circuit, in which pins 1 and 2 of J1 are voltage signals Vi input by an external signal-voltage conversion unit, and when Vi is greater than VR20, U1D in the figure outputs a high level, and outputs about 3 volts via R17 and R18, that is, D0; when Vi is larger than VR15, U1C in the figure outputs high level, and outputs about 3V through R12 and R13, namely D1, and simultaneously, Q4 is conducted through R19, and D0 is closed; when Vi is greater than VR10, U1B outputs a high level, and outputs about 3 volts via R7 and R8, i.e., D2, while Q3 is turned on via R14 to turn off D1 and D0. When Vi is greater than VR5, U1A in the figure outputs a high level, and outputs about 3 volts via R2 and R1, i.e., D3, while Q2 is turned on via R9 to turn off D2, D1, and D0. As long as several lm324 circuit boards are cascaded together at the same time, D0, D1, D2, D3 … … Dn outputs can be output. The cascading method in this example is shown in fig. 4, and 12 high-level outputs can be formed by cascading three lm324 chips.
The diode coding unit in the invention completely adopts diodes to realize coding of different high levels of input, so that the diode coding unit realizes that high level output is formed on binary digits corresponding to the high level digits, in the example, as shown in fig. 6, in the example, dynamic conversion of decimal numbers 1-9 and binary is taken as an example, only the first 9 of 12 high level outputs after three lm324 chips are cascaded, corresponding to 1-9, each high level input is coded by utilizing unidirectional conduction of the diodes, thus four states of D3, D2, D1 and D0 are obtained at an output end, corresponding to digits corresponding to the input high levels, in the example, 1-0001, 2-0010, 3-0011, 4-0100, 5-0101, 6-0110, 7-0111, 8-1000 and 9-1001.
The level matching circuit lm324 is a four-op-amp chip, and can be designed into four comparison circuits by using four op-amps, because of the characteristics and design requirements of the lm324 chip, the high level output by lm324 is only 2.8-3.2V, which is far different from the digital level (for example, CD4511, 5V working voltage, and high level above 4.5V is usually needed) of the nixie tube display circuit, so in the example, npn triode 8050 and pnp triode 8550 are used as level matching conversion as shown in fig. 7, so that the output of any comparator in lm324 can have corresponding digital display, and the accuracy of the digital display signal of the circuit is ensured.
The nixie tube display unit comprises a decimal unit and a binary unit in the example, and the signals matched by the level matching unit are input into the decimal unit and the binary unit together; fig. 8 shows a display mode of a nixie tube in a decimal unit, which is implemented by using a CD4511, where CD4511 is a 4-line-7-segment latch decoder/driver (BCD input), i.e., a 7 th pin input D0, a 1 st pin input D1, a 2 nd pin input D2, and a 6 th pin input D3. When the 7 th pin inputs high level, the nixie tube displays '1'; when the 1 st pin inputs high level, the nixie tube displays '2'; when the 2 nd pin inputs high level, the nixie tube displays '4'; when the 6 th pin inputs high level, the nixie tube displays '8'. Simultaneously, when the 7 th pin and the 1 st pin simultaneously input high level, the nixie tube displays '3'; when the 2 nd and 1 st pins input high level at the same time, the nixie tube displays '6'; when pins 1, 2 and 7 simultaneously input high level, the nixie tube displays 7'; when the 6 th and 7 th pins input high level at the same time, the nixie tube displays '9'. Thus, decimal nixie tube display (in the interval of 1-9) is realized on the CD4511 chip by binary coding. Fig. 9 is a diagram showing a nixie tube in a binary unit, in which R2,4.7k is connected to a high level, the nixie tube shows '1', and the nixie tube shows '0'. Therefore, four nixie tubes can be arranged in the binary unit, and p6 is connected with D0 by splicing in a nixie tube circuit positioned at the D0 position; p6 in the nixie tube circuit at the D1 position is connected with D1; p6 in the nixie tube circuit at the D2 position is connected with D2; and p6 in the nixie tube circuit at the D3 position is connected with D3. In this way, the decimal display circuit and the binary display circuit are connected through assembly and disassembly, so that dynamic linkage and conversion of decimal and binary are realized.
Through the assembly and disassembly of each unit in the demonstration system, a most basic application foundation can be laid for a user to learn to use the singlechip, program the singlechip and accumulate preliminary knowledge by matching peripheral hardware circuits of the singlechip.
The above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced with equivalents; such modifications and substitutions do not depart from the spirit of the invention.

Claims (3)

1. A tiled a/D and binary conversion presentation system, comprising: the device comprises an external signal-voltage conversion unit, an operational amplifier comparator cascade unit, a diode coding unit, a level matching unit and a nixie tube display unit; wherein: the external signal-voltage conversion unit comprises an external signal sensor, is used for collecting external signals such as gravity, pressure, temperature, humidity, light intensity or concentration, is used for converting collected external signal data into voltage signals and transmitting the voltage signals to the operational amplifier comparator cascade unit, the operational amplifier comparator cascade unit forms high-level output according to the input voltage signals, only forms one path of high-level output when the voltage signals are input once, the operational amplifier comparator cascade unit adopts a plurality of operational amplifier chips to form a voltage comparator with at least n paths of high-level output, and can form n paths of high-level output according to all the input voltage signals; the n paths of high level outputs are correspondingly 1-n numbers, and the diode coding unit utilizes the diode circuit to realize that each path of high level input outputs high level on the binary bit number corresponding to the corresponding number of the high level; the level matching unit is used for carrying out level matching conversion on the output signal of the diode coding unit so as to meet the display requirement of the nixie tube and outputting the output signal to the nixie tube display unit; the nixie tube display unit comprises at least two of a decimal unit, a binary unit and a hexadecimal unit;
all units are detachably spliced through connecting terminals, and through the splicing, the demonstration system can dynamically convert external data acquired by an external signal sensor into numbers for display and simultaneously carry out decimal/binary/hexadecimal dynamic conversion demonstration.
2. The system according to claim 1, wherein the diode coding unit outputs a high level on a binary bit number corresponding to the high level by using a complete diode combination to realize that each input is a high level.
3. The spliced A/D and system conversion demonstration system according to claim 1, wherein a CD4511 chip is adopted in the decimal unit to realize the display of a decimal nixie tube by binary coding.
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101394183A (en) * 2008-10-30 2009-03-25 上海大学 A/D direct computing conversion, A/D cascade converter and use thereof
CN203325271U (en) * 2013-07-22 2013-12-04 曹丽 Teaching demonstrator for binary numbers
CN206003409U (en) * 2016-05-16 2017-03-08 重庆电子工程职业学院 A kind of single-chip microcomputer experiment system
CN207690363U (en) * 2017-06-21 2018-08-03 厦门大学嘉庚学院 A kind of 8 bit digital circuit synthesis experiment plate of portable type
CN212460931U (en) * 2020-07-27 2021-02-02 肖义军 Real standard equipment of piece together combination formula digital circuit
CN214504765U (en) * 2021-01-14 2021-10-26 赤峰学院 Digital system conversion demonstration device
CN113990158A (en) * 2021-11-16 2022-01-28 中国民航大学 Building block type electricity counting experiment device

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101394183A (en) * 2008-10-30 2009-03-25 上海大学 A/D direct computing conversion, A/D cascade converter and use thereof
CN203325271U (en) * 2013-07-22 2013-12-04 曹丽 Teaching demonstrator for binary numbers
CN206003409U (en) * 2016-05-16 2017-03-08 重庆电子工程职业学院 A kind of single-chip microcomputer experiment system
CN207690363U (en) * 2017-06-21 2018-08-03 厦门大学嘉庚学院 A kind of 8 bit digital circuit synthesis experiment plate of portable type
CN212460931U (en) * 2020-07-27 2021-02-02 肖义军 Real standard equipment of piece together combination formula digital circuit
CN214504765U (en) * 2021-01-14 2021-10-26 赤峰学院 Digital system conversion demonstration device
CN113990158A (en) * 2021-11-16 2022-01-28 中国民航大学 Building block type electricity counting experiment device

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