CN114709803B - Capacitor residual voltage discharging circuit and electronic equipment - Google Patents
Capacitor residual voltage discharging circuit and electronic equipmentInfo
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- CN114709803B CN114709803B CN202210434148.0A CN202210434148A CN114709803B CN 114709803 B CN114709803 B CN 114709803B CN 202210434148 A CN202210434148 A CN 202210434148A CN 114709803 B CN114709803 B CN 114709803B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
- H02H9/04—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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- Power Engineering (AREA)
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Abstract
本发明提供一种电容残余电压放电电路和电子设备，当需要给待放电电容提供放电服务时，所述开关控制单元会获取到放电指令，所述开关控制单元在获取到所述放电指令后，会响应所述放电指令，生成并输出用于控制所述开关单元的第一端和第二端之间导通的触发信号，在本方案中，所述开关单元的第一端与待放电电容的放电端相连，所述开关单元的第二端接地，当所述开关单元获取到触发信号时，所述开关单元的第一端与所述开关单元的第二端之间导通，此时，所述待放电电容的残余电压经由所述开关单元的第一端和开关单元的第二端流入到地，实现了所述待放电电容的残余电压泄放。
The present invention provides a capacitor residual voltage discharge circuit and electronic device. When a discharge service is required for a capacitor to be discharged, the switch control unit will obtain a discharge instruction. After obtaining the discharge instruction, the switch control unit will respond to the discharge instruction, generate and output a trigger signal for controlling conduction between the first end and the second end of the switch unit. In this solution, the first end of the switch unit is connected to the discharge end of the capacitor to be discharged, and the second end of the switch unit is grounded. When the switch unit obtains the trigger signal, conduction occurs between the first end of the switch unit and the second end of the switch unit. At this time, the residual voltage of the capacitor to be discharged flows into the ground via the first end and the second end of the switch unit, thereby achieving the discharge of the residual voltage of the capacitor to be discharged.
Description
Technical Field
The invention relates to the technical field of electronic circuits, in particular to a capacitor residual voltage discharging circuit and electronic equipment.
Background
Capacitors are often used to maintain stability of the power rail, and when the internal power supply is powered down, the charge on the capacitor may not be discharged for a long time due to the discharge branch being turned off. In some application scenarios, the slower discharging capacitor can cause anomalies or even damage to the product system. For example, in a liquid crystal display device, if the gate voltage of a thin film transistor controlling a liquid crystal pixel cannot be quickly reduced to zero after the system is turned off, a shutdown ghost phenomenon is easily formed, and how to quickly discharge the residual voltage in the capacitor is one of the technical problems to be solved urgently by those skilled in the art.
Disclosure of Invention
In view of the above, the embodiments of the present invention provide a capacitor residual voltage discharging circuit and an electronic device, so as to realize rapid discharging of the residual voltage of the capacitor to be discharged.
In order to achieve the above object, the embodiment of the present invention provides the following technical solutions:
a capacitive residual voltage discharge circuit comprising:
the switch control unit is used for responding to the acquired discharge instruction and outputting a trigger signal for controlling the switch unit to be conducted;
And the switching unit is used for controlling the switching between the first end and the second end of the switching unit to be in a conducting state when the trigger signal output by the switching control unit is acquired, the first end of the switching unit is connected with the discharge end of the capacitor to be discharged, and the second end of the switching unit is grounded.
Optionally, in the capacitor residual voltage discharging circuit, the switching unit includes:
the input end of the control switch is used as the first end of the switch unit, the output end of the control switch is used as the second end of the switch unit, and the control end of the control switch is connected with the output end of the switch control unit so as to acquire the trigger signal output by the switch control unit.
Optionally, in the capacitor residual voltage discharging circuit, the capacitor residual voltage discharging circuit further includes:
and the current limiting unit is arranged between the switching unit and the capacitor to be discharged.
Optionally, the capacitor residual voltage discharging circuit further comprises a current limiting unit comprising a current limiting resistor.
Optionally, in the capacitor residual voltage discharging circuit, the capacitor residual voltage discharging circuit further includes:
And the discharge signal instruction unit is used for generating a discharge instruction.
Optionally, in the capacitor residual voltage discharging circuit, the discharging signal instruction unit is specifically configured to:
when the discharge signal instruction unit is in a normal power supply state, judging whether an enabling signal acquired by the discharge signal instruction unit is a dormant signal or not;
When the enabling signal is a dormant signal, the discharging signal instruction unit does not output a discharging instruction;
when the enabling signal is a non-dormancy signal, the discharging signal instruction unit outputs a discharging instruction;
When the power supply of the discharge signal command unit is abnormal, the discharge signal command unit generates and outputs a discharge command.
Optionally, in the capacitor residual voltage discharging circuit, the discharging signal instruction unit includes:
The discharge signal instruction unit comprises a discharge signal instruction unit, a first inverter, a second inverter and a control circuit, wherein the input end of the first inverter is used for acquiring an enabling signal, the output end of the first inverter is connected with the input end of the second inverter, and the common end of the first inverter and the second inverter and the output end of the second inverter are used as the output end of the discharge signal instruction unit. Optionally, in the capacitor residual voltage discharging circuit, the switch control unit includes:
A first switching tube and a second switching tube;
The control end of the first switching tube is connected with the output end of the first inverter;
The input ends of the first switching tube, the second switching tube and the control end of the second switching tube are connected with the output end of the second inverter;
The output end of the first switch tube is grounded;
The output end of the second switching tube is used as the output end of the switch control unit;
The control end of the first switching tube and the input end of the second switching tube are used as the input ends of the switch control unit.
Optionally, in the capacitor residual voltage discharging circuit, the switch control unit further includes:
The first switch tube, the second switch tube, the third switch tube, the fourth switch tube and the first capacitor;
the control ends of the first switching tube and the fourth switching tube are connected with the output end of the first inverter;
The input ends of the first switching tube, the second switching tube and the control end of the second switching tube are connected with the output end of the second inverter;
The output end of the first switch tube is grounded;
The output end of the second switching tube is connected with the first end of the first capacitor;
the input end of the fourth switching tube is connected with the discharge end of the capacitor to be discharged;
the input end of the third switching tube is connected with the output end of the fourth switching tube, and the output end of the third switching tube is connected with the first end of the first capacitor;
The second end of the first capacitor is grounded;
the fourth switching tube, the first switching tube, the second switching tube and the third switching tube are switching tubes of different types;
The control end of the first switching tube, the input end of the second switching tube and the control end of the fourth switching tube are used as the input ends of the switch control unit;
the first end of the first capacitor is used as an output end of the switch control unit.
Optionally, in the capacitor residual voltage discharging circuit, the first switching tube, the second switching tube and the third switching tube are switching tubes with high-level conduction, and the fourth switching tube is switching tube with low-level conduction.
An electronic device comprising a capacitive residual voltage discharge circuit as claimed in any one of the preceding claims.
Based on the above technical solution, in the above solution provided by the embodiment of the present invention, when a discharge service is required to be provided for a capacitor to be discharged, the switch control unit obtains a discharge instruction, and after obtaining the discharge instruction, the switch control unit responds to the discharge instruction to generate and output a trigger signal for controlling the discharge of the switch unit, in this solution, a first end of the switch unit is connected with a discharge end of the capacitor to be discharged, the second end of the switch unit is grounded, when the switch unit acquires the trigger signal, the first end of the switch unit is controlled to be conducted with the second end of the switch unit, at the moment, the residual voltage of the capacitor to be discharged flows into the ground through the first end of the switch unit and the second end of the switch unit, and the residual voltage of the capacitor to be discharged is discharged.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present invention, and that other drawings can be obtained according to the provided drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a capacitor residual voltage discharge circuit according to an embodiment of the present application;
FIG. 2 is a schematic diagram of a capacitor residual voltage discharging circuit according to another embodiment of the present application;
Fig. 3 is a schematic diagram of a capacitor residual voltage discharging circuit according to another embodiment of the present application.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
In order to release the residual voltage in the capacitor, the application discloses a capacitor residual voltage discharging circuit, referring to fig. 1, the circuit can comprise:
a switch control unit 100 for outputting a trigger signal for controlling the switching unit 200 to be turned on in response to the acquired discharge instruction;
And the switching unit 200 is configured to control, when a trigger signal output by the switching control unit 100 is obtained, a path between a first end and a second end of the switching unit 200 to be switched to a conducting state, the first end of the switching unit 200 is connected to a discharge end of a capacitor to be discharged, the second end of the switching unit 200 is grounded, and when the first end and the second end of the switching unit 200 are conducted, the residual power of the capacitor to be discharged is discharged to the ground through the switching unit 200.
In the technical solution disclosed in the embodiment of the present application, when a discharge service is required to be provided to a capacitor to be discharged, the switch control unit 100 obtains a discharge instruction, and after obtaining the discharge instruction, the switch control unit 100 generates and outputs a trigger signal for controlling conduction between a first end and a second end of the switch unit 200 in response to the discharge instruction, in this solution, the first end of the switch unit 200 is connected to the discharge end of the capacitor to be discharged, the second end of the switch unit 200 is grounded, and when the switch unit 200 obtains the trigger signal, conduction is performed between the first end of the switch unit 200 and the second end of the switch unit 200, and at this time, a residual voltage of the capacitor to be discharged flows into the ground through the first end of the switch unit 200 and the second end of the switch unit 200, so as to realize the residual voltage discharge of the capacitor to be discharged.
In the technical solution disclosed in another embodiment of the present application, the circuit design of the switch unit 200 may be selected according to the user's requirement, as long as it can ensure that the on states of the first end of the switch unit 200 and the second end of the switch unit 200 are controllable. For example, in this solution, the switch unit 200 may include a control switch, where an input end of the control switch is used as a first end of the switch unit 200, an output end of the control switch is used as a second end of the switch unit 200, and a control end of the control switch is connected to an output end of the switch control unit 100 to obtain a trigger signal output by the switch control unit 100, where a type of the control switch may be selected by a user, for example, may be a MOS transistor or a triode, and specific types of the MOS transistor and the triode may be selected by the user according to a circuit design. Of course, in this embodiment, in order to prevent the drain current from flowing backward, a diode may be further provided in the switching unit 200, and the diode is connected in series with the control switch.
Further, in order to ensure the stability of the discharging process, in the above scheme, a current limiting unit may be further disposed between the switching unit 200 and the capacitor to be discharged. The current limiting unit may include a current limiting resistor. Further, the current limiting resistor may be an adjustable resistor, and the discharging time of the capacitor to be discharged is adjusted by adjusting the resistance of the adjustable resistor, for example, the larger the resistance of the adjustable resistor is, the longer the discharging time is, the smaller the resistance of the adjustable resistor is, and the shorter the discharging time is.
In another embodiment of the present application, a discharge signal command unit 300 may be further included, and the unit is configured to generate a discharge command. The discharge signal instruction unit is specifically used for judging whether the enabling signal acquired by the discharge signal instruction unit is a dormancy signal or not when an internal power supply unit of the discharge signal instruction unit is in a normal state; the discharge signal instruction unit does not output a discharge instruction when the enable signal is a sleep signal, outputs a discharge instruction when the enable signal is a non-sleep signal, generates and outputs a discharge instruction when the internal power supply state of the discharge signal instruction unit is in an abnormal state, and in this case, the discharge signal instruction unit 300 judges whether or not a discharge capacitor needs to be discharged by detecting the internal power supply state and the enable signal output by the discharge signal instruction unit 300, the state of the enable signal may be selected by a user on the basis of the user's demand, or may be associated with the power supply state of the apparatus to which the present circuit is applied, for example, the enable signal is a sleep signal (logic low level) when the power supply of the apparatus to which the present circuit is applied is switched from the power supply state to the power down state, and is kept for a certain period of time when the internal power supply state of the discharge signal instruction unit 300 and the internal power supply state of the apparatus to which the present circuit is applied are switched from the power supply state to the power supply state of the present circuit are switched to the power supply state of the apparatus to be switched from the power supply state of the power supply of the present circuit (logic high level), and the internal power of the apparatus to which is kept the internal to the power supply state of the apparatus to which is normally supplied via the apparatus to the power supply state of the apparatus to which the apparatus is switched, the internal power supply of the discharge signal instructing unit 300 also maintains the power-on state.
The application also discloses a specific structure of the discharge signal instruction unit 300, referring to fig. 2, the discharge signal instruction unit 300 includes:
The first inverter INV1 and the second inverter INV2 adopt an internal power supply of the discharge signal instruction unit 300 to supply power, the input end of the first inverter INV1 is used for acquiring an enable signal EN, the output end of the first inverter INV1 and the output end of the second inverter INV2 are both output ends of the discharge signal instruction unit 300, in the scheme, the signal output by the output end of the discharge signal instruction unit 300 is used as the discharge instruction, when the discharge signal instruction unit 300 is in a normal working mode, the switch control unit 100 can receive a logic signal output by the discharge instruction unit, so as to determine to turn on or off the switch unit 200, wherein the normal working mode is a working mode in which the internal power supply state of the discharge instruction unit is good, when the discharge signal instruction unit 300 is in an abnormal working mode, the common end of the first inverter 1 and the second inverter INV2 and the output end of the second inverter INV2 in the discharge signal instruction unit 300 are both the common end and the output end of the second inverter INV2 are automatically used as the discharge instruction, when the discharge signal instruction unit 300 is in the normal working mode, and when the discharge signal instruction unit 300 is in the abnormal working mode, the switch unit is in which the abnormal working mode, the switch unit is controlled, and the power supply is turned off, and the switch unit is controlled, and the power is turned off, and the logic unit is in the abnormal working mode.
In the technical solution disclosed in the present embodiment, a specific structure of the switch control unit 100 is also disclosed, referring to fig. 2, in this embodiment, the specific structure of the switch control unit 100 may include:
The switching control circuit comprises a first switching tube K1 and a second switching tube K2, wherein the output end of the second switching tube is used as the output end of the switching control unit, and the control end of the first switching tube and the input end of the second switching tube are used as the input ends of the switching control unit.
A first switching tube and a second switching tube;
The control end of the first switching tube is connected with the output end of the first inverter;
The input ends of the first switching tube, the second switching tube and the control end of the second switching tube are connected with the output end of the second inverter;
The output end of the first switch tube is grounded;
The output end of the second switching tube is used as the output end of the switch control unit;
The control end of the first switching tube and the input end of the second switching tube are used as the input ends of the switch control unit.
In this embodiment, when the switch control unit 100 is only composed of the first switch tube K1 and the second switch tube K2, the specific working mode of the switch control unit 100 is as follows:
When the signal EN obtained by the first inverter INV1 in the discharge command unit is a sleep signal (logic low level), that is, in this scheme, the EN signal is a low level signal, the signal after the EN signal is inverted by the first inverter is ENA, the signal after the EN signal is inverted by the second inverter is ENB, at this time, the ENA is a high level signal, the ENB is a low level signal, the high level signal acts on the control terminal of the first switch tube K1, the low level signal acts on the input terminal of the first switch tube K1 and the second switch tube K2, the first switch tube K1 is turned on under the control of the high level, and since the input terminal of the first switch tube K1 is connected with the output terminal of the second inverter and the control terminal of the second switch tube K2, at this time, after the first switch tube K1 is turned on and the second inverter outputs the low level signal ENB, the control terminal of the second switch tube K2 is regarded as a low level signal, the second switch tube K2 is turned off, the second switch 200 is kept in a state where the discharge path is not turned off, and the discharge path 200 is not turned off;
When the signal EN obtained by the first inverter INV1 is a non-sleep signal, the EN signal is a high level signal, the signal after the EN signal is inverted by the first inverter is ENA, the signal after the EN signal is inverted by the second inverter is ENB, at this time, the ENA is a low level signal, the ENB is a high level signal, the low level signal acts on the control end of the first switching tube K1, the high level signal acts on the input ends of the first switching tube K1 and the second switching tube K2, the first switching tube K1 is turned off under the control of the low level, and since the input end of the first switching tube K1 is connected with the output end of the second inverter and the control end of the second switching tube K2, at this time, after the first switching tube K1 is turned off and the second inverter outputs the high level signal ENB, the control end of the second switching tube K2 is regarded as a high level, the second switching tube K2 is in a conducting state, the control end of the switching tube K2 is turned on, the control end of the switching tube 200 is turned on, and the second switching tube 200 is turned off, and the second end of the switching tube 200 is turned on, and the discharging unit 200 is turned on.
In the technical solution disclosed in this embodiment, in order to ensure that the switch control unit 100 can still provide the discharging service in the abnormal state of the discharging signal instruction unit 300, another specific structure of the switch control unit 100 is also disclosed, referring to fig. 3, in this embodiment, the specific structure of the switch control unit 100 may include:
the switching device comprises a first switching tube K1, a second switching tube K2, a third switching tube K3, a fourth switching tube K4 and a first capacitor C1;
the control ends of the first switching tube K1 and the fourth switching tube K4 are connected with the output end of the first inverter INV 1;
The input ends of the first switching tube K1, the second switching tube K2 and the control end of the second switching tube K2 are connected with the output end of the second inverter INV2 (when the discharge signal command unit 300 has only the first inverter INV1, the input ends of the first switching tube K1, the second switching tube K2 and the control end of the second switching tube K2 are connected with the output end of the first inverter INV 1);
the output end of the first switching tube K1 is grounded;
the output end of the second switching tube K2 is connected with the first end of the first capacitor C1;
The input end of the fourth switching tube K4 is connected with the discharge end of the capacitor CL to be discharged;
The input end of the third switching tube K3 is connected with the output end of the fourth switching tube K4, and the output end of the third switching tube K3 is connected with the first end of the first capacitor C1;
the second end of the first capacitor C1 is grounded, in this solution, the first capacitor C1 is used as a boost unit, so in this solution, a resistor may be used instead of the first capacitor C1;
The fourth switching tube K4 and the first switching tube K1, the second switching tube K2, and the third switching tube K3 are different types of switching tubes, in this step, the different types refer to different control manners of on and off, for example, the first switching tube K1, the second switching tube K2, and the third switching tube K3 are switching tubes with high-level conduction, the fourth switching tube K4 is a switching tube with low-level conduction, and in the above circuit structure, the first switching tube K1, the second switching tube K2, the third switching tube K3, and the fourth switching tube K4 may be transistors or MOS tubes, or other switching tubes with on/off control functions, for example, the first switching tube K1, the second switching tube K2, and the third switching tube K3 are switching tubes with high-level conduction, and the fourth switching tube K4 is a PMOS tube;
the control end of the first switching tube K1, the input end of the second switching tube K2, and the control end of the fourth switching tube K4 are used as the input ends of the switch control unit 100;
a first end of the first capacitor C1 serves as an output end of the switch control unit 100.
The specific principle of the present embodiment will be further described with reference to specific structures of the discharge signal command unit 300 and the switch control unit 100 disclosed in the embodiment of the present application.
When the discharge signal command unit 300 is in the normal operation mode:
When the internal power supply VDD state of the discharge instruction unit is good:
The switch control unit 100 may receive a logic signal from the discharge command unit output to decide to turn on or off the switch unit 200. When the signal EN obtained by the first inverter INV1 in the discharge instruction unit is a sleep signal (logic low level), that is, in this scheme, in normal state, the EN signal is a low level signal, the signal after the EN signal is inverted by the first inverter is ENA, the signal after the EN signal is inverted by the second inverter is ENB, at this time, the ENA is a high level signal, the ENB is a low level signal, the high level signal acts on the control ends of the first switching tube K1 and the fourth switching tube K4, the low level signal acts on the input ends of the first switching tube K1 and the second switching tube K2, the fourth switching tube K4 is turned off under the control of the high level, the first switching tube K1 is turned on under the control of the high level, because the input end of the first switching tube K1 is connected with the output end of the second inverter and the control end of the second switching tube K2, at this time, the low level signal acts on the control end of the second switching tube K1 and the second switching tube K2 is regarded as a low level signal, the discharge path 200 is not opened, and the discharge unit 200 is not turned off;
When the signal EN obtained by the first inverter INV1 is a non-sleep signal, the EN signal is a high level signal, the signal after the EN signal is inverted by the first inverter is ENA, the signal after the EN signal is inverted by the second inverter is ENB, at this time, the ENA is a low level signal, the ENB is a high level signal, the low level signal acts on the control ends of the first switching tube K1 and the fourth switching tube K4, the high level signal acts on the input ends of the first switching tube K1 and the second switching tube K2, the fourth switching tube K4 is turned on under the control of the low level, the first switching tube K1 is turned off under the control of the low level, because the input end of the first switching tube K1 is connected with the output end of the second inverter and the control end of the second switching tube K2, at this time, after the first switching tube K1 is turned off and the second inverter outputs the high level signal ENB, the control end of the second switching tube K2 is regarded as being connected to the high level, the second switching tube K2 is in a conducting state, a trigger signal flows into the control end of the switching unit 200, the first end and the second end of the switching unit 200 are conducted, the discharging path of the capacitor to be discharged is conducted, and the capacitor can be discharged through the switching unit 200, and at the same time, the voltage of the capacitor is applied to the control end of the third switching tube K3 through the fourth switching tube K4, at this time, the third switching tube K3 is turned on, the discharging voltage of the capacitor to be discharged is applied to the two ends of the first capacitor C1 through the third switching tube K3, and the voltage of the first capacitor C1 rises.
When the discharge signal command unit 300 is in an abnormal operation mode;
The abnormal operation mode is that when the internal power supply VDD of the discharge instruction unit is powered down, the first inverter INV1 and the second inverter INV2 both output a low level logic signal, at this time, the control end of the first switch tube K1 has no high level, the first switch tube K1 is opened, and likewise, the second switch tube K2 remains closed, but the fourth switch tube K4 is automatically turned on by means of the residual voltage on the capacitor to be discharged, the voltage of the capacitor is applied to the control end of the third switch tube K3 through the fourth switch tube K4, at this time, the third switch tube K3 is turned on, the bleeder voltage of the capacitor to be discharged is applied to two ends of the first capacitor C1 through the third switch tube K3, the voltage of the first capacitor C1 rises along with the above, after the voltage of the first capacitor C1 rises to a certain extent, the switch unit 200 is regarded as acquiring the trigger signal, the path between the first end and the second end of the switch unit 200 is turned on, the residual current flowing through the port to the capacitor to be discharged flows into the ground after the discharging is realized.
Further, in the technical solution disclosed in the foregoing embodiment of the present application, the switch unit 200 may include a control switch, where the switch unit 200 may be an NMO tube or an N-type triode, an input end of the control switch is used as a first end of the switch unit 200, an output end of the control switch is used as a second end of the switch unit 200, and a control end of the control switch is connected to an output end of the switch control unit 100 to obtain a trigger signal output by the switch control unit 100. When the trigger signal acts on the control end of the control switch, the first end and the second end of the switch unit 200 are conducted, in order to keep the conducting state of the control switch, the first capacitor C1 may be an adjustable capacitor, and the discharging time of the capacitor to be discharged may be adjusted by adjusting the capacitance value of the first capacitor C1, so that the control switch may still conduct and maintain the discharging path of the capacitor to be discharged even if the voltages at the two ends of the capacitor to be discharged are reduced below the conducting voltage of the control switch, thereby accelerating the discharging speed of the capacitor.
In summary, the above-mentioned discharging circuit disclosed in the application has the effect that in the normal operation mode, when the enable signal of the discharging command unit is the sleep signal (logic low level), the switch unit 200 is blocked, and the discharging circuit does not share the current from the capacitor, so that the extra power consumption of the system is not increased. When the discharge command unit receives the non-sleep enable signal, the switch control unit 100 will rapidly turn on the switch unit 200, so that the discharge capacitor discharges the current-limiting unit. When the internal power supply of the discharging instruction unit is powered down, the switch control unit 100 can automatically turn on the switch unit 200 by means of the residual voltage on the discharging capacitor, so that the current limiting unit can actively discharge the residual voltage of the capacitor rapidly.
The application also discloses an electronic device using the capacitor residual voltage discharging circuit, which is an electronic device with the function of discharging the residual voltage of the capacitor, for example, the electronic device can be a television, a computer and the like.
In the present specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, and identical and similar parts between the embodiments are all enough to refer to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant points refer to the description of the method section.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN202210434148.0A CN114709803B (en) | 2022-04-24 | 2022-04-24 | Capacitor residual voltage discharging circuit and electronic equipment |
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| CN202210434148.0A CN114709803B (en) | 2022-04-24 | 2022-04-24 | Capacitor residual voltage discharging circuit and electronic equipment |
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| CN114709803A CN114709803A (en) | 2022-07-05 |
| CN114709803B true CN114709803B (en) | 2025-09-16 |
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| CN113380210A (en) * | 2021-06-22 | 2021-09-10 | 昆山龙腾光电股份有限公司 | Rapid power-down circuit and display device |
| CN214674874U (en) * | 2021-03-10 | 2021-11-09 | 芯北电子科技(南京)有限公司 | Discharge circuit of input capacitor of medium power switch power supply |
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| KR20080064928A (en) * | 2007-01-06 | 2008-07-10 | 삼성전자주식회사 | Afterimage removal method of a liquid crystal display and a liquid crystal display |
| CN108231030B (en) * | 2018-01-29 | 2020-04-21 | 京东方科技集团股份有限公司 | Discharge circuit, discharge method, and display device |
| CN214315217U (en) * | 2021-03-02 | 2021-09-28 | 天津航空机电有限公司 | Time sequence generating circuit and detection control device |
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2022
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN214674874U (en) * | 2021-03-10 | 2021-11-09 | 芯北电子科技(南京)有限公司 | Discharge circuit of input capacitor of medium power switch power supply |
| CN113380210A (en) * | 2021-06-22 | 2021-09-10 | 昆山龙腾光电股份有限公司 | Rapid power-down circuit and display device |
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