CN114709311A - Flip light-emitting diode chip and preparation method thereof - Google Patents

Flip light-emitting diode chip and preparation method thereof Download PDF

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Publication number
CN114709311A
CN114709311A CN202210279142.0A CN202210279142A CN114709311A CN 114709311 A CN114709311 A CN 114709311A CN 202210279142 A CN202210279142 A CN 202210279142A CN 114709311 A CN114709311 A CN 114709311A
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layer
type
chip
hole
refractive
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李文涛
鲁洋
简弘安
张星星
胡加辉
金从龙
顾伟
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Jiangxi Zhao Chi Semiconductor Co Ltd
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Jiangxi Zhao Chi Semiconductor Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/10—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H01L33/145—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40—Materials therefor
    • H01L33/42—Transparent materials

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Abstract

The invention discloses a flip-chip light emitting diode chip and a preparation method thereof, wherein the chip comprises: the epitaxial layer sequentially comprises an N-type semiconductor layer, an active layer and a P-type semiconductor layer from bottom to top; the chip also comprises an ohmic contact layer, a current barrier layer, a Bragg reflection layer, a current expansion layer, an insulating protection layer, a conductive metal layer and a bonding metal layer; the Bragg reflection layer comprises 15-40 groups of materials formed by alternately laminating a first refractive material and a second refractive material, wherein one of the first refractive material and the second refractive material is a high-refractive-index material, and the other one of the first refractive material and the second refractive material is a low-refractive-index material. According to the invention, the material group formed by alternately laminating the first refractive material and the second refractive material is arranged in the Bragg reflecting layer, so that the manufacturing cost of the flip-chip light-emitting diode chip is reduced, and the problems of high production cost and low cost performance advantage of the conventional flip-chip are solved.

Description

Flip light-emitting diode chip and preparation method thereof
Technical Field
The invention relates to the technical field of chips, in particular to a flip light-emitting diode chip and a preparation method thereof.
Background
The light emitting diode chip is widely applied to the fields of common illumination, special illumination, landscape illumination, phytogenic illumination, outdoor display, indoor display, liquid crystal display, vehicle-mounted illumination, vehicle-mounted display and the like by virtue of the advantages of energy conservation, high brightness, high durability, long service life, lightness and the like.
In recent years, the flip-chip light-emitting diode has the advantages of high lighting efficiency, low junction temperature, high reliability and the like, and is applied more and more widely, but the flip-chip light-emitting diode chip is relatively forward-mounted, so that the cost is higher, the cost performance advantage is not high, and how to reduce the manufacturing cost of the flip-chip light-emitting diode chip becomes a problem to be solved urgently.
Disclosure of Invention
Aiming at the defects of the prior art, the invention aims to provide a flip light-emitting diode chip and a preparation method thereof, aiming at reducing the manufacturing cost of the flip light-emitting diode chip and solving the problems of high production cost and low cost performance advantage of the conventional flip chip.
An aspect of the present invention provides a flip chip light emitting diode chip, the chip including:
the epitaxial layer sequentially comprises an N-type semiconductor layer, an active layer and a P-type semiconductor layer from bottom to top;
the chip also comprises an ohmic contact layer, a current barrier layer, a Bragg reflection layer, a current expansion layer, an insulating protection layer, a conductive metal layer and a bonding metal layer;
the Bragg reflection layer comprises 15-40 groups of materials formed by alternately laminating a first refractive material and a second refractive material, wherein one of the first refractive material and the second refractive material is a high-refractive-index material, and the other one of the first refractive material and the second refractive material is a low-refractive-index material.
According to an aspect of the above technical solution, the ohmic contact layer is made of ITO, and the thickness of the ohmic contact layer is
Figure BDA0003557382120000011
According to one aspect of the above technical solution, the current spreading layer sequentially comprises Cr, Al, Ti, Pt, Au, Pt, Ti from bottom to top, wherein the thickness of Cr is
Figure BDA0003557382120000021
Thickness of Al of
Figure BDA0003557382120000022
Figure BDA0003557382120000023
Thickness of Ti of
Figure BDA0003557382120000024
Thickness of Pt is
Figure BDA0003557382120000025
Thickness of Au of
Figure BDA0003557382120000026
According to one aspect of the above technical solution, the current spreading layer is sequentially Cr, Al, Ni, Ti, Pt, Au, Pt, Ti from bottom to top, wherein the thickness of Cr is
Figure BDA0003557382120000027
Thickness of Al of
Figure BDA0003557382120000028
Figure BDA0003557382120000029
Thickness of Ni of
Figure BDA00035573821200000210
Thickness of Ti of
Figure BDA00035573821200000211
Thickness of Pt is
Figure BDA00035573821200000212
Au having a thickness of
Figure BDA00035573821200000213
According to one aspect of the above technical solution, the current blocking layer is provided with a current blocking layer through hole, the bragg reflection layer is provided with a bragg reflection layer through hole, and the current blocking layer through hole and the bragg reflection layer through hole have a same forward projection.
According to one aspect of the above technical solution, an ohmic contact layer through hole is formed in the ohmic contact layer, and a forward projection of the ohmic contact layer through hole is located between forward projections of the bragg reflection layer through holes.
According to one aspect of the above technical solution, the current spreading layer is in contact with the ohmic contact layer through the current blocking layer and the bragg reflection layer via hole to form an electrical connection.
According to an aspect of the foregoing technical solution, the insulating protection layer includes a first insulating protection layer, the conductive metal layer includes a P-type conductive metal layer and an N-type conductive metal layer, the P-type conductive metal layer is in contact with the current spreading layer through a P-type first through hole preset in the first insulating protection layer to form an electrical connection, and the N-type conductive metal layer is in contact with the N-type semiconductor layer through an N-type first through hole preset in the first insulating protection layer to form an electrical connection.
According to an aspect of the foregoing technical solution, the insulating protection layer further includes a second insulating protection layer, the bonding metal layer includes a P-type bonding metal layer and an N-type bonding metal layer, the P-type bonding metal layer contacts the P-type conductive metal layer through a P-type second through hole preset on the second insulating protection layer to form an electrical connection, and the N-type bonding metal layer contacts the N-type conductive metal layer through an N-type second through hole preset on the second insulating protection layer to form an electrical connection.
Another aspect of the present invention is to provide a method for manufacturing a flip-chip light emitting diode chip, where the method is used to manufacture the flip-chip light emitting diode chip in the above technical solution, and the method includes:
providing a substrate, and manufacturing an epitaxial layer on the substrate, wherein the epitaxial layer sequentially comprises an N-type semiconductor layer, an active layer and a P-type semiconductor layer from bottom to top;
etching the epitaxial layer to expose the MESA steps;
manufacturing an ohmic contact layer on the P-type semiconductor layer, and manufacturing an ohmic contact layer through hole on the ohmic contact layer;
manufacturing a current blocking layer on the ohmic contact layer;
manufacturing 15-40 groups of material groups formed by alternately laminating the first refractive material and the second refractive material on the current blocking layer to form a Bragg reflection layer; wherein one of the first and second refractive materials is a high refractive index material and the other of the first and second refractive materials is a low refractive index material;
etching the Bragg reflection layer and the current barrier layer below the Bragg reflection layer to form the Bragg reflection layer and a current barrier layer through hole;
manufacturing a current expansion layer on the Bragg reflection layer;
manufacturing a first insulating protection layer on the current extension layer, and etching the first insulating protection layer to obtain a P-type first through hole and an N-type first through hole;
manufacturing a P-type conductive metal layer and an N-type conductive metal layer on the first insulating protection layer;
manufacturing a second insulating protection layer on the P-type conductive metal layer and the N-type conductive metal layer, and etching the second insulating protection layer to obtain a P-type second through hole and an N-type second through hole;
and manufacturing a P-type bonding metal layer and an N-type bonding metal layer on the second insulating protective layer.
Compared with the prior art, the flip-chip light-emitting diode chip and the preparation method have the advantages that:
according to the invention, by adding the material group which is alternately laminated in the Bragg reflection layer, the reflection capability of the Bragg reflection layer is improved, and the reflectivity of the Bragg reflection layer is more than 99.5%, so that Ag metal does not need to be arranged in the Bragg reflection layer for secondary reflection, a metal protection layer for blocking Ag metal migration can be omitted, the material consumption cost of a chip is reduced, the preparation process of the chip is simplified, and the whole preparation cost of the chip is reduced.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
fig. 1 is a schematic top view of a flip-chip led chip according to a first embodiment of the present invention;
FIG. 2 is a schematic sectional view taken along line A-A in FIG. 1;
FIG. 3 is a schematic flow chart illustrating a method for fabricating a flip-chip LED chip according to a third embodiment of the present invention;
description of reference numerals:
11-substrate, 12-epitaxial layer, 121-N type semiconductor layer, 122-active layer 122, 123-P type semiconductor layer 123, 13-MESA step 13, 21-ohmic contact layer, 211-ohmic contact layer via hole, 31-current blocking layer, 32-bragg reflection layer, 321-bragg reflection layer and current blocking layer via hole, 41-current spreading layer, 51-first insulating protection layer, 511-P type first via hole, 512-N type first via hole, 611-P type conductive metal layer 611, 612-N type conductive metal layer, 71-second insulating protection layer, 711-P type second via hole, 712-N type second via hole, 811-P type bonding metal layer, 812-N type bonding metal layer.
Detailed Description
In order to make the objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below. Several embodiments of the invention are presented in the drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "secured to" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. As used herein, the terms "vertical," "horizontal," "left," "right," "up," "down," and the like are used for descriptive purposes only and not for purposes of indicating or implying that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and therefore should not be construed as limiting the invention.
In the present invention, unless otherwise expressly specified or limited, the terms "mounted," "connected," "fixed," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
Example one
Referring to fig. 1-2, a first embodiment of the invention provides a flip-chip light emitting diode chip, which includes: the epitaxial layer 12 sequentially comprises an N-type semiconductor layer 121, an active layer 122 and a P-type semiconductor layer 123 from bottom to top; the chip further comprises an ohmic contact layer 21, a current blocking layer 31, a Bragg reflection layer 32, a current expansion layer 41, an insulation protection layer, a conductive metal layer and a bonding metal layer;
the bragg reflector 32 includes 15 to 40 groups of materials in which a first refractive material and a second refractive material are alternately stacked, one of the first refractive material and the second refractive material is a high refractive index material, and the other of the first refractive material and the second refractive material is a low refractive index material.
It should be noted here that, any one of the first refractive material and the second refractive material used for preparing the material group is a high refractive index material, and the other is a low refractive index material, and no particular limitation is imposed on the high refractive index and the low refractive index of the first refractive material and the second refractive material. It will be understood by those skilled in the art that the difference in refractive index between the high refractive index material and the low refractive index material should be no less than a predetermined difference, and the high and low refractive indices should be conventional in the art. According to the embodiment, the material group of the high-refraction material and the low-refraction material can ensure the required reflectivity, and the combination of 15-40 material groups can realize the reflectivity of more than 99.5%.
In this embodiment, the reflectivity of the bragg reflector 32 is greater than 99.5% by improving the reflectivity of the bragg reflector, and compared with about 90% of the reflectivity of the bragg reflector in a conventional chip, the reflectivity of the chip shown in this embodiment is greatly improved by the bragg reflector 32; therefore, in this embodiment, it is no longer necessary to set a high-reflectivity material such as Ag metal on the bragg reflector 32 for secondary reflection, and therefore, it is no longer necessary to set a metal protection layer for blocking migration of Ag metal.
In the present embodiment of the present invention,
as an example, in the present embodiment, the ohmic contact layer 21 is made of ITO (indium tin oxide), and the thickness of the ohmic contact layer 21 is
Figure BDA0003557382120000051
The bragg reflector layer 32 includes 28 sets of a first refractive material and a second refractive material alternately stacked; the current expansion layer 41 sequentially comprises Cr (chromium), Al (aluminum), Ti (titanium), Pt (platinum), Au (gold), Pt (platinum) and Ti (titanium) from bottom to top, and the metal layers are sequentially stacked; wherein the thickness of Cr (Cr) is
Figure BDA0003557382120000061
Al (aluminum) has a thickness of
Figure BDA0003557382120000062
Ti (titanium) has a thickness of
Figure BDA0003557382120000063
Figure BDA0003557382120000064
Pt (platinum) has a thickness of
Figure BDA0003557382120000065
Au (gold) having a thickness of
Figure BDA0003557382120000066
In this embodiment, the current blocking layer 31 is provided with a current blocking layer through hole, the bragg reflection layer 32 is provided with a bragg reflection layer through hole, and the current blocking layer through hole and the bragg reflection layer through hole have the same forward projection, that is, the size and the horizontal position of the current blocking layer through hole and the bragg reflection layer through hole are the same, that is, the current blocking layer through hole can be synchronously etched by only deepening a certain etching depth when the bragg reflection layer through hole is etched; an ohmic contact layer through hole 211 is formed in the ohmic contact layer 21, and the forward projection of the ohmic contact layer through hole 211 is located between the forward projections of the Bragg reflection layer through holes.
In the present embodiment, the current spreading layer 41 is in contact with the ohmic contact layer 21 through the bragg reflector and the current blocking layer via 321 to form an electrical connection; the insulating protection layer comprises a first insulating protection layer 51 and a second insulating protection layer 71, the conductive metal layers comprise a P-type conductive metal layer 611 and an N-type conductive metal layer 612, the P-type conductive metal layer 611 contacts with the current spreading layer 41 through a P-type first through hole 511 preset on the first insulating protection layer 51 to form an electrical connection, and the N-type conductive metal layer 612 contacts with the N-type semiconductor layer 121 through an N-type first through hole 512 preset on the first insulating protection layer 51 to form an electrical connection; the bonding metal layer comprises a P-type bonding metal layer 811 and an N-type bonding metal layer 812, the P-type bonding metal layer 811 contacts with the P-type conductive metal layer 611 through a P-type second through hole 711 preset on the second insulating protection layer 71 to form electrical connection, and the N-type bonding metal layer 812 contacts with the N-type conductive metal layer 612 through an N-type second through hole 712 preset on the second insulating protection layer 71 to form electrical connection.
In summary, by adopting the flip-chip light-emitting diode chip shown in this embodiment, the bragg reflection layer 32 is set to 28 sets of the material groups in which the first refraction material and the second refraction material are alternately stacked, compared with a conventional chip, the reflection capability of the bragg reflection layer 32 is greatly improved, so that it is no longer necessary to set Ag metal on the bragg reflection layer 32 for secondary reflection, and thus a metal protection layer for blocking migration of the Ag metal can be eliminated, the material consumption cost of the chip is reduced, the preparation process of the chip is simplified, and the overall preparation cost of the chip is reduced.
Example two
A second embodiment of the present invention provides a flip-chip light emitting diode chip having substantially the same structure as the flip-chip light emitting diode chip shown in the first embodiment, except that:
in this embodiment, the current spreading layer is, from bottom to top, Cr (chromium), Al (aluminum), Ni (nickel), Ti (titanium), Pt (platinum), Au (gold), Pt (platinum), and Ti (titanium), wherein the thickness of Cr (chromium) is
Figure BDA0003557382120000071
Thickness of Al (aluminum)
Figure BDA0003557382120000072
Ni (nickel) having a thickness of
Figure BDA0003557382120000073
Ti (titanium) has a thickness of
Figure BDA0003557382120000074
Pt (platinum) has a thickness of
Figure BDA0003557382120000075
Au (gold) having a thickness of
Figure BDA0003557382120000076
EXAMPLE III
Referring to fig. 3, a third embodiment of the present invention provides a method for manufacturing a flip-chip light emitting diode chip, where the method is used to manufacture the flip-chip light emitting diode chip described in the above embodiments, and the method includes steps S1-S11:
step S1, providing a substrate, and manufacturing an epitaxial layer on the substrate, wherein the epitaxial layer sequentially comprises an N-type semiconductor layer, an active layer and a P-type semiconductor layer from bottom to top;
step S2, etching the epitaxial layer to expose the MESA steps;
step S3, an ohmic contact layer is manufactured on the P-type semiconductor layer, and an ohmic contact layer through hole is manufactured on the ohmic contact layer;
step S4, manufacturing a current barrier layer on the ohmic contact layer;
step S5, manufacturing 15-40 groups of material groups in which the first refractive material and the second refractive material are alternately laminated on the current blocking layer to form a bragg reflection layer; wherein one of the first and second refractive materials is a high refractive index material and the other of the first and second refractive materials is a low refractive index material;
step S6, etching the Bragg reflection layer and the current barrier layer below the Bragg reflection layer to form a Bragg reflection layer and a current barrier layer through hole;
step S7, fabricating a current spreading layer on the bragg reflector;
step S8, manufacturing a first insulation protection layer on the current expansion layer, and etching the first insulation protection layer to obtain a P-type first through hole and an N-type first through hole;
step S9, fabricating a P-type conductive metal layer and an N-type conductive metal layer on the first insulating protection layer;
step S10, manufacturing a second insulating protective layer on the P-type conductive metal layer and the N-type conductive metal layer, and etching the second insulating protective layer to obtain a P-type second through hole and an N-type second through hole;
step S11, a P-type bonding metal layer and an N-type bonding metal layer are fabricated on the second insulating protection layer.
Specifically, the steps of the method for manufacturing a flip-chip light emitting diode chip shown in this embodiment include:
providing a substrate, growing an epitaxial layer on the substrate, wherein the epitaxial layer is an N-type semiconductor layer, an active layer and a P-type semiconductor layer from bottom to top in sequence;
coating photoresist on the surface of the P-type semiconductor layer, then exposing and developing to form a pattern, removing part of the P-type semiconductor layer, the active layer and the N-type semiconductor layer by utilizing an ICP (inductively coupled plasma) etching process to expose an MESA step, and then removing the photoresist;
depositing ITO (indium tin oxide) on the surface by using a magnetron sputtering process, then photoetching to form a pattern, removing part of the ITO by using ITO corrosive liquid, and then removing photoresist to form an ohmic contact layer and an ohmic contact layer through hole;
then utilizing physical chemical deposition process to deposit SiO on the surface2Forming a current blocking layer;
depositing 15-40 alternately-laminated material groups with low refractive index and high refractive index on the surface by using an electron beam evaporation process to form a Bragg reflection layer, forming a pattern on the surface by using a photoetching process, removing part of the Bragg reflection layer and a current barrier layer below the Bragg reflection layer by using an inductively coupled plasma etching process to form the Bragg reflection layer and a current barrier layer through hole;
depositing ITO (indium tin oxide) on the surface by utilizing a magnetron sputtering process, then photoetching to form a pattern, removing part of the ITO by utilizing ITO corrosive liquid, and then removing photoresist to form a current expansion layer;
then, SiO is deposited on the surface by utilizing PECVD process2Forming a first insulation protection layer, then photoetching to form a pattern, then forming a P-type first insulation protection layer through hole and an N-type first insulation protection layer through hole by utilizing an inductively coupled plasma etching process, and then removing photoresist;
coating negative photoresist on the surface, exposing and developing to form a pattern, evaporating metal by using an electron beam evaporation process, stripping Off part of metal by using a lift-Off process, and removing the photoresist to form a P-type conductive metal layer and an N-type conductive metal layer; the P-type and N-type conductive metals comprise one or more of Cr, Al, Ti, Ni, Pt and Au;
then, SiO is deposited on the surface by utilizing PECVD process2Forming a second insulating protection layer, then photoetching to form a pattern, then forming a P-type second insulating protection layer through hole and an N-type second insulating protection layer through hole by utilizing an inductive coupling plasma etching process, and then removing photoresist;
coating negative photoresist on the surface, exposing and developing to form a pattern, evaporating metal by using an electron beam evaporation process, stripping Off part of metal by using a lift-Off process, and removing the photoresist to form a P-type bonding metal layer and an N-type bonding metal layer; the P-type bonding metal layer and the N-type bonding metal layer comprise one or more of Cr, Al, Ti, Ni, Pt and Au.
In summary, according to the flip-chip light-emitting diode chip manufactured by the manufacturing method shown in this embodiment, by adding the material groups stacked alternately in the bragg reflective layer, compared with a conventional chip, the reflective capability of the bragg reflective layer is greatly improved, so that it is no longer necessary to set Ag metal on the bragg reflective layer for secondary reflection, and thus a metal protective layer for blocking migration of the Ag metal can be omitted, the material cost of the chip is reduced, the manufacturing process of the chip is simplified, and the overall manufacturing cost of the chip is reduced.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The above examples only show some embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the present invention. It should be noted that, for those skilled in the art, various changes and modifications can be made without departing from the spirit of the invention, and these changes and modifications are all within the scope of the invention. Therefore, the protection scope of the present patent should be subject to the appended claims.

Claims (10)

1. A flip-chip light emitting diode chip, the chip comprising:
the epitaxial layer sequentially comprises an N-type semiconductor layer, an active layer and a P-type semiconductor layer from bottom to top;
the chip also comprises an ohmic contact layer, a current barrier layer, a Bragg reflection layer, a current expansion layer, an insulating protection layer, a conductive metal layer and a bonding metal layer;
the Bragg reflection layer comprises 15-40 groups of materials formed by alternately laminating a first refractive material and a second refractive material, wherein one of the first refractive material and the second refractive material is a high-refractive-index material, and the other one of the first refractive material and the second refractive material is a low-refractive-index material.
2. The flip-chip light emitting diode chip of claim 1, wherein the ohmic contact layer is made of ITO and has a thickness of
Figure FDA0003557382110000011
3. The flip-chip light emitting diode chip of claim 2, wherein the current spreading layer comprises Cr, Al, Ti, Pt, Au, Pt, Ti in sequence from bottom to top, wherein the thickness of Cr is
Figure FDA0003557382110000012
Thickness of Al of
Figure FDA0003557382110000013
Thickness of Ti of
Figure FDA0003557382110000014
Thickness of Pt is
Figure FDA0003557382110000015
Au having a thickness of
Figure FDA0003557382110000016
4. The flip-chip light emitting diode chip of claim 2, wherein the current spreading layer comprises, in order from bottom to top, Cr, Al, Ni, Ti, Pt, Au, Pt, Ti, wherein Cr has a thickness of
Figure FDA0003557382110000017
Thickness of Al of
Figure FDA0003557382110000018
Thickness of Ni of
Figure FDA0003557382110000019
Thickness of Ti of
Figure FDA00035573821100000110
Thickness of Pt is
Figure FDA00035573821100000111
Thickness of Au of
Figure FDA00035573821100000112
5. The flip chip light emitting diode chip of claim 1, wherein the current blocking layer has a current blocking layer through hole, the bragg reflection layer has a bragg reflection layer through hole, and the current blocking layer through hole has a forward projection that is consistent with the bragg reflection layer through hole.
6. The flip-chip light emitting diode chip as claimed in claim 5, wherein the ohmic contact layer is provided with ohmic contact layer through holes, and the forward projections of the ohmic contact layer through holes are located between the forward projections of the Bragg reflection layer through holes.
7. The flip chip led chip of claim 1, wherein the current spreading layer is in contact with the ohmic contact layer through the current blocking layer and the bragg reflector via hole to form an electrical connection.
8. The flip-chip light emitting diode chip as claimed in claim 7, wherein the insulating protection layer comprises a first insulating protection layer, the conductive metal layer comprises a P-type conductive metal layer and an N-type conductive metal layer, the P-type conductive metal layer is in contact with the current spreading layer through a P-type first via hole predetermined on the first insulating protection layer to form an electrical connection, and the N-type conductive metal layer is in contact with the N-type semiconductor layer through an N-type first via hole predetermined on the first insulating protection layer to form an electrical connection.
9. The flip-chip led chip of claim 8, wherein the insulating protective layer further comprises a second insulating protective layer, the bonding metal layer comprises a P-type bonding metal layer and an N-type bonding metal layer, the P-type bonding metal layer contacts the P-type conductive metal layer through a P-type second through hole formed in the second insulating protective layer to form an electrical connection, and the N-type bonding metal layer contacts the N-type conductive metal layer through an N-type second through hole formed in the second insulating protective layer to form an electrical connection.
10. A method for producing a flip-chip light-emitting diode chip, the method being used for producing the flip-chip light-emitting diode chip as claimed in any one of claims 1 to 9, the method comprising:
providing a substrate, and manufacturing an epitaxial layer on the substrate, wherein the epitaxial layer sequentially comprises an N-type semiconductor layer, an active layer and a P-type semiconductor layer from bottom to top;
etching the epitaxial layer to expose the MESA steps;
manufacturing an ohmic contact layer on the P-type semiconductor layer, and manufacturing an ohmic contact layer through hole on the ohmic contact layer;
manufacturing a current blocking layer on the ohmic contact layer;
manufacturing 15-40 groups of material groups formed by alternately laminating the first refractive material and the second refractive material on the current blocking layer to form a Bragg reflection layer; wherein one of the first and second refractive materials is a high refractive index material and the other of the first and second refractive materials is a low refractive index material;
etching the Bragg reflection layer and the current barrier layer below the Bragg reflection layer to form a Bragg reflection layer and a current barrier layer through hole;
manufacturing a current expansion layer on the Bragg reflection layer;
manufacturing a first insulating protection layer on the current extension layer, and etching the first insulating protection layer to obtain a P-type first through hole and an N-type first through hole;
manufacturing a P-type conductive metal layer and an N-type conductive metal layer on the first insulating protection layer;
manufacturing a second insulating protection layer on the P-type conductive metal layer and the N-type conductive metal layer, and etching the second insulating protection layer to obtain a P-type second through hole and an N-type second through hole;
and manufacturing a P-type bonding metal layer and an N-type bonding metal layer on the second insulating protective layer.
CN202210279142.0A 2022-03-21 2022-03-21 Flip light-emitting diode chip and preparation method thereof Pending CN114709311A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115579438A (en) * 2022-12-09 2023-01-06 江西兆驰半导体有限公司 LED chip with inverted silver mirror and preparation method thereof
CN116581225A (en) * 2023-07-13 2023-08-11 江西兆驰半导体有限公司 Flip light-emitting diode chip and preparation method thereof
CN117712245A (en) * 2024-02-05 2024-03-15 江西兆驰半导体有限公司 Flip LED chip and preparation method thereof

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115579438A (en) * 2022-12-09 2023-01-06 江西兆驰半导体有限公司 LED chip with inverted silver mirror and preparation method thereof
CN116581225A (en) * 2023-07-13 2023-08-11 江西兆驰半导体有限公司 Flip light-emitting diode chip and preparation method thereof
CN116581225B (en) * 2023-07-13 2023-10-17 江西兆驰半导体有限公司 Flip light-emitting diode chip and preparation method thereof
CN117712245A (en) * 2024-02-05 2024-03-15 江西兆驰半导体有限公司 Flip LED chip and preparation method thereof

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