CN114695617A - LED chip and manufacturing method thereof - Google Patents
LED chip and manufacturing method thereof Download PDFInfo
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- CN114695617A CN114695617A CN202210454389.1A CN202210454389A CN114695617A CN 114695617 A CN114695617 A CN 114695617A CN 202210454389 A CN202210454389 A CN 202210454389A CN 114695617 A CN114695617 A CN 114695617A
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- 238000004519 manufacturing process Methods 0.000 title claims description 12
- 238000002360 preparation method Methods 0.000 claims abstract description 8
- 239000000758 substrate Substances 0.000 claims description 56
- 239000004065 semiconductor Substances 0.000 claims description 39
- 238000003475 lamination Methods 0.000 claims description 25
- 238000002161 passivation Methods 0.000 claims description 23
- 238000003892 spreading Methods 0.000 claims description 22
- 230000007480 spreading Effects 0.000 claims description 22
- 238000005530 etching Methods 0.000 claims description 6
- 238000000034 method Methods 0.000 claims description 6
- 238000010030 laminating Methods 0.000 claims description 4
- 238000000059 patterning Methods 0.000 claims description 3
- 230000007423 decrease Effects 0.000 claims description 2
- 230000003247 decreasing effect Effects 0.000 claims 1
- 238000004020 luminiscence type Methods 0.000 abstract description 3
- 230000005855 radiation Effects 0.000 abstract description 3
- 238000005215 recombination Methods 0.000 abstract description 3
- 230000006798 recombination Effects 0.000 abstract description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 4
- 230000009471 action Effects 0.000 description 3
- 229910002601 GaN Inorganic materials 0.000 description 2
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 239000008358 core component Substances 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- JVPLOXQKFGYFMN-UHFFFAOYSA-N gold tin Chemical compound [Sn].[Au] JVPLOXQKFGYFMN-UHFFFAOYSA-N 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
- H01L33/387—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape with a plurality of electrode regions in direct contact with the semiconductor body and being electrically interconnected by another electrode layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
- H01L33/382—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0016—Processes relating to electrodes
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- Power Engineering (AREA)
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Abstract
The invention provides an LED chip and a preparation method thereof.A second type expansion electrode is provided with a middle expansion electrode, and the rest second type expansion electrodes are distributed on two sides of the middle expansion electrode in pairs by taking the middle expansion electrode as a middle shaft; the first type expansion electrodes are distributed on two sides of the middle expansion electrode in pairs by taking the middle expansion electrode as a middle shaft; and the first type extension electrode and the rest of the second type extension electrodes are alternately distributed on two sides of the middle extension electrode. Therefore, when current flows in through the second electrode (namely the P electrode) and then preferentially passes through the middle extension electrode, the radiation recombination luminescence of electrons and holes is rapidly realized; meanwhile, the first type extension electrode and the second type extension electrode are alternately and uniformly arranged on two sides of the middle extension electrode of the second electrode, so that the tendency of current concentration in the middle extension electrode can be relieved, and the current can be uniformly diffused on the light-emitting table surface.
Description
Technical Field
The invention relates to the field of light emitting diodes, in particular to an LED chip and a preparation method thereof.
Background
With the rapid development of the LED technology and the gradual improvement of the LED lighting effect, the application of the LED is more and more extensive, and people pay more attention to the development prospect of the LED on the display screen. The LED chip is used as a core component of the LED lamp, has the function of converting electric energy into light energy, and specifically comprises an epitaxial wafer and an N-type electrode and a P-type electrode which are respectively arranged on the epitaxial wafer. When current passes through the LED chip, holes in the P type semiconductor and electrons in the N type semiconductor move to the active layer and are combined in the active layer, so that the LED chip emits light.
With the increasing demand of the market for the brightness of the light emitting diode, the size of the chip is made larger and larger, the driving current is also increased, and the high-power LED is obtained. The chip structure needs to be continuously improved and optimized; at present, a chip structure optimized by various electrodes becomes a main stream structure of a super-brightness chip; however, there are problems of current crowding of the electrodes and poor reliability.
In view of the above, in order to overcome the above-mentioned defects of the LED chip in the prior art, the present inventors have specially designed an LED chip and a method for manufacturing the same.
Disclosure of Invention
The invention aims to provide an LED chip and a preparation method thereof, which are used for solving the problems of current crowding and electrode reliability of the LED chip.
In order to achieve the purpose, the technical scheme adopted by the invention is as follows:
an LED chip, comprising:
a substrate;
the epitaxial lamination is arranged on the surface of the substrate and at least comprises a first type semiconductor layer, an active region and a second type semiconductor layer which are sequentially stacked along a first direction, and a local region of the epitaxial lamination is etched to a part of the first type semiconductor layer to form a groove and a table top; the first direction is perpendicular to the substrate and directed from the substrate to the epitaxial stack;
a first electrode stacked on an exposed portion of the groove;
a second electrode laminated on a surface of the mesa;
the first electrode is provided with a first type extended electrode which is connected with the first electrode and extends along the direction of the second electrode in a top view; the second electrode is provided with a plurality of second type expansion electrodes which are connected with the second electrode and extend along the direction of the first electrode;
wherein the number of the second type extension electrodes is odd; the second type expansion electrodes are provided with a middle expansion electrode, and the rest second type expansion electrodes are distributed on two sides of the middle expansion electrode in pairs by taking the middle expansion electrode as a middle shaft;
the number of the first type expansion electrodes is even, and the first type expansion electrodes are distributed on two sides of the middle expansion electrode in pairs by taking the middle expansion electrode as a middle shaft; and the first type extension electrode and the rest of the second type extension electrodes are alternately distributed on two sides of the middle extension electrode.
Preferably, the second type extension electrode has the middle extension electrode, and the rest of the second type extension electrodes are distributed on two sides of the middle extension electrode with the middle extension electrode as a symmetry axis.
Preferably, the first type extension electrodes are distributed on two sides of the middle extension electrode by taking the middle extension electrode as a symmetry axis.
Preferably, in an extending direction from the second electrode to the first electrode, a distance between each of the second type expansion electrodes and the intermediate expansion electrode gradually increases.
Preferably, a distance between each of the second type extension electrodes and the adjacent first type extension electrode is gradually increased.
Preferably, in an extending direction from the second electrode to the first electrode, the thickness of the second type expansion electrode is gradually reduced, and the lowest thickness is at least over half of the highest thickness.
Preferably, in the extending direction from the first electrode to the second electrode, the thickness of the first type extension electrode is gradually reduced, and the lowest thickness at least exceeds half of the highest thickness.
Preferably, in an extending direction from the second electrode to the first electrode, the thicknesses of the middle extension electrode and the rest of the second type extension electrodes are gradually reduced, and the lowest thickness at least exceeds half of the highest thickness.
Preferably, the number of the second type extension electrodes is 3, and the number of the first type extension electrodes is 2.
Preferably, the device further comprises a passivation layer, wherein the passivation layer covers the epitaxial stack and has a first through hole and a second through hole, the first through hole corresponds to the first electrode, and the second through hole corresponds to the second electrode.
Preferably, the first type semiconductor layer includes an N-type semiconductor layer, and the second type semiconductor layer includes a P-type semiconductor layer.
Preferably, the epitaxial stack has at least one exposed substrate portion extending from the second-type semiconductor layer to the substrate through the active region and the first-type semiconductor layer, wherein the passivation layer is laminated on the substrate in such a manner as to be maintained on the exposed substrate portion.
Preferably, the exposed part of the substrate surrounds the periphery of the epitaxial lamination; and the passivation layer is laminated on the substrate in a manner of being kept at the exposed part of the substrate and surrounds the periphery of the epitaxial lamination layer.
The invention also provides a preparation method of the LED chip, which comprises the following steps:
step S01, providing a substrate;
step S02, laminating an epitaxial lamination on the surface of the substrate, wherein the epitaxial lamination comprises a first type semiconductor layer, an active region and a second type semiconductor layer which are sequentially stacked along a first direction, and the first direction is perpendicular to the substrate and points to the epitaxial lamination from the substrate;
step S03, etching a local region of the epitaxial stack to a portion of the first type semiconductor layer to form a recess and a mesa;
step S04, manufacturing a first type of expansion electrode on the groove, and manufacturing a second type of expansion electrode on the table top, wherein the first type of expansion electrode and the second type of expansion electrode extend towards opposite directions respectively;
the number of the second type extension electrodes is odd when viewed from top; the second type expansion electrodes are provided with a middle expansion electrode, and the rest second type expansion electrodes are distributed on two sides of the middle expansion electrode in pairs by taking the middle expansion electrode as a middle shaft;
the number of the first type expansion electrodes is even, and the first type expansion electrodes are distributed on two sides of the middle expansion electrode in pairs by taking the middle expansion electrode as a middle shaft; the first type extension electrodes and the rest of the second type extension electrodes are alternately distributed on two sides of the middle extension electrode;
step S05, deeply etching the edge of the epitaxial lamination layer to enable the edge to have a substrate exposed part;
step S06, growing a passivation layer, wherein the passivation layer coats the epitaxial lamination layer in a mode of laminating on the exposed part of the substrate; patterning the passivation layer to form a first through hole and a second through hole, wherein the first through hole exposes a part of the first type extended electrode, and the second through hole exposes a part of the second type extended electrode;
step S07, manufacturing a first electrode and a second electrode; the first electrode is laminated on the first through hole; the second electrode is laminated on the second through hole.
Preferably, in the extending direction from the second electrode to the first electrode, the distance between each second type expansion electrode and the middle expansion electrode is gradually increased; the distance between each second type extension electrode and the adjacent first type extension electrode is gradually increased.
Preferably, in the extending direction from the first electrode to the second electrode, the thickness of the first type extension electrode is gradually reduced, and the lowest thickness at least exceeds half of the highest thickness;
in the extending direction from the second electrode to the first electrode, the thicknesses of the middle extension electrode and the rest of the second type extension electrodes are gradually reduced, and the lowest thickness at least exceeds half of the highest thickness.
Preferably, the exposed part of the substrate surrounds the periphery of the epitaxial lamination; and the passivation layer is laminated on the substrate in a manner of being kept at the exposed part of the substrate and surrounds the periphery of the epitaxial lamination layer.
According to the above technical solution, the LED chip provided by the present invention is provided with the first electrode having the first type extended electrode connected thereto and extending along the direction of the second electrode; the second electrode is provided with a plurality of second type expansion electrodes which are connected with the second electrode and extend along the direction of the first electrode; wherein the number of the second type extension electrodes is odd; the second type expansion electrodes are provided with a middle expansion electrode, and the rest second type expansion electrodes are distributed on two sides of the middle expansion electrode in pairs by taking the middle expansion electrode as a middle shaft; the number of the first type expansion electrodes is even, and the first type expansion electrodes are distributed on two sides of the middle expansion electrode in pairs by taking the middle expansion electrode as a middle shaft; and the first type extension electrode and the rest of the second type extension electrodes are alternately distributed on two sides of the middle extension electrode. Therefore, when current flows in through the second electrode (namely the P electrode) and then preferentially passes through the middle extension electrode, the radiation recombination luminescence of electrons and holes is rapidly realized; meanwhile, the first type extension electrode and the second type extension electrode are alternately and uniformly arranged on two sides of the middle extension electrode of the second electrode, so that the tendency of current concentration in the middle extension electrode can be alleviated, and the current can be uniformly diffused on the light-emitting table surface. Therefore, based on the structure, the current crowding phenomenon caused by large driving current is solved, and the external quantum efficiency of the LED is effectively improved.
Secondly, in the extending direction from the second electrode to the first electrode, the distance between each second type extension electrode and the middle extension electrode is gradually increased, so that current can be further diffused to the edge of the epitaxial lamination, and the LED chip can emit light more uniformly. Meanwhile, the thickness of the second type extension electrode is gradually reduced, and the lowest thickness at least exceeds the thickness setting of half of the highest thickness, so that the current crowding can be reduced, the current extension can be increased, and the product cost can be reduced.
According to the technical scheme, the preparation method of the LED chip provided by the invention has the beneficial effects that the process is simple and convenient to manufacture and is convenient to produce while the beneficial effects of the LED chip are realized.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an LED chip according to an embodiment of the present invention;
fig. 2 is a schematic top view of an LED chip according to an embodiment of the present invention;
fig. 3 is a schematic top view of an LED chip according to an embodiment of the present invention;
fig. 4.1 to 4.7 are schematic structural diagrams corresponding to steps of a method for manufacturing an LED chip according to an embodiment of the present invention;
the symbols in the drawings illustrate that: 1. the semiconductor device comprises a substrate, 1.1, a substrate exposed part, 2, a first type semiconductor layer, 3, an active region, 4, a second type semiconductor layer, 5, a passivation layer, 6, a second electrode, 6.1, a middle extension electrode, 6.2, a second type extension electrode, 7, a first electrode, 7.1, a first type extension electrode, 8, a table board, 9 and a groove.
Detailed Description
In order to make the content of the present invention clearer, the content of the present invention is further explained below with reference to the attached drawings. The invention is not limited to this specific embodiment. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As shown in fig. 1, an LED chip includes:
a substrate 1;
the epitaxial lamination is arranged on the surface of the substrate 1 and at least comprises a first type semiconductor layer 2, an active region 3 and a second type semiconductor layer 4 which are sequentially stacked along a first direction, and a partial region of the epitaxial lamination is etched to a part of the first type semiconductor layer 2 to form a groove 9 and a table top 8; the first direction is perpendicular to the substrate 1 and directed from the substrate 1 to the epitaxial stack;
a first electrode 7 laminated on an exposed portion of the groove 9;
a second electrode 6 laminated on the surface of the mesa 8;
the first electrode 7 has a first type extended electrode 7.1 which is connected with the first electrode and extends along the direction of the second electrode 6 in a plan view; the second electrode 6 is provided with a plurality of second type expansion electrodes 6.2 which are connected with the second electrode and extend along the direction of the first electrode 7;
wherein the number of the second type extension electrodes 6.2 is odd; the second type expansion electrode 6.2 is provided with a middle expansion electrode 6.1, and the rest second type expansion electrodes 6.2 are distributed on two sides of the middle expansion electrode 6.1 in pairs by taking the middle expansion electrode 6.1 as a middle shaft;
the number of the first type expansion electrodes 7.1 is even, and the first type expansion electrodes 7.1 are distributed on two sides of the middle expansion electrode 6.1 in pairs by taking the middle expansion electrode 6.1 as a middle shaft; and the first type extension electrode 7.1 and the other second type extension electrodes 6.2 are alternately distributed on both sides of the middle extension electrode 6.1.
It should be noted that the embodiment of the invention does not limit the number of the second type spreading electrodes 6.2 as long as the total number is an odd number, or the number of the first type spreading electrodes 7.1 as long as the total number is an even number; as an example of this embodiment, as shown in fig. 2 and fig. 3, the number of the first type extension electrodes 7.1 is 2, and the number of the second type extension electrodes 6.2 is 3.
It is worth mentioning that the type of the substrate 1 is not limited in the LED chip of the present embodiment, for example, the substrate 1 may be, but is not limited to, a sapphire substrate 1, a silicon substrate 1, or the like. In addition, the types of the first type semiconductor layer 2, the active region 3 and the second type semiconductor layer 4 of the epitaxial stack may also be not limited in the LED chip of the present embodiment, for example, the first type semiconductor layer 2 may be, but is not limited to, an N type gallium nitride layer, and correspondingly, the second type semiconductor layer 4 may be, but is not limited to, a P type gallium nitride layer;
it is worth mentioning that the material of the passivation layer 5 may be, but is not limited to, SiO2 (silicon dioxide).
In addition, the first electrode 7 and the second electrode 6 may be, but are not limited to, gold tin electrodes.
As shown in fig. 2, in the embodiment of the present invention, the second type spreading electrode 6.2 has a middle spreading electrode 6.1, and the remaining second type spreading electrodes 6.2 are disposed on two sides of the middle spreading electrode 6.1 with the middle spreading electrode 6.1 as a symmetry axis.
In the embodiment of the invention, the first type extension electrodes 7.1 are distributed on two sides of the middle extension electrode 6.1 in pairs by taking the middle extension electrode 6.1 as a symmetry axis.
In another embodiment of the present invention, as shown in fig. 3, the distance d between each second type spreading electrode 6.2 and the middle spreading electrode 6.1 is gradually increased in the extending direction from the second electrode 6 to the first electrode 7.
Further, the distance between each second type extension electrode 6.2 and the adjacent first type extension electrode 7.1 is gradually increased.
In the embodiment of the present invention, in the extending direction from the second electrode 6 to the first electrode 7, the thickness of the second type spreading electrode 6.2 is gradually reduced, and the lowest thickness at least exceeds half of the highest thickness.
In the embodiment of the present invention, in the extending direction from the first electrode 7 to the second electrode 6, the thickness of the first type extension electrode 7.1 is gradually reduced, and the lowest thickness at least exceeds half of the highest thickness.
In the embodiment of the present invention, in the extending direction from the second electrode 6 to the first electrode 7, the thicknesses of the middle extension electrode 6.1 and the rest of the second type extension electrodes 6.2 are gradually reduced, and the lowest thickness at least exceeds half of the highest thickness.
In the embodiment of the present invention, a passivation layer 5 is further included, wherein the passivation layer 5 covers the epitaxial stack and has a first through hole and a second through hole, the first through hole corresponds to the first electrode 7, and the second through hole corresponds to the second electrode 6.
In the embodiment of the present invention, the first type semiconductor layer 2 includes an N type semiconductor layer, and the second type semiconductor layer 4 includes a P type semiconductor layer.
In an embodiment of the invention, the epitaxial stack has at least one substrate exposure 1.1 extending from the second type semiconductor layer 4 through the active region 3 and the first type semiconductor layer 2 to the substrate 1, wherein the passivation layer 5 is stacked on the substrate 1 in such a way as to be maintained at the substrate exposure 1.1.
In the embodiment of the invention, the exposed part 1.1 of the substrate surrounds the periphery of the epitaxial lamination; and a passivation layer 5 is laminated on the substrate 1 in such a manner as to be held on the substrate exposed portion 1.1, and surrounds the periphery of the epitaxial stack.
The embodiment of the invention also provides a preparation method of the LED chip, which comprises the following steps:
step S01, as shown in fig. 4.1, providing a substrate 1;
step S02, as shown in fig. 4.2, stacking an epitaxial stack on the surface of the substrate 1, where the epitaxial stack includes a first type semiconductor layer 2, an active region 3, and a second type semiconductor layer 4 stacked in sequence along a first direction, the first direction being perpendicular to the substrate 1 and pointing from the substrate 1 to the epitaxial stack;
step S03, as shown in fig. 4.3, etching a local region of the epitaxial stack to a portion of the first-type semiconductor layer 2 to form a recess 9 and a mesa 8;
step S04, as shown in fig. 4.4, fabricating a first type extended electrode 7.1 in the groove 9, and fabricating a second type extended electrode 6.2 in the mesa 8, wherein the first type extended electrode 7.1 and the second type extended electrode 6.2 extend in opposite directions;
in a top view, as shown in fig. 2, the number of the second type spreading electrodes 6.2 is odd; the second type expansion electrode 6.2 is provided with a middle expansion electrode 6.1, and the other second type expansion electrodes 6.2 are distributed on two sides of the middle expansion electrode 6.1 pairwise by taking the middle expansion electrode 6.1 as a middle shaft;
the number of the first type expansion electrodes 7.1 is even, and the first type expansion electrodes 7.1 are distributed on two sides of the middle expansion electrode 6.1 in pairs by taking the middle expansion electrode 6.1 as a middle shaft; and the first type extended electrode 7.1 and the other second type extended electrodes 6.2 are alternately distributed on two sides of the middle extended electrode 6.1;
step S05, as shown in fig. 4.5, deeply etching the edge of the epitaxial lamination to make it have a substrate bare portion 1.1;
step S06, as shown in fig. 4.6, growing a passivation layer 5, where the passivation layer 5 covers the epitaxial stack in a manner of being stacked on the substrate exposed portion 1.1; patterning the passivation layer 5 to form a first through hole and a second through hole, wherein the exposed part of the first through hole is a first type extended electrode 7.1, and the exposed part of the second through hole is a second type extended electrode 6.2;
step S07, as shown in fig. 4.7, fabricating the first electrode 7 and the second electrode 6; a first electrode 7 laminated on the first through hole; and a second electrode 6 laminated on the second through hole.
In the embodiment of the invention, in the extending direction from the second electrode 6 to the first electrode 7, the distance between each second type expansion electrode 6.2 and the middle expansion electrode 6.1 is gradually increased; the distance between each second type extension electrode 6.2 and the adjacent first type extension electrode 7.1 is gradually increased.
In the embodiment of the invention, in the extending direction from the first electrode 7 to the second electrode 6, the thickness of the first type extended electrode 7.1 is gradually reduced, and the lowest thickness at least exceeds half of the highest thickness;
in the direction of extension of the second electrode 6 to the first electrode 7, the thickness of the middle expansion electrode 6.1 and the remaining second type expansion electrodes 6.2 decreases gradually, and the lowest thickness exceeds at least half of the highest thickness.
In the embodiment of the invention, the exposed part 1.1 of the substrate surrounds the periphery of the epitaxial lamination; and a passivation layer 5 is laminated on the substrate 1 so as to be held on the substrate exposed portion 1.1, and surrounds the periphery of the epitaxial stack.
According to the technical scheme, the LED chip provided by the invention is characterized in that the first electrode 7 is provided with the first type extended electrode 7.1 which is connected with the first electrode and extends along the direction of the second electrode 6; the second electrode 6 is provided with a plurality of second type expansion electrodes 6.2 which are connected with the second electrode and extend along the direction of the first electrode 7; wherein the number of the second type extension electrodes 6.2 is odd; the second type expansion electrode 6.2 is provided with a middle expansion electrode 6.1, and the rest second type expansion electrodes 6.2 are distributed on two sides of the middle expansion electrode 6.1 in pairs by taking the middle expansion electrode 6.1 as a middle shaft; the number of the first type expansion electrodes 7.1 is even, and the first type expansion electrodes 7.1 are distributed on two sides of the middle expansion electrode 6.1 in pairs by taking the middle expansion electrode 6.1 as a middle shaft; and the first type extension electrode 7.1 and the rest of the second type extension electrodes 6.2 are alternately distributed on both sides of the middle extension electrode 6.1. Therefore, when current flows in through the second electrode 6 (namely the P electrode), the current preferentially passes through the middle extension electrode 6.1, and the radiation recombination luminescence of electrons and holes is rapidly realized; meanwhile, the first type extension electrode 7.1 and the second type extension electrode 6.2 are alternately and uniformly arranged on both sides of the middle extension electrode 6.1 of the second electrode 6, so that the tendency of current concentration in the middle extension electrode 6.1 can be alleviated, and the current can be uniformly diffused in the light-emitting table surface 8. Therefore, based on the structure, the current crowding phenomenon caused by large driving current is solved, and the external quantum efficiency of the LED is effectively improved.
Secondly, in the extending direction from the second electrode 6 to the first electrode 7, the distance between each second type extension electrode 6.2 and the middle extension electrode 6.1 is gradually increased, so that the current can be further diffused to the edge of the epitaxial lamination, and the LED chip can emit light more uniformly. Meanwhile, the thickness of the second type extension electrode 6.2 is gradually reduced, and the lowest thickness at least exceeds the thickness of half of the highest thickness, so that the current crowding can be reduced, the current extension can be increased, and the product cost can be reduced.
According to the technical scheme, the preparation method of the LED chip provided by the invention has the beneficial effects that the process is simple and convenient to manufacture and is convenient to produce while the beneficial effects of the LED chip are realized.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
It is further noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that an article or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such article or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in an article or device that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (13)
1. An LED chip, comprising:
a substrate;
the epitaxial lamination is arranged on the surface of the substrate and at least comprises a first type semiconductor layer, an active region and a second type semiconductor layer which are sequentially stacked along a first direction, and a local region of the epitaxial lamination is etched to a part of the first type semiconductor layer to form a groove and a table top; the first direction is perpendicular to the substrate and directed from the substrate to the epitaxial stack;
a first electrode stacked on an exposed portion of the groove;
a second electrode laminated on a surface of the mesa;
the first electrode is provided with a first type extended electrode which is connected with the first electrode and extends along the direction of the second electrode in a top view; the second electrode is provided with a plurality of second type expansion electrodes which are connected with the second electrode and extend along the direction of the first electrode;
wherein the number of the second type extension electrodes is odd; the second type expansion electrodes are provided with a middle expansion electrode, and the rest second type expansion electrodes are distributed on two sides of the middle expansion electrode in pairs by taking the middle expansion electrode as a middle shaft;
the number of the first type expansion electrodes is even, and the first type expansion electrodes are distributed on two sides of the middle expansion electrode in pairs by taking the middle expansion electrode as a middle shaft; and the first type extension electrode and the rest of the second type extension electrodes are alternately distributed on two sides of the middle extension electrode.
2. The LED chip of claim 1, wherein said second type spreading electrode has said middle spreading electrode, and the rest of said second type spreading electrodes are arranged two by two on both sides of the middle spreading electrode with said middle spreading electrode as a symmetry axis.
3. The LED chip of claim 1, wherein said first type of extended electrodes are distributed two by two on both sides of said middle extended electrode with said middle extended electrode as a symmetry axis.
4. The LED chip of claim 1, wherein the spacing between each of said second-type spreading electrodes and said middle spreading electrode is gradually increased in the direction of extension of said second electrode to said first electrode.
5. The LED chip of claim 4, wherein each of said second type spreading electrodes is spaced apart from an adjacent one of said first type spreading electrodes by a gradually increasing distance.
6. The LED chip of claim 1, wherein said second type extension electrode has a thickness that gradually decreases in a direction of extension of said second electrode to said first electrode, and a lowest thickness that exceeds at least half of a highest thickness.
7. The LED chip of claim 1, wherein the thickness of said first type extended electrode is gradually reduced in the extending direction of said first electrode to said second electrode, and the lowest thickness is at least over half of the highest thickness.
8. The LED chip of claim 2, wherein said intermediate expansion electrode and the remaining second-type expansion electrodes have decreasing thicknesses in a direction of extension of said second electrode to said first electrode, and a lowest thickness exceeds at least half of a highest thickness.
9. The LED chip of claim 1, wherein the number of said second type extension electrodes is 3 and the number of said first type extension electrodes is 2.
10. The LED chip of claim 1, further comprising a passivation layer, wherein said passivation layer covers said epitaxial stack and has a first via and a second via, said first via corresponding to said first electrode and said second via corresponding to said second electrode.
11. A preparation method of an LED chip is characterized by comprising the following steps:
step S01, providing a substrate;
step S02, laminating an epitaxial lamination on the surface of the substrate, wherein the epitaxial lamination comprises a first type semiconductor layer, an active region and a second type semiconductor layer which are sequentially stacked along a first direction, and the first direction is perpendicular to the substrate and points to the epitaxial lamination from the substrate;
step S03, etching a local region of the epitaxial stack to a portion of the first type semiconductor layer to form a recess and a mesa;
step S04, manufacturing a first type extension electrode in the groove, manufacturing a second type extension electrode in the table-board, wherein the first type extension electrode and the second type extension electrode extend towards opposite directions respectively;
the number of the second type extension electrodes is odd when viewed from top; the second type expansion electrodes are provided with a middle expansion electrode, and the rest second type expansion electrodes are distributed on two sides of the middle expansion electrode in pairs by taking the middle expansion electrode as a middle shaft;
the number of the first type expansion electrodes is even, and the first type expansion electrodes are distributed on two sides of the middle expansion electrode in pairs by taking the middle expansion electrode as a middle shaft; the first type extension electrodes and the rest of the second type extension electrodes are alternately distributed on two sides of the middle extension electrode;
step S05, deeply etching the edge of the epitaxial lamination layer to enable the edge to have a substrate exposed part;
step S06, growing a passivation layer, wherein the passivation layer coats the epitaxial lamination layer in a mode of laminating on the exposed part of the substrate; patterning the passivation layer to form a first through hole and a second through hole, wherein the first through hole exposes a part of the first type extended electrode, and the second through hole exposes a part of the second type extended electrode;
step S07, manufacturing a first electrode and a second electrode; the first electrode is laminated on the first through hole; the second electrode is laminated on the second through hole.
12. The method of claim 11, wherein the distance between each second-type spreading electrode and the middle spreading electrode is gradually increased in the extending direction from the second electrode to the first electrode; the distance between each second type extension electrode and the adjacent first type extension electrode is gradually increased.
13. The method of claim 11, wherein the thickness of the first type extended electrode is gradually reduced in the extending direction from the first electrode to the second electrode, and the lowest thickness is at least more than half of the highest thickness;
in the extending direction from the second electrode to the first electrode, the thicknesses of the middle extension electrode and the rest of the second type extension electrodes are gradually reduced, and the lowest thickness at least exceeds half of the highest thickness.
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