CN114694615B

CN114694615B - Display panel driving method, driving circuit and display panel

Info

Publication number: CN114694615B
Application number: CN202210450306.1A
Authority: CN
Inventors: 姜童洲; 熊雄; 郑敏栋; 李佑路; 丁雷鸣
Original assignee: BOE Technology Group Co Ltd; Hefei Xinsheng Optoelectronics Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; Hefei Xinsheng Optoelectronics Technology Co Ltd
Priority date: 2022-04-26
Filing date: 2022-04-26
Publication date: 2023-04-07
Anticipated expiration: 2042-04-26
Also published as: CN114694615A

Abstract

The invention discloses a driving method of a display panel, a driving circuit and the display panel, wherein the driving method comprises the following steps: after the display panel is started, controlling the display panel to enter a sleep mode; detecting the noise value generated by the display panel in the sleep mode to represent the characteristics of the transistor; according to the noise value, the grid driving voltage of the transistor is adjusted to improve the characteristic drift of the transistor, so that the effects of reducing power consumption, prolonging the service life of the transistor and reducing the electrostatic discharge probability are achieved.

Description

Display panel driving method, driving circuit and display panel

Technical Field

The invention relates to the technical field of display, in particular to a driving method and a driving circuit of a display panel and the display panel.

Background

The Liquid Crystal Display is a commonly used flat panel Display, and a Thin film transistor Liquid Crystal Display (TFT-LCD) is a mainstream product in the Liquid Crystal Display. The TFT-LCD designed by each company at present adopts the same grid driving voltage no matter the working time in the whole working process.

However, as the turn-on time of a Thin Film Transistor (TFT) increases, if the gate driving voltage is kept high, the gate bias voltage of the TFT increases, so that an offset phenomenon occurs, which degrades the performance of the TFT, and finally causes the TFT-LCD to have reduced operating performance, reduced stability, and shortened lifetime.

Disclosure of Invention

In view of the above problems, the present invention has been made to provide a driving method of a display panel, a driving circuit, and a display panel that overcome or at least partially solve the above problems.

In a first aspect, a driving method of a display panel including a plurality of transistors is provided, the driving method including:

after the display panel is started, controlling the display panel to enter a sleep mode;

detecting a noise value generated by the display panel in a sleep mode;

and adjusting the gate driving voltage of the transistor according to the noise value, wherein the gate driving voltage comprises at least one of a first gate driving voltage for controlling the transistor to be turned on and a second gate driving voltage for controlling the transistor to be turned off.

Optionally, the adjusting the gate driving voltage of the transistor according to the noise value includes:

determining the difference value between the acquired noise value and a standard noise value;

and adjusting the gate drive voltage of the transistor according to the difference.

Optionally, the gate driving voltage of the transistor is positively correlated with the difference.

Optionally, the gate driving voltage is provided by a driving chip;

the adjusting the gate driving voltage of the transistor according to the difference value comprises:

when the difference value is smaller than a set minimum noise threshold value, determining that the first grid driving voltage is the minimum voltage required for driving the transistor to be switched on, and determining that the second grid driving voltage is the minimum voltage required for switching off the transistor;

and when the difference value is larger than a set maximum noise threshold value, determining that the first grid driving voltage is the maximum opening voltage value output by the driving chip, and determining that the second grid driving voltage is the maximum closing voltage value output by the driving chip.

Optionally, the adjusting the gate driving voltage of the transistor according to the difference includes:

when N-N0 is not less than delta N, determining that the first gate driving voltage is VGH1, and the second gate driving voltage is VGL1;

when the delta N is larger than N-N0 and smaller than or equal to 2 delta N, determining that the first grid driving voltage is VGH2, and the second grid driving voltage is VGL2;

when the voltage is more than 2 delta N and less than or equal to N-N0 and less than or equal to 3 delta N, determining that the magnitude of the first gate driving voltage is VGH3, and the magnitude of the second gate driving voltage is VGL3;

when 3 delta N is less than N-N0, determining that the first gate driving voltage is VGH4, and the second gate driving voltage is VGL4;

wherein N represents the detected noise value, N0 represents the standard noise value, N-N0 represents the difference, Δ N represents the set noise threshold, VGH1 < VGH2 < VGH3 < VGH4, VGL1 < VGL2 < VGL3 < VGL4.

Optionally, the standard noise value is an average value of a plurality of test noise values, and the plurality of test noise values are obtained by entering a sleep mode for detection after the display panel is started for a plurality of times.

Optionally, the driving method further includes:

determining a code corresponding to the noise value according to a corresponding relation between a pre-stored noise value and the code;

and adjusting the size of the gate driving voltage according to the corresponding code.

Optionally, the display panel is a touch display panel, and the noise value is obtained by performing a touch screen test.

In a second aspect, there is provided a driving circuit of a display panel including a plurality of transistors, the driving circuit including:

the control module is used for controlling the display panel to enter a sleep mode after the display panel is started;

the noise detection module is used for detecting a noise value generated by the display panel in the sleep mode;

and the adjusting module is used for adjusting the gate driving voltage of the transistor according to the noise value, wherein the gate driving voltage comprises at least one of a first gate driving voltage for controlling the transistor to be turned on and a second gate driving voltage for controlling the transistor to be turned off.

In a third aspect, a display panel is provided, comprising the driving circuit of the second aspect.

The technical scheme provided by the embodiment of the invention at least has the following technical effects or advantages:

according to the driving method and the driving circuit of the display panel and the display panel, provided by the embodiment of the invention, the characteristics of the transistor are represented by detecting the noise value generated by the display panel in the sleep mode, and the degree of characteristic drift of the transistor is judged. And then, according to the detected noise value, adjusting the gate drive voltage of the transistor device to improve the characteristic drift of the transistor, thereby achieving the effects of reducing power consumption, prolonging the service life of the transistor and reducing the electrostatic discharge probability and improving the stability of the display panel.

The above description is only an overview of the technical solutions of the present invention, and the present invention can be implemented in accordance with the content of the description so as to make the technical means of the present invention more clearly understood, and the above and other objects, features, and advantages of the present invention will be more clearly understood.

Drawings

Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:

fig. 1 is a flowchart of a driving method of a display panel according to an embodiment of the present invention;

FIG. 2 is a signal diagram according to an embodiment of the present invention;

FIG. 3 is a schematic diagram of a logic determination according to an embodiment of the present invention;

FIG. 4 is a schematic diagram of a logic determination provided in an embodiment of the present invention;

FIG. 5 is a schematic diagram illustrating voltage improvement before and after adjustment of a gate driving voltage according to an embodiment of the present invention;

fig. 6 is a schematic diagram illustrating power consumption improvement before and after adjustment of a gate driving voltage according to an embodiment of the invention;

fig. 7 is a block diagram of a driving circuit of a display panel according to an embodiment of the present invention.

Detailed Description

Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings.

Various structural schematics according to embodiments of the present disclosure are shown in the figures. The figures are not drawn to scale, wherein certain details are exaggerated and possibly omitted for clarity of presentation. The shapes of the various regions, layers and their relative sizes, positional relationships are shown in the drawings as examples only, and in practice deviations due to manufacturing tolerances or technical limitations are possible, and a person skilled in the art may additionally design regions/layers with different shapes, sizes, relative positions according to the actual needs.

In the context of the present disclosure, when a layer/element is referred to as being "on" another layer/element, it can be directly on the other layer/element or intervening layers/elements may be present. In addition, if a layer/element is "on" another layer/element in one orientation, then that layer/element may be "under" the other layer/element when the orientation is reversed. In the context of the present disclosure, similar or identical components may be referred to by the same or similar reference numerals.

In order to better understand the technical solutions, the technical solutions will be described in detail below with reference to specific embodiments, and it should be understood that the specific features in the examples and examples of the present disclosure are detailed descriptions of the technical solutions of the present application, but not limitations of the technical solutions of the present application, and the technical features in the examples and examples of the present application may be combined with each other without conflict.

Fig. 1 is a flowchart of a driving method of a display panel according to an embodiment of the present invention, and as shown in fig. 1, the gate driving method includes:

and S101, after the display panel is started, controlling the display panel to enter a sleep mode.

In this embodiment, the display panel may be a display panel with a touch function. Such as a TDDI Display panel, i.e., a Touch and Display Driver Integration (Touch and Display Integration) Display panel. The sleep mode is LPWG (Low Power Wake-up Gesture) mode.

Step S102, detecting the noise value generated by the display panel in the sleep mode.

In this embodiment, when the square wave signal passes through the shifted TFT, the square wave signal is distorted, and when the path does not pass through the shifted TFT, the square wave signal is not distorted. When the distorted signal and the undistorted signal meet each other, they will interfere with each other, thereby generating noise.

In this embodiment, when the display panel is in the sleep mode, a touch screen test (TP test) may be performed on the display panel to obtain a noise value. This is a conventional test and the present invention is not described herein. The noise value is detected in the sleep mode, so that the detection is more accurate.

Fig. 2 is a signal diagram according to an embodiment of the present invention, and as shown in fig. 2, the signal diagram exemplarily shows a source signal inside a display panel and a signal of a GOA (Gate Driver on Array) circuit, and in a sleep mode, waveforms of the two signals are the same and do not interfere with each other, so that a detected noise value is more accurate.

Step S103, adjusting the grid driving voltage of the thin film transistor device according to the noise value.

The gate driving voltage includes a first gate driving voltage VGH and a second gate driving voltage VGL for controlling the thin film transistor device to be turned on and off, respectively.

The transistors used in the embodiments of the present disclosure may be thin film transistors or field effect transistors or other devices with the same characteristics. Preferably, the thin film transistor used in the embodiment of the present disclosure may be an oxide semiconductor transistor.

Optionally, step S103 may include:

determining the difference value between the acquired noise value and the standard noise value;

When the product is just produced, the characteristics and the line resistance of the transistor are optimal, and the TFT can be turned on or off only by a low grid driving voltage. As the use time increases, the TFT characteristics and the line resistance deteriorate, and at this time, if the gate driving voltage is always low, an abnormality occurs in the on or off of the TFT, and a display failure occurs. Therefore, we need to adjust the gate driving voltage to be high properly. However, if the gate driving voltage is always high, the gate bias of the TFT increases, so that the TFT characteristics are rapidly shifted, and the TFT performance and the lifespan are deteriorated. And the voltage dropped on the line is also relatively large, which makes the power consumption large.

In order to solve the above technical problem, it is necessary to design a driving method that can automatically adjust the gate driving voltage according to the TFT drift characteristics. To achieve this, we have to find a physical quantity to characterize the TFT characteristics. By performing a touch screen (TP) test on the TDDI product, we find that the LPWG Noise value can characterize the TFT characteristics under normal line conditions. When the TFT characteristics are poor and the panel leakage is large, the LPWGNoise value is also large.

Fig. 3 is a schematic diagram illustrating a characteristic mechanism of an LPWG Noise and a TFT according to an embodiment of the present invention, as shown in fig. 3, ideally, when the display panel enters a sleep mode and square waves are applied, the Sensor ITO is completely consistent with the square waves on the Gate (Gate) line, the source (source) line, and the Pixel, and the TX square wave does not charge the capacitors C1, C2, and C3, so that no Noise is generated. In an actual product, under the influence of the line group and the TFT resistance, square waves on each wire are distorted, especially the GOA TFT and the Pixel TFT have large drain resistance, and the waveform distortion of the Gate wire and the Pixel is severe, so that the TX wire may charge the Gate and the Pixel to generate noise. Among the capacitors, pixel is the largest for Sensor ITO at C3, C = U/Q, which will create a small voltage difference, resulting in a large amount of charge movement, which will be the main source of noise. So we can determine the degree of TFT drift by comparing the difference between the acquired noise value and the standard noise value.

In an implementation manner of this embodiment, the standard noise value is an average value of a plurality of test noise values, and the plurality of test noise values are obtained by entering the sleep mode for detection after the display panel is started for a plurality of times.

For example, the detection of the plurality of test noise values may be performed thousands of times, for example 1000 times. The detection can be carried out by adopting a plurality of display panels with the same model at the same time so as to shorten the detection time.

Optionally, the gate drive voltage of the transistor is positively correlated with the difference. I.e., the larger the difference, the larger the gate drive voltage of the transistor. For example, the gate drive voltage of the transistor is proportional to the difference.

In the present embodiment, the gate driving voltage is provided by the driving chip. Specifically, step S103 may include:

when the difference value is smaller than the set minimum noise threshold value, determining that the first grid driving voltage is the minimum voltage VGH1 required by the turn-on of the driving transistor, and determining that the second grid driving voltage is the minimum voltage VGL1 required by the turn-off of the transistor;

and when the difference value is larger than the set maximum noise threshold value, determining that the first gate driving voltage is the maximum on-voltage value VGH4 output by the driving chip, and determining that the second gate driving voltage is the maximum off-voltage value VGL4 output by the driving chip.

Optionally, the gate driving method further includes:

determining a code corresponding to the noise value according to the corresponding relation between the pre-stored noise value and the code;

In this embodiment, a plurality of codes may be stored in the memory in advance, the codes are used to configure the magnitudes of the first gate driving voltage and the second gate driving voltage, and the magnitudes of the first gate driving voltage and the second gate driving voltage corresponding to the plurality of codes are different. Selecting different codes to burn according to the noise value; and correspondingly adjusting the first grid driving voltage and the second grid driving voltage according to the burnt codes. The memory may be an electrically erasable programmable memory (EEPROM) or may be another form of memory.

In the present embodiment, the voltage adjustment of VGH and VGL is realized by modifying the Code of VGH and VGL. Meanwhile, a logic circuit can be added in the whole machine system, and the relation between the difference value and the noise threshold value can be judged to burn the corresponding Code.

Fig. 4 is a schematic diagram of a logic determination according to an embodiment of the present invention, as shown in fig. 4, the difference is N-N0, where N is the detected noise value and N0 is the standard noise value.

And when the N-N0 is less than or equal to delta N, determining that the magnitude of the first grid driving voltage is VGH1, the magnitude of the second grid driving voltage is VGL1, and recording a code0 when the corresponding code is code 0.

And when the delta N is more than N-N0 and less than or equal to 2 delta N, determining that the first grid driving voltage is VGH2, the second grid driving voltage is VGL2, and recording a code1 when the corresponding code is code 1.

And when the voltage is more than 2 delta N and less than N-N0 and less than or equal to 3 delta N, determining that the first grid driving voltage is VGH3, the second grid driving voltage is VGL3, and recording a code2 when the corresponding code is code 2.

And when the 3 delta N is less than N-N0, determining that the first grid driving voltage is VGH4, the second grid driving voltage is VGL4, and the corresponding code is codeX at the moment, and burning the codeX code.

Wherein, Δ n represents a set noise threshold value, VGH1 < VGH2 < VGH3 < VGH4, VGL1 < VGL2 < VGL3 < VGL4.

In the present embodiment, VGH1 may be 18 to 20v, VGH1 may be 18 to 20V; VGL1 may be 3 to 4V, VGL4 may be 6 to 7V. The Δ n can be set according to actual needs.

Fig. 5 is a schematic diagram of voltage improvement before and after adjustment of a gate driving voltage according to an embodiment of the present invention, as shown in fig. 5, a line I in the diagram represents a voltage curve of an unadjusted gate driving voltage, and a line II in the diagram represents a voltage curve of an adjusted gate driving voltage. the time periods t1-t4 respectively represent the time periods of four successive activations of the display panel. Four codes of code0, code1, code2 and code X are correspondingly selected in the time period from t1 to t 4. In the time period from t1 to t4, as the TFT usage time is longer, the voltage values of the first gate driving voltage VGH and the second gate driving voltage VGL adjusted at each time are also larger and larger.

Fig. 6 is a schematic diagram of power consumption improvement before and after adjusting the gate driving voltage according to an embodiment of the present invention, as shown in fig. 6, a line III represents power consumption generated by a display panel without adjusting the gate driving voltage, and a line IV represents power consumption generated by a display panel with adjusting the gate driving voltage. In the time period from t1 to t4, the power consumption of the display panel after the gate driving voltage is adjusted is gradually increased, and is much smaller than the power consumption generated by the display panel without the gate driving voltage being adjusted.

Based on the same inventive concept, the embodiment of the invention also provides a driving circuit of the display panel, and the driving circuit is suitable for the driving method. Fig. 7 is a block diagram of a driving circuit of a display panel according to an embodiment of the present invention, and as shown in fig. 7, the driving circuit 400 may include:

the control module 401 is configured to control the display panel to enter a sleep mode after the display panel is started;

a noise detection module 402, configured to detect a noise value generated by the display panel in the sleep mode;

the adjusting module 403 is configured to adjust the gate driving voltage of the transistor according to the noise value.

The gate driving voltage comprises at least one of a first gate driving voltage for controlling the transistor to be turned on and a second gate driving voltage for controlling the transistor to be turned off.

Optionally, the adjusting module 403 is configured to:

and adjusting the first gate driving voltage and the second gate driving voltage according to the difference.

The specific implementation details of each module in the driving circuit may be understood by referring to the corresponding related description and effects in the embodiment of the driving method shown in fig. 1, and are not described herein again.

Based on the same inventive concept, the embodiment of the present invention further provides a display panel, including the driving circuit provided by the above embodiment of the present invention. The specific structure of the driving circuit can be referred to the related description of the above embodiments, and the description of the embodiment is omitted here.

according to the driving method, the circuit and the device of the display panel, provided by the embodiment of the invention, the characteristics of the transistor are represented by detecting the noise value generated by the display panel in the sleep mode, and the degree of the characteristic drift of the transistor is judged. And then, according to the detected noise value, adjusting the gate drive voltage of the transistor device to improve the characteristic drift of the transistor, thereby achieving the effects of reducing power consumption, prolonging the service life of the transistor and reducing the electrostatic discharge probability and improving the stability of the display panel.

In the description provided herein, numerous specific details are set forth. However, it is understood that embodiments of the invention may be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.

Similarly, it should be appreciated that in the foregoing description of exemplary embodiments of the invention, various features of the invention are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure and aiding in the understanding of one or more of the various inventive aspects. However, the disclosed method should not be interpreted as reflecting an intention that: that the invention as claimed requires more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single foregoing disclosed embodiment. Thus, the claims following the detailed description are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate embodiment of this invention.

It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention can be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by one and the same item of hardware. The usage of the words first, second and third, etcetera do not indicate any ordering. These words may be interpreted as names.

Claims

1. A driving method of a display panel including a plurality of transistors, the driving method comprising:

detecting a noise value generated by the display panel in a sleep mode;

2. The driving method according to claim 1, wherein the adjusting the gate driving voltage of the transistor according to the noise value comprises:

3. The driving method according to claim 2, wherein a gate driving voltage of the transistor is positively correlated with the difference.

4. The driving method according to claim 3, wherein the gate driving voltage is supplied from a driving chip;

and when the difference value is larger than a set maximum noise threshold value, determining that the first gate driving voltage is the maximum opening voltage value output by the driving chip, and determining that the second gate driving voltage is the maximum closing voltage value output by the driving chip.

5. The driving method according to claim 3, wherein the adjusting the magnitude of the gate driving voltage of the transistor according to the difference comprises:

6. The driving method as claimed in claim 2, wherein the standard noise value is an average value of a plurality of test noise values, and the plurality of test noise values are detected by entering a sleep mode after the display panel is activated for a plurality of times.

7. The driving method according to claim 1, characterized in that the driving method further comprises:

8. The driving method according to claim 1, wherein the display panel is a touch display panel, and the noise value is obtained by performing a touch screen test.

9. A drive circuit of a display panel including a plurality of transistors, the drive circuit comprising:

the noise detection module is used for detecting the noise value generated by the display panel in the sleep mode;

10. A display panel comprising the driver circuit according to claim 9.