CN114694613A - Control panel of display panel and display device - Google Patents
Control panel of display panel and display device Download PDFInfo
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- CN114694613A CN114694613A CN202210337510.2A CN202210337510A CN114694613A CN 114694613 A CN114694613 A CN 114694613A CN 202210337510 A CN202210337510 A CN 202210337510A CN 114694613 A CN114694613 A CN 114694613A
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- 239000000758 substrate Substances 0.000 claims description 27
- 238000010586 diagram Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008094 contradictory effect Effects 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3696—Generation of voltages supplied to electrode drivers
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3685—Details of drivers for data electrodes
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- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The invention discloses a control panel of a display panel and a display device. The control panel of the display panel comprises a plurality of data driving chips and a power management integrated circuit. The plurality of data driving chips are divided into N groups of first data driving chip groups, and the power management integrated circuit comprises N power supply modules. The input ends of the N power supply modules are connected with the power supply input end, and the output ends of the N power supply modules are connected with the N groups of first data driving chip groups one by one and provide analog voltage for the N groups of first data driving chip groups. Because each power module only needs to provide analog voltage for one group of first data driving chip groups, the invention reduces the current pumped by the analog voltage output by each power module, so that the working temperature of the power management integrated circuit does not exceed the required temperature value, thereby being suitable for display panels with large size, high resolution and high refresh rate, and further improving the stability and the service life of the control panel of the display panel.
Description
Technical Field
The invention relates to the technical field of display, in particular to a control panel of a display panel and a display device.
Background
The power management integrated circuit supplies the most current to the analog and digital voltages, which consume several times more power than the digital voltage.
With the rapid development of display technologies, the visual effect requirements of suppliers and consumers on display devices are gradually increased, and display devices with large size, high resolution and high refresh rate are more and more favored by the market, but with the improvement of the specifications of the display devices, the larger the size of the display screen, the higher the resolution, and the higher the refresh rate, the larger the currents of analog voltage and digital voltage are, and when the specifications of products are improved to a critical point, the temperature of a power management chip exceeds the self-bearing limit.
Aiming at the problem of overhigh temperature of a power management chip caused by the improvement of the size and the resolution of a display, the temperature of the power management chip is generally reduced by externally arranging a switching MOS (metal oxide semiconductor) tube in a power circuit or adding a radiating fin, but the method has limited cooling amplitude and is difficult to meet the requirements of the large-size and high-resolution display.
Disclosure of Invention
The invention mainly aims to provide a control panel of a display panel, aiming at reducing the working temperature of the control panel of the display panel with large size and high resolution.
In order to achieve the above object, the present invention provides a control panel of a display panel, where the control panel of the display panel includes a circuit substrate, and a plurality of data driving chips and a power management integrated circuit that are disposed on the circuit substrate, and the power management integrated circuit is configured to provide power for the data driving chips;
the plurality of data driving chips are divided into N groups of first data driving chip groups, and the power management integrated circuit comprises:
the input ends of the N power supply modules are connected with the power supply input end, and the output end of each power supply module is connected with one group of the first data driving chip set and provides analog voltage for the first data driving chip set.
In one embodiment, each of the first data driving chip sets includes 2 to 4 data driving chips.
In one embodiment, the plurality of data driving chips are divided into M groups of second data driving chip groups; n the power module includes:
the input ends of the M power management chips are connected with the power input end, the analog voltage output end of each power management chip is connected with the corresponding first data driving chip set, and the digital voltage output end of each power management chip is connected with the corresponding second data driving chip set; and
(N-M) boost switching power supplies, wherein the input ends of the (N-M) boost switching power supplies are connected with the input end of the power supply, and the output end of each boost switching power supply is connected with the corresponding first data driving chip set;
wherein M is greater than or equal to 1, and M is less than or equal to N.
In an embodiment, the number of the power management chips is 1.
In one embodiment, the number of boost switch power supplies is greater than or equal to 2; when the quantity of the power management chips is 1, the plurality of boosting switch power supplies are arranged on two sides of the power management chips at intervals.
In an embodiment, the number of the boost switch power supplies is greater than or equal to 2, and when the number of the power management chips is multiple, the plurality of boost switch power supplies are arranged at two sides of the plurality of power management chips at intervals.
In one embodiment, N power modules are disposed on the circuit substrate at intervals.
The invention also provides a display device, which comprises a display panel and the control panel of the display panel; the control panel of the display panel is connected with the display panel and controls the display panel to work.
In one embodiment, the display panel is further provided with an array substrate row driving circuit; the power management integrated circuit is further used for outputting digital voltage to the array substrate row driving circuit.
In one embodiment, the circuit substrate of the control board of the display panel includes:
the power management integrated circuit is arranged on the first circuit board;
and each second circuit board is electrically connected with the first circuit board and the display panel and is provided with at least one data driving chip.
According to the invention, the data driving chip is divided into the plurality of first data driving chip groups according to the size and resolution range of the display panel, the power management integrated circuit is set into the plurality of power modules, and each power module is responsible for providing analog voltage for one group of first data driving chip groups, so that the number of the data driving chips loaded by each power module is reduced by N times, the extraction current of the analog voltage output by each power module is greatly reduced, the temperature of each power module during working is reduced, the temperature of the power management integrated circuit during working is reduced, burning is avoided, and the stability and the service life of the control panel of the display panel with the size and the high resolution are improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
FIG. 1 is a circuit diagram of a control board of a display panel according to an embodiment of the present invention;
FIG. 2 is another circuit diagram of a control board of a display panel according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a second display device according to an embodiment of the invention.
The reference numbers illustrate:
| reference numerals | Name (R) | Reference numerals | Name (R) |
| 10 | |
30 | First data |
| 11 | |
31 | |
| 12 | |
40 | |
| 20 | Power management integrated circuit | POWER_IN | |
| 21 | Power management chip | AVDD | |
| 22 | Boost switching power supply | DVDD | Digital voltage |
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In addition, descriptions such as "first", "second", etc. in the present invention are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, technical solutions between the embodiments may be combined with each other, but must be based on the realization of the technical solutions by a person skilled in the art, and when the technical solutions are contradictory to each other or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present invention.
The invention provides a control panel of a display panel. The control board of the display panel can control the operation of the display panel 40. And effectively solves the problem of the over-high operating temperature of the power management integrated circuit 20 caused by the large-size and high-resolution display panel 40.
The first embodiment is as follows:
referring to fig. 1, fig. 1 is a circuit diagram of a control board of a display panel. In one embodiment, the control board of the display panel includes a circuit substrate (including the first circuit board 11 and the second circuit board 12), and a plurality of data driving chips 31 and a power management integrated circuit 20 disposed on the circuit substrate, wherein the power management integrated circuit 20 is configured to provide power, such as a digital voltage DVDD and an analog voltage AVDD, to the plurality of data driving chips 31. In addition, the power management integrated circuit 20 may further provide digital voltages DVDD and analog voltages AVDD to the timing controller and the gamma circuit on the control board, and provide on-voltages and off-voltages of the thin film transistors required by the gate driving circuit (array substrate row driving circuit).
IN this embodiment, the plurality of data driving chips 31 are divided into N groups of first data driving chip groups 30, the POWER management integrated circuit 20 includes N POWER modules (the POWER module may be the POWER management chip 21 shown IN fig. 1 or the boost switching POWER supply 22 shown IN fig. 2), the input terminals of the N POWER modules are all connected to the POWER input terminal POWER _ IN, and the output terminal of each POWER module is connected to one group of the first data driving chip groups 30 and provides the analog voltage AVDD for the first data driving chip group 30. The value of N is greater than or equal to 2, which may be specifically set according to the size and resolution of the display panel 40, and when it is easy to understand, the larger the size of the display panel 40 is, the higher the resolution is, the larger the value of N is. In addition, for convenience of routing, the first data driving chipset 30 may be grouped according to the mounting position of the data driving chip 31, and at least two adjacent data driving chips are grouped into a group.
Taking the value of N as 2 and the number of data driving chips as 4 as an example, every two data driving chips form a first data driving chip group. Then each power module only needs to provide the analog voltage AVDD for two data driving chips at this time. The load on the power supply module can be reduced, and the temperature of the power management integrated circuit 20 can be lowered. The power module may be implemented by using a power management chip 21, or may also use a BOOST switching power supply 22(BOOST chip and its peripheral circuit) with a cost far lower than that of the power management chip 21, so as to avoid cost increase while reducing the problem of over-temperature of the power management integrated circuit 20.
The present invention is provided by the range of resolution according to the size of the display panel 40. The plurality of data driving chips 31 are divided into N first data driving chip groups 30, the power management integrated circuit 20 is set as N power modules, and each power module is responsible for providing analog voltage AVDD for one group of the first data driving chip groups 30, so that the number of the data driving chips loaded by each power module is reduced by N times, and further the load current of the analog voltage AVDD output by each power module is greatly reduced, thereby reducing the temperature of each power module during working, reducing the temperature of the power management integrated circuit 20 during working, avoiding burning, and improving the stability and service life of the control panel of the display panel with high size and high resolution.
With continued reference to fig. 1, in an embodiment, each of the first set of data driving chips 30 includes 2 to 4 data driving chips. That is to say, 2 to 4 data driver chips are loaded to each power module, and practical tests show that the temperature of each power module during operation can be ensured to meet the requirements just by 2 to 4 data driver chips, so that the power modules with the least number can be used, and the problem of overhigh working temperature is solved.
Referring to fig. 2, in an embodiment, the plurality of data driving chips 31 are divided into M groups of second data driving chip sets, that is, the plurality of data driving chips are divided into N groups of first data driving chip sets according to the analog voltage power supply requirement, and the plurality of data driving chip sets are divided into M groups of second data driving chip sets according to the digital voltage power supply requirement. In the circuit shown in fig. 2, M is equal to 1, which is equivalent to all the data driving chips being a second data driving chip set, and a power management chip provides digital voltages for all the data driving chips. .
As shown in fig. 2, the N power modules include M power management chips 21 and (N-M) boost switching power supplies 22. The value of M may be set according to the size and resolution of the display panel 40 and the number of the data driving chips 31, and the larger the size of the display panel 40 is, the higher the resolution is, and the larger the number of the data driving chips 31 is, the larger M is, that is, the larger the number of the power management chips is.
The input ends of the M POWER management chips 21 are all connected to the POWER input end POWER _ IN, the analog voltage output end of each POWER management chip 21 is connected to the corresponding first data driving chipset 30, and the digital voltage output end of each POWER management chip 21 is connected to the corresponding second data driving chipset. (N-M) of the input terminals of the boost switching POWER supplies 22 of the N POWER modules other than the M POWER management chips 21 are connected to the POWER input terminal POWER _ IN, and the output terminal of each boost switching POWER supply 22 is connected to a remaining one of the first data driving chip sets 30 not connected to a POWER management chip; wherein M is greater than or equal to 1, and M is less than or equal to N.
In other words, the M power management chips and the (N-M) boost switching power supply jointly provide analog voltages for all the data driving chips, and at the same time, the M power management chips also provide digital voltages for all the data driving chips.
The price of the power management chip 21 is much higher than that of the boost switching power supply 22, specifically, the price of a single power management chip 21 on the market is about 1 dollar, while the price of a management chip of a single boost switching power supply 22 is about 0.08 dollar, and the cost of the two is different by tens of times. The power management chip 21 may provide a digital voltage DVDD and an analog voltage AVDD, and the boost switching power supply 22 may boost the low-voltage input voltage only and then provide the analog voltage AVDD for the data driving chip.
Of the voltages provided by power management integrated circuit 20, analog voltage AVDD and digital voltage DVDD require the most current, where analog voltage AVDD consumes several times more power than digital voltage DVDD. I.e. the load current of the digital voltage is smaller than the analog voltage.
Therefore, the present embodiment uses fewer power management chips to provide the digital voltage. The combination of the power management chip and the boosting power supply is adopted to provide analog voltage; the temperature of the power management integrated circuit 20 of the control board of the large-sized, high-resolution display panel can be reduced at a very low cost.
Referring to fig. 2, in an embodiment, the number of the power management chips is 1. That is, only one power management chip 21 of the N power modules provides the digital voltage DVDD to all the data driving chips 31.
Practical tests show that the current drawn by the digital voltage DVDD is much smaller than that drawn by the analog voltage AVDD. Therefore, a single power management chip 21 can also supply the digital voltage DVDD required to drive all the data driving chips 31 of the large-sized, high-resolution display panel 40 while ensuring that the operating temperature of the power management integrated circuit 20 is lower than the required temperature.
As already mentioned above, the cost of the boost switching power supply 22 is much less than the power management chip 21. Therefore, in the present embodiment, on the basis of one power management chip 21 in the prior art, the boost switching power supply 22 with extremely low cost is added, so as to achieve the purposes of reducing the current pumped by the analog voltage AVDD output by the power management chip 21 and reducing the operating temperature of the power management chip 21. In other words, the present embodiment solves the problem of excessive temperature of the power management integrated circuit 20 of the control board of the display panel of large size, high resolution and high refresh rate with little increase in cost.
Referring to fig. 2, in one embodiment, the number of boost switching power supplies 22 is greater than or equal to 2; when the number of the power management chips 21 is 1, the plurality of boost switching power supplies 22 are disposed at intervals on both sides of the power management chip 21.
In practical applications, all the data driving chips 31 are disposed on the lower edge of the display panel 40 in a row (when the display panel 40 rotates, the lower edge may become a side edge). The power management chip 21 needs to provide the digital voltage DVDD to the data driving chip 31 of an entire row.
The number of the boost switching power supplies 22 is 2, and the number of the power management chips is 1. In this embodiment, the power management chip 21 may be disposed near the perpendicular bisector of the row of the data driving chip 31, the wiring lengths from the power management chip 21 to the data driving chip 31 may be equalized, and then the two boost switching power supplies 22 are respectively disposed at the left and right sides of the power management chip 21. The three are also arranged in a row and are parallel to the data driving chip 31 arranged in a row, and each boost switching power supply 22 and the power management chip 22 provide the analog voltage AVDD for the corresponding data driving chip. In this way, the analog voltage AVDD traces of each boost switching power supply 22 and the power management chip 22 are not crossed, thereby effectively simplifying the wiring of the control board of the display panel.
Referring to fig. 2, in an embodiment, the number of the boost switching power supplies is greater than or equal to 2, and when the number of the power management chips is multiple, the plurality of boost switching power supplies are disposed at two sides of the plurality of power management chips at intervals.
In this embodiment, the plurality of power management chips 21 may be collectively disposed near the perpendicular bisector of the one-line setting data driving chip 31 and be disposed in one line. And then the plurality of boosting switch power supplies are arranged at two sides of the plurality of power management chips at intervals. In this way, the analog voltage AVDD traces of each boost switching power supply 22 and the power management chip 22 do not cross each other, thereby effectively simplifying the wiring of the control board of the display panel.
Referring to fig. 2, in an embodiment, N power modules are disposed on the circuit substrate at intervals. In this embodiment, the N power modules are arranged on the circuit substrate at intervals, so that the power management integrated circuit 20 has a larger heat dissipation area, the heat dissipation performance of the power management integrated circuit 20 is effectively improved, and the operating temperature of the power management integrated circuit 20 is reduced.
Example two:
referring to fig. 3, the present invention further provides a display device, which includes a display panel 40 and a control board of the display panel; the specific structure of the control board of the display panel refers to the above embodiments, and since the display device adopts all technical solutions of all the above embodiments, at least all the beneficial effects brought by the technical solutions of the above embodiments are achieved, and no further description is given here.
The control panel of the display panel is connected with the display panel 40, and controls the display panel 40 to work. Specifically, the control board of the display panel may output a timing signal, a frame start signal, and a data driving signal to the display panel 40.
Referring to fig. 3, in an embodiment, an array substrate row driving circuit is further disposed on the display panel 40; the power management integrated circuit is further used for outputting digital voltage to the array substrate row driving circuit.
Specifically, the display panel 40 includes an array substrate, a color filter substrate, and a liquid crystal layer disposed between the array substrate and the color filter substrate. The array substrate comprises an effective display area and a non-effective display area, the non-effective display area surrounds the periphery of the effective display area, and an array substrate row driving circuit is arranged on the non-effective display area. The power management chip 21 in the power management integrated circuit provides the array substrate row driving circuit with digital voltage DVDD, the on-voltage and the off-voltage of the thin film transistor, and the like.
Referring to fig. 3, in an embodiment, the circuit substrate of the control board of the display panel includes a first circuit board 11, and the power management integrated circuit 20 is disposed on the first circuit board 11;
and each second circuit board 12 is electrically connected with the first circuit board 11 and the display panel 40, and is provided with at least one data driving chip.
The first circuit board 11 is a Printed Circuit Board (PCB), and a power management integrated circuit 20, a timing controller, a gamma circuit, and the like are laid on the PCB. The second Circuit board 12 is a Flexible Printed Circuit (PFC) board, and the data driving Chip 31 is fixed On the Flexible Circuit board by a COF (Chip On Flex) technology.
The above description is only an alternative embodiment of the present invention, and is not intended to limit the scope of the present invention, and all modifications and equivalents made by the contents of the present specification and the accompanying drawings, or directly/indirectly applied to other related technical fields, which are within the spirit of the present invention, are included in the scope of the present invention.
Claims (10)
1. A control panel of a display panel, the control panel of the display panel comprises a circuit substrate, and a plurality of data driving chips and a power management integrated circuit which are arranged on the circuit substrate, the power management integrated circuit is used for providing power for the data driving chips, and the control panel is characterized in that,
the plurality of data driving chips are divided into N groups of first data driving chip groups, and the power management integrated circuit comprises:
the input ends of the N power supply modules are connected with the power supply input end, and the output end of each power supply module is connected with one group of the first data driving chip set and provides analog voltage for the first data driving chip set.
2. The control board for a display panel according to claim 1, wherein each of the first set of data driving chips comprises 2 to 4 data driving chips.
3. The control board of a display panel according to claim 1,
the plurality of data driving chips are divided into M groups of second data driving chip groups; n the power module includes:
the input ends of the M power management chips are connected with the power input end, the analog voltage output end of each power management chip is connected with the corresponding first data driving chip set, and the digital voltage output end of each power management chip is connected with the corresponding second data driving chip set; and
(N-M) boost switching power supplies, wherein the input ends of the (N-M) boost switching power supplies are connected with the input end of the power supply, and the output end of each boost switching power supply is connected with the corresponding first data driving chip set;
wherein M is greater than or equal to 1, and M is less than or equal to N.
4. The control board of the display panel according to claim 3, wherein the number of the power management chips is 1.
5. The control board of the display panel according to claim 3, wherein the number of the step-up switch power supplies is greater than or equal to 2; when the number of the power management chips is 1, the plurality of the boost switch power supplies are arranged on two sides of the power management chips at intervals.
6. The control board for a display panel according to claim 3, wherein the number of the boost switching power supplies is greater than or equal to 2, and when the number of the power management chips is plural, the plurality of boost switching power supplies are disposed at intervals on both sides of the plurality of power management chips.
7. The control board for a display panel according to claim 1, wherein N power supply modules are provided at intervals on the circuit substrate.
8. A display device characterized by comprising a display panel and a control board of the display panel according to any one of claims 1 to 7;
the control panel of the display panel is connected with the display panel and controls the display panel to work.
9. The control board for a display panel according to claim 8, wherein an array substrate row driving circuit is further provided on the display panel;
the power management integrated circuit is further used for outputting digital voltage to the array substrate row driving circuit.
10. The display device according to claim 8, wherein the circuit substrate of the control board of the display panel includes:
the power management integrated circuit is arranged on the first circuit board;
and each second circuit board is electrically connected with the first circuit board and the display panel, and at least one data driving chip is arranged on each second circuit board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210337510.2A CN114694613B (en) | 2022-03-30 | 2022-03-30 | Control panel of display panel and display device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210337510.2A CN114694613B (en) | 2022-03-30 | 2022-03-30 | Control panel of display panel and display device |
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| CN114694613A true CN114694613A (en) | 2022-07-01 |
| CN114694613B CN114694613B (en) | 2023-03-28 |
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| JP2006189806A (en) * | 2004-12-06 | 2006-07-20 | Semiconductor Energy Lab Co Ltd | Display device and its driving method |
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| US20190385560A1 (en) * | 2017-05-12 | 2019-12-19 | HKC Corporation Limited | Display apparatus and power saving method therefor |
| US20210080775A1 (en) * | 2018-04-17 | 2021-03-18 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Chip temperature control circuit of liquid crystal display panel and liquid crystal display panel |
| WO2022033159A1 (en) * | 2020-08-12 | 2022-02-17 | Oppo广东移动通信有限公司 | Power source apparatus, electronic device, power supply method and apparatus, and computer-readable medium |
-
2022
- 2022-03-30 CN CN202210337510.2A patent/CN114694613B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006189806A (en) * | 2004-12-06 | 2006-07-20 | Semiconductor Energy Lab Co Ltd | Display device and its driving method |
| CN101676782A (en) * | 2008-09-18 | 2010-03-24 | 北京京东方光电科技有限公司 | TFT-LCD drive circuit |
| US20190385560A1 (en) * | 2017-05-12 | 2019-12-19 | HKC Corporation Limited | Display apparatus and power saving method therefor |
| US20210080775A1 (en) * | 2018-04-17 | 2021-03-18 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Chip temperature control circuit of liquid crystal display panel and liquid crystal display panel |
| WO2022033159A1 (en) * | 2020-08-12 | 2022-02-17 | Oppo广东移动通信有限公司 | Power source apparatus, electronic device, power supply method and apparatus, and computer-readable medium |
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| CN114694613B (en) | 2023-03-28 |
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