CN114679401A - Protocol test implementation method and device - Google Patents
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- CN114679401A CN114679401A CN202210237749.2A CN202210237749A CN114679401A CN 114679401 A CN114679401 A CN 114679401A CN 202210237749 A CN202210237749 A CN 202210237749A CN 114679401 A CN114679401 A CN 114679401A
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Abstract
The embodiment of the application discloses a protocol test implementation method and a device, wherein the method comprises the following steps: connecting the PC and the tested equipment with a plurality of pins of a preset first serial communication module respectively; receiving and transmitting relevant data of a first protocol test between the plurality of pins and the tested device; and determining whether the protocol test is successful according to the data receiving and sending result. By the scheme of the embodiment, the test of various protocols is satisfied by multiplexing the existing communication module, and the test cost of different protocols is reduced.
Description
Technical Field
The present invention relates to protocol testing technologies, and in particular, to a method and an apparatus for implementing protocol testing.
Background
The data transmission control and signal analysis test in the field of intelligent control includes various protocol debugs such as spi (Serial Peripheral Interface), ic (Inter-Integrated Circuit Bus), smbus (System Management Bus) and the like, and is suitable for various cpu (central processing unit) peripherals.
In the prior art, debugging tools suitable for each protocol are respectively manufactured according to the principles of the protocols such as spi, ic, smbus and the like. The upper computer operates the level of the pin to be output in each state in the debugging tool according to a specific protocol so as to achieve the effect of the protocol, and devices required by different protocols are different. The device can achieve the expected effect, but the specific protocol corresponds to different devices, and the implementation is troublesome. In addition, different protocols require different test tools to be designed, and upper computer software needs to be designed, which increases the cost. Moreover, because of the participation of the upper computer, the requirements of various test environments cannot be met, and the test method is not flexible.
Disclosure of Invention
The embodiment of the application provides a method and a device for realizing protocol testing, which can meet the testing of various protocols by multiplexing the existing communication module and reduce the testing cost of different protocols.
The embodiment of the application provides a protocol test implementation method, which can be applied to a Personal Computer (PC) side, and the method can comprise the following steps:
connecting the PC and the tested equipment with a plurality of pins of a preset first serial communication module respectively;
receiving and transmitting relevant data of a first protocol test between the plurality of pins and the tested device;
and determining whether the protocol test is successful according to the data receiving and sending result.
In an exemplary embodiment of the present application, the plurality of pins may include: a data terminal ready DTR pin, a data ready DSR pin, and a request to send RTS pin.
In an exemplary embodiment of the present application, the transceiving of the first protocol test related data between the device under test and the plurality of pins may include:
sending the first protocol test related data to the first serial communication module, and sending the first protocol test related data to the device under test through the DTR pin and the DSR pin of the first serial communication module;
And receiving first response information corresponding to the first protocol test related data returned by the tested device through the RTS pin of the first serial communication module.
In an exemplary embodiment of the present application, the first protocol test-related data may include first clock data and first protocol data;
the sending the first protocol test related data to the device under test through the DTR pin and the DSR pin of the first serial communication module may include:
sending the first clock data to the tested device through the DTR pin;
and sending the first protocol data to the tested device through the DTR pin.
In an exemplary embodiment of the present application, the determining whether the protocol test is successful according to the data transceiving result may include:
when the first response information returned by the tested device through the RTS pin of the first serial communication module is received within a first preset time length, determining that protocol testing is successful;
when the first response information returned by the tested device through the RTS pin of the first serial communication module is not received within a first preset time, determining that the protocol test fails, and transmitting and receiving first protocol test related data between the tested device and the plurality of pins again.
In an exemplary embodiment of the present application, the different protocol tests correspond to different first protocol test related data.
In an exemplary embodiment of the present application, the first serial communication module may include: a USB-to-asynchronous transmission standard interface RS232 module.
The embodiment of the application also provides a protocol test implementation device, which may include a first serial communication module, a first processor, and a first computer-readable storage medium, where instructions are stored in the first computer-readable storage medium, and when the instructions are executed by the first processor, the protocol test implementation method applied to the PC side is implemented.
The embodiment of the present application further provides a protocol test implementation method, which may be applied to a device under test side, where the method may include:
respectively connecting the tested device and the personal computer PC with a plurality of pins of a preset second serial communication module;
receiving and transmitting relevant data of a second protocol test between the plurality of pins and the PC;
and determining whether the protocol test is successful according to the data receiving and sending result.
In an exemplary embodiment of the present application, the plurality of pins may include: a data ready DSR pin, a request to send RTS pin and a clear to send CTS pin;
The receiving and sending of the second protocol test related data between the plurality of pins and the PC may include:
sending the second protocol test related data to the second serial communication module, and sending the second protocol test related data to the PC through the RTS pin and the CTS pin of the second serial communication module;
and receiving second response information corresponding to the second protocol test related data returned by the PC through the DSR pin of the second serial communication module.
In an exemplary embodiment of the present application, the second protocol test related data may include: second clock data and second protocol data;
the transmitting the second protocol test related data to the PC through the RTS pin and the CTS pin of the second serial communication module may include:
sending the second clock data to the PC through the RTS pin;
and sending the second protocol data to the PC through the CTS pin.
The embodiment of the present application further provides a protocol test implementation apparatus, which may include a second serial communication module, a second processor, and a second computer-readable storage medium, where instructions are stored in the second computer-readable storage medium, and when the instructions are executed by the second processor, the protocol test implementation method applied to the device under test side is implemented.
Compared with the related art, the embodiment of the application can comprise the following steps: connecting the PC and the tested equipment with a plurality of pins of a preset first serial communication module respectively; receiving and transmitting relevant data of a first protocol test between the plurality of pins and the tested device; and determining whether the protocol test is successful according to the data receiving and sending result. By the scheme of the embodiment, the test of various protocols is satisfied by multiplexing the existing communication module, and the test cost of different protocols is reduced.
Additional features and advantages of the application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the application. Other advantages of the present application may be realized and attained by the instrumentalities and combinations particularly pointed out in the specification and the drawings.
Drawings
The accompanying drawings are included to provide an understanding of the present disclosure and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the examples serve to explain the principles of the disclosure and not to limit the disclosure.
FIG. 1 is a flowchart of a protocol testing implementation method applied to a PC side according to an embodiment of the present application;
FIG. 2 is a schematic diagram of a protocol simulation process applied to a PC side according to an embodiment of the present application;
FIG. 3 is a block diagram of a protocol test implementation apparatus applied to a PC side according to an embodiment of the present application;
FIG. 4 is a flowchart of a protocol testing implementation method applied to a device under test side according to an embodiment of the present application;
fig. 5 is a schematic diagram of a protocol simulation process applied to a device under test according to an embodiment of the present application;
fig. 6 is a block diagram of a protocol test implementation apparatus applied to a device under test according to an embodiment of the present application.
Detailed Description
The present application describes embodiments, but the description is illustrative rather than limiting and it will be apparent to those of ordinary skill in the art that many more embodiments and implementations are possible within the scope of the embodiments described herein. Although many possible combinations of features are shown in the drawings and discussed in the detailed description, many other combinations of the disclosed features are possible. Any feature or element of any embodiment may be used in combination with or instead of any other feature or element in any other embodiment, unless expressly limited otherwise.
The present application includes and contemplates combinations of features and elements known to those of ordinary skill in the art. The embodiments, features and elements disclosed herein may also be combined with any conventional features or elements to form unique inventive aspects as defined by the claims. Any feature or element of any embodiment may also be combined with features or elements from other inventive aspects to form yet another unique inventive aspect, as defined by the claims. Thus, it should be understood that any of the features shown and/or discussed in this application may be implemented individually or in any suitable combination. Accordingly, the embodiments are not limited except as by the appended claims and their equivalents. Furthermore, various modifications and changes may be made within the scope of the appended claims.
Further, in describing representative embodiments, the specification may have presented the method and/or process as a particular sequence of steps. However, to the extent that the method or process does not rely on the particular order of steps set forth herein, the method or process should not be limited to the particular sequence of steps described. Other orders of steps are possible as will be understood by those of ordinary skill in the art. Therefore, the particular order of the steps set forth in the specification should not be construed as limitations on the claims. Further, the claims directed to the method and/or process should not be limited to the performance of their steps in the order written, and one skilled in the art can readily appreciate that the sequences may be varied and still remain within the spirit and scope of the embodiments of the present application.
The embodiment of the present application provides a protocol test implementation method, which may be applied to a PC side of a personal computer, as shown in fig. 1, the method may include steps S101 to S103:
s101, respectively connecting the PC and the tested equipment with a plurality of pins of a preset first serial communication module;
s102, receiving and sending first protocol test related data between the plurality of pins and the tested device;
s103, determining whether the protocol test is successful according to the data receiving and sending result.
In an exemplary embodiment of the present application, the first serial communication module may include: a USB-to-asynchronous transmission standard interface RS232 module.
In an exemplary embodiment of the present application, a schematic diagram of the PC and the device under test being connected to the first serial communication module, respectively, may be as shown in fig. 2.
In an exemplary embodiment of the present application, fig. 2 is a diagram of a whole protocol simulation process, where the data of a first test protocol can be received and transmitted by using 3 pins of a USB to RS232 module (which may be referred to as a USB module for short), which is simple to implement, and can be used in matching with multiple protocols, without limiting frequency, reducing cost, and increasing flexibility; in addition, the function of the USB module is not damaged, and the function reuse of the article is increased.
In the exemplary embodiment of the present application, a detailed method for implementing protocol testing by sending first test protocol data through a PC is described below.
In an exemplary embodiment of the present application, the plurality of pins may include: a data terminal ready DTR pin, a data ready DSR pin, and a request to send RTS pin.
In the exemplary embodiment of the application, the scheme of the embodiment of the application is a peripheral testing method, the operation is flexible, only a plurality of functional pins need to be multiplexed on a USB module, the establishment is simple, a schematic diagram does not need to be changed, and only a sample to be tested needs to be subjected to the test.
In the exemplary embodiment of the present application, it is critical to select a plurality of functional pins of the USB module, to distinguish the inherent input/output directions of the pins, and to have an output or input voltage after the USB module is powered on.
In an exemplary embodiment of the present application, the transceiving of the first protocol test related data between the device under test and the plurality of pins may include:
sending the first protocol test related data to the first serial communication module, and sending the first protocol test related data to the device under test through the DTR pin and the DSR pin of the first serial communication module;
And receiving first response information corresponding to the first protocol test related data returned by the tested device through the RTS pin of the first serial communication module.
In an exemplary embodiment of the present application, the first protocol test-related data may include first clock data and first protocol data;
the transmitting the first protocol test related data to the device under test through the DTR pin and the DSR pin of the first serial communication module may include:
sending the first clock data to the tested device through the DTR pin;
and sending the first protocol data to the tested device through the DTR pin.
In the exemplary embodiment of the present application, if the upper computer (PC) transmits the first protocol test related Data To the device under test, the upper computer may first Send the first clock Data and the first protocol Data To the USB module, after the USB module receives the first protocol test related Data, the USB module transmits the corresponding Data To the device under test through DTR (Data Terminal Ready) and DSR (Data set Ready), and the device under test sends the first response information ACK1 through RTS (Request To Send Request) according To the corresponding protocol.
In an exemplary embodiment of the application, the different protocol tests correspond to different first protocol test related data.
In the exemplary embodiment of the present application, after the device under test receives the first protocol test-related data, the corresponding test protocol may be determined, and the first acknowledgement information ACK1 corresponding to the test protocol may be returned.
In the exemplary embodiment of the present application, the protocol that may be tested by the embodiments of the present application may include, but is not limited to, SPI, ic, smbus, and the like.
In an exemplary embodiment of the present application, the determining whether the protocol test is successful according to the data transceiving result may include:
when the first response information returned by the tested device through the RTS pin of the first serial communication module is received within a first preset time length, determining that protocol testing is successful;
when the first response information returned by the tested device through the RTS pin of the first serial communication module is not received within a first preset time, determining that the protocol test fails, and transmitting and receiving first protocol test related data between the tested device and the plurality of pins again.
The embodiment of the present application further provides a protocol test implementation apparatus 1, as shown in fig. 3, which may include a first serial communication module 11, a first processor 12, and a first computer-readable storage medium 13, where the first computer-readable storage medium 13 stores instructions, and when the instructions are executed by the first processor 12, the protocol test implementation method applied to the PC side is implemented.
In the exemplary embodiment of the present application, any embodiment of the foregoing protocol test implementation method applied to the PC side is applicable to the embodiment of the protocol test implementation apparatus 1, and details are not repeated here.
The embodiment of the present application further provides a protocol test implementation method, as shown in fig. 4, which may be applied to a device under test side, where the method may include steps S201 to S203:
s201, connecting the tested device and the personal computer PC with a plurality of pins of a preset second serial communication module respectively;
s202, transmitting and receiving related data of a second protocol test between the plurality of pins and the PC;
s203, determining whether the protocol test is successful according to the data transceiving result.
In an exemplary embodiment of the present application, the second serial communication module may include: a USB-to-asynchronous transmission standard interface RS232 module.
In an exemplary embodiment of the present application, a schematic diagram of the PC and the device under test respectively connected to the second serial communication module may be as shown in fig. 5.
In an exemplary embodiment of the present application, fig. 5 shows a whole protocol simulation process, and 3 pins of a USB to RS232 module (USB module for short) are used to transmit and receive data of a second test protocol, which is simple to implement, and can be used in matching with multiple protocols, without limiting frequency, reducing cost, and increasing flexibility; in addition, the function of the USB module is not damaged, and the function reuse of the article is increased.
In the exemplary embodiment of the present application, a detailed method for implementing protocol testing by sending second test protocol data through a device under test is described below.
In an exemplary embodiment of the present application, the plurality of pins may include: a data ready DSR pin, a request to send RTS pin and a clear to send CTS pin;
the receiving and sending of the second protocol test related data between the plurality of pins and the PC may include:
sending the second protocol test related data to the second serial communication module, and sending the second protocol test related data to the PC through the RTS pin and the CTS pin of the second serial communication module;
and receiving second response information corresponding to the second protocol test related data returned by the PC through the DSR pin of the second serial communication module.
In an exemplary embodiment of the present application, the second protocol test related data may include: second clock data and second protocol data;
the transmitting the second protocol test related data to the PC through the RTS pin and the CTS pin of the second serial communication module may include:
Sending the second clock data to the PC through the RTS pin;
and sending the second protocol data to the PC through the CTS pin.
In the exemplary embodiment of the present application, if the device under test transmits the second protocol test related data To the PC, the device under test may first Send the second clock data and the second protocol data To the USB module, after receiving the second protocol test related data, the USB module transmits the corresponding data To the PC through RTS (Request To Send) and CTS (Clear To Send Clear), and the PC sends the second response information ACK2 through DSR according To the corresponding protocol.
In an exemplary embodiment of the present application, the different protocol tests correspond to different second protocol test related data.
In the exemplary embodiment of the present application, after receiving the second protocol test related data, the PC may determine the corresponding test protocol and return the second acknowledgement information ACK2 corresponding to the test protocol.
In the exemplary embodiment of the present application, the protocol that can be tested by the embodiments of the present application may include, but is not limited to, SPI, ic, smbus, and the like.
In an exemplary embodiment of the present application, the determining whether the protocol test is successful according to the data transceiving result may include:
When the second response information returned by the PC through the DSR pin of the second serial communication module is received within a second preset time, determining that the protocol test is successful;
and when the second response information returned by the PC through the DSR pin of the second serial communication module is not received within a second preset time, determining that the protocol test fails, and transmitting and receiving related data of the second protocol test between the PC and the PC through the plurality of pins again.
In exemplary embodiments of the present application, at least the following advantages are included:
1. the USB module is multiplexed, and the structure and the function of the USB module are not damaged.
2. The test device is not influenced by the model of the protocol, and a tool does not need to be customized according to the protocol, so that the cost is reduced.
3. The frequency of the test protocol is not solidified, and the test protocol can adapt to various environments.
4. The manufacturing is simple and the realization is easy.
The embodiment of the present application further provides a protocol test implementation apparatus 2, as shown in fig. 6, which may include a second serial communication module 21, a second processor 22, and a second computer-readable storage medium 23, where the second computer-readable storage medium 23 stores instructions, and when the instructions are executed by the second processor 22, the protocol test implementation method applied to the device under test side is implemented.
In the exemplary embodiment of the present application, any embodiment of the foregoing protocol test implementation method applied to the device under test side is applicable to the embodiment of the protocol test implementation apparatus 2, and details are not repeated here.
It will be understood by those of ordinary skill in the art that all or some of the steps of the methods, systems, functional modules/units in the devices disclosed above may be implemented as software, firmware, hardware, or suitable combinations thereof. In a hardware implementation, the division between functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be performed by several physical components in cooperation. Some or all of the components may be implemented as software executed by a processor, such as a digital signal processor or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as is well known to those of ordinary skill in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, Digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can accessed by a computer. In addition, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media as known to those skilled in the art.
Claims (12)
1. A protocol test implementation method is applied to a PC side of a personal computer, and comprises the following steps:
connecting the PC and the tested equipment with a plurality of pins of a preset first serial communication module respectively;
receiving and transmitting relevant data of a first protocol test between the plurality of pins and the tested device;
and determining whether the protocol test is successful according to the data receiving and sending result.
2. The protocol test implementation method of claim 1, wherein the plurality of pins comprise: a data terminal ready DTR pin, a data ready DSR pin, and a request to send RTS pin.
3. The method according to claim 2, wherein the transceiving the first protocol test related data with the device under test through the plurality of pins comprises:
sending the first protocol test related data to the first serial communication module, and sending the first protocol test related data to the device under test through the DTR pin and the DSR pin of the first serial communication module;
and receiving first response information corresponding to the first protocol test related data returned by the tested device through the RTS pin of the first serial communication module.
4. The method of claim 3, wherein the first protocol test related data comprises first clock data and first protocol data;
the sending the first protocol test related data to the device under test through the DTR pin and the DSR pin of the first serial communication module comprises:
sending the first clock data to the tested device through the DTR pin;
and sending the first protocol data to the tested device through the DTR pin.
5. The method according to claim 3, wherein the determining whether the protocol test is successful according to the data transceiving result comprises:
when the first response information returned by the tested device through the RTS pin of the first serial communication module is received within a first preset time, determining that the protocol test is successful;
when the first response information returned by the tested device through the RTS pin of the first serial communication module is not received within a first preset time, determining that the protocol test fails, and transmitting and receiving the relevant data of the first protocol test between the tested device and the plurality of pins again.
6. The method according to any one of claims 1 to 5, wherein different protocol tests correspond to different first protocol test related data.
7. The protocol test implementation method according to any one of claims 1 to 5, wherein the first serial communication module comprises: a USB-to-asynchronous transmission standard interface RS232 module.
8. A protocol test implementation apparatus comprising a first serial communication module, a first processor, and a first computer-readable storage medium, wherein the first computer-readable storage medium has instructions stored therein, and when the instructions are executed by the first processor, the protocol test implementation method according to any one of claims 1 to 7 is implemented.
9. A protocol test implementation method is applied to a device under test side, and comprises the following steps:
respectively connecting the tested equipment and the Personal Computer (PC) with a plurality of pins of a preset second serial communication module;
receiving and transmitting relevant data of a second protocol test between the plurality of pins and the PC;
and determining whether the protocol test is successful according to the data receiving and sending result.
10. The protocol test implementation method of claim 9, wherein the plurality of pins comprise: a data ready DSR pin, a Request To Send (RTS) pin, and a Clear To Send (CTS) pin;
the receiving and sending of the second protocol test related data between the plurality of pins and the PC comprises:
sending the second protocol test related data to the second serial communication module, and sending the second protocol test related data to the PC through the RTS pin and the CTS pin of the second serial communication module;
and receiving second response information corresponding to the second protocol test related data returned by the PC through the DSR pin of the second serial communication module.
11. The method according to claim 10, wherein the second protocol test related data comprises: second clock data and second protocol data;
the transmitting the second protocol test related data to the PC through the RTS pin and the CTS pin of the second serial communication module includes:
sending the second clock data to the PC through the RTS pin;
and sending the second protocol data to the PC through the CTS pin.
12. A protocol test implementation apparatus comprising a second serial communication module, a second processor, and a second computer-readable storage medium, wherein the second computer-readable storage medium stores instructions that, when executed by the second processor, implement the protocol test implementation method according to any one of claims 9 to 11.
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| CN202210237749.2A CN114679401A (en) | 2022-03-11 | 2022-03-11 | Protocol test implementation method and device |
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| CN202210237749.2A CN114679401A (en) | 2022-03-11 | 2022-03-11 | Protocol test implementation method and device |
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| CN202210237749.2A Pending CN114679401A (en) | 2022-03-11 | 2022-03-11 | Protocol test implementation method and device |
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