CN113177014B - Serial port communication method and serial port chip based on inspection mode - Google Patents

Serial port communication method and serial port chip based on inspection mode Download PDF

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Publication number
CN113177014B
CN113177014B CN202110565736.3A CN202110565736A CN113177014B CN 113177014 B CN113177014 B CN 113177014B CN 202110565736 A CN202110565736 A CN 202110565736A CN 113177014 B CN113177014 B CN 113177014B
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verification
target data
serial port
protocol
mode
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CN113177014A (en
Inventor
马群
张�浩
王洋
李睿
郭喜斌
李世涛
曹会平
王勇江
司建龙
吴彦
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Shijiazhuang Tonghe Electronics Co Ltd
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Shijiazhuang Tonghe Electronics Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0002Serial port, e.g. RS232C
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Communication Control (AREA)

Abstract

The application is applicable to the technical field of data communication, and provides a serial port communication method and a serial port chip based on a test mode, wherein the serial port communication method based on the test mode comprises the following steps: receiving target data; according to a preset verification mode array, verifying target data; the preset verification mode array comprises a plurality of verification modes, wherein each verification mode uniquely corresponds to a protocol object which is constructed in advance based on an object-oriented principle; and under the condition that the target data passes the verification, sending the target data to a protocol object corresponding to a verification mode adopted when the target data passes the verification. The application can adapt to multiple protocols without modifying internal programs by technicians.

Description

Serial port communication method and serial port chip based on inspection mode
Technical Field
The application belongs to the technical field of data communication, and particularly relates to a serial port communication method and a serial port chip based on a test mode.
Background
With the rapid development of computer technology, more and more electronic devices use serial chips for communication, for example, power modules in electric vehicles and charging piles thereof can use the serial chips for module control and monitoring.
Currently, a serial chip is only suitable for one protocol. In order to meet the requirements of different protocols, the adaptation protocol of the serial port chip can be changed by modifying the internal program of the serial port chip. However, by modifying the internal program of the serial port chip to change the adaptation protocol of the serial port chip, the operation is complicated.
Disclosure of Invention
In view of the above, the embodiment of the application provides a serial port communication method and a serial port chip based on a test mode, so as to solve the problem of complicated operation in the prior art caused by changing an adaptation protocol of the serial port chip.
A first aspect of an embodiment of the present application provides a serial port communication method based on an inspection mode, including:
receiving target data;
according to a preset verification mode array, verifying target data; the preset verification mode array comprises a plurality of verification modes, wherein each verification mode uniquely corresponds to a protocol object which is constructed in advance based on an object-oriented principle;
and under the condition that the target data passes the verification, sending the target data to a protocol object corresponding to a verification mode adopted when the target data passes the verification.
Optionally, verifying the target data according to a preset verification mode array includes:
sequentially checking the target data by adopting a checking mode in a preset checking mode array;
and when the verification is passed, recording the verification mode adopted at the present time, and stopping the verification.
Optionally, the serial port communication method based on the verification mode is applied to a serial port chip, and the serial port chip comprises at least one serial port, a bottom layer configuration module and a protocol verification module;
receiving target data, comprising:
the bottom layer configuration module acquires target data of a target serial port;
the bottom layer configuration module determines a target bottom layer object corresponding to the target serial port in the plurality of bottom layer objects so that the target bottom layer object sends target data to the protocol verification module; the method comprises the steps that a bottom object is constructed and obtained in advance based on an object-oriented principle, each bottom object uniquely corresponds to one serial port, and serial ports corresponding to each bottom object are different;
the protocol verification module receives target data;
according to a preset verification mode array, verifying the target data comprises the following steps:
and the protocol verification module verifies the target data according to the preset verification mode array.
Optionally, the serial port chip further comprises a protocol analysis module;
correspondingly, sending the target data to the protocol object corresponding to the verification mode adopted when the verification passes, including:
the protocol verification module sends the target data and verification information to the protocol analysis module; the verification information carries a protocol object corresponding to a verification mode adopted when verification passes;
and the protocol analysis module sends the target data to a protocol object corresponding to a verification mode adopted when verification passes.
Optionally, the serial port communication method based on the verification mode further comprises the following steps:
receiving a verification mode registration request for a target verification mode; the verification mode registration request carries a target verification mode and a protocol object corresponding to the target verification mode;
and adding the target verification mode to a preset verification mode array.
A second aspect of the embodiment of the present application provides a serial port chip, configured to:
receiving target data;
according to a preset verification mode array, verifying target data; the preset verification mode array comprises a plurality of verification modes, wherein each verification mode uniquely corresponds to a protocol object which is constructed in advance based on an object-oriented principle;
and under the condition that the target data passes the verification, sending the target data to a protocol object corresponding to a verification mode adopted when the target data passes the verification.
Optionally, the serial port chip is further used for
Sequentially checking the target data by adopting a checking mode in a preset checking mode array;
and when the verification is passed, recording the verification mode adopted at the present time, and stopping the verification.
Optionally, the serial port chip includes at least one serial port, a bottom layer configuration module and a protocol verification module, wherein:
the bottom layer configuration module is used for:
acquiring target data of a target serial port, and determining a target bottom layer object corresponding to the target serial port in a plurality of bottom layer objects so that the target bottom layer object sends the target data to a protocol verification module; the method comprises the steps that a bottom object is constructed and obtained in advance based on an object-oriented principle, each bottom object uniquely corresponds to one serial port, and serial ports corresponding to each bottom object are different;
the protocol verification module is used for:
receiving target data;
the protocol verification module is further configured to:
and verifying the target data according to the preset verification mode array.
Optionally, the serial port chip further comprises a protocol analysis module;
the protocol verification module is further configured to:
transmitting the target data and the verification information to a protocol analysis module; the verification information carries a protocol object corresponding to a verification mode adopted when verification passes;
the protocol analysis module is used for:
and sending the target data to a protocol object corresponding to the verification mode adopted when the verification passes.
Optionally, the serial port chip further includes a construction module, configured to:
receiving a verification mode registration request for a target verification mode; the verification mode registration request carries a target verification mode and a protocol object corresponding to the target verification mode;
and adding the target verification mode to a preset verification mode array.
A third aspect of an embodiment of the present application provides a serial port chip, including a memory, a processor, and a computer program stored in the memory and executable on the processor, the processor implementing the steps of the method according to the first aspect when executing the computer program.
Compared with the prior art, the embodiment of the application has the beneficial effects that:
in the embodiment of the application, after receiving the target data, the target data can be checked according to a preset check mode array; the preset check mode array comprises a plurality of check modes, and each check mode uniquely corresponds to one protocol object which is constructed in advance based on an object-oriented principle. And under the condition that the target data passes the verification, sending the target data to a protocol object corresponding to a verification mode adopted when the verification passes. Therefore, the serial port chip can be internally provided with a plurality of protocols, can decouple the protocols, can automatically find the protocol corresponding to the data based on the verification mode in the preset verification mode array, can adapt to the plurality of protocols without modifying an internal program by a technician, and is convenient to operate.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of steps of a serial communication method based on an inspection mode according to an embodiment of the present application;
fig. 2 is a schematic diagram of a serial port chip according to an embodiment of the present application;
FIG. 3 is a schematic diagram of a signal flow according to an embodiment of the present application;
FIG. 4 is a schematic diagram of a protocol verification process according to an embodiment of the present application;
FIG. 5 is a schematic diagram of another serial communication architecture according to an embodiment of the present application;
fig. 6 is a schematic diagram of a serial port chip according to an embodiment of the present application;
fig. 7 is a schematic diagram of a serial port chip according to an embodiment of the present application.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth such as the particular system architecture, techniques, etc., in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.
In order to illustrate the technical scheme of the application, the following description is made by specific examples.
As described in the background art, at present, a serial port chip can only be suitable for one protocol, and although the internal program of the serial port chip can be modified to change the adapting protocol of the serial port chip, the mode needs to rely on technicians, so that the time is long, errors are easy to occur, and the problem of complex operation exists.
In order to solve the problems in the prior art, the embodiment of the application provides a serial port communication method and a serial port chip based on a test mode. The serial communication method based on the test mode provided by the embodiment of the application is first described below.
The execution main body of the serial communication method based on the verification mode can be a serial chip, such as a digital signal processing (Digital Signal Processing, DSP) chip, a field programmable gate array (Field Programmable Gate Array, FPGA) chip and the like, and the serial chip can be externally connected with hardware, such as a charging module of an electric automobile, a power module of a charging pile, a monitoring device and the like. In addition, the serial port chip can be a multi-serial port chip or a single serial port chip.
As shown in fig. 1, the serial port communication method based on the inspection mode provided by the embodiment of the application may include the following steps:
step S110, receiving target data;
in some embodiments, the target data may be any data received by the serial chip.
And step S120, checking the target data according to a preset checking mode array.
The preset verification mode array comprises a plurality of verification modes, wherein each verification mode uniquely corresponds to a protocol object which is constructed in advance based on an object-oriented principle;
in some embodiments, the verification manner may be a manner of verifying the data based on a value of a specific location in the data, such as a function code, a data length, etc., for example, whether the function code and the data length in the data frame are the same as the preset values. It should be noted that when the function code and the data length are different, that is, the verification sequence of the objects to be verified is different, the verification modes are also different.
In some embodiments, a preset check mode array and a preset protocol array may be preconfigured, and elements in the preset check mode array and the preset protocol array may be associated, where the preset protocol array may record protocol objects associated with each check mode. Then, the target data can be checked by sequentially adopting a check mode in a preset check mode array; and when the verification is passed, recording the verification mode adopted at the present time, and stopping the verification.
Optionally, the serial port chip may increase the verification mode in the preset verification mode array based on the input verification mode registration request, so as to expand the protocol application range of the serial port chip, and the corresponding processing may be as follows: receiving a verification mode registration request for a target verification mode; and adding the target verification mode to a preset verification mode array.
The verification mode registration request carries a target verification mode and a protocol object corresponding to the target verification mode;
in some embodiments, the serial port chip may further modify or delete the verification mode in the preset verification mode array based on the input verification mode modification request, so as to update the protocol application range of the serial port chip.
Step S130, when the target data passes the verification, the target data is sent to a protocol object corresponding to the verification mode adopted when the verification passes.
In some embodiments, when the target data passes the verification, it indicates that the protocol object corresponding to the target data is already built in the internal program of the serial port chip in advance, so that the target data can be sent to the protocol object corresponding to the target frame header to call the protocol object corresponding to the target data to process the target data, thereby realizing the communication between the serial port chip and the external device.
Optionally, the embodiment of the application provides a serial port chip for realizing a serial port communication method based on a verification mode, wherein the serial port chip comprises at least one serial port, a bottom layer configuration module and a protocol verification module;
specifically, after the bottom layer configuration module acquires the target data of the target serial port, a target bottom layer object corresponding to the target serial port can be determined in a plurality of bottom layer objects, so that the target bottom layer object sends the target data to the protocol verification module; the method comprises the steps that a bottom object is constructed and obtained in advance based on an object-oriented principle, each bottom object uniquely corresponds to one serial port, and serial ports corresponding to each bottom object are different; and the protocol verification module receives the target data and verifies the target data according to a preset verification mode array.
Optionally, the serial port chip capable of implementing the serial port communication method based on the verification mode may further include a protocol analysis module. Correspondingly, the protocol analysis module sends the target data and the verification information to the protocol analysis module; the protocol analysis module can send the target data to the protocol object corresponding to the verification mode adopted when the verification passes according to the protocol object corresponding to the verification mode adopted when the verification passes, which is carried in the verification information.
In order to better understand the serial communication method based on the frame header provided by the embodiment of the application, the following description is made.
For a single serial port chip, considering that the single serial port chip can only be suitable for a single baud rate at each time, namely, the baud rate is fixed during each communication, however, different protocols can exist under the fixed baud rate, and for the situation, the serial port communication method based on the verification mode provided by the embodiment of the application can be utilized for distinguishing. For a multi-serial port chip, any serial port number can be regarded as a single serial port chip.
As shown in fig. 2 and fig. 3, an architecture diagram and a signal flow diagram of a serial port chip are shown respectively, based on the architecture, protocols requiring different verification modes for different manufacturers can be used for solving the protocol layer coupling problem of different chips by using a protocol verification module no matter aiming at a single serial port chip or a multi-serial port chip, so as to realize decoupling of protocol layers.
Specifically, for the data receiving process, the signal of the bottom layer configuration module may carry information such as a serial number, a data length, a buffer area first address, etc. and be connected with the slot of the protocol allocation module, and the protocol verification module performs protocol allocation on the received data according to different verification modes, and allocates the received data to a protocol object corresponding to the protocol layer. And for the data transmission process, the signals of the protocol layer are connected with the grooves of the bottom layer configuration module, and the data to be transmitted are directly transmitted to the bottom layer configuration module for transmission.
It should be noted that, in order to improve the efficiency of protocol verification, the frame header may be utilized to group the verification modes in the preset verification mode array in advance, that is, one frame header may correspond to one or more verification modes that are adapted. After receiving the target data, the corresponding verification mode group can be determined according to the frame header of the target data, and then the target data is verified in sequence by utilizing the verification modes included in the verification mode group, so that the verification process of the verification mode which obviously does not accord with the specific frame header can be reduced, and the efficiency of protocol verification is improved.
As shown in fig. 4, a protocol verification process is shown, which is specifically as follows:
1. and searching the registered frame header by using a dichotomy, namely reading data in a buffer area, comparing the data with the frame header positioned in the middle of the preset frame header group, and searching downwards from the position if the data is larger than the frame header value, otherwise, searching upwards.
2. When the frame head consistent with the data in the reading buffer area is found, the data is checked by calling the check mode in the check mode grouping corresponding to the frame head, and when the check is passed, the data is sent to the protocol object corresponding to the check mode adopted when the check is passed.
In addition, whether the verification passes or fails, the final read index value needs to be recorded so as to continuously judge the data in the receiving buffer area from the position of the read index value next time. In the whole verification process, all data in the receiving buffer area need to be traversed and verified.
As shown in fig. 5, a serial communication architecture employing the frame header feature is shown. For the protocol layer, the protocol checking process and the subsequent data processing process are required to be separated, and different protocols are established according to different checking modes to perform decoupling. The protocol layer protocol verification process may be as follows:
1. if the verification is correct, the final reading index value is returned, and if the verification is wrong, 0 is returned.
2. And (3) temporarily placing all valid data except invalid data such as frame heads so as to perform data processing.
It should be noted that, a multi-serial communication architecture can be designed based on an object-oriented method, such as c++, and the architecture has the following functions:
and the function 1 uses a protocol verification module, and the module is positioned in front of the protocol analysis module and distributes data according to different verification modes and transmits the data to the protocol analysis module.
And 2, a protocol analysis module specifically analyzes protocol content, creates different protocols according to different verification modes, realizes one-to-one correspondence of frame heads and protocols, and solves the problem of strong coupling of protocol layers.
The function 3 and the signal slot mechanism are applied to a serial port communication architecture, and all modules are mutually decoupled and do not interfere with each other.
Therefore, the problem of protocol coupling of the protocol layer can be solved, and the protocol decoupling of the protocol layer is realized, so that after the serial port chip receives data, a protocol object of the protocol can be called for processing after the corresponding protocol is found.
In the embodiment of the application, after receiving the target data, the target data can be checked according to a preset check mode array; the preset check mode array comprises a plurality of check modes, and each check mode uniquely corresponds to one protocol object which is constructed in advance based on an object-oriented principle. And under the condition that the target data passes the verification, sending the target data to a protocol object corresponding to a verification mode adopted when the verification passes. Therefore, the serial port chip can be internally provided with a plurality of protocols, can decouple the protocols, can automatically find the protocol corresponding to the data based on the verification mode in the preset verification mode array, can adapt to the plurality of protocols without modifying an internal program by a technician, and is convenient to operate.
Based on the serial port communication method based on the inspection mode provided by the embodiment, correspondingly, the application further provides a specific implementation mode of the serial port chip applied to the serial port communication method based on the inspection mode. Please refer to the following examples.
There is provided a serial port chip for:
receiving target data;
according to a preset verification mode array, verifying target data; the preset verification mode array comprises a plurality of verification modes, wherein each verification mode uniquely corresponds to a protocol object which is constructed in advance based on an object-oriented principle;
and under the condition that the target data passes the verification, sending the target data to a protocol object corresponding to a verification mode adopted when the target data passes the verification.
Optionally, the serial port chip is further used for
Sequentially checking the target data by adopting a checking mode in a preset checking mode array;
and when the verification is passed, recording the verification mode adopted at the present time, and stopping the verification.
Optionally, as shown in fig. 6, the serial port chip 600 includes at least one serial port, an underlying configuration module 610, and a protocol verification module 620, where:
the bottom layer configuration module 610 is configured to:
acquiring target data of a target serial port, and determining a target bottom layer object corresponding to the target serial port in a plurality of bottom layer objects, so that the target bottom layer object sends the target data to the protocol verification module 620; the method comprises the steps that a bottom object is constructed and obtained in advance based on an object-oriented principle, each bottom object uniquely corresponds to one serial port, and serial ports corresponding to each bottom object are different;
the protocol verification module 620 is configured to:
receiving target data;
the protocol verification module 620 is further configured to:
and verifying the target data according to the preset verification mode array.
Optionally, the serial port chip further comprises a protocol analysis module;
the protocol verification module is further configured to:
transmitting the target data and the verification information to a protocol analysis module; the verification information carries a protocol object corresponding to a verification mode adopted when verification passes;
the protocol analysis module is used for:
and sending the target data to a protocol object corresponding to the verification mode adopted when the verification passes.
Optionally, the serial port chip further includes a construction module, configured to:
receiving a verification mode registration request for a target verification mode; the verification mode registration request carries a target verification mode and a protocol object corresponding to the target verification mode;
and adding the target verification mode to a preset verification mode array.
In the embodiment of the application, after receiving the target data, the target data can be checked according to a preset check mode array; the preset check mode array comprises a plurality of check modes, and each check mode uniquely corresponds to one protocol object which is constructed in advance based on an object-oriented principle. And under the condition that the target data passes the verification, sending the target data to a protocol object corresponding to a verification mode adopted when the verification passes. Therefore, the serial port chip can be internally provided with a plurality of protocols, can decouple the protocols, can automatically find the protocol corresponding to the data based on the verification mode in the preset verification mode array, can adapt to the plurality of protocols without modifying an internal program by a technician, and is convenient to operate.
Fig. 7 is a schematic diagram of a serial port chip according to an embodiment of the present application. As shown in fig. 7, the serial port chip 7 of this embodiment includes: a processor 70, a memory 71, and a computer program 72 stored in the memory 71 and executable on the processor 70. The processor 70, when executing the computer program 72, implements the steps of each of the test mode-based serial communication method embodiments described above. Alternatively, the processor 70, when executing the computer program 72, performs the functions of the modules/units of the apparatus embodiments described above.
By way of example, the computer program 72 may be partitioned into one or more modules/units that are stored in the memory 71 and executed by the processor 70 to complete the present application. The one or more modules/units may be a series of computer program instruction segments capable of performing a specific function for describing the execution of the computer program 72 in the serial port chip 7.
The serial port chip 7 may be a computing device such as a desktop computer, a notebook computer, a palm computer, a cloud server, etc. The serial port chip may include, but is not limited to, a processor 70, a memory 71. It will be appreciated by those skilled in the art that fig. 7 is merely an example of a serial port chip 7, and is not meant to be limiting of serial port chip 7, and may include more or fewer components than shown, or may combine certain components, or different components, e.g., the serial port chip may further include input and output devices, network access devices, buses, etc.
The processor 70 may be a central processing unit (Central Processing Unit, CPU), or may be other general purpose processor, digital signal processor (Digi)tal Signal Processor, DSP), application specific integrated circuits (Application Specific Integrated Circuit, ASIC), field programmable gate arrays (Field-Programmable Gate Arra) y FPGA) or other programmable logic device, discrete gate or transistor logic devices, discrete hardware components, or the like. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
The memory 71 may be an internal storage unit of the serial port chip 7, for example, a hard disk or a memory of the serial port chip 7. The memory 71 may be an external storage device of the serial port chip 7, for example, a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card) or the like, which are provided on the serial port chip 7. Further, the memory 71 may also include both an internal memory unit and an external memory device of the serial port chip 7. The memory 71 is used for storing the computer program and other programs and data required by the serial port chip. The memory 71 may also be used for temporarily storing data that has been output or is to be output.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-described division of the functional units and modules is illustrated, and in practical application, the above-described functional distribution may be performed by different functional units and modules according to needs, i.e. the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-described functions. The functional units and modules in the embodiment may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit, where the integrated units may be implemented in a form of hardware or a form of a software functional unit. In addition, the specific names of the functional units and modules are only for distinguishing from each other, and are not used for limiting the protection scope of the present application. The specific working process of the units and modules in the above system may refer to the corresponding process in the foregoing method embodiment, which is not described herein again.
In the foregoing embodiments, the descriptions of the embodiments are emphasized, and in part, not described or illustrated in any particular embodiment, reference is made to the related descriptions of other embodiments.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus/terminal device and method may be implemented in other manners. For example, the apparatus/terminal device embodiments described above are merely illustrative, e.g., the division of the modules or units is merely a logical function division, and there may be additional divisions in actual implementation, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection via interfaces, devices or units, which may be in electrical, mechanical or other forms.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in the embodiments of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The integrated modules/units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the present application may implement all or part of the flow of the method of the above embodiment, or may be implemented by a computer program to instruct related hardware, where the computer program may be stored in a computer readable storage medium, and when the computer program is executed by a processor, the computer program may implement the steps of each of the method embodiments described above. Wherein the computer program comprises computer program code which may be in source code form, object code form, executable file or some intermediate form etc. The computer readable medium may include: any entity or device capable of carrying the computer program code, a recording medium, a U disk, a removable hard disk, a magnetic disk, an optical disk, a computer Memory, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), an electrical carrier signal, a telecommunications signal, a software distribution medium, and so forth. It should be noted that the computer readable medium contains content that can be appropriately scaled according to the requirements of jurisdictions in which such content is subject to legislation and patent practice, such as in certain jurisdictions in which such content is subject to legislation and patent practice, the computer readable medium does not include electrical carrier signals and telecommunication signals.
The above embodiments are only for illustrating the technical solution of the present application, and not for limiting the same; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application, and are intended to be included in the scope of the present application.

Claims (10)

1. The serial port communication method based on the inspection mode is characterized by comprising the following steps of:
receiving target data;
according to a preset verification mode array, verifying the target data; the preset verification mode array comprises a plurality of verification modes, wherein each verification mode uniquely corresponds to a protocol object which is constructed in advance based on an object-oriented principle;
under the condition that the target data passes the verification, the target data is sent to a protocol object corresponding to a verification mode adopted when the verification passes;
wherein the method further comprises:
receiving a verification mode modification request for a target verification mode;
the verifying the target data according to the preset verification mode array comprises the following steps:
grouping the verification modes in the preset verification mode array by utilizing a frame header, wherein the frame header corresponds to one or more matched verification modes;
determining a verification mode group corresponding to the target data according to the frame header of the target data;
sequentially checking the target data by using a checking mode in the checking mode group corresponding to the target data;
the determining the verification mode grouping corresponding to the target data according to the frame header of the target data comprises the following steps:
transmitting the target data to a receiving buffer area, and reading data in one buffer area from the receiving buffer area;
judging whether the frame head value of the data in the buffer area is larger than the frame head value positioned in the middle position of the preset frame head group;
if the frame head is larger than the preset frame head group, searching the frame head downwards from the middle position of the preset frame head group;
if not, searching the frame header upwards from the middle position of the preset frame header group;
when a frame header consistent with the data in the read buffer area is found, a verification mode grouping corresponding to the frame header is called.
2. The serial communication method based on the inspection mode according to claim 1, wherein the verifying the target data according to the preset inspection mode array comprises:
sequentially checking the target data by adopting a checking mode in the preset checking mode array;
and when the verification is passed, recording the verification mode adopted at the present time, and stopping the verification.
3. The serial port communication method based on the inspection mode according to claim 1, wherein the method is applied to a serial port chip, and the serial port chip comprises at least one serial port, a bottom layer configuration module and a protocol verification module;
the receiving target data includes:
the bottom layer configuration module acquires target data of a target serial port;
the bottom layer configuration module determines a target bottom layer object corresponding to the target serial port in a plurality of bottom layer objects so that the target bottom layer object sends the target data to the protocol verification module; the bottom object is constructed and obtained in advance based on an object-oriented principle, each bottom object uniquely corresponds to one serial port, and the serial ports corresponding to each bottom object are different;
the protocol verification module receives the target data;
the verifying the target data according to the preset verification mode array comprises the following steps:
and the protocol verification module verifies the target data according to a preset verification mode array.
4. The serial communication method based on the inspection mode according to claim 3, wherein the serial chip further comprises a protocol analysis module;
the sending the target data to a protocol object corresponding to a verification mode adopted when verification passes includes:
the protocol verification module sends the target data and verification information to the protocol analysis module; the verification information carries a protocol object corresponding to a verification mode adopted when verification passes;
and the protocol analysis module sends the target data to a protocol object corresponding to a verification mode adopted when verification passes.
5. The inspection-based serial communication method according to claim 1, further comprising:
receiving a verification mode registration request for a target verification mode; the verification mode registration request carries the target verification mode and a protocol object corresponding to the target verification mode;
and adding the target verification mode to the preset verification mode array.
6. The serial port chip is characterized in that the serial port chip is used for:
receiving target data;
according to a preset verification mode array, verifying the target data; the preset verification mode array comprises a plurality of verification modes, wherein each verification mode uniquely corresponds to a protocol object which is constructed in advance based on an object-oriented principle;
under the condition that the target data passes the verification, the target data is sent to a protocol object corresponding to a verification mode adopted when the verification passes;
wherein, the serial port chip is further used for:
receiving a verification mode modification request for a target verification mode;
the verifying the target data according to the preset verification mode array comprises the following steps:
grouping the verification modes in the preset verification mode array by utilizing a frame header, wherein the frame header corresponds to one or more matched verification modes;
determining a verification mode group corresponding to the target data according to the frame header of the target data;
sequentially checking the target data by using a checking mode in the checking mode group corresponding to the target data;
the determining the verification mode grouping corresponding to the target data according to the frame header of the target data comprises the following steps:
transmitting the target data to a receiving buffer area, and reading data in one buffer area from the receiving buffer area;
judging whether the frame head value of the data in the buffer area is larger than the frame head value positioned in the middle position of the preset frame head group;
if the frame head is larger than the preset frame head group, searching the frame head downwards from the middle position of the preset frame head group;
if not, searching the frame header upwards from the middle position of the preset frame header group;
when a frame header consistent with the data in the read buffer area is found, a verification mode grouping corresponding to the frame header is called.
7. The serial port chip of claim 6, wherein the serial port chip is further configured to
Sequentially checking the target data by adopting a checking mode in the preset checking mode array;
and when the verification is passed, recording the verification mode adopted at the present time, and stopping the verification.
8. The serial port chip of claim 6, wherein the serial port chip comprises at least one serial port, an underlying configuration module, and a protocol verification module, wherein:
the bottom layer configuration module is used for:
acquiring target data of a target serial port, and determining a target bottom object corresponding to the target serial port in a plurality of bottom objects so that the target bottom object sends the target data to the protocol verification module; the bottom object is constructed and obtained in advance based on an object-oriented principle, each bottom object uniquely corresponds to one serial port, and the serial ports corresponding to each bottom object are different;
the protocol verification module is used for:
receiving the target data;
the protocol verification module is further configured to:
and verifying the target data according to a preset verification mode array.
9. The serial port chip of claim 8, wherein the serial port chip further comprises a protocol parsing module;
the protocol verification module is further configured to:
the target data and the verification information are sent to the protocol analysis module; the verification information carries a protocol object corresponding to a verification mode adopted when verification passes;
the protocol analysis module is used for:
and sending the target data to a protocol object corresponding to the verification mode adopted when the verification passes.
10. A serial port chip comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that the processor implements the steps of the method according to any of claims 1 to 5 when the computer program is executed.
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