CN114676091A - Safety management board, server board card assembly and server - Google Patents

Safety management board, server board card assembly and server Download PDF

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Publication number
CN114676091A
CN114676091A CN202210380992.XA CN202210380992A CN114676091A CN 114676091 A CN114676091 A CN 114676091A CN 202210380992 A CN202210380992 A CN 202210380992A CN 114676091 A CN114676091 A CN 114676091A
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China
Prior art keywords
chip
board
server
interface
substrate
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Chinese (zh)
Inventor
陈英博
盛永
何永占
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Beijing Baidu Netcom Science and Technology Co Ltd
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Beijing Baidu Netcom Science and Technology Co Ltd
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Priority to CN202210380992.XA priority Critical patent/CN114676091A/en
Publication of CN114676091A publication Critical patent/CN114676091A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7803System on board, i.e. computer system on one or more PCB, e.g. motherboards, daughterboards or blades
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16Constructional details or arrangements
    • G06F1/18Packaging or power distribution
    • G06F1/183Internal mounting support structures, e.g. for printed circuit boards, internal connecting means
    • G06F1/184Mounting of motherboards
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16Constructional details or arrangements
    • G06F1/18Packaging or power distribution
    • G06F1/183Internal mounting support structures, e.g. for printed circuit boards, internal connecting means
    • G06F1/185Mounting of expansion boards
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/382Information transfer, e.g. on bus using universal interface adapter
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4063Device-to-bus coupling
    • G06F13/4068Electrical coupling
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4063Device-to-bus coupling
    • G06F13/409Mechanical coupling
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7896Modular architectures, e.g. assembled from a number of identical packages
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0042Universal serial bus [USB]

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Human Computer Interaction (AREA)
  • Computing Systems (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

The utility model relates to a safety control board, server integrated circuit board subassembly and server relates to server technical field. The safety management board is arranged in the server and comprises a first substrate, and a BMC chip, a first CPLD chip, a BMC Flash chip and a BIOS Flash chip which are arranged on the first substrate; one side of the first substrate is provided with a golden finger which is used for being connected with a mainboard in the server in an inserting manner; the BMC chip, the first CPLD chip and the BIOS Flash chip are electrically connected with the golden finger, and the first CPLD chip and the BMC Flash chip are electrically connected with the BMC chip. The safety management board can realize cross-platform reuse without redevelopment, can save design resources and reduce cost.

Description

Safety management board, server board card assembly and server
Technical Field
The disclosure relates to the technical field of servers, in particular to a safety management board, a server board card assembly and a server.
Background
The server is used as an infrastructure for the development of the Internet and provides the most basic hardware guarantee for the development of various services. As the application of the server becomes more and more extensive, the functional requirements of the server also become more diversified. For server cards, the functions integrated by the cards are increasing.
Current server hardware technology is largely divided into several mainstream provider platforms, such as: an Intel server platform, an ARM server platform, an AMD server platform and the like. At present, each server manufacturer designs respective safety and management related circuits based on each platform pertinence, and the related circuits are integrated and designed on a server mainboard.
However, since different manufacturers have different design schemes and interfaces for the same component, the component cannot be used universally, and needs to be developed repeatedly, which wastes design resources.
Disclosure of Invention
The utility model provides a safety control board, server integrated circuit board subassembly and server, safety control board can realize cross-platform multiplexing, need not redevelopment, can save design resource, reduce cost.
In a first aspect, the present disclosure provides a security management board, installed in a server, including a first substrate, and a BMC chip, a first CPLD chip, at least one BMC Flash chip, and at least one BIOS Flash chip, which are disposed on the first substrate;
one side of the first substrate is provided with a golden finger which is used for being connected with a mainboard in the server in an inserting manner; the BMC chip, the first CPLD chip and the BIOS Flash chip are electrically connected with the golden finger, and the first CPLD chip and the BMC Flash chip are electrically connected with the BMC chip.
The safety management board comprises a first substrate, a BMC chip, a first CPLD chip, a BMC Flash chip and a BIOS Flash chip are arranged on the first substrate, a modularized and universal board card is formed, cross-platform multiplexing is achieved, repeated design and development and testing links can be reduced, and design resources can be saved. In addition, the original chip (module) on the main board is stripped to the first substrate, so that the size of the main board can be reduced, and the cost of the main board is reduced. Wherein, through setting up the golden finger in one side of first base plate, the safety control board passes through golden finger and mainboard plug-in connection, and the maintenance and the device of the safety control board of being convenient for are changed, can practice thrift maintenance time, and it is long when increasing the operation of server.
In one possible implementation, the number of BMC Flash chips is two, and the number of BIOS Flash chips is two.
In one possible embodiment, at least one BMC Flash chip and at least one BIOS Flash chip are plugged into the first substrate.
In a possible implementation manner, a first security module is further disposed on the first substrate, the first security module is electrically connected to the BMC chip, and both the BMC Flash chip and the BIOS Flash chip are electrically connected to the first security module.
In a possible implementation manner, a second security module is further disposed on the first substrate, and the second security module is electrically connected to the BIOS Flash chip.
In one possible embodiment, the second security module is a TPM module or a TCM module.
In one possible embodiment, the first security module and the second security module are plugged into the first substrate.
In a possible implementation manner, a first hard disk interface and a first hard disk are further disposed on the first substrate, the first hard disk interface is electrically connected with the gold finger, and the first hard disk is inserted into the first hard disk interface.
In one possible implementation, at least a part of the first CPLD chip is located within a coverage of an orthographic projection of the first hard disk on the first substrate.
In one possible implementation, the first hard disk interface is an m.2 interface.
In one possible implementation mode, the BMC chip and the first CPLD chip are communicated in parallel; the first CPLD chip is configured to convert the acquired parallel signals into serial signals to be transmitted to the golden finger, convert the serial signals acquired from the golden finger into parallel signals and transmit partial signals to the BMC chip.
In a possible embodiment, the safety management plate further comprises an end plate connected to a side of the first substrate facing away from the golden finger; the end plate is provided with a plurality of interfaces, and the plurality of interfaces comprise network interfaces, display interfaces and USB interfaces.
In one possible implementation, the plurality of interfaces further includes a debug interface.
In one possible embodiment, the network interface, the display interface, the USB interface, and the debugging interface are disposed at intervals along the extending direction of the end plate.
In one possible implementation, the network interface is an RJ45 interface, the display interface is a Mini-DP interface, the USB interface is a type-C interface, and the debugging interface is a Mini-USB interface.
In a possible implementation manner, the end plate is further provided with a power supply key and a positioning indication key, and the power supply key and the positioning indication key are arranged at intervals along the width direction of the end plate.
In a possible embodiment, a system indicator light is further disposed on the end plate, and the system indicator light and the at least one interface are arranged in a staggered manner in the extending direction of the end plate.
In a possible embodiment, a gripping portion for an operator to grip is further connected to a side surface of the end plate facing away from the base plate.
In a second aspect, the present disclosure provides a server board card assembly, including a motherboard and the security management board as described above, where the motherboard includes a second substrate, and a CPU chip and a second CPLD chip that are disposed on the second substrate;
a golden finger slot is formed in one side, connected with the safety management board, of the second substrate, and a golden finger of the safety management board is inserted into the golden finger slot; the CPU chip and the second CPLD chip are electrically connected with the golden finger slot, and the second CPLD chip is electrically connected with the CPU chip.
The server board card assembly comprises a safety management board and a main board which are connected with each other, and a modularized and universal safety management board capable of being reused across platforms is formed by stripping some low-speed components on the main board from the safety management board, so that repeated design development and test can be avoided; meanwhile, only core devices such as a CPU chip and a second CPLD chip are reserved on the second substrate of the mainboard, so that the size of the mainboard can be reduced, the cost of the mainboard is reduced, and the cost of the server board card assembly can be reduced. In addition, the golden finger of the safety management card is inserted into the golden finger slot of the mainboard to realize the connection of the golden finger and the golden finger slot, so that the assembly and disassembly of the server board card assembly are facilitated, the maintenance and the device replacement of the safety management card are facilitated, the maintenance time can be saved, and the running time of the server is prolonged.
In a possible implementation manner, a second hard disk interface is further disposed on the second substrate, the second hard disk interface is electrically connected with the gold finger slot, and the second hard disk interface is used for plugging a second hard disk.
In one possible implementation mode, the CPU chip and the second CPLD chip are communicated in parallel; the second CPLD chip is configured to convert the acquired parallel signals into serial signals to be transmitted to the golden finger slot, convert the serial signals acquired from the golden finger slot into parallel signals and transmit partial signals to the CPU chip.
In a possible implementation manner, a south bridge chip is further disposed on the second substrate, the south bridge chip is electrically connected to the gold finger slot, and the south bridge chip is electrically connected to the second CPLD chip.
In a possible implementation manner, the south bridge chip and the second CPLD chip are communicated in parallel; the second CPLD chip is configured to convert the acquired parallel signals into serial signals to be transmitted to the golden finger slot, and convert the serial signals acquired from the golden finger slot into parallel signals and transmit part of the signals to the south bridge chip.
In a third aspect, the present disclosure provides a server, including a chassis and the server board card assembly as described above; the server board card assembly is installed in the case, the safety management board of the server board card assembly is connected to one side, close to the outside of the case, of the main board, and one side, deviating from the main board, of the safety management board is exposed outside the case.
The server comprises a case and a server board card assembly arranged in the case, wherein the server board card assembly comprises a safety management board and a main board which are connected with each other, and a modularized and universal safety management board which can be reused across platforms is formed by stripping some low-speed components on the main board from the safety management board, so that repeated design development and test can be avoided; meanwhile, only core devices such as a CPU chip and a second CPLD chip are reserved on the second substrate of the mainboard, so that the size of the mainboard can be reduced, the cost of the mainboard is reduced, and the cost of the server board card assembly can be reduced. In addition, the golden finger of the safety management card is inserted into the golden finger slot of the mainboard to realize the connection between the golden finger and the golden finger slot, so that the assembly and disassembly of the board card assembly of the server are facilitated, the maintenance and the device replacement of the safety management card are facilitated, the maintenance time can be saved, and the running time of the server is prolonged.
In a possible implementation mode, an installation position is arranged in the case, and the safety management board is installed in the installation position; guide grooves are formed in two sides of the mounting position, and two sides of the safety management plate are respectively inserted into the guide grooves in the two sides.
It should be understood that the statements herein reciting aspects are not intended to limit the critical or essential features of the embodiments of the present disclosure, nor are they intended to limit the scope of the present disclosure. Other features of the present disclosure will become apparent from the following description.
Drawings
The above and other features, advantages and aspects of various embodiments of the present disclosure will become more apparent by referring to the following detailed description when taken in conjunction with the accompanying drawings. In the drawings, like or similar reference characters designate like or similar elements, and wherein:
fig. 1 is a schematic structural diagram of a server provided in an embodiment of the present disclosure;
FIG. 2 is a partial schematic diagram of the internal structure of the server of FIG. 1;
FIG. 3 is a partial exploded view of a server provided by an embodiment of the present disclosure;
fig. 4 is a schematic diagram of a framework of a server board card assembly provided in the embodiment of the present disclosure;
fig. 5 is a schematic structural diagram of a security management board provided in an embodiment of the present disclosure;
FIG. 6 is an exploded view of the security management panel of FIG. 5;
fig. 7 is a side view structural view of the security management panel of fig. 5.
Detailed Description
As the applications of the server become more and more extensive, the functional requirements for the server also become diversified. For server boards, more and more functions are integrated. However, not all functions are required for each server, and how to provide boards with diversified functions, flexible configuration and cost reduction are significant problems faced by manufacturers at present.
At present, servers of several mainstream suppliers such as Intel, AMD and ARM are designed more maturely, but each server manufacturer designs a server board card based on each platform, and the server board cards of each platform are different in design scheme and interface of the same part, so that servers of different platforms cannot be used universally. The server board card not only has a large number of components, but also needs to be repeatedly developed, thereby wasting design resources.
In addition, the safety and management related circuits of the server of each platform are all designed on the mainboard, and the mainboard is generally higher in requirements on the board because high-speed signal lines need to be connected, the more components are arranged on the mainboard, the larger the area of the mainboard is, and the higher the cost of the mainboard is. Moreover, the mainboard is usually fixedly installed in the server chassis, and the operation and maintenance and the device replacement are complicated, and the chassis cover needs to be opened, so that the operation and maintenance time is long, the efficiency is low, the operation time of the server is reduced, and the maintenance cost is high.
In view of this, the present embodiment provides a security management board, a server board assembly and a server, where the security management board strips some low-speed components in the server from a motherboard to form a modular and standardized board, and is connected to the motherboard in a pluggable manner to realize communication with the motherboard to form the server board assembly. The safety management board can be universally used for each platform, repeated design, development and test are reduced, design resources are saved, the cost is low, the design is flexible, meanwhile, the size of the main board is reduced, and the cost of the server board card assembly is reduced.
Exemplary embodiments of the present disclosure are described below with reference to the accompanying drawings, in which various details of the embodiments of the disclosure are included to assist understanding, and which are to be considered as merely exemplary. Accordingly, those of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope and spirit of the present disclosure. Also, descriptions of well-known functions and constructions are omitted in the following description for clarity and conciseness.
Fig. 1 is a schematic structural diagram of a server according to an embodiment of the present disclosure; FIG. 2 is a partial schematic diagram of the internal structure of the server of FIG. 1; fig. 3 is a partial exploded view of a server provided by an embodiment of the present disclosure.
Referring to fig. 1, the present embodiment provides a server 1, where the server 1 includes a chassis 20, and electronic devices such as a processor (not shown in the figure), a hard disk (not shown), a memory (not shown) and the like are disposed in the chassis 20, and a system bus (not shown) for connecting the related electronic devices is further disposed. In addition, since the server 1 may generate heat continuously during the operation process, in order to ensure the stability of the operation of the server 1, a component for dissipating heat of the electronic device is usually disposed in the chassis 20.
Referring to fig. 2, a heat dissipation frame 30 is disposed in the housing 20, and the heat dissipation frame 30 is used to fix a fan (not shown) for dissipating heat of the electronic devices in the housing 20. The power supply 40, the network card 50 and other devices are also disposed in the chassis 20, and it should be understood that fig. 2 does not show all components and structures disposed in the chassis 20, and besides the devices shown in fig. 2, a display card, a hard disk drive and other devices may be disposed in the chassis 20.
With reference to fig. 2, in order to solve the problem that the boards of the server 1 on different platforms are different in design, cannot be multiplexed across the platforms, and need to be designed and developed for multiple times corresponding to each platform, the present embodiment performs modular design on the boards in the server 1, adds the security management board 100 in the server 1, and connects the security management board 100 with the motherboard 200 to form the server board assembly 10 together.
Compared with the existing integrated server 1 motherboard 200 integrated with all devices, the server board card assembly 10 of the embodiment sets low-speed devices related to system security and management, which are set on the original server 1 motherboard 200, on the security management board 100, reduces devices on the motherboard 200, electrical leads connected to the devices are uniformly distributed on the security management board 100 and the motherboard 200, and the electrical leads of the security management board 100 are connected with corresponding electrical leads of the motherboard 200, so that mutual communication between the corresponding devices set on the security management board 100 and the motherboard 200 is realized.
By peeling off devices related to the safety and management of the system from the main board 200 and placing the devices on the separate safety management board 100, the devices are generally devices which can be commonly used by the servers 1 of all the platforms, so that the safety management board 100 is not required to be repeatedly designed and developed aiming at the servers 1 of different platforms, the safety management board 100 can realize cross-platform multiplexing, multiple design, development and test links are reduced, design resources can be saved, and development cost is reduced.
For the servers 1 of different platforms, only the corresponding main boards 200 corresponding to the respective platforms need to be replaced. Moreover, since only the core devices are retained on the motherboard 200, and the core devices of the servers 1 of each platform are substantially the same, in most cases, the motherboard 200 of the present embodiment may also be applied to the servers 1 of different platforms, and in few cases, only individual devices for each platform on the motherboard 200 need to be added.
Moreover, since each platform server 1 can use the security management board 100, for a data center provided with a plurality of servers 1, no matter all the servers 1 are servers of one platform, or different servers 1 are servers of different platforms, or a single server 1 integrates functions of servers of more than two platforms, the security management board 100 can be used, the number of the security management boards 100 to be used is increased, correspondingly, the material cost of the security management board 100 can be reduced, meanwhile, the risk of material preparation is reduced, and the supply is more stable.
In addition, since the safety management board 100 is provided with low-speed devices related to safety and management, the safety management board 100 does not need to transmit high-speed signals, so that the requirements on the board are low, and the cost of the safety management board 100 can be reduced. Meanwhile, since the number of devices on the main board 200 is reduced, the size of the main board 200 can be reduced, and the cost of the main board 200 can be reduced. Thus, the cost of the server board assembly 10 is reduced.
With continued reference to fig. 2, for the layout and installation of the server board card assembly 10 in the chassis 20, the motherboard 200 may be fixedly installed in the chassis 20, and since the core high-speed devices are mainly distributed on the motherboard 200, the heat dissipation devices (such as fans) in the chassis 20 may be distributed around the motherboard 200 to better dissipate heat from the motherboard 200. The security management board 100 may be connected to a side of the motherboard 200 close to the outside of the chassis 20, for example, a side of the security management board 100 facing the center of the chassis 20 is connected to the motherboard 200, and a side of the security management board 100 facing the outside of the chassis 20 (away from the motherboard 200) is exposed outside the chassis 20, for example, the side of the security management board 100 is exposed on a side wall of the chassis 20, and the security management board 100 is connected to the external devices by means of the side, so as to control the external devices by the server board card assembly 10.
Referring to fig. 3, in the server board card assembly 10 of the present embodiment, the security management board 100 and the motherboard 200 are connected in a pluggable manner, as described above, the motherboard 200 may be fixed in the chassis 20, and the security management board 100 and the motherboard 200 are connected in a pluggable manner, so that the security management board 100 may be inserted into the chassis 20 from the outside of the chassis 20 to be connected with the motherboard 200, or the security management board 100 may be pulled out from the chassis 20. Therefore, the safety management board 100 is convenient to assemble and disassemble, the maintenance and the replacement of the devices on the safety management board 100 are more convenient, the operation and maintenance time is short, the cost is low, and the operation time of the server 1 can be effectively prolonged.
The side of the security management board 100 facing the main board 200 is provided with a gold finger 120, and each conductive contact (not shown in the figure) of the gold finger 120 is electrically connected to each device on the security management board 100 through a conductive trace arranged on the security management board 100. Correspondingly, a golden finger slot 220 is disposed on a side of the main board 200 facing the security management board 100, a plurality of conductive contacts (not shown in the figure) are also disposed in the golden finger slot 220, and the conductive contacts in the golden finger slot 220 are electrically connected to the devices on the main board 200 through conductive traces disposed on the main board 200.
When the security management board 100 is connected to the motherboard 200, the gold finger 120 of the security management board 100 is inserted into the gold finger slot 220 of the motherboard 200, and the conductive contacts of the gold finger 120 are in one-to-one contact with the conductive contacts in the gold finger slot 220, so as to electrically connect the devices on the security management board 100 to the corresponding devices on the motherboard 200.
As for the installation of the security management board 100 in the chassis 20, with continued reference to fig. 3, an installation position 201 is provided in a side region of the main board 200 (a side of the main board 200 close to the outside of the chassis 20) in the chassis 20, the installation position 201 communicates with a side wall of the chassis 20, and the security management board 100 is installed in the installation position 201. Guide grooves 2011 are formed in two sides of the mounting position 201, and two sides of the safety management board 100 can be inserted into the guide grooves 2011 and slide along the guide grooves 2011, so that the safety management board 100 is connected with the main board 200.
For example, the guide grooves 2011 serve as guides, and the gold fingers 120 of the security management board 100 can be aligned with the gold finger slots 220 of the motherboard 200 by inserting the two sides of the security management board 100 into the guide grooves 2011 and sliding the security management board 100 along the guide grooves 2011 toward the motherboard 200, so that the gold fingers 120 of the security management board 100 are finally inserted into the gold finger slots 220 of the motherboard 200. In addition, the two side groove walls of the guide groove 2011 also have a limiting effect on the safety management board 100, so that the safety management board 100 is fixed in the plane where the board surface of the safety management board 100 is located, and after the safety management board 100 is installed in place, the safety management board 100 can be fixedly connected with the case 20 through connecting pieces such as bolts and screws, for example, one side of the safety management board 100 exposed outside the case 20 is fixed on the side wall of the case 20 through quick-connection bolts.
The server board assembly 10 according to the embodiment of the present disclosure will be described in detail below.
Fig. 4 is a schematic diagram of a framework of a server board card assembly provided in the embodiment of the present disclosure; fig. 5 is a schematic structural diagram of a security management board according to an embodiment of the present disclosure.
Referring to fig. 2 and 4, the server board card assembly 10 of the present embodiment is configured to strip off the security and management related low-speed devices on the main board 200 and place the stripped low-speed devices on the separately designed security management board 100, so that only the core high-speed devices remain on the main board 200. The safety management board 100 can realize cross-platform multiplexing, and because low-speed devices are mainly arranged, the requirements on the board are low, and the cost is low; meanwhile, the number of devices arranged on the main board 200 is reduced, and further, the size of the main board 200 is reduced, so that the production cost of the main board 200 can be remarkably reduced for the main board 200 with higher requirements on the board.
Specifically, referring to fig. 4, the security management board 100 uses a first substrate 110 as a base material, a gold finger 120 is disposed on one side of the first substrate 110, and a BMC (Baseboard management Controller) chip and a first CPLD (Complex Programmable Logic Device) chip are disposed on the first substrate 110. The BMC chip 111 and the first CPLD chip 112 are connected to corresponding conductive contacts of the gold finger 120 through conductive traces, and a plurality of conductive traces are connected between the BMC chip 111 and the first CPLD chip 112.
The motherboard 200 uses the second substrate 210 as a base material, the gold finger slot (not shown) is disposed on one side of the second substrate 210, and the side of the second substrate 210 having the gold finger slot 220 is connected to the side of the first substrate 110 having the gold finger 120. The second substrate 210 is provided with a Central Processing Unit (CPU) chip and a second CPLD chip 212. The CPU chip 211a and the second CPLD chip 212 are connected to corresponding conductive contact pads in the golden finger slot 220 through conductive traces, and a plurality of conductive traces are connected between the CPU chip 211a and the second CPLD chip 212.
The conductive contact of the gold finger 120 on the security management board 100 may be designed as a layout structure that can be commonly used by each large platform such as Intel, AMD, ARM, and correspondingly, the gold finger slot 220 on the motherboard 200 may also adopt a standard interface. Therefore, the server board card assembly 10 is convenient to design, the universality of the server board card assembly 10 is improved, the safety management board 100 can be multiplexed across platforms, and the main board 200 only needs to correspond to the corresponding platform and simply replace devices on the second substrate 210.
By inserting the golden finger 120 of the security management board 100 into the golden finger slot 220 of the motherboard 200, the conductive contacts of the golden finger 120 are in contact with the conductive contacts in the golden finger slot 220, so that signals can be transmitted between devices on the security management board 100 and devices on the motherboard 200.
For example, the signals transmitted between the BMC chip 111 and the CPU chip 211a include low-speed signals such as an eSPI signal, a USB signal, and a PECI signal, and may also transmit high-speed signals such as PCIe signals with loss within an acceptable range. The signals transmitted between the BMC chip 111 and the second CPLD chip 212 may include QSPI signals and the like. The signal transmitted between the first CPLD chip 112 and the CPU chip 211a may include a UART signal or the like.
In order to reduce the number of conductive contacts of the gold finger 120 of the security management board 100, simplify the structure of the gold finger 120, reduce the size of the gold finger 120, and correspondingly reduce the size of the gold finger slot 220 connected to the motherboard 200, referring to fig. 4, in this embodiment, the BMC chip 111 and the first CPLD chip 112 are in a parallel communication mode, and the first CPLD chip 112 can convert parallel signals from the BMC chip 111 and other devices into serial signals and provide the serial signals to the gold finger 120. Thus, the number of the conductive contact pieces on the golden finger 120 is reduced, the size of the golden finger 120 is reduced, and the size of the golden finger 120 meets the design requirement of the safety management board 100; similarly, the number of conductive contacts in the gold finger slot 220 is reduced, the volume of the gold finger slot 220 is reduced, and the size of the gold finger slot 220 meets the design requirement of the motherboard 200.
Similar to the communication mode between the BMC chip 111 and the first CPLD chip 112, after the first CPLD chip 112 provides one path of serial signals to the second CPLD chip 212, the second CPLD chip 212 performs parallel communication with the CPU chip 211a and other devices (not shown in the figure) on the second substrate 210, and the second CPLD chip 212 resolves the one path of serial signals into multiple paths of parallel signals and provides the multiple paths of parallel signals to the CPU chip 211a and other devices, respectively.
Conversely, when the signals are transmitted from the CPU chip 211a and other devices to the BMC chip 111, the CPU chip 211a and other devices transmit the multiple parallel signals to the second CPLD chip 212, the parallel signals are converted into serial signals by the second CPLD chip 212, and the serial signals are transmitted to the first CPLD chip 112 via the gold finger slot 220 and the gold finger 120, and the first CPLD chip 112 resolves the serial signals into multiple parallel signals and transmits the multiple parallel signals to the BMC chip 111.
Illustratively, taking the BMC chip 111 as an example of transmitting signals to the CPU chip 211a, the BMC chip 111 transmits four types of signals, namely UART, SGPIO, GPIOs, and I2C, in parallel to the first CPLD chip 112, and transmits GPIO/OEM signals to the first CPLD chip 112 by adding other devices (not shown) on the first substrate 110, the first CPLD chip 112 converts these five types of parallel signals into serial signals by using SGPIO/LTPI transmission protocol, and transmits the serial signals to the second CPLD chip 212 via the gold finger 120 and the gold finger slot 220, and the second CPLD chip 212 resolves the serial signals into three types of parallel signals, namely GPIOs, I2C, and UART, and transmits the GPIOs signals and I2C signals to other devices (not shown) on the second substrate 210.
The way of transmitting signals from the CPU chip 211a and other devices on the second substrate 210 to the BMC chip 111 and other devices on the first substrate 110 is opposite to the way of transmitting signals from the BMC chip 111 and other devices on the first substrate 110 to the CPU chip 211a and other devices on the second substrate 210, and will not be described herein again.
As shown in fig. 4 and 5, the security management board 100 further includes a BMC Flash chip 113a and a BIOS Flash chip 113b, and the BMC Flash chip 113a and the BIOS Flash chip 113b are both disposed on the first substrate 110. The BMC Flash chip 113a is electrically connected with the BMC chip 111, and the BMC Flash chip 113a is used for storing a start code of the BMC chip 111; the BIOS Flash chip 113b is electrically connected to the CPU chip 211a on the motherboard 200 through the gold finger 120 and the gold finger slot 220, for example, SPI signals are transmitted between the BIOS Flash chip 113b and the CPU chip 211a, and the BIOS Flash chip 113b is used to store a start code of the CPU chip 211 a.
In order to ensure that the reliability of the operation of the BMC Flash chip 113a and the BIOS Flash chip 113b is guaranteed, in some embodiments, two BMC Flash113a chips may be disposed on the first substrate 110, and by means of redundancy of one BMC Flash chip 113a, a situation that a boot code of the BMC chip 111 is damaged due to damage of the single BMC Flash chip 113a is avoided, so as to guarantee stable operation of the BMC chip 111; similarly, the first substrate 110 may also be provided with two BIOS Flash chips 113b, and one BIOS Flash chip 113b is redundant to ensure that the CPU chip 211a operates stably.
In addition, the security management board 100 may further include a first security module 114, where the first security module 114 is, for example, a PFR (platform firmware recovery) module. The first security module 114 is disposed on the first substrate 110, the first security module 114 is electrically connected to the BMC chip 111, for example, SPI signals are transmitted between the first security module 114 and the BMC chip 111, and the first security module 114 is electrically connected to the CPU chip 211a through the gold finger 120 and the gold finger slot 220, for example, QSPI signals are transmitted between the first security module 114 and the CPU chip 211 a. The BMC Flash chip 113a and the BIOS Flash chip 113b are both electrically connected to the first security module 114, and the first security module 114 is used to electrically connect the BMC Flash chip 113a and the BMC chip 111 and electrically connect the BIOS Flash chip 113b and the CPU chip 211 a.
By setting the first security module 114, the first security module 114 is used for monitoring the BMC Flash chip 113a and the BIOS Flash chip 113b, so as to ensure that the boot codes of the BMC chip 111 and the CPU chip 211a are not damaged or tampered, and ensure system security.
With continued reference to fig. 4 and 5, in order to further improve the system operation safety, in some embodiments, the safety management board 100 may further include a second safety module 115, the second safety module 115 is disposed on the first substrate 110, and the second safety module 115 is electrically connected to the BIOS Flash chip 113 b. The second security module 115 is configured to detect an operating status of the BIOS Flash chip 113b, detect whether the BIOS Flash chip 113b is tampered with, and ensure safe system operation.
In practical application, before the system is started, that is, before the CPU chip 211a is started, the second security module 115 detects whether the BIOS Flash chip 113b is tampered, and if the BIOS Flash chip 113b is tampered, the CPU chip 211a is prevented from being started, so that the system is ensured to run safely.
Illustratively, the second security Module 115 may be a TPM (Trusted Platform Module) Module or a TCM (Trusted Cryptography Module) Module.
Referring to fig. 5, a hard disk is usually installed on the security management board 100, in this embodiment, the hard disk installed on the security management board 100 is defined as a first hard disk 116b, and the first hard disk 116b is, for example, a solid state disk. In contrast, as shown in fig. 4 and fig. 5, the first substrate 110 of the security management board 100 may further include a first hard disk interface 116a, where the first hard disk interface 116a is electrically connected to the gold finger 120, and the first hard disk interface 116a is used for plugging a first hard disk 116 b.
Illustratively, the first hard disk interface 116a may be an m.2 interface, and the m.2 interface can simultaneously support a PCIe channel and a SATA channel, wherein the PCIe channel is easier in terms of increasing the transmission speed. In addition, the solid state disk corresponding to the M.2 interface also supports the NVMe standard, so that the solid state disk has obvious performance improvement.
Alternatively, the first hard disk interface 116a may also be a SATA interface, a mSATA interface, a PCI-E interface, an U.2 interface, or other interfaces.
Similar to the hard disk installed on the security management board 100, the hard disk is usually installed on the main board 200, and in this embodiment, the hard disk installed on the main board 200 is defined as a second hard disk, and the second hard disk is also a solid state disk, for example. In contrast, as shown in fig. 2 and fig. 4, a second hard disk interface 213 may be further disposed on the second substrate 210 of the motherboard 200, the second hard disk interface 213 is electrically connected to the gold finger slot 220, and the second hard disk interface 213 is used for plugging a second hard disk.
The first hard disk interface 116a and the second hard disk interface 213 are electrically connected to each other through the gold finger 120 and the gold finger slot 220, and for example, SATA signals or PCIe signals may be transmitted between the first hard disk interface 116a and the second hard disk interface 213.
For servers 1 of different platforms, some servers 1 have only CPU chips 211a on the motherboard 200, some servers 1 have south bridge chips 211b on the motherboard 200 in addition to the CPU chips 211a, and the south bridge chips 211b and the CPU chips 211a are electrically connected and communicate with each other. At this time, the devices on the security management board 100 may transmit signals to and from the south bridge chip 211b, and the signals may be transmitted to the CPU chip 211a through the electrical connection between the south bridge chip 211b and the CPU chip 211a, and the south bridge chip 211b corresponds to a bridge between the devices on the security management board 100 and the CPU chip 211a of the motherboard 200.
Specifically, referring to fig. 4, in the case that the south bridge chip 211b is disposed on the second substrate 210 of the motherboard 200, similar to the CPU chip 211a, the south bridge chip 211b is electrically connected to the conductive contacts in the gold finger slot 220 through the conductive traces disposed on the second substrate 210, and the south bridge chip 211b is electrically connected to the second CPLD chip 212. The second CPLD chip 212 and the south bridge chip 211b communicate with each other in parallel, serial signals are transmitted between the first CPLD chip 112 and the second CPLD chip 212 through the gold finger 120 and the gold finger slot 220, and multiple paths of parallel signals are transmitted between the second CPLD chip 212 and the south bridge chip 211 b.
Illustratively, when signals are transmitted from the BMC chip 111 of the security management board 100 to the south bridge chip 211b of the motherboard 200, the BMC chip 111 transmits multiple parallel signals to the first CPLD chip 112, the first CPLD chip 112 converts the multiple signals into one serial signal and transmits the one serial signal to the second CPLD chip 212, and the second CPLD chip 212 resolves the one serial signal into multiple parallel signals and transmits the multiple parallel signals to the south bridge chip 211 b; when the signal is transmitted from the south bridge chip 211b to the BMC chip 111, the south bridge chip 211b transmits the multiple parallel signals to the second CPLD chip 212, the second CPLD chip 212 converts the multiple parallel signals into one serial signal and transmits the one serial signal to the first CPLD chip 112, and the first CPLD chip 112 resolves the one serial signal into multiple parallel signals and transmits the multiple parallel signals to the BMC chip 111.
Referring to fig. 2, taking the server 1 shown in fig. 2 as an example of an Intel platform server, a south bridge chip 211b is disposed on the motherboard 200 in the server 1, and signals that need to be transmitted between each device on the security management board 100 and the CPU chip 211a may be first transmitted to the south bridge chip 211b, and then transmitted to the CPU chip 211a through the south bridge chip 211 b.
In addition, fig. 2 shows a case where two CPU chips 211a are disposed on the main board 200, in other embodiments, the number of the CPU chips 211a disposed on the main board 200 may be one or three, four, and the like according to actual requirements, and the embodiment is not particularly limited.
Referring to fig. 4, the main board 200 is usually further provided with a memory 214, the specification of the memory 214 is, for example, DDR5, the BMC chip 111 on the security management board 100 can communicate with the memory 214 provided on the main board 200 through the gold finger 120 and the gold finger slot 220, for example, an I3C signal can be transmitted between the BMC chip 111 and the memory 214. Referring to fig. 2, a memory slot 215 is disposed around the CPU chip 211a, and the memory 214 may be inserted into the memory slot 215.
The chassis 20 of the server 1 is further generally provided with a video signal interface 202, the video signal interface 202 is used for connecting an external display device, the video signal interface 202 on the chassis 20 is, for example, a VGA interface, and signals can be transmitted between the BMC chip 111 of the security management board 100 and the video signal interface 202 on the chassis 20, for example, VGA signals can be transmitted between the BMC chip 111 and the video signal interface 202 on the chassis 20.
Illustratively, the security management board 100 may further include a multiplexer 117, wherein the multiplexer 117 is disposed on the first substrate 110 and electrically connected to the BMC chip 111, and the BMC chip 111 communicates with the video signal interface 202 on the chassis 20 through the multiplexer 117. In addition, a video interface 118 may be disposed on the first substrate 110 of the security management board 100, the video interface 118 of the security management board 100 may communicate with the multiplexer 117, and for example, VGA signals may be transmitted between the video interface 118 and the multiplexer 117.
As shown in fig. 4, a network card 50 is usually further disposed in the chassis 20 of the server 1, the network card 50 is generally used for connection between the server 1 and a network device such as a switch, and the network card 50 may be an OCP network card, for example. The BMC chip 111 of the security management board 100 may communicate with the network card 50 through the gold finger 120 and the gold finger slot 220, for example, an NCSI signal may be transmitted between the BMC chip 111 and the network card 50.
Hereinafter, the layout structure of the security management board 100 will be mainly described in detail.
FIG. 6 is an exploded view of the security management panel of FIG. 5; fig. 7 is a side view structural view of the security management panel of fig. 5.
As shown in fig. 5 and fig. 6, core devices of the security management board 100, such as the BMC chip 111 and the first CPLD chip 112, may be fixed on the first substrate 110 by welding, and other devices may be mounted on the first substrate 110 by plugging to facilitate assembly and disassembly.
For example, both the first security module 114 and the second security module 115 may be plugged into the first substrate 110. One of the two BMC Flash chips 113a may be plugged into the first substrate 110, and the other one may be soldered to the first substrate 110, or both the two BMC Flash chips 113a may be plugged into the first substrate 110; similarly, one of the two BIOS Flash chips 113b may be plugged into the first substrate 110, and the other BIOS Flash chip may be soldered onto the first substrate 110, or both BIOS Flash chips 113b may be plugged into the first substrate 110.
With such an arrangement, for the devices plugged on the first substrate 110, the corresponding devices can be plugged on the first substrate 110 when needed, and some devices can be detached from the first substrate 110 when not needed, so that the flexibility of the security management board 100 can be improved, and the layout structure of the security management board 100 can be different in different application scenarios.
In addition, taking the BMC Flash chip 113a and the BIOS Flash chip 113b as an example, when the system of the server 1 is updated, the BMC Flash chip 113a and the BIOS Flash chip 113b may refresh the boot code, and in the case of frequently refreshing the boot code, the BMC Flash chip 113a and the BIOS Flash chip 113b are prone to malfunction and need to be returned to the factory for maintenance. At this time, the security management board 100 can be pulled out from the chassis 20, and the BMC Flash chip 113a and the BIOS Flash chip 113b can be detached from the security management board 100, so that there is no need to open the chassis 20, and there is no complicated process for detaching the two chips, which is convenient for maintaining the chips.
Therefore, in the present embodiment, by providing the security management board 100, the low-speed device on the main board 200 is removably mounted on the security management board 100, and the security management board 100 is connected to the main board 200 by plugging the gold finger 120, the maintenance and device replacement of the security management board 100 are simpler, and the security management board 100 can be directly pulled out from the chassis 20, and the non-core device on the security management board 100 is mounted on the first substrate 110 by plugging, so that the replacement of such a device is more convenient. Therefore, the maintenance time period of the security management board 100 is short, the maintenance cost is low, and the operation duration of the server board card assembly 10 can be prolonged.
In addition, as shown in fig. 5 and fig. 6, in order to save the occupied space of the device of the security management board 100, in the case that the first hard disk 116b is plugged into the first hard disk interface 116a on the first substrate 110, a certain gap is usually formed between the first hard disk 116b and the board surface of the first substrate 110, in this embodiment, the first CPLD chip 112 may be disposed by using the gap, so that the first CPLD chip 112 is partially or completely located in the area below the first hard disk 116b, the first CPLD chip 112 does not occupy a separate planar space, and the area of the first substrate 110 may be reduced.
Similarly, for the first security module 114 plugged on the first substrate 110, a certain gap is also formed between the first security module 114 and the board surface of the first substrate 110, the BMC chip 111 may be disposed in a space below the first security module 114, the BMC chip 111 may be entirely located within a range covered by the first security module 114, or a part of the BMC chip 111 is exposed outside the first security module 114.
Through stacking up and down in space, the total area occupied by the devices on the first substrate 110 is reduced, and further, the size of the first substrate 110 can be reduced, the volume of the safety management board 100 is reduced, the safety management board 100 is more flexibly arranged in the case 20, and more installation space can be reserved for other components in the case 20.
With continued reference to fig. 6, the security management board 100 may further include an end plate 130, the end plate 130 is connected to one side of the first substrate 110, and a plurality of interfaces are disposed on the end plate 130, through which the server board card assembly 10 is connected to an external device. As shown in fig. 3, the end plate 130 may be connected to a side of the first substrate 110 facing away from the gold finger 120, and the end plate 130 is exposed on a side wall of the case 20 to facilitate connection with an external device.
Referring to fig. 7, the interfaces disposed on the end plate 130 may include a network interface 131, a display interface 132, and a USB (Universal Serial Bus) interface, where the network interface 131 is used to connect a network cable, the display interface 132 is mainly used to connect a display, and it may also implement a sound transmission function, and the USB interface 133 is connected to an external device to implement information and power transmission, for example, the USB interface 133 may be used to connect the wireless network card 50, a USB disk, a mouse, or a keyboard.
In some embodiments, a debug interface 134 may be further disposed on the end board 130, and the debug interface 134 is used for communication between the debug server board assembly 10 and external devices.
Since the end plate 130 is connected to the side of the first substrate 110, the width of the end plate 130 is generally small, and the end plate 130 is generally extended along the side of the first substrate 110 and has a certain length, so that the interfaces on the end plate 130 are generally arranged at intervals along the length direction of the end plate 130, that is, the network interface 131, the display interface 132, the USB interface 133 and the debug interface 134 may be arranged at intervals along the extension direction of the end plate 130.
With continued reference to fig. 7, in order to reduce the overall size of the security management board 100, in the present embodiment, the network interface 131 provided on the end board 130 may be a small-sized RJ45 interface. Similarly, the display interface 132 may be a Mini-DP interface, which is much smaller than the conventional VGA interface and HDMI interface; the USB interface 133 may be a type-C interface, which is thinner than a conventional type-a interface; the debug interface 134 may be a Mini-USB interface or a Micro-USB interface that is smaller in size than the Mini-USB interface.
On the basis of not reducing the function of safety control board 100, through all setting up each interface on end plate 130 to the less interface of size, to each interface along the extension direction interval arrangement of end plate 130, the whole space that occupies of each interface is littleer, can reduce the length of end plate 130 to, can also reduce the width of end plate 130 to a certain extent, thereby, reduce the volume of safety control board 100, reduce the space that safety control board 100 occupy.
Similarly, in order to reduce the length of the end plate 130, other devices on the end plate 130 may also be designed, for example, for the power button 135 (power indicator) and the positioning indicator button 136 (positioning indicator lamp) arranged on the end plate 130, the power button 135 and the positioning indicator button 136 may be arranged at intervals along the width direction of the end plate 130 to reduce the power button 135 and the positioning indicator button 136
In addition, for other devices mounted on the end plate 130, for example, the system indicator lamp 137, it may be disposed offset from at least one of the interfaces in the extending direction of the end plate 130. That is, in the width direction of the end plate 130, the system indicator light 137 may be disposed close to the upper side or the lower side of the end plate 130, and the system indicator light 137 is disposed off the line where each interface is located, so as to avoid disposing the system indicator light 137 between two interfaces, so as to reduce the length of the end plate 130.
By reducing the space occupied by the security management board 100, more installation space can be made for other components in the chassis 20, and as shown in fig. 2, by reducing the length of the security management board 100, more space can be left beside the security management board, which is convenient for installing the two network cards 50 beside the security management board.
Referring to fig. 4, for example, the network interface 131 may be electrically connected to the BMC chip 111 through a PHY module 119 disposed on the first substrate 110, wherein an MDx signal may be transmitted between the network interface 131 and the PHY module 119, and an RGMII signal may be transmitted between the PHY module 119 and the BMC chip 111. Display Port signals may be transmitted between the Display interface 132 and the BMC chip 111. USB signals may be transmitted between the USB interface 133 and the CPU chip 211 a/south bridge chip 211 b. The UART signal may be transmitted between the debug interface 134 and the first CPLD chip 112. The PWR signal may be transmitted between the power button 135 and the BMC chip 111. The UID signal can be transmitted between the positioning indication key 136 and the BMC chip 111. A System Health Status signal may be transmitted between the System indicator light 137 and the BMC chip 111.
Referring to fig. 6 or 7, the end plate 130 may further be provided with a holding portion 138, and the holding portion 138 may be located on a side surface of the end plate 130 facing away from the base plate. By providing the grip 138, the operator can hold the grip 138 and mount the security management board 100 into the housing 20 or extract the security management board 100 from the housing 20, thereby reducing the difficulty in mounting and dismounting the security management board 100.
The above detailed description should not be construed as limiting the scope of the disclosure. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions may be made in accordance with design requirements and other factors. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present disclosure should be included in the scope of protection of the present disclosure.

Claims (25)

1. A safety management board is installed in a server and is characterized by comprising a first substrate, and a BMC chip, a first CPLD chip, at least one BMC Flash chip and at least one BIOS Flash chip which are arranged on the first substrate;
a golden finger is arranged on one side of the first substrate and is used for being connected with a mainboard in the server in an inserting mode; the BMC chip, the first CPLD chip and the BIOS Flash chip are all electrically connected with the golden finger, and the first CPLD chip and the BMC Flash chip are all electrically connected with the BMC chip.
2. The security management board of claim 1, wherein the number of BMC Flash chips is two, and the number of BIOS Flash chips is two.
3. The security management board of claim 2, wherein at least one of the BMC Flash chip and at least one of the BIOS Flash chip are plugged into the first substrate.
4. The security management board of claim 1, wherein a first security module is further disposed on the first substrate, the first security module is electrically connected to the BMC chip, and both the BMC Flash chip and the BIOS Flash chip are electrically connected to the first security module.
5. The security management board of claim 4, wherein a second security module is further disposed on the first substrate, and the second security module is electrically connected to the BIOS Flash chip.
6. The security management board of claim 5, wherein the second security module is a TPM module or a TCM module.
7. The security management board of claim 5, wherein the first security module and the second security module are each plugged into the first substrate.
8. The security management board according to any one of claims 1 to 7, wherein the first substrate further has a first hard disk interface and a first hard disk, the first hard disk interface is electrically connected to the gold finger, and the first hard disk is connected to the first hard disk interface in an inserting manner.
9. The security management board of claim 8, wherein at least a portion of the first CPLD chip is located within a coverage of an orthographic projection of the first hard disk on the first substrate.
10. The security management board of claim 8, wherein the first hard disk interface is an m.2 interface.
11. The security management board according to any one of claims 1 to 7, wherein the BMC chip and the first CPLD chip are in parallel communication;
the first CPLD chip is configured to convert the acquired parallel signals into serial signals and transmit the serial signals to the golden finger, convert the serial signals acquired from the golden finger into parallel signals and transmit partial signals to the BMC chip.
12. The security management panel of any one of claims 1-7, further comprising an end plate attached to a side of the first substrate facing away from the gold finger;
the end plate is provided with a plurality of interfaces, and the plurality of interfaces comprise network interfaces, display interfaces and USB interfaces.
13. The security management board of claim 12, wherein the plurality of interfaces further comprises a debug interface.
14. The security management board of claim 13, wherein the network interface, the display interface, the USB interface, and the debug interface are spaced apart along an extension direction of the end board.
15. The security management board of claim 14, wherein the network interface is an RJ45 interface, the display interface is a Mini-DP interface, the USB interface is a type-C interface, and the debugging interface is a Mini-USB interface.
16. The security management board of claim 12, wherein the end board is further provided with a power button and a positioning indication button, and the power button and the positioning indication button are spaced apart along the width direction of the end board.
17. The security management panel of claim 12, wherein the end panel further comprises a system indicator light, and the system indicator light is offset from at least one of the interfaces in a direction of elongation of the end panel.
18. The security management panel of claim 12 wherein a gripping portion is further attached to a side surface of the end panel facing away from the base panel for gripping by an operator.
19. A server board card assembly, comprising a motherboard and the security management board of any one of claims 1 to 18, wherein the motherboard comprises a second substrate, and a CPU chip and a second CPLD chip disposed on the second substrate;
a golden finger slot is formed in one side, connected with the safety management board, of the second substrate, and a golden finger of the safety management board is inserted into the golden finger slot; the CPU chip and the second CPLD chip are electrically connected with the golden finger slot, and the second CPLD chip is electrically connected with the CPU chip.
20. The server board card assembly according to claim 19, wherein a second hard disk interface is further disposed on the second substrate, the second hard disk interface is electrically connected to the gold finger slot, and the second hard disk interface is used for plugging a second hard disk.
21. The server board card assembly of claim 19, wherein the CPU chip and the second CPLD chip communicate in parallel;
the second CPLD chip is configured to convert the acquired parallel signals into serial signals and transmit the serial signals to the golden finger slot, convert the serial signals acquired from the golden finger slot into parallel signals and transmit partial signals to the CPU chip.
22. The server board card assembly according to claim 19, wherein a south bridge chip is further disposed on the second substrate, the south bridge chip is electrically connected to the golden finger slot, and the south bridge chip is electrically connected to the second CPLD chip.
23. The server board card assembly of claim 22, wherein the south bridge chip communicates with the second CPLD chip in parallel;
the second CPLD chip is configured to convert the acquired parallel signals into serial signals and transmit the serial signals to the golden finger slot, convert the serial signals acquired from the golden finger slot into parallel signals and transmit partial signals to the south bridge chip.
24. A server comprising a chassis and the server board assembly of any one of claims 19-23;
the server board card assembly is installed in the case, the safety management board of the server board card assembly is connected to one side, close to the outside of the case, of the main board, and one side, deviating from the main board, of the safety management board is exposed outside the case.
25. The server according to claim 24, wherein a mounting location is provided in the chassis, and the security management board is mounted in the mounting location;
guide grooves are formed in two sides of the mounting position, and two sides of the safety management plate are respectively inserted into the guide grooves in the two sides.
CN202210380992.XA 2022-04-12 2022-04-12 Safety management board, server board card assembly and server Pending CN114676091A (en)

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