CN114660710B - Wafer level optical interconnection and switching system on chip - Google Patents

Wafer level optical interconnection and switching system on chip Download PDF

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Publication number
CN114660710B
CN114660710B CN202011542278.3A CN202011542278A CN114660710B CN 114660710 B CN114660710 B CN 114660710B CN 202011542278 A CN202011542278 A CN 202011542278A CN 114660710 B CN114660710 B CN 114660710B
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chip
engine
laser array
optoelectronic transceiver
interconnection
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CN114660710A (en
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李明
金烨
张国杰
石暖暖
李伟
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Institute of Semiconductors of CAS
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    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • G02B6/43Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12083Constructional arrangements
    • G02B2006/12121Laser
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The invention provides a wafer level optical interconnection and exchange system on chip, comprising: the chip-to-chip switching module is used for realizing chip-to-chip interconnection and comprises a first laser array and at least two groups of chip-to-chip interconnection waveguides; the on-chip calculation storage module is used for receiving, storing, calculating and transmitting on-chip node data and comprises a second laser array and a second photoelectric transceiving engine; the central switching node module is interconnected with the inter-chip switching module or the on-chip computing storage module, is used for realizing signal routing between on-chip node data or signal switching between chips, and comprises a first photoelectric transceiving engine; the first laser array is used as laser input of the first photoelectric transceiving engine, the second laser array is used as laser input of the second photoelectric transceiving engine, and the second photoelectric transceiving engine is connected with the first photoelectric transceiving engine through a waveguide. The invention realizes the hybrid integration of photoelectric chips, realizes the photoelectric interconnection on a single chip, reduces the interconnection loss and improves the interconnection density.

Description

Wafer level optical interconnect and switch system on chip
Technical Field
The invention relates to the technical field of integrated microwave photonics, in particular to a wafer-level optical interconnection and switching system on a chip.
Background
With the rapid development of the internet industry, the 5G construction and artificial intelligence field are gradually popularized, the total data volume is rapidly increased, the characteristics of high value, low grade and diversification are presented, and the defects of the traditional Von Neumann architecture are gradually shown; the traditional data interconnection scheme adopting a layer-by-layer stacking mode has great disadvantages in both power consumption and efficiency; even though the single chip computing power has been steadily increased due to the progress of semiconductor technology, the increasing speed is gradually reduced with the rapid increase of data volume. Therefore, how to change the interconnection mode, how to greatly improve the interconnection density, how to gradually convert the rigid interconnection to the flexible interconnection defined by software, how to convert the single-chip computation to the multi-chip cooperative computation, and how to realize the plasticity and the reconfigurability of the interconnection mode become problems which need to be solved urgently.
The integrated microwave photonics uses various optical devices to process optical and electrical signals, the development direction of the integrated microwave photonics mainly includes that monolithic integration is carried out based on the same material platform, improvement is sought on the process, and the performance of the original device is improved, but the scheme has long time and insufficient reconfigurability and flexibility, and when the quality of a certain part of a chip is not up to the standard due to the process, the usability of the whole chip is affected; the heterogeneous material hybrid integration based on the coupling between the chips has the advantages that the specific advantages of each platform are fully utilized, and the problems that the coupling efficiency is greatly reduced and the loss is large due to the large difference of the optical field size when the waveguides based on different materials are directly coupled are solved.
Disclosure of Invention
Technical problem to be solved
It is therefore an objective of the claimed invention to provide a wafer level optical interconnect and switch system on a chip to at least partially solve the above problems.
(II) technical scheme
The invention provides a wafer level optical interconnection and switching system on chip, comprising: the chip-to-chip switching module is used for realizing chip-to-chip interconnection and comprises a first laser array 2 and at least two groups of chip-to-chip interconnection waveguides; the on-chip computing and storing module is used for receiving, storing, computing and transmitting on-chip node data and comprises a second laser array 4 and a second photoelectric transceiving engine 3; the central switching node module is interconnected with the inter-chip switching module or the intra-chip computing and storing module, is used for realizing signal routing between intra-chip node data or signal switching between chips, and comprises a first photoelectric transceiving engine 1; the first laser array 2 serves as a laser input of the first optoelectronic transceiver engine 1, the second laser array 4 serves as a laser input of the second optoelectronic transceiver engine 3, and the second optoelectronic transceiver engine 3 is connected with the first optoelectronic transceiver engine 1 through a waveguide.
Furthermore, the number of the inter-chip switching modules and the number of the on-chip computing and storing modules are at least two.
Further, the first laser array 2 and the second laser array 4 are both multi-channel multi-wavelength laser arrays, and are used for inputting multi-wavelength array lasers.
Further, the first optoelectronic transceiver engine 1 and the second optoelectronic transceiver engine 3 are each composed of a plurality of transmitting units and a plurality of receiving units, wherein: the transmitting unit is used for modulating the first electric signal into a first optical signal, and the receiving unit is used for converting the second optical signal into a second electric signal.
Further, the number of output laser beams of the first laser array 2 matches the number of transmitting units of the first optoelectronic transceiver engine 1, the number of output laser beams of the second laser array 4 matches the number of transmitting units of the second optoelectronic transceiver engine 3, and the number of transmitting units of the first optoelectronic transceiver engine 1 is twice as large as the number of transmitting units of the second optoelectronic transceiver engine 3.
Further, the output laser light of the first laser array 2 is respectively introduced into the transmitting units of the first optoelectronic transceiver engine 1 through the inter-chip interconnection waveguide, and is used as the laser input of the transmitting units of the first optoelectronic transceiver engine 1.
Further, the transmitting unit in the second optoelectronic transceiver engine 3 is communicated with the receiving unit in the first optoelectronic transceiver engine 3, and the receiving unit in the second optoelectronic transceiver engine 3 is communicated with the transmitting unit in the first optoelectronic transceiver engine 1.
Further, the first optoelectronic transceiver engine 1 and the first laser array 2 are integrated on a first chip; the second opto-electronic transceiver engine 3 and the second laser array 4 are both integrated on a second chip different from the first chip.
Furthermore, the second chip is spliced around the first chip in an end face coupling mode.
Further, in the inter-chip switching module, one of the at least two sets of inter-chip interconnection waveguides is connected to another set of inter-chip interconnection waveguides through inter-chip end-face coupling, so as to perform inter-chip signal transmission.
(III) advantageous effects
Based on the technical scheme, compared with the prior art, the wafer-level optical interconnection and switching system on chip has the following advantages:
(1) The invention realizes the hybrid integration of photoelectric chips, realizes the photoelectric interconnection on a single chip, reduces the interconnection loss and improves the interconnection density.
(2) The invention has expansibility, can directly carry out two-dimensional extension between the photoelectric transceiving engines of the exchange nodes in a waveguide coupling mode, directly carries out multi-chip cooperative calculation, has a flexible interconnection mode and extremely strong plasticity, and can realize high-density interconnection, large data capacity and strong calculation capability.
(3) The invention has reconfigurability, the calculation/storage node photoelectric transceiving engine can be manufactured independently and is directly connected with the switching node photoelectric transceiving engine in a waveguide coupling mode, and if problems occur in the manufacturing, testing and using processes, the work of other chips can not be influenced, and the calculation/storage node photoelectric transceiving engine can be directly removed or replaced. In addition, the number of the calculation/storage node photoelectric transceiving engines used by the invention can be adjusted at will, and the complete controllability of the network scale is realized.
Drawings
FIG. 1 is a block diagram of a system on a wafer level optical interconnect and switch chip according to an embodiment of the invention.
Fig. 2 is a schematic structural diagram of a first optoelectronic transceiver engine according to an embodiment of the present invention.
Fig. 3 is a schematic structural diagram of a second optoelectronic transceiver engine according to an embodiment of the present invention.
[ description of reference ]
1-first opto-electronic Transmit-receive Engine 2-first laser array
3-second opto-electronic Transmit-receive Engine 4-second laser array
51-first receiving unit 61-first transmitting unit
52-second receiving unit 62-second transmitting unit
7-exchange chip 8-calculation storage chip
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail with reference to the following embodiments and the accompanying drawings.
The invention provides a wafer-level optical interconnection and switching system on a chip, which can realize large-scale, high-speed and high-density data interconnection. The invention discloses a wafer level optical interconnection and switch system on a chip, which adopts a mode of switching nodes to carry out signal routing in the chip or between the chips, adopts a mode of waveguide direct coupling to realize optical signal transmission, adopts a mode of photoelectric hybrid integration to realize photoelectric information exchange on a single chip, realizes the direct interconnection of wafer level chips, realizes the adjustable and controllable network scale and has extensibility and reconfigurability.
FIG. 1 is a block diagram of a system on a wafer level optical interconnect and switch chip according to an embodiment of the invention.
As shown in fig. 1, the wafer level optical interconnect and switch system on a chip may include:
the chip-to-chip switching module is used for realizing chip-to-chip interconnection and comprises a first laser array and at least two groups of chip-to-chip interconnection waveguides;
the on-chip computing and storing module is used for receiving, storing, computing and transmitting on-chip node data and comprises a second laser array and a second photoelectric transceiving engine;
the central switching node module is interconnected with the inter-chip switching module or the on-chip computing storage module, is used for realizing signal routing between on-chip node data or signal switching between chips, and comprises a first photoelectric transceiving engine;
the first laser array is used as laser input of a first photoelectric transceiving engine, the second laser array is used as laser input of a second photoelectric transceiving engine, and the second photoelectric transceiving engine is connected with the first photoelectric transceiving engine through a waveguide.
In the wafer level optical interconnection and switching system on chip, all devices are directly connected or coupled through the on-chip waveguide.
In the embodiment of the invention, at least two inter-chip switching modules and at least two on-chip computing and storing modules are provided. Referring to fig. 1, a plurality of inter-chip switching modules of the present invention are respectively interconnected with a central switching node module, and a plurality of on-chip computing memory modules are also respectively interconnected with the central switching node module.
In some embodiments, according to the requirements of chip structure and capacity, the number of the on-chip computation memory modules used in a single chip is generally 16, the number of the inter-chip switching modules is also 16, and the number of the central switching node modules is 1. That is, all the on-chip computation memory modules and the inter-chip switching modules are interconnected with the same central switching node module.
It is understood that, in other embodiments, the number of on-chip computing memory modules and the number of inter-chip switching modules used in a single chip may be set according to actual needs, and the invention is not limited thereto.
In the embodiment of the invention, the first laser array and the second laser array are both multi-channel multi-wavelength laser arrays and are used for inputting multi-wavelength array lasers.
The first photoelectric transceiving engine is used for realizing signal interconnection and routing or interconnection between chips in the chip under the control of the switching chip on the upper layer. The second photoelectric transceiving engine is used for realizing the receiving, storage, calculation and transmission of the node signals in the chip under the control of the upper computing storage chip.
Specifically, the first optoelectronic transceiver engine and the second optoelectronic transceiver engine are each composed of a plurality of transmitting units and a plurality of receiving units, wherein: the transmitting unit is used for modulating the first electric signal into a first optical signal, and the receiving unit is used for converting the second optical signal into a second electric signal.
It should be noted that, in the present invention, the number of the transmitting units and the number of the receiving units included in the first optical electrical transceiver engine and the second optical electrical transceiver engine may be set according to actual needs, and the present invention is not limited specifically.
In some embodiments, to meet the data capacity requirement and to be practically controllable, the first optoelectronic transceiver engine typically includes 128 transmitting units and 128 receiving units; the second opto-electronic transceiver engine typically includes 4 transmit units and 4 receive units.
It is understood that the number of transmitting units and receiving units is the same in the same optoelectronic transceiver engine.
In the embodiment of the present invention, the number of output lasers of the first laser array matches the number of transmitting units of the first optoelectronic transceiver engine, the number of output lasers of the second laser array matches the number of transmitting units of the second optoelectronic transceiver engine, and the number of transmitting units of the first optoelectronic transceiver engine is twice as large as the number of transmitting units of the second optoelectronic transceiver engine.
Because first laser array and second laser array are multichannel multi-wavelength laser array, specifically, for make the quantity phase-match of transmitting element and receiving element, and accomplish actually controllable, first laser array can adopt 8 passageway 4 wavelength laser arrays, and 4 passageway 4 wavelength laser arrays can be adopted to the second laser array, wherein:
the 8-channel 4-wavelength laser array has 8 parallel waveguide output optical signals, each of which has 4 different wavelengths;
the 4-channel 4-wavelength laser array has 4 parallel waveguide output optical signals, each having 4 different wavelengths.
In the embodiment of the present invention, the wavelength bands between different channels may be the same or different. That is, since the output optical signals of the laser array are divided into multiple optical signals by different channels and the propagation is not affected by each other in different waveguides, each channel of the laser array does not need to be set with different wavelengths, and thus the wavelength bands between different channels can be the same.
Specifically, in the process of interconnecting a plurality of inter-chip switching modules and a single central switching node module, since the transmitting unit of the first optoelectronic transceiver engine includes 128 transmitting units, the number of the inter-chip switching modules is 16, and the first laser array in each inter-chip switching module has 8 parallel waveguides to output optical signals, the output laser of the first laser array in each inter-chip switching module can be respectively introduced into the transmitting unit of the first optoelectronic transceiver engine to serve as the laser input of the transmitting unit of the first optoelectronic transceiver engine, so that the number of the output laser of the first laser array matches the number of the transmitting units of the first optoelectronic transceiver engine.
In each on-chip computation storage module, since the second optoelectronic transceiver engine includes 4 transmitting units, the second laser array may adopt a 4-channel 4-wavelength laser array and have 4 parallel waveguides to output optical signals, and the number of output lasers of the second laser array matches the number of transmitting units of the second optoelectronic transceiver engine.
As shown in fig. 1, at least two sets of inter-chip interconnection waveguides are provided in the inter-chip switching module, and each set of inter-chip interconnection waveguides is connected to one transmitting unit or one receiving unit of the first optical-electrical transceiver engine.
In the embodiment of the present invention, output laser light of the first laser array is respectively introduced into the transmitting unit of the first optoelectronic transceiver engine through the inter-chip interconnection waveguide, and is used as laser input of the transmitting unit of the first optoelectronic transceiver engine.
In the embodiment of the present invention, the transmitting unit in the second optical-electrical transceiver engine is communicated with the receiving unit in the first optical-electrical transceiver engine, and the receiving unit in the second optical-electrical transceiver engine is communicated with the transmitting unit in the first optical-electrical transceiver engine.
The interconnection process of the plurality of on-chip computation memory modules and the single central switching node module is continuously analyzed, and since the number of the on-chip computation memory modules is 16, and the second optoelectronic transceiver engine in each on-chip computation memory module comprises 4 transmitting units, each transmitting unit in the second optoelectronic transceiver engine in the plurality of on-chip computation memory modules is respectively connected with the transmitting unit in the first optoelectronic transceiver engine in the single central switching node module through a waveguide. At this time, only 64 of the 128 transmitting units or receiving units of the first optoelectronic transceiving engine are interconnected with the plurality of on-chip computing memory modules, and the other 64 transmitting units or receiving units are used for being interconnected with the inter-chip switching module.
In the embodiment of the invention, a first photoelectric transceiving engine, an inter-chip interconnection waveguide and a first laser array are integrated on a first chip; the second optoelectronic transceiver engine and the second laser array are both integrated on a second chip different from the first chip.
Furthermore, the second chip is spliced around the first chip in an end face coupling mode.
In the inter-chip switching module, one of at least two sets of inter-chip interconnection waveguides is connected with the other set of inter-chip interconnection waveguides through inter-chip end face coupling so as to carry out inter-chip signal transmission.
It should be noted that, the specific number of the inter-chip switching modules and the in-chip computation storage modules in the present invention may be set according to actual needs, and only the number of the corresponding transmitting units or receiving units needs to be adjusted to match the number of the channels of the corresponding laser array, which is not limited in the present invention. That is, for example, if the second optical-electrical transceiver engine includes 2 transmitting units and 2 receiving units, the second laser array used is a 2-channel multi-wavelength laser array, and in this case, to ensure that the number of transmitting units of the first optical-electrical transceiver engine is twice as many as the number of transmitting units of the second optical-electrical transceiver engine, and to make it practically controllable, the first laser array may be a 4-channel multi-wavelength laser array.
Fig. 2 is a schematic structural diagram of a first optoelectronic transceiver engine according to an embodiment of the present invention.
As shown in fig. 2, the first optical-electrical transceiver engine may include, for example, 128 first transmitting units 61 and 128 first receiving units 51, wherein all of the first transmitting units 61 and the first receiving units 51 may implement signal routing between a plurality of computing/storage nodes in a chip or signal switching between chips under the control of a switching chip 7 disposed on an upper layer of a system on a wafer-level optical interconnect and a switching chip of the invention.
Specifically, all the first transmitting units 61 and the first receiving units 51 may be alternately arranged in groups of four or several, and the first transmitting units 61 and the first receiving units 51 are uniformly distributed around the switching chip 7 on the upper layer, so that the inter-chip switching module of the present invention is also uniformly distributed around the switching chip 7 on the upper layer. When inter-chip transmission is carried out, continuation can be carried out towards the two-dimensional direction according to actual needs so as to adapt to larger capacity or other controllable requirements.
In some embodiments, the upper layer switch chip and the first optoelectronic transceiver engine of the present invention may be connected by ball-planting or TSV (Through Silicon Via) packaging, so as to implement editable instruction control on the interconnection of the first optoelectronic transceiver engine.
Fig. 3 is a schematic structural diagram of a second optoelectronic transceiver engine according to an embodiment of the present invention.
As shown in fig. 3, the second optical-electrical transceiver engine may include 4 second transmitting units 62 and 4 second receiving units 52, for example. All the second transmitting units 62 and the second receiving units 52 can be controlled by the computation memory chip 8 disposed on the upper layer of the system on the wafer level optical interconnect and switch chip of the present invention, so as to receive, store, compute and transmit the chip node signals.
The working principle of the wafer-level optical interconnect and switching system-on-a-chip of the present invention is further explained in detail with reference to fig. 1:
firstly, the transmission digital electric signal of the upper computing and storing chip 8 is input into the second transmitting unit 62 of the second optical-electrical transceiving engine 3, so that the transmission digital electric signal is converted into an optical signal, and an optical signal output is generated; the output optical signal is input into the first optical-electrical transceiver engine 1, received by the first receiving unit 51, converted into a serial electrical signal, and output to the upper switching chip 7, and the flow of the serial electrical signal is controlled by the editable command of the switching chip 7.
The intermediate signal processed by the switching chip 7 enters the switching chip 7 again in the form of an electrical signal to control the first transmitting unit 61 in the first optical-electrical transceiver engine 1 to transmit. The light source of the first emitting unit 61 is now provided by the first laser array 2 in the inter-chip switching module. The signal emitted by the first emitting unit 61 may flow into adjacent chips for inter-chip interconnection exchange, and the adjacent chips are coupled and connected through inter-chip interconnection waveguides, or the signal emitted by the first emitting unit 61 may flow into the second receiving unit 52 of any one of the second optical transceiver engines 3 in the chips, and the first optical transceiver engine 1 and the second optical transceiver engine 3 are directly connected through waveguides to convert the emitted signal into a second electrical signal.
By this time, a complete signal flow between any two nodes is completed. Based on the same working principle, the interconnection between any two nodes in any two chips can be realized, which is not described herein again.
In summary, embodiments of the present invention provide a wafer-level optical interconnection and switching system on a chip, which can achieve a true photoelectric hybrid integration, a multi-chip cooperative operation, and a capability of directly interconnecting wafer-level chips, and provide a great data capacity and a great computing capability, and also have significant advantages of expansibility and reconfigurability, compared with a conventional photoelectric chip interconnection network cooperative operation.
It should be noted that the terms "first", "second", "third", etc. used in the present invention are only used for distinguishing different objects, and do not mean that there is any particular sequential relationship between the objects. In the present invention, the terms "include" and "comprise," as well as derivatives thereof, mean inclusion without limitation; the term "or" is inclusive, meaning and/or. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
The above-mentioned embodiments, objects, technical solutions and advantages of the present invention are further described in detail, it should be understood that the above-mentioned embodiments are only examples of the present invention, and should not be construed as limiting the present invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (9)

1. A wafer level optical interconnect and switch system on a chip, comprising:
the chip-to-chip interconnection module is used for realizing chip-to-chip interconnection and comprises a first laser array (2) and at least two groups of chip-to-chip interconnection waveguides;
the on-chip computation storage module is used for receiving, storing, computing and transmitting on-chip node data and comprises a second laser array (4) and a second photoelectric transceiving engine (3);
the central switching node module is interconnected with the inter-chip switching module or the intra-chip computing and storing module, is used for realizing signal routing between intra-chip node data or signal switching between chips, and comprises a first photoelectric transceiving engine (1);
wherein the first laser array (2) is used as the laser input of the first optoelectronic transceiver engine (1), the second laser array (4) is used as the laser input of the second optoelectronic transceiver engine (3), and the second optoelectronic transceiver engine (3) is connected with the first optoelectronic transceiver engine (1) through a waveguide;
the first photoelectric transceiving engine (1) and the first laser array (2) are integrated on a first chip; the second opto-electronic transceiver engine (3) and the second laser array (4) are both integrated on a second chip different from the first chip.
2. The system on a wafer level optical interconnect and switch of claim 1, wherein the inter-chip switch module and the on-chip computation memory module are each at least two.
3. The wafer-level optical interconnect and switch on-chip system of claim 1, wherein the first laser array (2) and the second laser array (4) are both multi-channel multi-wavelength laser arrays for input of multi-wavelength array lasers.
4. The wafer level optical interconnect and switch system on a chip of claim 3, wherein the first optoelectronic transceiver engine (1) and the second optoelectronic transceiver engine (3) are each comprised of a plurality of transmitting units and a plurality of receiving units, wherein:
the transmitting unit is used for modulating the first electric signal into a first optical signal, and the receiving unit is used for converting the second optical signal into a second electric signal.
5. The wafer level optical interconnection and exchange system on a chip as claimed in claim 4, wherein the number of output lasers of the first laser array (2) matches the number of transmission units of the first optoelectronic transceiver engine (1), the number of output lasers of the second laser array (4) matches the number of transmission units of the second optoelectronic transceiver engine (3), and the number of transmission units of the first optoelectronic transceiver engine (1) is twice the number of transmission units of the second optoelectronic transceiver engine (3).
6. The wafer-level optical interconnect and switch system-on-chip as claimed in claim 4, wherein the output lasers of the first laser array (2) are respectively introduced into the transmitting units of the first optoelectronic transceiver engine (1) through the inter-chip interconnect waveguide as laser inputs of the transmitting units of the first optoelectronic transceiver engine (1).
7. The wafer level optical interconnect and switch system on a chip of claim 4, characterized in that the transmitting unit in the second optoelectronic transceiver engine (3) communicates with the receiving unit in the first optoelectronic transceiver engine (1), and the receiving unit in the second optoelectronic transceiver engine (3) communicates with the transmitting unit in the first optoelectronic transceiver engine (1).
8. The wafer level optical interconnect and switch system on a chip of claim 1, wherein the second chip is spliced around the first chip in an end-coupled manner.
9. The system on a wafer level optical interconnect and switch of claim 1, wherein in the inter-chip switch module, one of the at least two sets of inter-chip interconnect waveguides is connected to another set of inter-chip interconnect waveguides through an inter-chip end-face coupling for inter-chip signal transmission.
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102016672A (en) * 2008-05-07 2011-04-13 惠普开发有限公司 Optical engine for point-to-point communications
CN102055584A (en) * 2009-10-28 2011-05-11 中国科学院半导体研究所 Optical-fiber secret communication device and data encryption method thereof
CN105790838A (en) * 2016-03-24 2016-07-20 北京邮电大学 Water-land optical communication network architecture and communication method based on interconnection between underwater visible light communication network units (UVNU) and fiber
CN109617612A (en) * 2018-12-25 2019-04-12 杭州耀芯科技有限公司 Optical signal aligned transmissions device, system and method in free space
CN110012368A (en) * 2019-03-27 2019-07-12 兰州大学 A kind of silicon-based integrated on piece multimode optical switching system of compatible wavelength-division multiplex signals

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5818984A (en) * 1996-11-18 1998-10-06 International Business Machines Corporation Optoelectronic interconnection of integrated circuits
AU2119301A (en) * 1999-10-22 2001-05-08 Teraconnect, Inc. Wafer scale integration and remoted subsystems using opto-electronic transceivers
US20040190274A1 (en) * 2003-03-27 2004-09-30 Yoshio Saito Compact low cost plastic MCM to PCB
US7389012B2 (en) * 2003-12-30 2008-06-17 International Business Machines Corporation Electro-optical module comprising flexible connection cable and method of making the same
CN101995616B (en) * 2009-08-19 2012-05-23 中国科学院半导体研究所 Multi-channel optical transceiving module totally made of silicon-based material
CN101995617B (en) * 2009-08-19 2012-07-18 中国科学院半导体研究所 Optical transmission/reception module made of silicon-based materials
WO2011056233A2 (en) * 2009-11-09 2011-05-12 Quantum Electro Opto Systems Sdn. Bhd. High speed communication
CN103814314B (en) * 2011-09-29 2016-10-12 富士通株式会社 Optical module
CN103545302A (en) * 2012-07-11 2014-01-29 北京大学 Three-dimensional integration scheme for infrared focal plane array and digital storage control chip
CN104283613A (en) * 2013-07-05 2015-01-14 深圳市中技源专利城有限公司 Multi-core plastic optical fiber port device and system
CN104730653B (en) * 2013-12-23 2016-08-31 华为技术有限公司 Optical interconnection system and method
CN104320199B (en) * 2014-10-27 2017-05-03 中国科学院半导体研究所 InP-based monolithic integration few-mode optical communication receiver chip
CN104601244B (en) * 2014-12-22 2017-12-26 武汉电信器件有限公司 A kind of 400Gb/s hot plugs High Speeding Optical Transmitter-receiver Circuit
CN108111930B (en) * 2017-12-15 2019-01-29 中国人民解放军国防科技大学 Multi-bare-chip high-order optical switching structure based on high-density memory
EP3811219A4 (en) * 2018-05-17 2022-03-16 Lightmatter, Inc. Optically interfaced stacked memories and related methods and systems
CN111277336B (en) * 2020-01-19 2023-06-27 山东大学 High-speed optical switching module for realizing internal interconnection of data center and operation method thereof
CN111276562B (en) * 2020-02-19 2023-07-25 上海交通大学 Photoelectric monolithic integration system based on lithium niobate-silicon nitride wafer

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102016672A (en) * 2008-05-07 2011-04-13 惠普开发有限公司 Optical engine for point-to-point communications
CN102055584A (en) * 2009-10-28 2011-05-11 中国科学院半导体研究所 Optical-fiber secret communication device and data encryption method thereof
CN105790838A (en) * 2016-03-24 2016-07-20 北京邮电大学 Water-land optical communication network architecture and communication method based on interconnection between underwater visible light communication network units (UVNU) and fiber
CN109617612A (en) * 2018-12-25 2019-04-12 杭州耀芯科技有限公司 Optical signal aligned transmissions device, system and method in free space
CN110012368A (en) * 2019-03-27 2019-07-12 兰州大学 A kind of silicon-based integrated on piece multimode optical switching system of compatible wavelength-division multiplex signals

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