CN114649317A - Radio frequency power package and radio frequency power device - Google Patents

Radio frequency power package and radio frequency power device Download PDF

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Publication number
CN114649317A
CN114649317A CN202111551972.6A CN202111551972A CN114649317A CN 114649317 A CN114649317 A CN 114649317A CN 202111551972 A CN202111551972 A CN 202111551972A CN 114649317 A CN114649317 A CN 114649317A
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China
Prior art keywords
esd
terminal
package
mnt
contact
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Application number
CN202111551972.6A
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Chinese (zh)
Inventor
陶国桥
诸毅
约翰内斯·A·M·德波特
迈克尔·阿塞斯
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Samba Holdco Netherlands BV
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Samba Holdco Netherlands BV
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Publication of CN114649317A publication Critical patent/CN114649317A/en
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    • H01L23/64Impedance arrangements
    • H01L23/66High-frequency adaptations
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    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
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    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433Auxiliary members in containers characterised by their shape, e.g. pistons
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    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49503Lead-frames or other flat leads characterised by the die pad
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    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
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    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
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    • H01L27/0292Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using a specific configuration of the conducting means connecting the protective devices, e.g. ESD buses
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    • H03F1/523Circuit arrangements for protecting such amplifiers for amplifiers using field-effect devices
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    • H03F1/56Modifications of input or output impedances, not otherwise provided for
    • H03F1/565Modifications of input or output impedances, not otherwise provided for using inductive elements
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    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H03F3/195High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only in integrated circuits
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    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
    • H03F3/245Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages with semiconductor devices only
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    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/49113Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
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    • H01L23/047Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body the other leads being parallel to the base
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    • H03F2200/451Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

The invention relates to a Radio Frequency (RF) power package and an RF power device. The RF power device includes the RF power package. More particularly, the present invention relates to an RF power package in which an ESD device is disposed inside a package body or housing. In accordance with the present invention, an ESD device is provided inside the package and is disposed on a terminal of the RF power package. In this way, the ESD sense contacts of the amplification circuitry within the RF power package can be better protected from ESD damage even when the RF power package is in use.

Description

Radio frequency power package and radio frequency power device
Technical Field
The present invention relates to a Radio Frequency (RF) power package and a RF power device. More particularly, the present invention relates to an RF power package in which an electrostatic discharge (ESD) device is disposed inside a package body or housing. The RF power device includes the RF power package.
Background
RF power packages are known in the art. These RF power packages are configured to deliver power at frequencies from 100kHz to 40GHz at levels in the range of 1W and 5 kW. These packages include terminals through which electrical signals are input or output and through which power or ground is provided.
The RF power package is mounted on a Printed Circuit Board (PCB). This plate is part of a larger RF power device. The device includes electrical contacts that are accessible from outside the device. These contacts may be exposed to electrostatic discharge events. As a result of these release events, components of the RF power device, such as the RF power package, may be damaged.
The performance of the device under high electrostatic voltage stress can be determined using a model such as a charged device model or a human body model. Using a human body model, it is possible to simulate electrostatic discharge ESD that occurs when a person touches a device. For example, according to the JEDEC JS-001 standard, a human body can be modeled as a capacitor of 100pF and a discharge resistor of 1500 Ohm. During the test, the capacitor is charged to a discharge voltage, for example 2kV, and is then discharged through a discharge resistor arranged in series with one terminal of the period.
Generally, a device should meet certain ESD requirements related to the discharge voltage level that the device should be able to withstand without failure due to ESD-related damage.
The ESD performance of any device is determined primarily by the electronic circuitry disposed within it. The RF power package includes an amplifying line, such as a field-effect transistor (FET), and a passive line for impedance matching and/or biasing. Each of these components is susceptible to ESD damage.
Recently, gallium nitride (GaN) has emerged as a promising material for implementing RF power amplifying devices. In these devices, a GaN-based power FET is used that includes gate, source and drain contacts. The gate contact is formed from a schottky contact having a small leakage current less than the reverse bias.
The relatively small leakage current, which is less than reverse bias, makes GaN FETs vulnerable to ESD-related damage. For example, if a Human Body Model (HBM) test is conducted by applying a positive voltage at the source or drain contact and grounding the gate contact, only a small portion of the discharge voltage falls on the discharge resistor, while the reverse-biased schottky diode exhibits a high series resistance. As a result, too high a voltage may occur at the source or drain contact, and the GaN FET may break down.
RF power packages are known in the art. An exemplary RF power package includes a package body or housing, and a conductive base at least partially disposed in the package body or housing. The RF power package also includes a semiconductor die mounted on the conductive substrate and disposed in the package body or housing, wherein the semiconductor die includes an amplification circuit having an ESD sense contact for inputting or outputting an electrical signal. The RF power package further includes a plurality of terminals physically separated from the conductive substrate and each including a first terminal surface provided outside the package body or case and a second terminal surface provided inside the package body or case, wherein one of the plurality of terminals constitutes an RF terminal configured to input a signal to be amplified by the amplifying circuit or output a signal amplified by the amplifying circuit. The RF terminal is connected to the ESD sense contact through an RF terminal connection point.
Known RF power packages are configured to be mounted on a PCB. ESD devices are typically disposed on a PCB to provide the required ESD protection. These devices typically include a first ESD contact and a second ESD contact. In an operating device, one of the first ESD contact and the second ESD contact is grounded, while the other of the first ESD contact and the second ESD contact is connected, directly or through other components, to an RF power package requiring ESD protection. The ESD device prevents or limits any ESD pulse associated with the discharge from reaching the ESD sense contact.
The ESD device may include a plurality of diodes, transistors, or silicon controlled rectifiers disposed between the first ESD contact and the second ESD contact. For example, one or more diodes can be arranged such that an anode of the diode is connected to the first ESD contact and a cathode of the diode is connected to the second ESD contact; while one or more other diodes can be configured such that the anode of the diode is connected to the second ESD contact and the cathode of the diode is connected to the first ESD contact. In this way, a low ohmic discharge path can be provided for positive and negative voltages occurring at the terminals to be protected. By providing a low ohmic discharge path, a large portion of the discharge current will flow through the ESD device, thereby protecting the device or component having the ESD sense contact.
Applicants have found that the mounting process of known RF power packages may fail. Applicants have also found that such failures can be attributed to ESD damage that occurs when mounting known RF power packages.
Disclosure of Invention
It is an object of the present invention to provide an RF power package that can be mounted or handled with a risk of ESD damage eliminated or at least reduced.
According to the present invention, this object is achieved by an RF power package as defined in claim 1 and characterized in that the RF power package further comprises an ESD device for protecting the amplifying circuit from damage caused by electrostatic discharge. The ESD device includes a first ESD contact and a second ESD contact. Further, one of the terminals constitutes a mounting MNT terminal on which the ESD device is mounted. The first ESD contact is electrically connected to the ESD sense contact of the amplifying circuit directly by the first ESD connection line or indirectly by at least a portion of the RF terminal connection line, and the second ESD contact is electrically grounded in use.
In accordance with the present invention, an ESD device is provided inside the package and is disposed on a terminal of the RF power package. In this way, the ESD sense contacts of the amplification circuit can be better protected from ESD damage even when the RF power package is installed.
The electrically conductive substrate can be configured to be electrically grounded at least when in use. Additionally or alternatively, one of the terminals may constitute a ground GND terminal, which is electrically grounded in use. This GND terminal is preferably arranged adjacent to the MNT terminal. The second ESD contact of the ESD device may be electrically connected to the GND terminal or to the conductive substrate through the second ESD connection line.
The first ESD connection line may include a common portion shared with the RF terminal connection line, and a separate portion extending between one end of the common portion and the first ESD contact. The impedance at the terminal of the common portion as seen from the ESD device is preferably much larger than the impedance at the terminal of the common portion as seen from the amplification circuit. In this manner, the ESD device does not significantly affect the RF performance of the RF power package. This holds especially for operating frequencies of the RF power package, which are typically in the range of 100kHz and 40GHz, if the impedance is estimated.
The amplification circuit may comprise a field effect transistor, FET, for example, a gallium nitride based FET or a silicon based lateral double diffused metal oxide semiconductor (LDMOS) transistor. In this case, the ESD sense contact of the amplification circuit is electrically connected to, or formed by, the gate or drain of the FET. Additionally or alternatively, the ESD sensing contact of the amplification circuit can be a bond pad or a bond bar electrically connected to the drain or gate of the FET. Further, the RF terminal connection line may include an RF bonding wire, one end of which is bonded to the bonding pad or the bonding bar. The other end of the RF bonding wire may be bonded to the RF terminal. Alternatively, the RF terminal connection line may include an impedance matching network including an RF bond wire. The impedance matching network may comprise a shunt capacitor having a non-grounded terminal and a grounded terminal which is electrically grounded at least in use. In this case, the other end of the RF bonding wire can be bonded to the non-grounded terminal of the shunt capacitor, and the RF terminal connection line may comprise a further RF bonding wire between the non-grounded terminal of the shunt capacitor and the RF terminal. Impedance matching networks are typically used at the input (i.e., gate) of the amplification circuit. However, an impedance matching network may also be used at the output (i.e. drain) of the amplification circuit.
The ESD device may include an ESD semiconductor die with ESD circuitry integrated thereon and including a semiconductor substrate having a back surface via which the ESD semiconductor die is fixedly connected to the second surface of the MNT terminal. The first and second ESD contacts can be disposed on a front surface of the ESD semiconductor die, the front surface being opposite the back surface of the semiconductor substrate. Further, the first ESD bond wire may include a bond wire electrically connecting the RF terminal bond wire to the first ESD contact, and the second ESD bond wire may include a bond wire electrically connecting the second ESD contact to the GND terminal or the conductive substrate. The bond wire of the first ESD bond wire may extend between the RF terminal and the first ESD contact or between the ESD sense contact and the first ESD contact. Further, one terminal among the plurality of terminals may constitute a non-connected (NC) terminal. In this case, the MNT terminal can be a GND terminal, an RF terminal, or an NC terminal. In the context of the present invention, the NC terminals are terminals that are not electrically connected to terminals at the electronic circuitry on the PCB on which the RF power package is mounted. Typically, the voltage at the NC terminal is floating during operation.
Alternatively, the ESD device may comprise an ESD semiconductor die with ESD circuitry integrated thereon, and the ESD semiconductor die comprises a conductive semiconductor substrate having a rear surface via which the ESD semiconductor die is fixedly connected to the second surface of the MNT terminal. In this case, the back surface forms a first ESD contact and the second ESD contact is disposed on a front surface of the ESD semiconductor die, the front surface being opposite the back surface of the semiconductor substrate. The second ESD bond wire may include a bond wire electrically connecting the second ESD contact to the GND terminal or the conductive substrate. Further, the MNT terminal can be an RF terminal. Alternatively, one of the terminals may constitute a non-connection NC terminal. In the latter case, the MNT terminal can be an NC terminal, and the first ESD connection line can include a bond wire electrically connecting the MNT terminal to the RF terminal connection line. In this latter case, the bond wire of the first ESD bond wire may extend between the RF terminal and the MNT terminal or between the ESD sense contact and the MNT terminal.
Alternatively, the ESD device may comprise an ESD semiconductor die with ESD circuitry integrated thereon, and the ESD semiconductor die comprises a conductive semiconductor substrate having a rear surface via which the ESD semiconductor die is fixedly connected to the second surface of the MNT terminal. In this case, the back surface forms the second ESD contact, and the first ESD contact is disposed on a front surface of the ESD semiconductor die, the front surface being opposite the back surface of the semiconductor substrate. The first ESD bond wire may include a bond wire electrically connecting the first ESD contact to the RF terminal bond wire. In this case, the bond wire of the first ESD bond wire may extend between the RF terminal and the first ESD contact or between the ESD sense contact and the first ESD contact. Further, the MNT terminal can be a GND terminal, or one of a plurality of terminals constitutes a non-connected NC terminal. In the latter case, the MNT terminal may be an NC terminal, and the second ESD connection line may include a bonding wire electrically connecting the MNT terminal to the GND terminal or at the conductive substrate.
The conductive base may include a substantially rectangular base portion separated from the MNT terminal in a first direction, and a convex portion integrally connected to the substantially rectangular base portion and extending in the first direction such that one end of the convex portion is arranged to be separated from the MNT terminal in a second direction perpendicular to the first direction. The generally rectangular base may be the same as the rectangular base separate from the generally rectangular base with rounded or chamfered corners. The second ESD bond wire comprises a bond wire connected to the conductive substrate even though the bond wire is connected to a bump of the conductive substrate, and preferably parallel to the second direction. In this embodiment, the shape of the conductive substrate is different from the common rectangular form to allow the ESD device to be grounded. Furthermore, since the bond wires extending from the output (e.g. drain) of the amplifying circuit typically extend in the first direction towards the RF terminal, there is little to no electromagnetic coupling between the bond wires of the second ESD bond wire and these bond wires. Similar considerations apply when using ESD devices to protect the input of an amplification circuit.
The RF power package may be a Flat leadless package such as Quad Flat No-leads (QFN) or Dual Flat No-leads (DFN) packages. In this case, one of the terminals may correspond to a respective land (land) in the flat pinless wind. Alternatively, the RF power package may be a molded leadframe package or a non-molded leadframe package such as a ceramic leadframe package, wherein each of the plurality of terminals corresponds to a respective lead of the molded leadframe package or the non-molded leadframe package.
In the case of a molded leadframe package, the leads are part of the leadframe prior to separating the RF power package from the leadframe. In this case, the electrically conductive substrate is physically and electrically connected to the lead frame by a plurality of separated connection members before the package is separated from the lead frame, and wherein each connection member is divided into a first connection member and a second connection member during the separation of the package from the lead frame, for example, by cutting, punching or pushing, the first connection member still being connected to the electrically conductive substrate, the second connection member still being connected to the lead frame. The RF power package may further include a frame portion connected to and extending from the at least one first connection component portion, wherein the ESD device is mounted on the frame portion. Further, the frame portion may extend between a pair of first connection member portions. More particularly, the frame portion and the first connector portion can be integrally formed. The ESD device may be in a similar configuration as the ESD semiconductor die described above, i.e. the ESD device may have a first ESD contact and a second ESD contact on top of the semiconductor die, or one of these contacts is arranged at the back side of the semiconductor substrate of the ESD semiconductor die.
According to a second aspect, the invention provides an RF power device. The RF power device includes a printed circuit board including a plurality of pads and the RF power package described above. The RF power package is mounted to the printed circuit board such that each terminal of the RF power package is fixedly connected to a respective one of the plurality of pads, for example, by soldering. The printed circuit board may include individual pads or metal blocks (coins) integrated in the printed circuit board that are fixedly connected to the conductive substrate of the RF power package, for example, by soldering.
Drawings
The present invention will now be described in more detail with reference to the drawings, in which like reference numerals are used to refer to the same or similar components. In the drawings:
fig. 1 to 7 show schematic top views of variant embodiments of an RF power package according to the present invention;
FIG. 8 shows a perspective view of a molded package in accordance with the present invention;
FIG. 9 shows a cross-sectional view of the molded package of FIG. 8; and
fig. 10 is an example of an RF power device in accordance with the present invention.
Detailed Description
Fig. 1 shows an embodiment of an RF power package 1A according to the present invention. Package 1A is a DFN type package comprising a conductive substrate in the form of a die pad 10, with a semiconductor die 30 mounted on the die pad 10. The RF power FET is integrated on the semiconductor die 10. Fig. 1 shows only the bond bar 31 connected to the gate of the power FET and the bond bar 32 connected to the drain of the power FET. The source of the power FET is not shown, but this contact is grounded through a via in the semiconductor substrate of the semiconductor die 30 or through a conductive semiconductor substrate. Here, it is to be noted that the RF power FET is grounded by the die pad 10 fixedly mounted on a ground pad on the PCB or a metal block in the PCB when the single RF power package 1A is mounted on the PCB. At the same time, heat dissipation of the RF power FET is also achieved by the die pad 10.
As shown, RF power package 1A includes two additional semiconductor dies. The first semiconductor die 40 is disposed between the input terminal RF1 and the gate bond bar 31. The semiconductor die 40 includes an integrated capacitor, a first terminal of which is connected to the bond bar 41. The second terminal of the capacitor is connected to ground. This can be grounded through vias in the semiconductor die 40 or through the conductive semiconductor substrate of the semiconductor die 40. The grounding is further achieved by the die pad 10 on which the semiconductor die 40 is mounted.
A plurality of bond wires B6 extend between the input terminal RF1 and the non-ground terminal of the capacitor on the semiconductor die 40. The other plurality of bond wires B5 extend between the non-ground terminal of the capacitor and the gate bond bar 31. In this way an impedance matching network of the LC type is realized.
A further semiconductor die 50 is arranged between the semiconductor die 30 and the output terminal RF 2. Also, the die includes a capacitor, one terminal of which is connected to the bond bar 51. The other terminal is grounded in a similar manner as the capacitor on the semiconductor die 40.
A plurality of bond wires B3 extend between the drain bond bar 32 and the output terminal RF 2. These bond wires form RF terminal connections between the drain contact and the output terminal RF 2. More B4 extend between the drain bond bar 32 and the non-ground terminal of the capacitor on the semiconductor die 50. In this way a shunt LC series network is formed connected at the drain bond bar 32.
The RF power FET on semiconductor die 30 includes an output capacitance. For large devices, the output capacitance may have a degrading effect on the RF performance of the FET. To avoid this degradation, the shunt LC network is configured as a shunt inductance that resonates with the output capacitance at the same or near frequency of the operating frequency of the RF power package. The series capacitance of the shunt LC series network prevents the DC path from being grounded.
Fig. 1 shows an additional terminal 20. The ground terminal GND is provided to be grounded when the package 1A is mounted on the PCB. The non-connection terminal NC is not electrically connected to a wiring on the PCB. These terminals may be connected, for example by soldering, to pads on the PCB, but which are not connected to other lines and have a floating or undefined potential in operation.
In fig. 1, an ESD device in the form of an ESD semiconductor die 60 is mounted on the non-connecting terminal NC. The terminal on which the ESD semiconductor die is mounted is also referred to as a mounting terminal MNT. The ESD semiconductor die 60 comprises a first ESD contact in the form of a first bond pad 61 and a second ESD contact in the form of a second bond pad 62. The output terminal RF2 is connected to the first bond pad 61 by a first ESD bond wire in the form of a bond wire B1. The second bond pad 62 is connected to the conductive substrate 10 by a second ESD bond wire in the form of bond wire B2.
In fig. 1, ESD semiconductor die 60 is configured to protect the RF power FET from ESD-related damage caused by electrostatic discharge occurring at output terminal RF2 and reaching the drain contact of the power FET. In this case, the drain of the power FET is considered the ESD sense contact. As shown in fig. 1, the first ESD contact is indirectly electrically connected to the ESD sense contact with a first ESD bond wire through at least a portion of the RF terminal bond wire formed by bond wire B3. The second ESD contact is grounded to the conductive substrate 10 via bond wire B2.
The connection line between the first ESD contact and the ESD sense contact can also be a direct connection line. An example of a connection line is shown in fig. 2. In this case, the semiconductor die 60 has a conductive semiconductor base. The first ESD contact is in the form of a first bond pad 61 disposed on top of the semiconductor die 60, while the second ESD contact is in the form of a conductive metal disposed on the back side of the semiconductor substrate of the semiconductor die 60.
The first ESD bond wire in turn comprises bond wire B1. However, the bond wire B1 now extends indirectly between the drain bond bar 32 and the first bond pad 61. The second ESD contact is grounded through the ground terminal GND.
In fig. 3, ESD semiconductor die 70 is also provided for protecting the RF power FET from ESD related damage caused by electrostatic discharge occurring at input terminal RF1 and reaching the gate contact of the RF power FET. In this case, the gate of the power FET is considered to be the ESD sense contact. Similar to the ESD semiconductor die 60, the ESD semiconductor die 70 includes a first ESD contact in the form of a first bond pad 71 and a second ESD contact in the form of a first bond pad 72. The first bond pad 71 is connected to the input terminal RF1 through a bond wire B7. The second bond pad 72 is grounded through a bond wire B8 connected to the conductive substrate 10.
Fig. 4 to 6 show further embodiments of DFN type RF power packages according to the present invention. The embodiments differ in that: a) whether the ESD semiconductor die comprises a first ESD contact and a second ESD contact on an upper surface of the ESD semiconductor die, or whether one of the contacts is disposed on a back side of a conductive semiconductor substrate of the ESD semiconductor die; and b) the ESD semiconductor die is mounted on the mounting terminal MNT.
Drawing (A) First ESD contact Second ESD contact MNT terminal
4 The top surface The top surface RF2
5 The top surface Back side of the panel GND
6 Back side of the panel The top surface RF2
The skilled person will readily understand that the ESD protection measures shown in fig. 4 to 6 may additionally or alternatively be present at the input to protect the gate of the RF power FET.
Fig. 7 shows an embodiment of an RF power package 1G in which the conductive substrate 10 includes a tab 12 extending away from the substantially rectangular base 11 in a first direction D1. The convex portion 12 and the base portion 11 are integrally connected. In this embodiment, the second ESD bond wire includes a bond wire B2 connecting the second bond pad 62 to the boss 12 for grounding. As shown, the bond wire B2 extends along a second direction D2 perpendicular to the first direction D1. The first ESD contact is implemented at the back side of the conductive semiconductor base of the ESD semiconductor die 60.
In the embodiment of fig. 7, the mutually orthogonal arrangement between these wires minimizes electromagnetic coupling between bond wire B2 and either of bond wires B3 and B4. This electromagnetic coupling can result in loss of the RF signal, thereby reducing the efficiency of the package.
Several embodiments with different configurations of ESD semiconductor die are shown in fig. 1 to 7. The skilled person will readily understand that other embodiments are possible within the context of the present invention. In addition, the molding compound is omitted in fig. 1 to 7. In a flat no-lead package such as a DFN package or a QFN package, the mold compound covers the conductive substrate 10, the terminals 20, and the semiconductor dies 30, 40, 50, 60, 70 in a manner known in the art.
Fig. 8 shows a molded leadframe package 100. This type of packaging is accomplished by first connecting a lead frame comprising a plurality of leads 20 to the conductive heat sink 10 using connecting members projecting from the lead frame. These connection members are riveted to the heat sink 10 by rivets 103. The combination of the leadframe and the heat sink 10 is thus arranged in a mold for applying a molding compound. Once cured, the molding compound provides mutual fixation between the heat sink 10 and the leads 20, which means that the heat sink 10 and the leads 20 remain fixed to each other when the package 100 is separated from the leadframe and the connection members are severed.
Fig. 8 shows the package 100 after separation from the leadframe and without the molding compound. As a result of separating the package 100 from the lead frame, each of the connection members provided at the corners of the heat sink 10 is divided into a first connection member portion 102 that remains connected to the heat sink 10 and a second connection member portion (not shown) that remains connected to the lead frame.
Package 100 includes frame portions 101 on both sides of heat sink 10, frame portions 101 being integrally connected to first connection member portions 102. The frame portion 101 comprises holes 104 for stress relief purposes. A similar hole 105 can be provided in output lead RF2, output lead RF2 being separated from first connector portion 102 and frame portion 101 by a distance 101A.
In package 100, ESD semiconductor die 60 is disposed on top of frame portion 101. To attach the semiconductor die 30 to the heatsink 10, an adhesive is used that is at least partially liquid when attaching the semiconductor die 30. Thus, a portion of the adhesive may flow out to other areas on the heat sink 10. For small size packages, the area between dies adjacently disposed on heatsink 10 should be minimized as much as possible. However, when there is too close proximity between the dies, there is a risk that the adhesive flows from one die to another. Here, this may cause accidental shorting with contacts at the top surface of the die. In fig. 8, because the frame portion 101 is located high relative to the semiconductor die 30, this adhesive poses less risk of causing an accidental short between the first ESD contact of the ESD semiconductor die 60 and ground.
Fig. 8 also shows a large output lead RF2 and a plurality of small input leads 20, one of which is connected directly or indirectly to the RF power FET gate. It should be noted that additional leads may be provided at the input or output.
In fig. 8, the individual die 30 is shown with drain bond bars 32 and input bond pads 31 connected at respective leads. It should be noted that the input bond pads 31 may be connected to the gates of RF power FETs disposed on the semiconductor die 30 either directly or through an impedance matching network. Similarly, additional lines may be provided at the inputs and outputs of die 30 or other dies (not shown) of package 100.
Fig. 9 shows a cross-sectional view of the package 100 of fig. 8 along line C-C. As shown, package 100 is provided with lid 108, lid 108 including lid base 108A and lid sidewalls 108B extending from lid base 108A. The applied molding compound forms a package body 110, and package body 110 includes a lower portion 110B, which secures leads 20, RF1, RF2, and heat sink 10 to one another, and an upper portion 110A. Leads 20, RF1, RF2 extend through package body 110. Inside the package, the bond wires are bonded to the exposed surfaces of the leads 20, RF1, RF 2.
An adhesive 111 is disposed between the upper portion 110A and the cover sidewall 108B for fixedly attaching the cover 108 to the package body 110. In this way, an air cavity 109 is formed inside the package 100. This type of package is thus known as an air cavity molded package. It should be noted that the lid 108 may be implemented by using the same molding compound as the package body 110.
In other embodiments, the cover 108 is formed while providing a molding compound for implementing the package body 110. In these packages, no air cavity is present and all necessary electrical connections need to be made between the application of the molding compound. Air cavity molded packages provide superior RF performance compared to these fully molded packages because there is no loss of molding compound that would otherwise surround electronic components such as bond wires.
Fig. 10 shows an example of an RF power device 200 according to the present invention. Device 200 includes an RF power package, such as package 1A of fig. 1, mounted on PCB 201. PCB 201 is typically a multi-layer board that allows for metal lines on multiple different layers.
The PCB 201 includes pads 202A, 202B on which the leads 20 and the conductive base 10 are fixedly mounted by soldering. As shown, leads RF1 and RF2 are connected to metal lines 203 (only partially shown) on PCB 201. Non-connecting leads NC are connected to pads 202A, but these pads are not further connected to the electronics on PCB 201. The ground lead GND is connected to the ground layer of the PCB 201 through the via 204.
It should be clear to the skilled person that the RF power device 200 may have more configurations, for example for accommodating different types of packages, such as the molded packages in fig. 8 and 9.
In the foregoing, the present invention has been explained by means of detailed embodiments thereof. It should be noted, however, that various modifications are possible without departing from the scope of the invention as defined by the appended claims. For example, ESD protection in the form described above may also be provided to protect other line contacts within the package, rather than protect against damage caused by discharges reaching the gate or drain of the RF power FET. Also, in these embodiments, the ESD semiconductor die may be disposed on the terminals. Similarly, applicants have appreciated that the inventive concepts described above may also be used with other types of packages, other than RF power packages, but still having a package body or housing, a conductive base, a plurality of terminals, and a semiconductor die mounted on the conductive base. An example of such a package may be an electronic package in which a semiconductor die includes electronic circuitry having one or more ESD sensing contacts.

Claims (17)

1. A Radio Frequency (RF) power package (1A-1G; 100) comprising:
a package body (110) or housing;
an electrically conductive substrate (10) arranged at least partially in the package body or housing;
a semiconductor die (30) mounted on the conductive substrate and arranged in the package body or housing, the semiconductor die including an amplification circuit having an electrostatic discharge (ESD) sense contact for inputting or inputting an electrical signal;
a plurality of terminals (20) physically separated from the electrically conductive substrate and each comprising a first terminal surface provided outside the package body or housing and a second terminal surface provided inside the package body or housing, wherein one of the terminals constitutes an RF terminal (RF1, RF2) configured for inputting a signal to be amplified by the amplification circuit or outputting a signal amplified by the amplification circuit, the RF terminal being electrically connected to the ESD sense contact by an RF terminal connection line;
characterized in that the RF power package further comprises an ESD device (60) for protecting the amplifying circuit from damage caused by electrostatic discharge, wherein the ESD device comprises a first ESD contact (61) and a second ESD contact (62), wherein one of the terminals constitutes a mounting MNT terminal (MNT) on which the ESD device is mounted;
wherein the MNT terminal is the RF terminal and wherein one of the terminals constitutes a ground, GND, terminal (GND), i.e. an electrical ground in use, wherein the GND terminal is arranged adjacent the MNT terminal and wherein the second ESD contact is electrically grounded at least in use by a bond wire extending between the second ESD contact and the GND terminal, and wherein the first ESD contact is electrically connected to the ESD sensing contact with a first ESD bond wire at least through a portion of the RF terminal bond wire; or
Wherein the MNT terminal is a terminal adjacent the RF terminal, wherein the first ESD contact is electrically connected to the ESD sense contact with a first ESD bond wire through at least a portion of the RF terminal bond wire and a bond wire electrically connecting the first ESD contact and the RF terminal, and wherein the second ESD contact is electrically grounded at least in use.
2. The RF power package of claim 1, wherein the amplifying circuit comprises a field effect transistor, FET, such as a gallium nitride-based FET or a silicon-based lateral double-diffused metal oxide semiconductor, LDMOS, transistor.
3. The RF power package of claim 2, wherein the ESD sense contact of the amplification circuit is electrically connected to or formed by a gate or drain of the FET.
4. The RF power package of claim 2 or 3, wherein the ESD sense contact of the amplifying circuit is a bond pad or a bond bar electrically connected at the gate or drain of the FET, and wherein the RF terminal connection line comprises an RF bond wire having one end bonded to the bond pad or bond bar.
5. The RF power package of claim 4, wherein the other end of the RF bond wire is bonded to the RF terminal.
6. The RF power package of claim 4, wherein the RF terminal connection line includes an impedance matching network including the RF bond wire, the impedance matching network including a shunt capacitor having a non-ground terminal and a ground terminal, the ground terminal configured to be electrically grounded at least in use;
wherein the other end of the RF bond wire is bonded to the non-grounded terminal of the shunt capacitor, the RF terminal connection line comprising a further RF bond wire between the non-grounded terminal and the RF terminal of the shunt capacitor.
7. The RF power package of any of claims 1 to 6, wherein the MNT terminal is a GND terminal, or wherein the MNT is a terminal of the plurality of terminals constituting a non-connected NC terminal; wherein the ESD device comprises an ESD semiconductor die having ESD lines integrated thereon and comprising a semiconductor substrate having a back surface via which the ESD semiconductor die is fixedly connected to the second surface of the MNT terminal, the first and second ESD contacts being arranged at a front surface of the ESD semiconductor die, the front surface being opposite to the back surface of the semiconductor substrate.
8. The RF power package of any one of claims 1 to 6, wherein the MNT terminal is the RF terminal, wherein the ESD device includes an ESD semiconductor die having ESD circuitry integrated thereon and including a semiconductor substrate having a rear surface via which the ESD semiconductor die is fixedly connected to the second surface of the MNT terminal, the first and second ESD contacts being disposed at a front surface of the ESD semiconductor die opposite the rear surface of the semiconductor substrate, wherein the first ESD bond wire includes a bond wire extending between the first ESD contact and the RF terminal.
9. The RF power package of any one of claims 1 to 6, wherein the MNT terminal is the RF terminal, wherein the ESD device includes an ESD semiconductor die with ESD circuitry integrated thereon and including a conductive semiconductor substrate having a rear surface via which the ESD semiconductor die is fixedly connected to the second surface of the MNT terminal, the rear surface forming the first ESD contact, and the second ESD contact being disposed on a front surface of the ESD semiconductor die, the front surface being opposite the rear surface of the semiconductor substrate.
10. The RF power package of any one of claims 1 to 6, wherein the MNT terminal is one of the plurality of terminals that constitutes a non-connected NC terminal, wherein the ESD device includes an ESD semiconductor die having ESD circuitry integrated thereon and comprising a conductive semiconductor substrate having a rear surface via which the ESD semiconductor die is fixedly connected to the second surface of the MNT terminal, the rear surface forming the first ESD contact, and the second ESD contact being disposed on a front surface of the ESD semiconductor die, the front surface being opposite the rear surface of the semiconductor substrate.
11. The RF power package of any one of claims 1 to 6, wherein the MNT terminal is the terminal adjacent the RF terminal, wherein the ESD device includes an ESD semiconductor die having ESD circuitry integrated thereon and including a conductive semiconductor substrate having a rear surface via which the ESD semiconductor die is fixedly connected to the second surface of the MNT terminal, the rear surface forming the second ESD contact, and the first ESD contact is disposed on a front surface of the ESD semiconductor die, the front surface being opposite the rear surface of the semiconductor substrate.
12. The RF power package of claim 11, wherein the MNT terminal is a GND terminal;
or wherein one of the plurality of terminals constitutes a non-connected NC terminal, the MNT terminal is an NC terminal, and wherein the ESD connection line comprises a bonding wire electrically connecting the MNT terminal to a GND terminal or at the conductive substrate.
13. The RF power package of any one of claims 1 to 12, wherein the conductive base comprises a substantially rectangular base portion separated from the MNT in a first direction (D1) and a protrusion integrally connected to the substantially rectangular base portion and extending in the first direction such that one end of the protrusion is arranged separated from the MNT terminal in a second direction (D2) perpendicular to the first direction, wherein the second ESD connection line comprises a bond wire connected to the conductive base even at the protrusion of the conductive base and preferably extending parallel to the second direction.
14. The RF power package of any one of claims 1 to 13, wherein the RF power package is a flat no-lead package such as a QFN or DNF package, and wherein each of the plurality of terminals corresponds to a respective pad of the flat no-lead package.
15. The RF power package of any one of claims 1 to 14, wherein the RF power package is a molded leadframe package or a non-molded leadframe package such as a ceramic leadframe package, wherein each of the plurality of terminals corresponds to a respective lead of the molded leadframe package or the non-molded leadframe package.
16. An RF power device comprising:
a printed circuit board including a plurality of pads; and
the RF power package of any preceding claim;
wherein the RF power package is mounted on the printed circuit board such that each terminal of the RF power package is fixedly connected to a respective pad of the plurality of pads.
17. The RF power device of claim 16 wherein the printed circuit board includes a separate pad or metal block integrated therein that is fixedly connected to the conductive base of the RF power package.
CN202111551972.6A 2020-12-17 2021-12-17 Radio frequency power package and radio frequency power device Pending CN114649317A (en)

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