CN114613741B - Conductive structure and manufacturing method thereof - Google Patents
Conductive structure and manufacturing method thereof Download PDFInfo
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- CN114613741B CN114613741B CN202210202906.6A CN202210202906A CN114613741B CN 114613741 B CN114613741 B CN 114613741B CN 202210202906 A CN202210202906 A CN 202210202906A CN 114613741 B CN114613741 B CN 114613741B
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- 238000004519 manufacturing process Methods 0.000 title claims description 30
- 239000000758 substrate Substances 0.000 claims abstract description 63
- 238000004891 communication Methods 0.000 claims abstract description 10
- 238000000034 method Methods 0.000 claims description 60
- 230000003667 anti-reflective effect Effects 0.000 claims description 51
- 239000011810 insulating material Substances 0.000 claims description 30
- 239000000463 material Substances 0.000 claims description 23
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 8
- 239000004642 Polyimide Substances 0.000 claims description 7
- 238000000059 patterning Methods 0.000 claims description 7
- 229920001721 polyimide Polymers 0.000 claims description 7
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 5
- 229920000089 Cyclic olefin copolymer Polymers 0.000 claims description 5
- 239000002033 PVDF binder Substances 0.000 claims description 5
- 229910052799 carbon Inorganic materials 0.000 claims description 5
- 238000004140 cleaning Methods 0.000 claims description 5
- 229910052802 copper Inorganic materials 0.000 claims description 5
- 239000010949 copper Substances 0.000 claims description 5
- 229920000139 polyethylene terephthalate Polymers 0.000 claims description 5
- 239000005020 polyethylene terephthalate Substances 0.000 claims description 5
- 229920002981 polyvinylidene fluoride Polymers 0.000 claims description 5
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 4
- 229910052759 nickel Inorganic materials 0.000 claims description 4
- -1 polyethylene terephthalate Polymers 0.000 claims description 4
- 229910052709 silver Inorganic materials 0.000 claims description 4
- 239000004332 silver Substances 0.000 claims description 4
- 239000007787 solid Substances 0.000 claims description 4
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 3
- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 claims description 3
- 239000005751 Copper oxide Substances 0.000 claims description 3
- 229910052804 chromium Inorganic materials 0.000 claims description 3
- 239000011651 chromium Substances 0.000 claims description 3
- 229910000431 copper oxide Inorganic materials 0.000 claims description 3
- 230000003287 optical effect Effects 0.000 claims description 3
- 230000000149 penetrating effect Effects 0.000 claims description 2
- 239000010410 layer Substances 0.000 abstract description 147
- 229910052751 metal Inorganic materials 0.000 abstract description 14
- 239000002184 metal Substances 0.000 abstract description 14
- 239000011229 interlayer Substances 0.000 abstract description 6
- 238000003475 lamination Methods 0.000 abstract description 6
- 230000000694 effects Effects 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 12
- MYWUZJCMWCOHBA-VIFPVBQESA-N methamphetamine Chemical compound CN[C@@H](C)CC1=CC=CC=C1 MYWUZJCMWCOHBA-VIFPVBQESA-N 0.000 description 9
- 238000005553 drilling Methods 0.000 description 6
- 239000011248 coating agent Substances 0.000 description 5
- 238000000576 coating method Methods 0.000 description 5
- 238000009713 electroplating Methods 0.000 description 5
- 238000007747 plating Methods 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- 238000007650 screen-printing Methods 0.000 description 3
- 239000004033 plastic Substances 0.000 description 2
- 229920003023 plastic Polymers 0.000 description 2
- 238000007790 scraping Methods 0.000 description 2
- 230000000007 visual effect Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 150000001721 carbon Chemical class 0.000 description 1
- 239000003054 catalyst Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000013071 indirect material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 239000012811 non-conductive material Substances 0.000 description 1
- 239000000615 nonconductor Substances 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 230000008719 thickening Effects 0.000 description 1
- 239000012780 transparent material Substances 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
Abstract
A conductive structure comprises a substrate, two anti-reflection layers, two conductive dry films, conductive connecting columns and two blackening layers. The two anti-reflection layers are respectively arranged on two opposite surfaces of the substrate, and a part of each of the two opposite surfaces is exposed. The two conductive dry films are respectively arranged on one side of the two anti-reflection layers away from the substrate. The conductive communication column penetrates through the substrate and is provided with two ends which extend to the two conductive dry films respectively. The two blackening layers respectively cover the two conductive dry films, wherein each of the two conductive dry films is covered by the corresponding anti-reflection layer and the corresponding blackening layer. By the conductive structure, the effects of metal fine circuit, no reflected light and no interlayer lamination scratch can be achieved.
Description
Technical Field
The present disclosure relates to a conductive structure and a method for manufacturing the same, and more particularly, to a via landing structure for a transparent display and a method for manufacturing the same.
Background
The current transparent display via overlap structure mostly uses the production flow of drilling, chemical plating and electroplating via filling matching patterning process. The transparent display is mainly required to be a double-sided conductive layer, and the surface metal copper layer is thickened to reduce metal resistance, and the front and back double-sided conductive layers (such as metal layers) are electrically connected through the through holes by a through hole chemical plating process so as to be conducted.
Because the current transparent display is generally a double-sided conductive layer, the conductive layer (such as a metal copper layer) is thickened by an electroplating process to reduce metal resistance, and the through hole is electrically connected with the front and back metal layers by a chemical plating process. However, in order to achieve the thickening requirement of the metal layer, two electroplating processes are commonly used in the industry, and a metal film with good conductivity needs to be sputtered on the bottom layer before electroplating as a conductive catalyst, so that the bottom layer metal has the problem of visual reflection. In addition, the conventional through hole overlapping structure of the transparent display mostly uses a process of drilling and then chemical plating, the process is complicated, and the lamination drilling technology is used in drilling, so that interlayer friction is indirectly caused and scratch risk is caused, and the quality of the transparent display is further affected.
Therefore, how to provide a conductive structure capable of solving the above problems is one of the problems in the industry to be solved by the research and development resources.
Disclosure of Invention
Accordingly, an objective of the present disclosure is to provide a conductive structure that can solve the above-mentioned problems.
In order to achieve the above objective, according to one embodiment of the present disclosure, a conductive structure includes a substrate, two anti-reflective layers, two conductive dry films, conductive via posts, and two blackened layers. The two anti-reflection layers are respectively arranged on two opposite surfaces of the substrate, and a part of each of the two opposite surfaces is exposed. The two conductive dry films are respectively arranged on one side of the two anti-reflection layers away from the substrate. The conductive communication column penetrates through the substrate and is provided with two ends which extend to the two conductive dry films respectively. The two blackening layers respectively cover the two conductive dry films, wherein each of the two conductive dry films is covered by the corresponding anti-reflection layer and the corresponding blackening layer.
In one or more embodiments of the present disclosure, the material of the substrate includes polyethylene terephthalate (PET), cyclic Olefin Polymer (COP), transparent polyimide (CPI), polyimide (PI), and polyvinylidene fluoride (PVDF).
In one or more embodiments of the present disclosure, the two anti-reflective layers partially overlap in one direction.
In one or more embodiments of the present disclosure, the optical density of the two anti-reflective layers is greater than 4.
In one or more embodiments of the present disclosure, the materials of the two anti-reflective layers include ink, carbon, copper oxide, chromium, and black nickel.
In one or more embodiments of the present disclosure, the two conductive dry films are partially overlapped in one direction.
In one or more embodiments of the present disclosure, the two conductive dry films completely cover the conductive via.
In one or more embodiments of the present disclosure, the thickness of the two conductive dry films is greater than 10 μm.
In one or more embodiments of the present disclosure, the conductive via is a solid filled structure.
In one or more embodiments of the present disclosure, the conductive via penetrates through the two anti-reflective layers.
In one or more embodiments of the present disclosure, the material of the conductive via includes silver, copper, and carbon.
In one or more embodiments of the present disclosure, a surface of each conductive dry film facing the substrate is covered by a corresponding anti-reflective layer, and the remaining surface of each conductive dry film is covered by a corresponding darkening layer.
According to one embodiment of the present disclosure, a method for manufacturing a conductive structure includes: respectively forming two anti-reflection layers on two opposite surfaces of the substrate; respectively forming two dummy insulating material layers on the two anti-reflection layers; forming a through hole penetrating through the two dummy insulating material layers, the substrate and the two anti-reflection layers; removing the two dummy insulating material layers; forming a conductive communication column in the through hole, wherein the conductive communication column is completely filled in the through hole; respectively forming two conductive dry films on the two anti-reflection layers to completely cover the conductive communication columns; patterning the two conductive dry films; two blackening layers are respectively formed to cover the two conductive dry films.
In one or more embodiments of the present disclosure, the method further includes baking to cure the two anti-reflective layers after the step of removing the two dummy insulating material layers.
In one or more embodiments of the present disclosure, the method for manufacturing a conductive structure further includes baking to cure the two conductive dry films after the step of patterning the two conductive dry films.
In one or more embodiments of the present disclosure, the method for manufacturing a conductive structure further includes removing a portion of each of the two anti-reflective layers before the step of forming two blackened layers to encapsulate the two conductive dry films.
In one or more embodiments of the present disclosure, conductive via posts are formed in the through holes such that two ends of the conductive via posts respectively pass through the two anti-reflective layers.
In one or more embodiments of the present disclosure, the method further includes cleaning the substrate before the step of forming the two anti-reflective layers.
In summary, in the conductive structure and the method for manufacturing the same of the present disclosure, since the insulating layer is formed on the anti-reflective layer to protect the anti-reflective layer, the risk of scraping the interlayer stack during the formation of the via hole and the risk of forming the conductive via in the via hole can be avoided. In the conductive structure and the manufacturing method thereof, the conductive dry film is formed on the anti-reflection layer and the blackening layer is formed on the surface of the conductive dry film, so that the requirements of fine circuit, no reflection light on four sides, conductive through holes and no interlayer lamination scratch are simultaneously achieved under the condition of no new manufacturing process.
The above description is merely illustrative of the problems, means for solving the problems, and efficacy of the products produced by the present disclosure, and the details of this disclosure are set forth in the following description and related drawings.
Drawings
The foregoing and other objects, features, advantages and embodiments of the present disclosure will be apparent from the following description in which:
FIG. 1 is a flow chart illustrating a method of fabricating a conductive structure according to one embodiment of the present disclosure.
Fig. 2 is a schematic diagram illustrating an intermediate stage of fabricating a conductive structure according to one embodiment of the present disclosure.
Fig. 3 is a schematic diagram illustrating an intermediate stage of fabricating a conductive structure according to one embodiment of the present disclosure.
Fig. 4 is a schematic diagram illustrating an intermediate stage of fabricating a conductive structure according to one embodiment of the present disclosure.
Fig. 5 is a schematic diagram illustrating an intermediate stage of fabricating a conductive structure according to one embodiment of the present disclosure.
Fig. 6 is a schematic diagram illustrating an intermediate stage of fabricating a conductive structure according to one embodiment of the present disclosure.
Fig. 7 is a schematic diagram illustrating an intermediate stage of fabricating a conductive structure according to one embodiment of the present disclosure.
Fig. 8 is a schematic diagram illustrating an intermediate stage of fabricating a conductive structure according to one embodiment of the present disclosure.
Fig. 9 is a schematic diagram illustrating an intermediate stage of fabricating a conductive structure according to one embodiment of the present disclosure.
Fig. 10 is a schematic diagram illustrating an intermediate stage of fabricating a conductive structure according to one embodiment of the present disclosure.
Fig. 11 is a schematic diagram illustrating an intermediate stage of fabricating a conductive structure according to an embodiment of the present disclosure.
Fig. 12 is a schematic diagram illustrating an intermediate stage of fabricating a conductive structure according to one embodiment of the present disclosure.
FIG. 13 is a schematic diagram of a conductive structure according to one embodiment of the present disclosure.
Reference numerals:
100 conductive structure 110 substrate
120 antireflective layer 130 dummy insulating material layer
140 conductive connecting column 150 conductive dry film
160 blackening layer B baking device
E exposure device M mask
METH manufacturing methods S11, S12, S13, S14, S15, S16, S17, S18, S19 step
V: through hole
Detailed Description
In the following description, numerous practical details are set forth in order to provide a thorough understanding of the embodiments of the present disclosure. However, it should be understood that these practical details are not to be used to limit the present disclosure. That is, in some embodiments of the present disclosure, these practical details are not necessary. Moreover, for the purpose of simplifying the drawings, some conventional structures and elements are shown in the drawings in a simplified schematic manner. The same reference numbers will be used throughout the drawings to refer to the same or like elements.
The structure, function and connection relationship of each element included in the conductive structure of the present disclosure will be described in detail, and the method for manufacturing the conductive structure of the present disclosure will be described in detail.
Fig. 1 is a flow chart of a manufacturing method METH for manufacturing a conductive structure 100 according to one or more embodiments of the present disclosure. As shown in fig. 1, the manufacturing method METH includes steps S11 to S19. By performing the manufacturing method METH, the manufacturer can manufacture the conductive structure 100 as shown in fig. 13. In the following description of steps S11 to S19, please refer to fig. 2 to 13 simultaneously to obtain the best understanding of the present disclosure.
Step S11: two anti-reflective layers 120 are formed on opposite surfaces of the substrate 110, respectively.
First, please refer to fig. 2. Fig. 2 provides a substrate 110. In the present embodiment, the substrate 110 serves as a non-conductor. The substrate 110 has metal lines distributed on the upper and lower surfaces in fig. 2, and the metal lines are used for transmitting signals associated with the image. In some embodiments, the material of the substrate 110 may include polyethylene terephthalate (PET), cyclic Olefin Polymer (COP), transparent polyimide (CPI), polyimide (PI), polyvinylidene fluoride (PVDF), or any suitable material. Thus, in some embodiments, the substrate 110 may be a transparent material. Alternatively, in some embodiments, the substrate 110 may be a translucent material. The present disclosure is not intended to be limited with respect to the material of the substrate 110.
Next, please refer to fig. 3. As shown in fig. 3, two anti-reflection layers 120 are formed on opposite surfaces of the substrate 110. In more detail, the two anti-reflection layers 120 are formed on the upper and lower surfaces of the substrate 110, respectively, such that the substrate 110 is located between the two anti-reflection layers 120.
In some embodiments, the two anti-reflective layers 120 may be formed by attaching, coating, screen printing, or any suitable method. The present disclosure is not intended to be limited with respect to the method of forming two anti-reflective layers 120 on opposite surfaces of the substrate 110.
In some embodiments, the material of the two anti-reflective layers 120 may comprise ink, carbon derivatives, copper oxide, chromium, nickel, black nickel, or any suitable material. Thus, in some embodiments, the anti-reflective layer 120 may be a conductive material. Alternatively, in some embodiments, the anti-reflective layer 120 may be a non-conductive material. The present disclosure is not intended to be limited with respect to the material of the anti-reflective layer 120.
In some embodiments, the optical density of the two anti-reflective layers 120 is greater than about 4 after they are formed on opposite surfaces of the substrate 110.
In some embodiments, the anti-reflective layer 120 has a reflectance of less than about 70% in the full range of visible light after being formed on the opposite surfaces of the substrate 110.
In some embodiments, the method of manufacturing METH may further comprise a cleaning process. The cleaning system Cheng Yongyi cleans the substrate 110. In some embodiments, the cleaning process may be performed before step S11, so that two anti-reflection layers 120 may be formed on opposite surfaces of the substrate 110 with better quality.
Step S12: two layers 130 of dummy insulating material are formed over the two anti-reflective layers 120, respectively.
Please refer to fig. 4. As shown in fig. 4, two layers of dummy insulating material 130 are formed on the two anti-reflective layers 120. In more detail, two dummy insulating material layers 130 are respectively formed on the upper and lower surfaces of the two anti-reflection layers 120 such that each anti-reflection layer 120 is located between each dummy insulating material layer 130 and the substrate 110. In the present embodiment, the two dummy insulating material layers 130 are used to protect the surfaces of the two anti-reflection layers 120, and are configured to avoid the problem of scratch between the lamination layers in the subsequent process (e.g. drilling process). In this embodiment, the dummy insulating material layer 130 acts as an indirect material rather than a permanent material, i.e., the dummy insulating material layer 130 is removed during the fabrication of the conductive structure 100 without remaining in the conductive structure 100.
In some embodiments, the two layers of dummy insulating material 130 may be formed by attaching, coating, screen printing, or any suitable method. The present disclosure is not intended to be limited with respect to the method of forming the two layers of dummy insulating material 130 over the two anti-reflective layers 120.
In some embodiments, the two layers of dummy insulating material 130 may be plastic protective films, peelable plastic materials, or any suitable material. The present disclosure is not intended to be limited with respect to the material of the dummy insulating material layer 130.
Step S13: the via V is formed through the two dummy insulating material layers 130, the substrate 110 and the two anti-reflective layers 120.
Please refer to fig. 5. As shown in fig. 5, in the present embodiment, the via hole V is formed in an intermediate structure composed of the substrate 110, the anti-reflection layer 120, and the dummy insulating material layer 130. In more detail, the via V passes through the substrate 110, the two anti-reflection layers 120 and the two dummy insulating material layers 130.
In some embodiments, the via V may be formed by drilling or any suitable method. The present disclosure is not intended to be limited with respect to the method of forming the via V through the two layers of dummy insulating material 130, the substrate 110, and the two anti-reflective layers 120.
Step S14: the conductive via 140 is formed in the via V, and the conductive via 140 completely fills the via V.
Please refer to fig. 6. As shown in fig. 6, in the present embodiment, the conductive via 140 fills the via V, and the conductive via 140 penetrates the substrate 110, the two anti-reflection layers 120, and the two dummy insulating material layers 130. As shown in fig. 6, the conductive via 140 has both ends protruding from the two dummy insulating material layers 130 toward the upper and lower sides in the drawing plane.
In some embodiments, as shown in fig. 6, the conductive communication post 140 is a solid filled structure. The conductive via 140 is filled with the via V to achieve the effect of reducing the resistance.
In some embodiments, the material of the conductive via 140 may comprise silver, copper, carbon, or any suitable material. The present disclosure is not intended to be limited with respect to the material of the conductive via 140.
Step S15: the two layers of dummy insulating material 130 are removed.
Please refer to fig. 7. As shown in fig. 7, after step S16 is completed to realize that the conductive via 140 fills the via V, the two dummy insulating material layers 130 are removed so that the conductive via 140 penetrates the substrate 110 and the two anti-reflective layers 120. The conductive via 140 has both ends protruding from the two anti-reflection layers 120 toward the upper and lower sides in the drawing.
In some embodiments, the two layers of dummy insulating material 130 may be removed by stripping, scraping, tearing, or any suitable method. The present disclosure is not intended to be limited with respect to the method of removing the dummy insulating material layer 130 from the surfaces of the two anti-reflection layers 120.
Next, please continue to refer to fig. 7. In some embodiments, as shown in fig. 7, the manufacturing method METH may further include a baking process. The baking process is used to cure the two anti-reflective layers 120. As shown in fig. 7, the intermediate structure composed of the substrate 110, the two anti-reflection layers 120 and the conductive via 140 may be baked by the baking device B, so that at least two anti-reflection layers 120 may be cured. In some embodiments, the baking process may be performed after step S15, so that a subsequent process (e.g., a molding process) is performed on the surfaces of the two anti-reflective layers 120.
Step S16: two conductive dry films 150 are formed on the two anti-reflective layers 120, respectively.
Please refer to fig. 8. As shown in fig. 8, two conductive dry films 150 are respectively formed on the two anti-reflection layers 120. In the present embodiment, two conductive dry films 150 are disposed on the sides of the two anti-reflective layers 120 away from the substrate 110, respectively. In more detail, two conductive dry films 150 are respectively formed on the upper and lower surfaces of the two anti-reflection layers 120 such that each anti-reflection layer 120 is located between each conductive dry film 150 and the substrate 110. As shown in fig. 8, two conductive dry films 150 are formed on the two anti-reflective layers 120 to completely cover the conductive via 140, such that the two conductive dry films 150 can be electrically connected through the conductive via 140, and such that signals of metal lines distributed on the upper and lower surfaces of the substrate 110 can be connected to each other through the conductive via 140.
In some embodiments. The two conductive dry films 150 may be formed by film pressing, coating, or any suitable method. The present disclosure is not intended to be limited with respect to a method of forming two conductive dry films 150 on two anti-reflection layers 120, respectively.
In some embodiments, the material of the two conductive dry films 150 may include a photosensitive silver film or any suitable material. The present disclosure is not intended to be limited with respect to the materials of the two conductive dry films 150.
In some embodiments of the present invention, in some embodiments, the thickness of the two conductive dry films 150 is greater than about 10 micrometers. The sufficiently thick two conductive dry films 150 provide low resistance to metal lines distributed on the surface of the substrate 110.
Step S17: two conductive dry films 150 are patterned.
Please refer to fig. 9. As shown in fig. 9, in the present embodiment, the patterning process is performed by the exposure device E on the two conductive dry films 150. As shown in the figure 9 of the drawings, two masks M may be respectively disposed between the exposure device E and the two conductive dry films 150. The mask M is distributed with a pattern composed of a plurality of solid parts and hollow parts, so that the exposure device E can form a pattern on the two conductive dry films 150 when the exposure process is performed on the two conductive dry films 150.
In some embodiments, the exposure apparatus E may be an Extreme Ultraviolet (EUV) exposure machine or any suitable apparatus. The present disclosure is not intended to be limited with respect to the apparatus and method for patterning the two conductive dry films 150.
In some embodiments, the mask M may include, but is not limited to, a photomask (photomask).
Next, please refer to fig. 10. As shown in fig. 10, after the exposure process of the two conductive dry films 150 by the exposure device E and the mask M, a developing process is performed. The developing process removes one portion of each of the two conductive dry films 150. In more detail, as shown in fig. 10, two conductive dry films 150 are removed at each portion so that two anti-reflection layers 120 are exposed at each portion. For example, the conductive dry film 150 located above the substrate 110 is removed at a right portion thereof, and the conductive dry film 150 located below the substrate 110 is removed at a left portion thereof, such that the two conductive dry films 150 partially overlap in one direction (e.g., in an up-down direction in fig. 10). By performing the developing process, the conductive via 140 is still completely covered by the two conductive dry films 150.
Next, please refer to fig. 11. As shown in fig. 11, the manufacturing method METH may further include a baking process. The baking process is used to cure the two conductive dry films 150. As shown in fig. 11, the intermediate structure composed of the substrate 110, the two anti-reflective layers 120, the conductive via 140 and the two conductive dry films 150 may be baked by the baking device B, so that at least two conductive dry films 150 and a portion of the two anti-reflective layers 120 exposed may be cured. In some embodiments, the baking process may be performed after step S17, so as to facilitate the subsequent processes (e.g., microetching process and blackening process).
Step S18: one portion of each of the two anti-reflection layers 120 is removed.
Please refer to fig. 12. As shown in fig. 12, in the present embodiment, each of the exposed portions of the two anti-reflection layers 120 is removed, so that a portion of each of the opposite surfaces of the substrate 110 is exposed. For example, the anti-reflection layer 120 on the substrate 110 is removed at a right portion thereof, and the anti-reflection layer 120 under the substrate 110 is removed at a left portion thereof, such that the two anti-reflection layers 120 partially overlap in one direction (e.g., in an up-down direction in fig. 10). By performing the microetching process, the conductive via 140 is still completely covered by the two conductive dry films 150, and a portion of each of the opposite surfaces of the substrate 110 is exposed.
In some embodiments, the two anti-reflective layers 120 may be removed at each location by a microetching process or any suitable process. The present disclosure is not intended to be limited with respect to the method of removing a portion of each of the two anti-reflective layers 120.
Step S19: two blackening layers 160 are respectively formed to cover the two conductive dry films 150.
Please refer to fig. 13. As shown in fig. 13, the two conductive dry films 150 are respectively covered with two blackening layers 160. In more detail, the surface of each conductive dry film 150 facing the substrate 110 is covered by the corresponding anti-reflection layer 120, and the remaining surface of each conductive dry film 150 is covered by the corresponding blacking layer 160, as shown in fig. 13. By forming two blackening layers 160 to cover the two conductive dry films 150, the effect of avoiding the problem of visual reflection can be achieved.
In some embodiments, as shown in FIG. 13, two blackened layers 160 are each coated with two conductive dry films 150 three-sided in one direction (e.g., in-out direction). The two conductive dry films 150 are covered one by one in a direction (e.g., in-out direction) by the corresponding anti-reflection layer 120, so that the two conductive dry films 150 can be four-sided coated in a direction (e.g., in-out direction).
In some embodiments, the two blackened layers 160 may be formed by electroless plating, electroplating, coating, screen printing, spray printing, or any suitable method. The present disclosure is not intended to be limited with respect to the method of coating the two conductive dry films 150 by forming the two blackening layers 160, respectively.
By performing the steps S11 to S19 of the manufacturing method METH, the manufacturer can manufacture the conductive structure 100. As shown in fig. 13, the conductive structure 100 manufactured by performing the manufacturing method METH includes a substrate 110, two anti-reflection layers 120, conductive via 140, two conductive dry films 150, and two blacking layers 160. The two anti-reflection layers 120 are respectively disposed on two opposite surfaces of the substrate 110, and a portion of each of the two opposite surfaces is exposed. The two conductive dry films 150 are disposed on the sides of the two anti-reflective layers 120 away from the substrate 110, respectively. The conductive via 140 penetrates the substrate 110 and has two ends respectively extending to two conductive dry films 150. The two blackening layers 160 cover the two conductive dry films 150, respectively, and each conductive dry film 150 is covered by the corresponding anti-reflection layer 120 and the corresponding blackening layer 160.
In some embodiments, the two ends of the conductive via 140 are respectively non-coplanar with the two anti-reflective layers 120, so as to avoid possible poor contact between the conductive via 140 and the two conductive dry films 150 due to the parallel or lower surfaces of the two ends of the conductive via 140 than the two anti-reflective layers 120.
In some embodiments, the two conductive dry films 150 completely cover the conductive via 140, so as to avoid the conductive via 140 from being etched when one portion of the two anti-reflective layers 120 is removed due to insufficient thickness of the two conductive dry films 150 when performing the step S18.
As is apparent from the above description of the embodiments of the present disclosure, in the conductive structure and the method for manufacturing the same of the present disclosure, since the insulating layer is formed on the anti-reflective layer to protect the anti-reflective layer, the risk of scratch of the interlayer lamination and the risk of offset of the conductive via formed in the via hole can be avoided. In the conductive structure and the manufacturing method thereof, the conductive dry film is formed on the anti-reflection layer and the blackening layer is formed on the surface of the conductive dry film, so that the requirements of fine circuit, no reflection light on four sides, conductive through holes and no interlayer lamination scratch are simultaneously achieved under the condition of no new manufacturing process.
While the present disclosure has been described with reference to the exemplary embodiments, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the disclosure, and the scope of the disclosure is therefore defined by the appended claims.
Claims (18)
1. An electrically conductive structure, comprising:
a substrate;
two anti-reflection layers respectively positioned on two opposite surfaces of the substrate, wherein a part of each of the two opposite surfaces is exposed;
the two conductive dry films are respectively arranged on one side of the two anti-reflection layers away from the substrate;
the conductive communication column penetrates through the substrate and is provided with two ends which extend to the two conductive dry films respectively; and
and two blackening layers respectively covering the two conductive dry films, wherein each of the two conductive dry films is covered by the corresponding anti-reflection layer and the corresponding blackening layer.
2. The conductive structure of claim 1, wherein the material of the substrate comprises polyethylene terephthalate, cyclic olefin polymer, transparent polyimide, or polyvinylidene fluoride.
3. The conductive structure of claim 1, wherein the two anti-reflective layers partially overlap in one direction.
4. The conductive structure of claim 1, wherein the optical density of the two anti-reflective layers is greater than 4.
5. The conductive structure of claim 1, wherein the material of the two anti-reflective layers comprises ink, carbon, copper oxide, chromium, or black nickel.
6. The conductive structure of claim 1, wherein the two conductive dry films partially overlap in one direction.
7. The conductive structure of claim 1, wherein the two conductive dry films completely cover the conductive via posts.
8. The conductive structure of claim 1, wherein the thickness of the two conductive dry films is greater than 10 microns.
9. The conductive structure of claim 1, wherein the conductive via is a solid filled structure.
10. The conductive structure of claim 1, wherein the conductive via extends through the two anti-reflective layers.
11. The conductive structure of claim 1, wherein the material of the conductive via comprises silver, copper, or carbon.
12. The conductive structure of claim 1, wherein a surface of each of the two conductive dry films facing the substrate is covered by the corresponding anti-reflection layer, and the remaining surfaces of each of the two conductive dry films are covered by the corresponding blacking layer.
13. A method of manufacturing a conductive structure, comprising:
respectively forming two anti-reflection layers on two opposite surfaces of the substrate;
respectively forming two dummy insulating material layers on the two anti-reflection layers;
forming a through hole penetrating through the two dummy insulating material layers, the substrate and the two anti-reflection layers;
forming a conductive communication column in the through hole, wherein the conductive communication column completely fills the through hole;
removing the two dummy insulating material layers;
respectively forming two conductive dry films on the two anti-reflection layers to completely cover the conductive communication columns;
patterning the two conductive dry films; and
and respectively forming two blackening layers to cover the two conductive dry films.
14. The method of claim 13, further comprising baking to cure the two anti-reflective layers after the step of removing the two layers of dummy insulating material.
15. The method of claim 13, further comprising baking to cure the two conductive dry films after the step of patterning the two conductive dry films.
16. The method of claim 13, further comprising removing a portion of each of the two anti-reflective layers before the step of forming the two blackened layers to encapsulate the two conductive dry films, respectively.
17. The method of claim 13, wherein the step of forming the conductive via is performed such that both ends of the conductive via pass through the two anti-reflective layers, respectively.
18. The method of claim 13, further comprising cleaning the substrate prior to the step of separately forming the two anti-reflective layers.
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| CN202210202906.6A CN114613741B (en) | 2022-03-02 | 2022-03-02 | Conductive structure and manufacturing method thereof |
| TW111108658A TWI810843B (en) | 2022-03-02 | 2022-03-09 | Conductive structure and manufacturing method thereof |
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| US8373271B2 (en) * | 2010-05-27 | 2013-02-12 | International Business Machines Corporation | Interconnect structure with an oxygen-doped SiC antireflective coating and method of fabrication |
| TWI667946B (en) * | 2018-05-29 | 2019-08-01 | 夏爾光譜股份有限公司 | Soft circuit board substrate and manufacturing method thereof |
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| JPH07326853A (en) * | 1994-05-31 | 1995-12-12 | Nippon Avionics Co Ltd | Ball bump forming method for printed wiring board |
| JP3061788B1 (en) * | 1999-01-26 | 2000-07-10 | イビデン株式会社 | Printed wiring board and its manufacturing method |
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Also Published As
| Publication number | Publication date |
|---|---|
| CN114613741A (en) | 2022-06-10 |
| TW202337282A (en) | 2023-09-16 |
| TWI810843B (en) | 2023-08-01 |
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