CN114583933A

CN114583933A - Drive control module and synchronous rectification circuit

Info

Publication number: CN114583933A
Application number: CN202210496063.5A
Authority: CN
Inventors: 李瑞平; 王建虎; 刘彬
Original assignee: Shanghai Xinlong Semiconductor Technology Co ltd Nanjing Branch
Current assignee: Shanghai Xinlong Semiconductor Technology Co ltd Nanjing Branch
Priority date: 2022-05-09
Filing date: 2022-05-09
Publication date: 2022-06-03
Anticipated expiration: 2042-05-09
Also published as: CN114583933B

Abstract

The invention provides a drive control module and a synchronous rectification circuit. Wherein, the drive control module and the upper and lower pipe drive modules work in a matching way. The upper and lower tube driving module is used for outputting driving voltage of the upper and lower tubes based on the output signal of the driving control module. The drive control module is used for outputting an upper tube control signal and a lower tube control signal based on the rectification drive signal and at least one of the upper tube drive voltage and the lower tube drive voltage. According to the configuration, the fixed delay is cancelled or partially cancelled, the opening and closing states of the upper pipe and the lower pipe are judged through the control signal, and then the control signal is output, so that on one hand, the opening and closing time of the upper pipe and the lower pipe can be adaptively changed according to the running condition of the external circuit, the compatibility is improved, on the other hand, a shorter switching interval can be achieved under different working conditions, and the conversion efficiency of the system is improved; the problem of need among the prior art for guarantee upper tube and low tube can not open simultaneously and the fixed that sets up postpones a series of problems that bring is solved.

Description

Drive control module and synchronous rectification circuit

Technical Field

The invention relates to the technical field of power chips, in particular to a driving control module and a synchronous rectification circuit.

Background

The BUCK type switching power supply system is divided into two working modes of synchronous rectification and asynchronous rectification.

The asynchronous rectification system adopts a Schottky diode as a follow current tube, and the conversion efficiency of the system is low due to the existence of the voltage drop of the Schottky diode.

The MOS power tube for synchronous rectification is used as a follow current tube to improve the conversion efficiency of the system, and the corresponding MOS power tube is replaced by a Schottky diode, so that the system damage caused by simultaneous opening of an upper tube and a lower tube of a synchronous rectification switch power supply system is avoided, and an MOS drive module and a drive control module are added to the whole system.

In practical application, the driving control module is generally realized by adopting a dead-time circuit, namely, a certain time delay exists between an 'upper tube' driving signal and a 'lower tube' driving signal, so that two power tubes of the synchronous rectification switch power supply system can not be simultaneously started. In practical applications, since the characteristics of the semiconductor device are greatly affected by temperature, the dead time is also greatly affected by temperature. In some synchronous rectification system applications, when a chip is designed, the driving capability of the chip is generally fixed, and the chip is suitable for different power MOS (gate-source parasitic capacitors corresponding to the MOS are different in size), different working voltages, different output powers and different working temperatures if needed; the variation of any one of the parameters is different corresponding to the on-off time of the MOS, and the dead time required correspondingly is also different. Therefore, the dead time circuit with the traditional structure has poor compatibility to application and cannot be well adapted to various types of power MOS and application conditions.

In summary, in the prior art, the driving control module needs to ensure that the upper tube and the lower tube are not opened simultaneously through a fixed delay, so that poor compatibility is caused, or the dead time is too long, which affects the conversion efficiency.

Disclosure of Invention

The invention aims to provide a drive control module and a synchronous rectification circuit, and aims to solve the problems that in the prior art, the drive control module needs to ensure that an upper pipe and a lower pipe cannot be opened simultaneously through fixed delay, so that the compatibility is poor, or the dead time is too long, so that the conversion efficiency is influenced.

In order to solve the technical problem, the invention provides a driving control module which is applied to a synchronous rectification circuit, wherein the synchronous rectification circuit comprises an upper tube, a lower tube, an upper tube driving module, a lower tube driving module and the driving control module.

The upper tube driving module is used for outputting an upper tube driving voltage based on an upper tube control signal output by the driving control module so as to drive the upper tube to be opened or closed.

The lower tube driving module is used for outputting a lower tube driving voltage based on a lower tube control signal output by the driving control module so as to drive the lower tube to be opened or closed.

The drive control module is configured to output the upper tube control signal and the lower tube control signal based on a rectified drive signal and at least one of the upper tube drive voltage and the lower tube drive voltage.

The rectification driving signal changes the duty ratio based on the magnitude relation between feedback voltage and first reference voltage, and the feedback voltage has a functional relation with the output voltage of the synchronous rectification circuit.

Optionally, the driving control module is further configured to output an over-current shielding signal while switching the upper tube control signal to a first level; the first level corresponds to the starting control of the upper tube, and the overcurrent shielding signal is used for shielding the overcurrent signal.

Optionally, the synchronous rectification circuit further includes a rectification driving module, and the rectification driving module is configured to output the rectification driving signal.

The commutation drive module is configured to: when the overcurrent signal is not received or the overcurrent shielding signal and the overcurrent signal are received at the same time, if the feedback voltage is greater than the first reference voltage, the duty ratio of the rectification driving signal is reduced, and if the feedback voltage is less than the first reference voltage, the duty ratio of the rectification driving signal is improved.

And when the overcurrent signal is received and the overcurrent shielding signal is not received, reducing the duty ratio of the rectification driving signal.

Optionally, the driving control module further includes an upper tube gate voltage detecting unit and/or a lower tube gate voltage detecting unit.

Wherein the upper tube gate voltage detection unit is configured to output an upper tube on-off state signal based on the upper tube driving voltage and a first comparison voltage, the upper tube gate voltage detection unit configured to: and when the magnitude relation between the upper tube driving voltage and the first comparison voltage is changed, the level of the upper tube opening and closing state signal is changed.

The lower tube gate voltage detection unit is configured to output a lower tube open/close state signal based on the lower tube driving voltage and a second comparison voltage, and configured to: and when the magnitude relation between the lower tube driving voltage and the second comparison voltage is changed, changing the level of the lower tube opening and closing state signal.

Optionally, the driving control module includes the upper tube gate voltage detection unit, a first preset voltage difference exists between the first comparison voltage and the closing voltage of the upper tube, and the first preset voltage difference is set based on the signal transmission delay time of the synchronous rectification circuit; and/or a second preset voltage difference exists between the second comparison voltage and the closing voltage of the lower tube, and the second preset voltage difference is set based on the signal transmission delay time of the synchronous rectification circuit.

Optionally, the upper tube gate voltage detection unit includes a first triode, a second triode, a third triode, a fourth triode, a fifth triode, a sixth triode, a seventh triode, a first resistor, a second resistor and a third resistor.

The first triode is a PNP triode, and an emitting electrode of the first triode is used for obtaining the upper tube driving voltage.

The second triode is an NPN triode, a collector of the second triode is connected with a collector of the first triode, an emitter of the second triode is used for grounding, and the collector of the second triode is also connected with a base of the second triode.

The third triode is a PNP type triode, an emitting electrode of the third triode is connected with an emitting electrode of the first triode, and a base electrode of the third triode is connected with a base electrode of the first triode.

The fourth triode is an NPN type triode, a collector of the fourth triode is connected with a base of the first triode, the base of the fourth triode is used for acquiring a second reference voltage, and the second reference voltage is generated based on the first reference voltage; and the emitter of the fourth triode is connected with the collector of the third triode.

The base electrode of the fifth triode is connected with the base electrode of the first triode, and the collector electrode of the fifth triode is connected with the emitter electrode of the fourth triode.

The sixth triode is a PNP triode, the base of the sixth triode is connected with the base of the first triode, the emitting electrode of the sixth triode is connected with the emitting electrode of the fifth triode, and the collecting electrode of the sixth triode is used for outputting the upper pipe on-off state signal.

The seventh triode is an NPN type triode, the base electrode of the seventh triode is connected with the base electrode of the second triode, the collector electrode of the seventh triode is connected with the collector electrode of the sixth triode, and the emitting electrode of the seventh triode is used for being grounded.

The first end of the first resistor is used for connecting an input power supply of the synchronous rectification circuit, and the second end of the first resistor is connected with an emitting electrode of the fifth triode; the second end of the first resistor is also used for outputting the first comparison voltage.

The first end of the second resistor is connected with the second end of the first resistor, and the second end of the second resistor is connected with the base electrode of the first triode.

And the first end of the third resistor is connected with the collector of the third triode, and the second end of the third resistor is used for grounding.

And/or the lower tube gate voltage detection unit comprises an eighth triode, a ninth triode, a thirteenth triode, an eleventh triode, a twelfth triode, a thirteenth triode, a fourteenth triode and a fifteenth triode.

The eighth triode is a PNP type triode, a collector of the eighth triode is connected with a base of the eighth triode, and an emitter of the eighth triode is used for obtaining bias current.

The ninth triode is a PNP type triode, an emitting electrode of the ninth triode is connected with a collecting electrode of the eighth triode, a base electrode of the ninth triode is used for obtaining the driving voltage of the lower tube, and the collecting electrode of the ninth triode is used for being grounded.

The thirteenth polar tube is a PNP type polar tube, an emitting electrode of the thirteenth polar tube is connected with an emitting electrode of the eighth polar tube, and a base electrode of the thirteenth polar tube is connected with a base electrode of the eighth polar tube.

The eleventh triode is an NPN type triode, a collector of the eleventh triode is connected with a collector of the thirteenth triode, a collector of the eleventh triode is further connected with a base of the eleventh triode, and an emitter of the eleventh triode is used for being grounded.

The twelfth triode is a PNP triode, an emitting electrode of the twelfth triode is connected with an emitting electrode of the eighth triode, and a collecting electrode of the twelfth triode is used for outputting the lower tube opening and closing state signal.

The thirteenth triode is an NPN type triode, a collector of the thirteenth triode is connected with a collector of the twelfth triode, a base of the thirteenth triode is connected with a base of the eleventh triode, and an emitter of the thirteenth triode is used for being grounded.

The fourteenth triode is a PNP triode, an emitter of the fourteenth triode is connected with an emitter of the twelfth triode, a base of the fourteenth triode is connected with a base of the twelfth triode, and the base of the fourteenth triode is also connected with a collector of the fourteenth triode.

The fifteenth triode is a PNP triode, an emitter of the fifteenth triode is connected to a collector of the fourteenth triode, a base of the fifteenth triode is used for obtaining the second reference voltage, the collector of the fifteenth triode is used for grounding, and the second reference voltage is configured as the second comparison voltage.

Optionally, the driving control module further includes a core logic unit.

The driving control module comprises a lower tube grid voltage detection unit, and the core logic unit is used for acquiring an open-close state signal of the lower tube; the core logic unit is configured to: when the rectifying driving signal is at a high level and the lower tube opening and closing state signal corresponds to the lower tube being in a closed state, switching the upper tube control signal to be at a first level; the first level corresponds to an on control of the upper tube; otherwise, the upper tube control signal is switched to the level opposite to the first level.

And/or the drive control module comprises an upper tube grid voltage detection unit, and the core logic unit is used for acquiring an upper tube opening and closing state signal; the core logic unit is configured to: when the rectifying driving signal is at a low level and the upper tube opening and closing state signal corresponds to the upper tube being in a closed state, switching the lower tube control signal to be at a second level; the second level corresponds to an on control of the lower tube; otherwise, the lower tube control signal is switched to a level opposite to the second level.

Optionally, the driving control module includes the upper tube gate voltage detecting unit and the lower tube gate voltage detecting unit; the core logic unit includes: the circuit comprises a sixteenth triode, a seventeenth triode, an eighteenth triode, a nineteenth triode, a twentieth triode, a twenty-first triode, a twenty-second triode, a fourth resistor, a fifth resistor and a sixth resistor.

The sixth triode is an NPN-type triode, a collector of the sixth triode is used for acquiring a bias current, a base of the sixth triode is used for acquiring the rectification driving signal, and an emitter of the sixth triode is used for grounding.

The seventeenth triode is an NPN triode, the base of the seventeenth triode is connected with the collector of the sixteenth triode through the fourth resistor, the collector of the seventeenth triode is used for acquiring the bias current, the collector of the seventeenth triode is also used for outputting the upper tube control signal, and the emitter of the seventeenth triode is used for grounding.

The eighteenth triode is an NPN type triode, a collector of the eighteenth triode is connected with a collector of the seventeenth triode, a base of the eighteenth triode is used for acquiring the switching state signal of the lower tube through the fifth resistor, and an emitting electrode of the eighteenth triode is used for being grounded.

The nineteenth triode is a PNP type triode, a base electrode of the nineteenth triode is used for acquiring a second reference voltage, and the second reference voltage is generated based on the first reference voltage; and an emitter of the nineteenth triode is connected with a collector of the seventeenth triode, and the collector of the nineteenth triode is used for grounding.

The twenty-third triode is an NPN triode, the base electrode of the twentieth triode is connected with the collector electrode of the sixteenth triode through the sixth resistor, the collector electrode of the twentieth triode is used for obtaining the bias current, and the emitting electrode of the twentieth triode is used for being grounded.

The twenty-first triode is an NPN triode, a collector of the twenty-first triode is used for acquiring the bias current, a base of the twenty-first triode is connected with a collector of the twenty-second triode, an emitter of the twenty-first triode is used for grounding, and the collector of the twenty-first triode is also used for outputting the tube-descending control signal.

The second triode is an NPN type triode, a collector of the second triode is connected with a collector of the first triode, a base of the second triode is used for acquiring the opening and closing state signal of the upper tube, and an emitter of the second triode is used for grounding.

Optionally, the core logic unit further includes: a twenty-third triode, a twenty-fourth triode, a twenty-fifth triode, a twenty-sixth triode, a twenty-seventh triode, a seventh resistor, an eighth resistor and a capacitor.

The base of the twenty-third triode acquires the switching state signal of the lower tube through the seventh resistor, the collector of the twenty-third triode is used for acquiring the bias current, and the emitter of the twenty-third triode is used for grounding.

The twenty-fourth triode is an NPN type triode, the base electrode of the twenty-fourth triode is connected with the collector electrode of the twenty-third triode, the collector electrode of the twenty-fourth triode is used for obtaining the bias current, and the emitting electrode of the twenty-fourth triode is used for being grounded.

The twenty-fifth triode is a PNP triode, an emitting electrode of the twenty-fifth triode is connected with a collecting electrode of the twenty-fourth triode, a base electrode of the twenty-fifth triode is used for acquiring the second reference voltage, and the collecting electrode of the twenty-fifth triode is used for grounding.

The twenty-sixth triode is a PNP type triode, an emitting electrode of the twenty-sixth triode is used for obtaining the bias current, a base electrode of the twenty-sixth triode is connected with a collecting electrode of the twenty-fourth triode, and the collecting electrode of the twenty-sixth triode is used for being grounded.

And a first end of the capacitor is connected with an emitting electrode of the twenty-sixth triode, and a second end of the capacitor is connected with a first end of the eighth resistor.

The first end of the eighth resistor is further used for acquiring the bias current.

The twenty-seventh triode is an NPN triode, a collector of the twenty-seventh triode is used for obtaining the bias current, a base of the twenty-seventh triode is connected with the second end of the eighth resistor, an emitter of the twenty-seventh triode is used for grounding, and the collector of the twenty-seventh triode is used for outputting an overcurrent shielding signal.

In order to solve the technical problem, the application further provides a synchronous rectification circuit, which comprises an upper pipe, a lower pipe, an upper pipe driving module, a lower pipe driving module and the driving control module.

Compared with the prior art, in the drive control module and the synchronous rectification circuit provided by the invention, the drive control module, the upper tube drive module and the lower tube drive module work in a matching way. The upper tube driving module is used for outputting an upper tube driving voltage based on the upper tube control signal, and the lower tube driving module is used for outputting a lower tube driving voltage based on the lower tube control signal. The drive control module is configured to output the upper tube control signal and the lower tube control signal based on a rectified drive signal and at least one of the upper tube drive voltage and the lower tube drive voltage. So dispose, fixed delay has been cancelled or partly, change into the switching state of judging upper and lower pipe through control signal, output control signal then, can be according to external circuit's operation condition on the one hand, the switching opportunity of self-adaptively changing upper tube and lower pipe, compatibility has been improved, on the other hand also can reach shorter switching interval under the operating mode of difference, the conversion efficiency of system has been improved, need not open simultaneously through fixed delay in order to guarantee upper tube and lower pipe, thereby lead to compatibility not good, or, dead time overlength influences the problem of conversion efficiency.

Drawings

It will be appreciated by those skilled in the art that the drawings are provided for a better understanding of the invention and do not constitute any limitation to the scope of the invention.

Wherein: fig. 1 is a schematic connection diagram of a driving control module according to an embodiment of the present invention.

Fig. 2a is a schematic connection diagram of a driving control module according to another embodiment of the present invention.

Fig. 2b is a schematic connection diagram of a driving control module according to still another embodiment of the present invention.

Fig. 3 is a schematic system structure diagram of a synchronous rectification circuit according to an embodiment of the present invention.

Fig. 4 is a schematic structural diagram of a switching power supply control chip according to an embodiment of the invention.

Fig. 5 is a circuit diagram of a driving control module according to an embodiment of the invention.

FIG. 6 is a waveform diagram of the upper tube control signal and the lower tube control signal at 25 ℃ for the synchronous rectification circuit according to an embodiment of the present invention.

FIG. 7 is a waveform diagram of the upper tube control signal and the lower tube control signal of the synchronous rectification circuit at 150 ℃ according to an embodiment of the present invention.

FIG. 8 is a waveform diagram of a top tube control signal and an over current mask signal in accordance with an embodiment of the present invention.

In the drawings: 10-a power supply circuit; 20-switching power supply control chip; 30-power tube; 40-an output circuit; 101-input power; 102-an input filter capacitance; 103-input drop capacitance; 301-upper tube; 302-lower tube; 401-energy storage inductance; 402-an output filter capacitor; 403-a first divider resistance; 404-a second divider resistor; 405-load.

201-voltage regulator and reference module; 202-an oscillator; 203-an error amplifier; 204-a comparator; 205-a digital signal processing unit; 206-a drive control module; 207-upper tube driving module; 208-lower tube drive module; 209-frequency compensation resistance; 210-frequency compensation capacitance; 211-rectifying driving module.

2061-bias current unit; 2062-core logic units; 2063 — reference voltage unit; 2064-a lower tube gate voltage detection unit; 2065-upper gate voltage detecting unit.

Detailed Description

To further clarify the objects, advantages and features of the present invention, a more particular description of the invention will be rendered by reference to specific embodiments thereof which are illustrated in the appended drawings. It is to be noted that the drawings are in simplified form and are not to scale, but are provided for the purpose of facilitating and clearly illustrating embodiments of the present invention. Further, the structures illustrated in the drawings are often part of actual structures. In particular, the drawings may have different emphasis points and may sometimes be scaled differently.

As used in this application, the singular forms "a", "an" and "the" include plural referents, the term "or" is generally employed in a sense including "and/or," the terms "a" and "an" are generally employed in a sense including "at least one," the terms "at least two" are generally employed in a sense including "two or more," and the terms "first", "second" and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicit to the number of technical features indicated. Thus, features defined as "first", "second" and "third" may explicitly or implicitly include one or at least two of the features, "one end" and "the other end" and "proximal end" and "distal end" generally refer to the corresponding two parts, which include not only the end points, but also the terms "mounted", "connected" and "connected" should be understood broadly, e.g., as a fixed connection, as a detachable connection, or as an integral part; can be mechanically or electrically connected; either directly or indirectly through intervening media, either internally or in any other relationship. Furthermore, as used in the present invention, the disposition of an element with another element generally only means that there is a connection, coupling, fit or driving relationship between the two elements, and the connection, coupling, fit or driving relationship between the two elements may be direct or indirect through intermediate elements, and cannot be understood as indicating or implying any spatial positional relationship between the two elements, i.e., an element may be in any orientation inside, outside, above, below or to one side of another element, unless the content clearly indicates otherwise. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.

The core idea of the invention is to provide a driving control module and a synchronous rectification circuit, so as to solve the problem that the driving control module in the prior art needs to ensure that an upper tube and a lower tube are not opened simultaneously through fixed delay, so that the compatibility is poor, or the dead time is too long, so that the conversion efficiency is affected.

The following description refers to the accompanying drawings.

Referring to fig. 1 to 8, fig. 1 is a schematic connection diagram of a driving control module according to an embodiment of the invention. Fig. 2a is a schematic connection diagram of a driving control module according to another embodiment of the present invention. Fig. 2b is a schematic connection diagram of a driving control module according to still another embodiment of the present invention. Fig. 3 is a schematic diagram of a system structure of a synchronous rectification circuit according to an embodiment of the present invention. Fig. 4 is a schematic structural diagram of a switching power supply control chip according to an embodiment of the invention. Fig. 5 is a circuit diagram of a driving control module according to an embodiment of the invention. FIG. 6 is a waveform diagram of the upper tube control signal and the lower tube control signal at 25 ℃ for the synchronous rectification circuit according to an embodiment of the present invention. FIG. 7 is a waveform diagram of the upper tube control signal and the lower tube control signal of the synchronous rectification circuit at 150 ℃ according to an embodiment of the present invention. FIG. 8 is a waveform diagram of a top tube control signal and an over current mask signal in accordance with an embodiment of the present invention.

Fig. 1 shows a driving control module 206 applied to a synchronous rectification circuit, which includes an upper tube 301, a lower tube 302, an upper tube driving module 207, a lower tube driving module 208 and the driving control module 206. The upper tube 301 refers to a MOS tube close to the power output end, the lower tube 302 refers to a MOS tube close to the ground, the upper tube 301 may be a PMOS tube or an NMOS tube, and the lower tube 302 generally selects an NMOS tube.

The upper tube driving module 207 is configured to output an upper tube driving voltage GATEP to drive the upper tube 301 to be opened or closed based on the upper tube control signal DRP output by the driving control module 206.

The lower tube driving module 208 is configured to output a lower tube driving voltage GATEN to drive the lower tube 302 to open or close based on a lower tube control signal DRN output by the driving control module 206.

The specific structure of the upper tube driving module 207 and the lower tube driving module 208 may be configured according to the common knowledge in the art, and will not be described herein.

The driving control module 206 is configured to output the upper tube control signal DRP and the lower tube control signal DRN based on a rectified driving signal DRIVE, the upper tube driving voltage GATEP, and the lower tube driving voltage GATEN.

The rectification driving signal DRIVE changes the duty ratio based on the magnitude relation between a feedback voltage FB and a first reference voltage VREF, and the feedback voltage FB has a functional relation with the output voltage of the synchronous rectification circuit. For example, the feedback voltage FB is obtained by dividing an output voltage of the synchronous rectification circuit.

In fig. 1, some components, such as inductors, etc., are omitted, and more specific circuit contents may be set by those skilled in the art according to fig. 1 and the common knowledge, or may be set by referring to the contents of fig. 3, but the component connection scheme shown in fig. 3 is not the only scheme.

Another form of the drive control module 206 is shown in fig. 2a and 2 b. The drive control module 206 in FIG. 2a is substantially the same as that in FIG. 1, except that the drive control module 206 does not receive the upper tube drive voltage GATEP. At this time, the driving control module 206 outputs the upper tube control signal DRP based on the rectified driving signal DRIVE and the lower tube driving voltage GATEN, and outputs the lower tube control signal DRN based on the rectified driving signal DRIVE and other logic (e.g., setting a fixed delay) and the like. The driving control module 206 in fig. 2b is substantially the same as that in fig. 1, except that the driving control module 206 does not receive the lower tube driving voltage GATEN. At this time, the driving control module 206 outputs the lower tube control signal DRN based on the rectified driving signal DRIVE and the upper tube driving voltage GATEP, and outputs the upper tube control signal DRP based on the rectified driving signal DRIVE and other logic (e.g., setting a fixed delay) and the like.

The embodiments in fig. 1, 2a and 2b can be summarized as follows: the driving control module 206 is configured to output the upper tube control signal DRP and the lower tube control signal DRN based on the rectified driving signal DRIVE and at least one of the upper tube driving voltage GATEP and the lower tube driving voltage GATEN.

In the subsequent part of this specification, a complete embodiment is shown by the design idea shown in fig. 1, but it can be understood that an embodiment obtained based on the design idea shown in fig. 2a or fig. 2b also has a certain adaptive characteristic, and under a special working condition, it may be necessary to adopt the driving control module 206 shown in fig. 2a or fig. 2b to implement a synchronous rectification circuit, and these three embodiments can solve the technical problem proposed in the background art, and have beneficial effects under different working conditions, all of which belong to the protection scope of the technical solution of the present invention.

The synchronous rectification circuit according to the present embodiment is shown in fig. 3, and fig. 3 shows a power supply circuit 10, a switching power supply control chip 20, a power tube 30 and an output circuit 40, wherein the details of the switching power supply control chip are described later. The switching power supply control chip 20 detects the magnitude of the output voltage VOUT by the resistor-divided feedback signal (i.e., the feedback voltage) FB of the first voltage-dividing resistor 403 and the second voltage-dividing resistor 404, and adjusts the duty ratio of the chip internal power pipe control signal GATEP in time to realize constant voltage output. The upper tube 301 is a PMOS power tube and is a power output tube of the whole system, and the lower tube 302 is an NMOS power tube, and is used for providing a follow current loop for the energy storage inductor 401 in the turn-off period of the PMOS power tube in the switching power supply control chip 20. In fig. 3, the remaining elements are described as follows: an input power supply 101 serving as an entire system power supply; an input filter capacitor 102 for filtering; an input drop capacitor 103, configured to provide a supply voltage VC of the upper tube driving module 207; and an output filter capacitor 402 for filtering.

Fig. 4 shows an internal structure of the switching power supply control chip 20, and as shown in fig. 4, the switching power supply control chip includes a regulator and reference module 201, the driving control module 206, the upper tube driving module 207, the lower tube driving module 208, and a rectification driving module 211.

The regulator and reference module 201 is configured to provide a regulated voltage VDD, a first reference voltage VREF, and a reference current IBIAS.

The rectifying driving module 211 is configured to output the rectifying driving signal DRIVE, and specifically includes: oscillator 202, error amplifier 203, comparator 204, digital signal processing unit 205, frequency compensation resistor 209 and frequency compensation capacitor 210. The error amplifier 203 outputs a voltage signal VE based on a voltage difference between the feedback voltage FB and the first reference voltage VREF, and the comparator 204 generates a base driving signal OUT based on the voltage signal VE and an oscillation signal SAW generated by the oscillator 202. Under a normal condition, the digital signal processing unit 205 converts the basic driving signal OUT into the rectified driving signal DRIVE with the same waveform and outputs the rectified driving signal DRIVE, and under a specific condition, the digital signal processing unit 205 outputs the rectified driving signal DRIVE according to a preset logic. The oscillator 202 is further configured to provide the digital signal processing unit 205 with period information of the oscillation signal SAW based on a period indication signal OSC. According to the introduction of the rectifying driving module 211 in the present specification, the specific structure of the rectifying driving module 211 is not limited to the scheme shown in fig. 4.

The upper tube driving module 207 is further configured to detect a real-time current of a PMOS power tube (i.e., the upper tube 301) through a SW pin, and trigger an over-current signal OCP when the current of the PMOS power tube reaches a preset value.

As shown in fig. 4, the driving control module 206 is further configured to output an over-current masking signal LEB while switching the top tube control signal DRP to the first level; the first level corresponds to the on control of the upper tube 301, i.e. high level in this embodiment, and the over-current masking signal DRP is used to mask the over-current signal OCP at the on moment of the upper tube 301. Because the power tube is turned on and has peak current, the current can cause false triggering to the system, and the current of the power tube is sampled after the peak current is ended. In this embodiment, shielding the OCP signal in a short time after the power transistor is turned on may be implemented by a simpler circuit, which is beneficial to turning on the upper transistor 301 and avoiding the influence of the over-current signal OCP. In order to facilitate the normal opening of the upper tube 301, there are many potential implementation schemes, but the scheme provided by the embodiment has small modification to the existing circuit, is not easy to cause unpredictable errors, and is a better choice. It is to be understood that "simultaneously" herein should be understood to mean that the trigger times of both are within engineering tolerances, and not simultaneously in an absolute sense.

As can be seen from fig. 4, the synchronous rectification circuit further includes a rectification driving module 211, and the rectification driving module 211 is configured to output the rectification driving signal DRIVE.

The commutation drive module 211 is configured to: when not receiving overcurrent signal OCP or receive simultaneously overcurrent shield signal LEB with when overcurrent signal OCP, if feedback voltage FB is greater than first reference voltage VERF, reduce the duty cycle of rectification DRIVE signal DRIVE, if feedback voltage FB is less than first reference voltage VERF, improve the duty cycle of rectification DRIVE signal DRIVE. Equality may be performed according to suitable logic, e.g. maintaining, increasing or decreasing the duty cycle of the rectified DRIVE signal DRIVE.

And when the over-current signal OCP is received and the over-current shielding signal LEB is not received, reducing the duty ratio of the rectification driving signal DRIVE.

Referring to fig. 5, in the present embodiment, the driving control module 206 further includes an upper gate voltage detecting unit 2065 and a lower gate voltage detecting unit 2064.

Corresponding to fig. 2a and 2b, the driving control module 206 may include only the upper tube gate voltage detecting unit 2065 or the lower tube gate voltage detecting unit 2064. In this specification, focusing on the solution of the coexistence of the upper gate voltage detecting unit 2065 and the lower gate voltage detecting unit 2064, a person skilled in the art can set the driving control module 206 including only one type of gate voltage detecting unit and set the corresponding delay module according to the common general knowledge and the content of the description of this specification, and will not be described herein.

The above can be summarized as follows: the driving control module 206 further includes the upper gate voltage detecting unit 2065 and/or the lower gate voltage detecting unit 2064.

Wherein the upper tube gate voltage detecting unit 2065 is configured to output an upper tube open/close state signal GATEP _ FB based on the upper tube driving voltage GATEP and a first comparison voltage, the upper tube gate voltage detecting unit 2065 is configured to: and when the magnitude relation between the upper tube driving voltage GATEP and the first comparison voltage is changed, changing the level of the upper tube open-close state signal GATEP _ FB.

Preferably, a first preset voltage difference exists between the first comparison voltage and the closing voltage of the upper tube 301, and the first preset voltage difference is set based on the signal transmission delay time of the synchronous rectification circuit. With such a configuration, the conversion efficiency can be further improved. With this arrangement, the switching time point of the driving signal can be advanced, and the time interval from the closing of the upper tube 301 to the opening of the lower tube 302 can be reduced.

The lower tube gate voltage detection unit 2064 is configured to output a lower tube open/close state signal GATEN _ FB based on the lower tube driving voltage GATEN and a second comparison voltage, and the lower tube gate voltage detection unit 2064 is configured to: when the magnitude relation between the lower tube driving voltage GATEN and the second comparison voltage changes, the level of the lower tube open/close state signal GATEN _ FB is changed.

Preferably, a second preset voltage difference exists between the second comparison voltage and the turn-off voltage of the lower tube 302, and the second preset voltage difference is set based on the signal transmission delay time of the synchronous rectification circuit. With such an arrangement, the switching time point of the driving signal can be advanced, and the time interval from the closing of the lower tube 302 to the opening of the upper tube 301 can be reduced.

Based on the above description, those skilled in the art may set different specific circuits, and in this embodiment, the upper gate voltage detecting unit 2065 includes a first transistor Q39, a second transistor Q40, a third transistor Q41, a fourth transistor Q42, a fifth transistor Q43, a sixth transistor Q44, a seventh transistor Q45, a first resistor R7, a second resistor R8, and a third resistor R9.

The first transistor Q39 is a PNP transistor, and an emitter of the first transistor Q39 is used to obtain the upper tube driving voltage GATEP.

The second triode Q40 is an NPN type triode, a collector of the second triode Q40 is connected to a collector of the first triode Q39, an emitter of the second triode Q40 is used for grounding, and a collector of the second triode Q40 is further connected to a base of the second triode Q40.

The third triode Q41 is a PNP triode, the emitter of the third triode Q41 is connected to the emitter of the first triode Q39, and the base of the third triode Q41 is connected to the base of the first triode Q39.

The fourth triode Q42 is an NPN-type triode, a collector of the fourth triode Q42 is connected to a base of the first triode Q39, a base of the fourth triode Q42 is used for obtaining a second reference voltage VR, and the second reference voltage VR is generated based on the first reference voltage VREF; the emitter of the fourth transistor Q42 is connected to the collector of the third transistor Q41.

The fifth triode Q43 is a PNP triode, the base of the fifth triode Q43 is connected to the base of the first triode Q39, and the collector of the fifth triode Q43 is connected to the emitter of the fourth triode Q42.

The sixth triode Q44 is a PNP type triode, the base of the sixth triode Q44 is connected to the base of the first triode Q39, the emitter of the sixth triode Q44 is connected to the emitter of the fifth triode Q43, and the collector of the sixth triode Q44 is used to output the upper tube on-off state signal GATEP _ FB.

The seventh triode Q45 is an NPN type triode, a base of the seventh triode Q45 is connected to a base of the second triode Q40, a collector of the seventh triode Q45 is connected to a collector of the sixth triode Q44, and an emitter of the seventh triode Q45 is grounded.

A first end of the first resistor R7 is used for connecting an input power supply 101 of the synchronous rectification circuit, and a second end of the first resistor R7 is connected with an emitter of the fifth triode Q43; the second end of the first resistor R7 is also used for outputting the first comparison voltage.

The first end of the second resistor R8 is connected with the second end of the first resistor R7, and the second end of the second resistor R8 is connected with the base of the first triode Q39.

The first end of the third resistor R9 is connected to the collector of the third transistor Q41, and the second end of the third resistor R9 is connected to ground.

Based on the above connection relationship, the upper tube gate voltage detecting unit 2065 operates according to the logic that when the GATEP voltage is greater than VCC-VR7 (i.e., the first comparison voltage), the GATEP _ FB signal outputs a low level, and when the GATEP voltage is less than VCC-VR7, the GATEP _ FB signal outputs a high level (i.e., representing that the upper tube 301 is in an on state). In practical application, when the GATEP signal is equal to VCC-VR7, the upper tube 301 is not completely closed, considering that there is a delay in the circuit signal transmission, the switching state is selected when the GATEP signal is greater than VCC-VR7, and when the control signal is transmitted to the lower tube driving module 208, the upper tube 301 is completely closed, so that the time for closing two power tubes simultaneously can be effectively reduced, and the system conversion efficiency is effectively improved.

The lower tube gate voltage detecting unit 2064 includes an eighth triode Q30, a ninth triode Q31, a thirteenth triode Q32, an eleventh triode Q33, a twelfth triode Q35, a thirteenth triode Q36, a fourteenth triode Q37, and a fifteenth triode Q38.

The eighth triode Q30 is a PNP triode, the collector of the eighth triode Q30 is connected to the base of the eighth triode Q30, and the emitter of the eighth triode Q30 is used for obtaining a bias current. In fig. 5, IBIAS1 corresponds to the base current of the current mirror that generates the bias current.

The ninth triode Q31 is a PNP type triode, the emitter of the ninth triode Q31 is connected to the collector of the eighth triode Q30, the base of the ninth triode Q31 is used for obtaining the low tube driving voltage GATEN, and the collector of the ninth triode Q31 is used for grounding.

The thirteenth polar tube Q32 is a PNP type triode, the emitter of the thirteenth polar tube Q32 is connected with the emitter of the eighth polar tube Q30, and the base of the thirteenth polar tube Q32 is connected with the base of the eighth polar tube Q30.

The eleventh triode Q33 is an NPN type triode, a collector of the eleventh triode Q33 is connected to a collector of the thirteenth triode Q32, a collector of the eleventh triode Q33 is further connected to a base of the eleventh triode Q33, and an emitter of the eleventh triode Q33 is connected to ground.

The twelfth triode Q35 is a PNP-type triode, an emitter of the twelfth triode Q35 is connected to an emitter of the eighth triode Q30, and a collector of the twelfth triode Q35 is used for outputting the down tube on-off state signal GATEN _ FB.

The thirteenth triode Q36 is an NPN type triode, a collector of the thirteenth triode Q36 is connected to a collector of the twelfth triode Q35, a base of the thirteenth triode Q36 is connected to a base of the eleventh triode Q33, and an emitter of the thirteenth triode Q36 is grounded.

The fourteenth triode Q37 is a PNP-type triode, an emitter of the fourteenth triode Q37 is connected to an emitter of the twelfth triode Q35, a base of the fourteenth triode Q37 is connected to a base of the twelfth triode Q35, and a base of the fourteenth Q37 triode is further connected to a collector of the fourteenth triode Q37.

The fifteenth triode Q38 is a PNP triode, an emitter of the fifteenth triode Q38 is connected to a collector of the fourteenth triode Q37, a base of the fifteenth triode Q38 is used for obtaining the second reference voltage VR, and a collector of the fifteenth triode Q38 is used for grounding. The second reference voltage VR is configured as the second comparison voltage.

Based on the above connection relationship, the lower gate voltage detecting unit 2064 operates according to a logic that outputs a high level (i.e., represents that the lower tube 302 is in an on state) when the GATEN voltage is greater than VR, and outputs a low level when the GATEN voltage is less than VR. In practical application, when the GATEN signal is equal to VR, the lower tube 302 is not completely closed, and considering that there is a delay in the transmission of the circuit signal, the switching state is performed when the GATEN signal is smaller than VR, and when the control signal is transmitted to the upper tube driving circuit 207, the lower tube 302 is completely closed, so that the time for simultaneously closing two power tubes can be effectively reduced, and the system conversion efficiency can be effectively improved.

As shown in fig. 5, the driving control module 206 further includes a core logic unit 2062.

The driving control module 206 includes the lower tube gate voltage detecting unit 2064, and the core logic unit is configured to obtain the lower tube on-off state signal GATEN _ FB; the core logic unit is configured to: when the rectified driving signal DRIVE is at a high level and the lower tube on/off state signal GATEN _ FB corresponds to the lower tube being in an off state (in this embodiment, at a low level), switching the upper tube 301 control signal DRP to a first level (in this embodiment, at a high level); the first level corresponds to the turn-on control of the upper tube 301; otherwise, switching the upper tube control signal DRP to a level opposite to the first level.

The driving control module includes the upper tube gate voltage detecting unit 2065, and the core logic unit 2062 is configured to obtain the upper tube open/close state signal GATEP _ FB; the core logic unit is configured to: when the rectified driving signal DRIVE is at a low level and the upper tube on/off state signal GATEP _ FB corresponds to the upper tube being in an off state (in this embodiment, at a low level), switching the lower tube control signal DRN to a second level (in this embodiment, at a high level); the second level corresponds to an on control of the lower tube; otherwise, the lower tube control signal DRN is switched to a level opposite to the second level.

In other embodiments, there may be only one of the lower gate voltage detecting unit 2064 and the upper gate voltage detecting unit 2065, and the core logic unit 2062 is cooperatively disposed.

Specifically, the driving control module 206 includes the upper tube gate voltage detecting unit 2065 and the lower tube gate voltage detecting unit 2064; the core logic unit includes: a sixteenth triode Q7, a seventeenth triode Q9, an eighteenth triode Q10, a nineteenth triode Q11, a twentieth triode Q23, a twenty-first triode Q25, a twenty-second triode Q26, a fourth resistor R1, a fifth resistor R2 and a sixth resistor R5.

The sixteenth triode Q7 is an NPN-type triode, a collector of the sixteenth triode Q7 is used for obtaining a bias current, a base of the sixteenth triode Q7 is used for obtaining the rectified driving signal DRIVE, and an emitter of the sixteenth triode Q7 is used for grounding.

The seventeenth triode Q9 is an NPN-type triode, the base of the seventeenth triode Q9 is connected to the collector of the sixteenth triode Q7 through the fourth resistor R1, the collector of the seventeenth triode Q9 is used to obtain the bias current, the collector of the seventeenth triode Q9 is further used to output the upper tube control signal DRP, and the emitter of the seventeenth triode Q9 is used to ground.

The eighteenth triode Q10 is an NPN type triode, a collector of the eighteenth triode Q10 is connected to a collector of the seventeenth triode Q9, a base of the eighteenth triode Q10 is configured to obtain the low tube on-off state signal GATEN _ FB through the fifth resistor R2, and an emitter of the eighteenth triode Q10 is configured to be grounded.

The nineteenth triode Q11 is a PNP type triode, the base of the nineteenth triode Q11 is used for obtaining a second reference voltage VR, and the second reference voltage VR is generated based on the first reference voltage VREF; the emitter of the nineteenth transistor Q11 is connected to the collector of the seventeenth transistor Q9, and the collector of the nineteenth transistor Q11 is connected to ground.

The twentieth triode Q23 is an NPN-type triode, the base of the twentieth triode Q23 is connected to the collector of the sixteenth triode Q7 through the sixth resistor R5, the collector of the twentieth triode Q23 is used for obtaining the bias current, and the emitter of the twentieth triode Q23 is used for grounding.

The twenty-first triode Q25 is an NPN type triode, a collector of the twenty-first triode Q25 is used for obtaining the bias current, a base of the twenty-first triode Q25 is connected with a collector of the twenty-first triode Q23, an emitter of the twenty-first triode Q25 is used for grounding, and a collector of the twenty-first triode Q25 is further used for outputting the lower tube control signal DRN.

The twenty-second triode Q26 is an NPN type triode, a collector of the twenty-second triode Q26 is connected to a collector of the twenty-first triode Q25, a base of the twenty-second triode Q26 is used for acquiring the upper tube on-off state signal GATEP _ FB, and an emitter of the twenty-second triode Q26 is used for grounding.

Optionally, the core logic unit further includes: the circuit comprises a twenty-third triode Q13, a twenty-fourth triode Q15, a twenty-fifth triode Q16, a twenty-sixth triode Q18, a twenty-seventh triode Q21, a seventh resistor R3, an eighth resistor R4 and a capacitor C1.

The twenty-third triode Q13 is an NPN type triode, the base of the twenty-third triode Q13 obtains the down tube on-off state signal GATEN _ FB through the seventh resistor R3, the collector of the twenty-third triode Q13 is used for obtaining the bias current, and the emitter of the twenty-third triode Q13 is used for grounding.

The twenty-fourth triode Q15 is an NPN type triode, the base of the twenty-fourth triode Q15 is connected to the collector of the twenty-third triode Q13, the collector of the twenty-fourth triode Q15 is used for obtaining the bias current, and the emitter of the twenty-fourth triode Q15 is used for grounding.

The twenty-fifth triode Q16 is a PNP-type triode, an emitter of the twenty-fifth triode Q16 is connected to a collector of the twenty-fourth triode Q15, a base of the twenty-fifth triode Q16 is used for acquiring the second reference voltage VR, and the collector of the twenty-fifth triode Q16 is used for grounding.

The twenty-sixth triode Q18 is a PNP-type triode, an emitter of the twenty-sixth triode Q18 is used for obtaining the bias current, a base of the twenty-sixth triode Q18 is connected with a collector of the twenty-fourth triode Q15, and a collector of the twenty-sixth triode Q18 is used for grounding.

A first end of the capacitor C1 is connected to an emitter of the twenty-sixth triode Q18, and a second end of the capacitor C1 is connected to a first end of the eighth resistor R4.

The first end of the eighth resistor R4 is also used for obtaining the bias current.

The twenty-seventh triode Q21 is an NPN type triode, a collector of the twenty-seventh triode Q21 is used for obtaining the bias current, a base of the twenty-seventh triode Q21 is connected with the second end of the eighth resistor R4, an emitter of the twenty-seventh triode Q21 is used for grounding, and a collector of the twenty-seventh triode Q21 is used for outputting an overcurrent shielding signal LEB.

Based on the above connection relationship, the core logic unit 2062 operates according to the following logic: when GATEN _ FB is at high level, Q10 and Q13 are turned on, DRP is pulled down to low level, at the moment, if the DRIVE signal is changed from low to high, Q7 is turned on, Q9 is turned off, at the moment, because Q10 is turned on, DRP signals do not change, at the moment, Q23 is turned off, Q25 is turned on, the DRN signals are changed from high to low to control the NMOS driving circuit to turn off the NMOS power tube, when the voltage GATEN at the GATE end of the NMOS power tube is reduced to VR, at the moment, GATEN _ FB is changed from high to low, at the moment, the DRP signals are changed from low to high to control the PMOS driving circuit to turn on the PMOS power tube. When GATEP _ FB is at high level, Q26 is turned on, at this time, if the DRIVE signal changes from high to low, Q7 is turned off, Q23 is turned on, and Q25 is turned off, at this time, since the signal of DRN that Q26 is turned on is still at low level, Q7 is turned off, Q9 is turned on, the DRP signal changes from high to low, the PMOS power tube is controlled to be turned off by the PMOS driving circuit, when GATEP at the GATE terminal voltage of the PMOS power tube rises to VCC-VR, GATEP _ FB changes from high to low, at this time, the DRN signal changes from low to high to control the NMOS driving circuit to turn on the NMOS power tube. The Q11 and Q16 are used for clamping DRP and the high-level voltage of the point A, when the Q9 and the Q10 are turned off, the voltage of the DRP is VR + VEBQ11, the voltage of the point A is VR + VEBQ16, and the reason for raising the high-level voltage of the DRP is that the trigger voltage required by the PMOS driving voltage in the common transistor process is higher. When GATEN _ FB is high, Q13 is turned on, Q15 is turned off, the voltage at point a is VR + VEB6, the voltage at point B is VR + VEB6+ VEB18, the voltage at point C is I1 × R4+ VBEQ21, when GATEN _ FB is changed from high to low, the DRP signal is changed from low to high, Q13 is turned off, Q15 is turned on, the voltage at point a is pulled to GND, the voltage at point B is pulled down to VEBQ18, the voltage drops to VR + VEB16, and since the voltage at both ends of the capacitor cannot change suddenly, the voltage at point C also drops to VR + VEB16, at point Q21 is turned off, the LEB signal is changed from low to high, the current I1 starts to charge the capacitor C, and the voltage at point C rises. When the charging voltage is equal to I1 × R4+0.7V, Q21 turns on and the LEB signal goes high and low again. That is, the LEB signal is a brief high signal when the PMOS is turned on, which is used to mask the OCP signal from acting on the entire circuit.

The driving control module 206 further includes a bias current unit 2061 and a reference voltage unit 2063. The bias current unit 2061 forms a plurality of current mirrors through elements Q1, Q2, Q3, Q4, Q5, Q6, Q8, Q12, Q14, Q17, Q19, Q20, Q22, Q24, Q27 and Q34 to provide the bias current. The bias current is generated based on the reference current IBIAS. The reference voltage unit 2063 is based on the elements Q28, Q29, and R6 to provide the second reference voltage VR. The second reference voltage VR is generated based on the first reference voltage VREF. The selection of the types of the above elements, the specific connection manner and the operation principle can be understood by referring to the content of fig. 5, and are not described herein.

Waveform diagrams of the synchronous rectification circuit at different degrees centigrade are shown in fig. 6 and fig. 7, and it can be seen from the diagrams that the interval time of the embodiment is less affected by temperature, the application compatibility to the power MOS is better, and the system can be ensured to work with higher efficiency at various temperatures.

Fig. 8 shows waveforms of the upper-tube control signal DRP and the over-current masking signal LEB, and it can be seen from the diagram that LEB is a spike signal when DRP changes from low to high, and this signal can be used to mask the over-current signal OCP in practical application to achieve the leading edge blanking effect.

The abscissa of fig. 6 to 8 represents time, and the ordinate represents voltage, and specific values do not affect the description of the present specification, and therefore are not shown.

The embodiment also provides a synchronous rectification circuit, which comprises an upper tube 301, a lower tube 302, an upper tube driving module 207, a lower tube driving module 208 and the driving control module 206. The details of the synchronous rectification circuit can be understood with reference to fig. 3 to 5 and the related text.

The embodiment has the following advantages: the influence of temperature, working voltage, output power and the like is small, and the application compatibility of the MOS with different powers is good; and may be suitable for some synchronous rectified switching power supply systems (typically 100V) where the input voltage is high.

In summary, the present embodiment provides a driving control module and a synchronous rectification circuit, wherein the driving control module, the upper tube driving module and the lower tube driving module cooperate with each other. The upper tube driving module is used for outputting upper tube driving voltage based on the upper tube control signal, and the lower tube driving module is used for outputting lower tube driving voltage based on the lower tube control signal so as to drive the lower tube to be disconnected or closed. The drive control module is configured to output the upper tube control signal and the lower tube control signal based on a rectified drive signal and at least one of the upper tube drive voltage and the lower tube drive voltage. So dispose, fixed delay has been cancelled or partly, change into the switching state of judging upper and lower pipe through control signal, output control signal then, can be according to external circuit's operation condition on the one hand, the switching opportunity of self-adaptively changing upper tube and lower pipe, compatibility has been improved, on the other hand also can reach shorter switching interval under the operating mode of difference, the conversion efficiency of system has been improved, need not open simultaneously through fixed delay in order to guarantee upper tube and lower pipe, thereby lead to compatibility not good, or, dead time overlength influences the problem of conversion efficiency.

The above description is only for the purpose of describing the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art according to the above disclosure are within the scope of the present invention.

Claims

1. A driving control module is applied to a synchronous rectification circuit, which comprises an upper tube, a lower tube, an upper tube driving module, a lower tube driving module and the driving control module,

the upper tube driving module is used for outputting an upper tube driving voltage based on an upper tube control signal output by the driving control module so as to drive the upper tube to be opened or closed;

the lower tube driving module is used for outputting a lower tube driving voltage based on a lower tube control signal output by the driving control module so as to drive the lower tube to be opened or closed;

the drive control module is configured to output the upper tube control signal and the lower tube control signal based on a rectified drive signal and at least one of the upper tube drive voltage and the lower tube drive voltage; the rectification driving signal changes the duty ratio based on the magnitude relation between feedback voltage and first reference voltage, and the feedback voltage has a functional relation with the output voltage of the synchronous rectification circuit.

2. The drive control module of claim 1, wherein the drive control module is further configured to output an over-current mask signal while switching the upper tube control signal to a first level; the first level corresponds to the starting control of the upper tube, and the overcurrent shielding signal is used for shielding the overcurrent signal.

3. The drive control module of claim 2, wherein the synchronous rectification circuit further comprises a rectification drive module for outputting the rectification drive signal; the commutation drive module is configured to:

when the overcurrent signal is not received or the overcurrent shielding signal and the overcurrent signal are received at the same time, if the feedback voltage is greater than the first reference voltage, the duty ratio of the rectification driving signal is reduced, and if the feedback voltage is less than the first reference voltage, the duty ratio of the rectification driving signal is improved; and (c) a second step of,

and when the over-current signal is received and the over-current shielding signal is not received, reducing the duty ratio of the rectification driving signal.

4. The drive control module according to any one of claims 1 to 3, further comprising an upper tube gate voltage detection unit and/or a lower tube gate voltage detection unit, wherein,

the upper tube gate voltage detection unit is used for outputting an upper tube open/close state signal based on the upper tube driving voltage and the first comparison voltage, and the upper tube gate voltage detection unit is configured to: when the magnitude relation between the upper tube driving voltage and the first comparison voltage changes, the level of the upper tube opening and closing state signal is changed;

5. The driving control module of claim 4, wherein the driving control module comprises the upper gate voltage detection unit, a first preset voltage difference exists between the first comparison voltage and a turn-off voltage of the upper gate, and the first preset voltage difference is set based on a signal transfer delay time of the synchronous rectification circuit; and/or a second preset voltage difference exists between the second comparison voltage and the closing voltage of the lower tube, and the second preset voltage difference is set based on the signal transmission delay time of the synchronous rectification circuit.

6. The drive control module of claim 4, wherein the upper gate voltage detection unit comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, a first resistor, a second resistor, and a third resistor; wherein the content of the first and second substances,

the first triode is a PNP triode, and an emitting electrode of the first triode is used for acquiring the upper tube driving voltage;

the second triode is an NPN triode, a collector of the second triode is connected with a collector of the first triode, an emitter of the second triode is used for grounding, and the collector of the second triode is also connected with a base of the second triode;

the third triode is a PNP triode, an emitting electrode of the third triode is connected with an emitting electrode of the first triode, and a base electrode of the third triode is connected with a base electrode of the first triode;

the fourth triode is an NPN type triode, a collector of the fourth triode is connected with a base of the first triode, the base of the fourth triode is used for acquiring a second reference voltage, and the second reference voltage is generated based on the first reference voltage; an emitter of the fourth triode is connected with a collector of the third triode;

the base electrode of the fifth triode is connected with the base electrode of the first triode, and the collector electrode of the fifth triode is connected with the emitter electrode of the fourth triode;

the sixth triode is a PNP triode, the base of the sixth triode is connected with the base of the first triode, the emitter of the sixth triode is connected with the emitter of the fifth triode, and the collector of the sixth triode is used for outputting an on-off state signal of the upper pipe;

the seventh triode is an NPN type triode, the base electrode of the seventh triode is connected with the base electrode of the second triode, the collector electrode of the seventh triode is connected with the collector electrode of the sixth triode, and the emitter electrode of the seventh triode is used for grounding;

the first end of the first resistor is used for connecting an input power supply of the synchronous rectification circuit, and the second end of the first resistor is connected with an emitting electrode of the fifth triode; the second end of the first resistor is also used for outputting the first comparison voltage;

the first end of the second resistor is connected with the second end of the first resistor, and the second end of the second resistor is connected with the base electrode of the first triode;

the first end of the third resistor is connected with the collector of the third triode, and the second end of the third resistor is used for grounding;

and/or the presence of a gas in the gas,

the lower tube gate voltage detection unit comprises an eighth triode, a ninth triode, a thirteenth triode, an eleventh triode, a twelfth triode, a thirteenth triode, a fourteenth triode and a fifteenth triode; wherein the content of the first and second substances,

the eighth triode is a PNP triode, a collector of the eighth triode is connected with a base of the eighth triode, and an emitter of the eighth triode is used for acquiring bias current;

the ninth triode is a PNP triode, an emitting electrode of the ninth triode is connected with a collector electrode of the eighth triode, a base electrode of the ninth triode is used for obtaining the driving voltage of the lower tube, and the collector electrode of the ninth triode is used for being grounded;

the thirteenth polar tube is a PNP type polar tube, an emitting electrode of the thirteenth polar tube is connected with an emitting electrode of the eighth polar tube, and a base electrode of the thirteenth polar tube is connected with a base electrode of the eighth polar tube;

the eleventh triode is an NPN type triode, a collector of the eleventh triode is connected with a collector of the thirteenth triode, a collector of the eleventh triode is also connected with a base of the eleventh triode, and an emitter of the eleventh triode is used for being grounded;

the twelfth triode is a PNP triode, an emitting electrode of the twelfth triode is connected with an emitting electrode of the eighth triode, and a collecting electrode of the twelfth triode is used for outputting the lower tube opening and closing state signal;

the thirteenth triode is an NPN type triode, a collector of the thirteenth triode is connected with a collector of the twelfth triode, a base of the thirteenth triode is connected with a base of the eleventh triode, and an emitter of the thirteenth triode is used for being grounded;

the fourteenth triode is a PNP triode, an emitter of the fourteenth triode is connected with an emitter of the twelfth triode, a base of the fourteenth triode is connected with a base of the twelfth triode, and the base of the fourteenth triode is also connected with a collector of the fourteenth triode;

7. The drive control module of claim 4, further comprising a core logic unit;

the driving control module comprises a lower tube grid voltage detection unit, and the core logic unit is used for acquiring an open-close state signal of the lower tube; the core logic unit is configured to: when the rectifying driving signal is at a high level and the lower tube opening and closing state signal corresponds to the lower tube being in a closed state, switching the upper tube control signal to be at a first level; the first level corresponds to an on control of the upper tube; otherwise, switching the upper tube control signal to a level opposite to the first level;

and/or the presence of a gas in the gas,

the driving control module comprises an upper tube grid voltage detection unit, and the core logic unit is used for acquiring an upper tube opening and closing state signal; the core logic unit is configured to: when the rectifying driving signal is at a low level and the upper tube opening and closing state signal corresponds to the upper tube being in a closed state, switching the lower tube control signal to be at a second level; the second level corresponds to an on control of the lower tube; otherwise, the lower tube control signal is switched to a level opposite to the second level.

8. The drive control module of claim 7, wherein the drive control module comprises the upper tube gate voltage detection unit and the lower tube gate voltage detection unit; the core logic unit includes: a sixteenth triode, a seventeenth triode, an eighteenth triode, a nineteenth triode, a twentieth triode, a twenty-first triode, a twenty-second triode, a fourth resistor, a fifth resistor and a sixth resistor; wherein the content of the first and second substances,

the sixteenth triode is an NPN triode, a collector of the sixteenth triode is used for acquiring bias current, a base of the sixteenth triode is used for acquiring the rectification driving signal, and an emitter of the sixteenth triode is used for grounding;

the seventeenth triode is an NPN triode, the base of the seventeenth triode is connected with the collector of the sixteenth triode through the fourth resistor, the collector of the seventeenth triode is used for acquiring the bias current, the collector of the seventeenth triode is also used for outputting the upper tube control signal, and the emitter of the seventeenth triode is used for grounding;

the eighteenth triode is an NPN triode, a collector of the eighteenth triode is connected with a collector of the seventeenth triode, a base of the eighteenth triode is used for acquiring the switching state signal of the lower tube through the fifth resistor, and an emitter of the eighteenth triode is used for grounding;

the nineteenth triode is a PNP type triode, a base of the nineteenth triode is used for obtaining a second reference voltage, and the second reference voltage is generated based on the first reference voltage; an emitter of the nineteenth triode is connected with a collector of the seventeenth triode, and the collector of the nineteenth triode is used for being grounded;

the twenty-third triode is an NPN triode, the base electrode of the twentieth triode is connected with the collector electrode of the sixteenth triode through the sixth resistor, the collector electrode of the twentieth triode is used for obtaining the bias current, and the emitter electrode of the twentieth triode is used for being grounded;

the twenty-first triode is an NPN triode, a collector of the twenty-first triode is used for acquiring the bias current, a base of the twenty-first triode is connected with a collector of the twenty-second triode, an emitter of the twenty-first triode is used for grounding, and the collector of the twenty-first triode is also used for outputting the tube-descending control signal;

9. The drive control module of claim 8, wherein the core logic unit further comprises: a twenty-third triode, a twenty-fourth triode, a twenty-fifth triode, a twenty-sixth triode, a twenty-seventh triode, a seventh resistor, an eighth resistor and a capacitor; wherein the content of the first and second substances,

the base electrode of the twenty-third triode acquires the switching state signal of the lower tube through the seventh resistor, the collector electrode of the twenty-third triode is used for acquiring the bias current, and the emitter electrode of the twenty-third triode is used for grounding;

the twenty-fourth triode is an NPN type triode, the base electrode of the twenty-fourth triode is connected with the collector electrode of the twenty-third triode, the collector electrode of the twenty-fourth triode is used for obtaining the bias current, and the emitter electrode of the twenty-fourth triode is used for grounding;

the twenty-fifth triode is a PNP triode, an emitter of the twenty-fifth triode is connected with a collector of the twenty-fourth triode, a base of the twenty-fifth triode is used for acquiring the second reference voltage, and the collector of the twenty-fifth triode is used for grounding;

the twenty-sixth triode is a PNP triode, an emitting electrode of the twenty-sixth triode is used for acquiring the bias current, a base electrode of the twenty-sixth triode is connected with a collector electrode of the twenty-fourth triode, and the collector electrode of the twenty-sixth triode is used for grounding;

a first end of the capacitor is connected with an emitting electrode of the twenty-sixth triode, and a second end of the capacitor is connected with a first end of the eighth resistor;

the first end of the eighth resistor is further used for acquiring the bias current;

10. A synchronous rectification circuit, which is characterized by comprising an upper tube, a lower tube, an upper tube driving module, a lower tube driving module and a driving control module according to any one of claims 1-9.