CN114566203A - Flash rapid detection device and method - Google Patents
Flash rapid detection device and method Download PDFInfo
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- CN114566203A CN114566203A CN202210155645.7A CN202210155645A CN114566203A CN 114566203 A CN114566203 A CN 114566203A CN 202210155645 A CN202210155645 A CN 202210155645A CN 114566203 A CN114566203 A CN 114566203A
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/10—Test algorithms, e.g. memory scan [MScan] algorithms; Test patterns, e.g. checkerboard patterns
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/38—Response verification devices
- G11C29/42—Response verification devices using error correcting codes [ECC] or parity check
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- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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Abstract
The invention discloses a Flash rapid detection device and a method thereof, wherein the device comprises: the error correction module is used for identifying error position information during data reading and writing; the timing module sends out a time enabling signal according to a set periodic interval; the counting module is used for counting the error counts of all the areas according to the error position information, positioning the area with the maximum count as a target area when the time enable signal and the idle enable signal exist at the same time, eliminating the time enable signal and clearing the counts of all the areas; the error detection module is used for backing up the data of the target area and detecting the target area after the data are backed up, when the reading operation is to be recovered, the detection is suspended, the backup data are kept, the detection progress is saved, the target area which is not detected completely is detected continuously when an idle enabling signal appears next time, and a new target area is obtained for detection until the current target area is detected completely, so that the frequency-adjustable local detection is realized, and the detection efficiency is improved.
Description
Technical Field
The invention belongs to the technical field of storage, and particularly relates to a Flash rapid detection device and method.
Background
With the development of integrated circuit technology, a Flash memory module as a long-life nonvolatile memory module has the characteristics of small volume, large capacity and high speed, and the share of the Flash memory module in memory module equipment is increased year by year.
With the continuous progress of the process, the density and the complexity of the Flash memory module are also continuously improved, so that the possibility of defects of the Flash memory module is increased, the obvious defects can be corrected by detection when the Flash memory module leaves a factory, and the defects which are partially hidden can appear in frequent erasing, so that the stored data has problems. Although the multilayer Flash has high cost performance of storage capacity and price, the reliability of the multilayer Flash is continuously reduced, and the multilayer Flash mainly reflects in the aspects of increased error rate, reduced service life and the like after repeated use. If the detection is not carried out, the error rate can reach the upper limit of error correction quickly, so that the normal work of the storage module is influenced, and the performance of the storage module is reduced. Most of the existing detection technologies are comprehensive detection, and the mode can occupy a large amount of resources of the storage module after leaving a factory, so that the detection efficiency is not high.
Disclosure of Invention
In view of the above defects or improvement requirements of the prior art, the present invention provides a Flash rapid detection apparatus and method, which aims to improve the detection efficiency.
To achieve the above object, according to an aspect of the present invention, there is provided a Flash rapid detection apparatus, including:
the error correction module is used for identifying error position information of the transmission information during data reading and writing;
the timing module is used for timing and sending out a time enabling signal according to a set periodic interval;
the counting module is used for counting the error counts of all the areas according to the error position information fed back by the error correction module, comparing the counts of all the areas when the time enable signal and the idle enable signal representing the stop of reading the Flash data exist at the same time, eliminating the time enable signal and clearing the counts of all the areas after the area with the maximum count is used as a target area and sent to the error detection module;
and the error detection module is used for backing up the data of the target area when the idle enabling signal occurs and detecting the target area after the backup, when the Flash data reading operation is to be executed, suspending detection and reserving the backup data, saving the detection progress, and continuously detecting the target area which is not detected completely when the idle enabling signal occurs next time until a new target area is obtained for detection after the detection of the current target area is finished.
In one embodiment, the statistical module comprises an address calculation module, an error count register module, and a maximum detection module, wherein,
the address calculation module is used for calculating an error occurring address according to the error position information err _ info and transmitting the address to the error counting and registering module through addr _ num information;
the error counting register module is used for receiving addr _ num information and increasing the counting of the corresponding address area after receiving the addr _ num information each time;
the maximum value detection module is used for acquiring a time enable signal and an idle enable signal, comparing error counts of all areas when the time enable signal and the idle enable signal exist at the same time, sending the area with the maximum count to the error detection module as a target area, eliminating the time enable signal and clearing the count of all areas in the error count register.
In one embodiment, the error detection module returns an act _ end signal to the maximum detection module after the current target area is detected, the maximum detection module determines whether the act _ end signal is received after sending the previous target area, if so, the next target area is selected and sent continuously, and if not, the operation is not performed.
In one embodiment, the error correction module comprises a BCH decoder comprising a syndrome calculation module, an error polynomial calculation module, and a chien search module, wherein,
the syndrome calculation module identifies errors in data transmission and sends an err _ en enable signal when an error occurs;
the money searching module calculates error positions in sequence and sends out corresponding err _ info information when an error position is obtained, wherein each err _ info information comprises a position where a corresponding error occurs;
and the counting module starts counting after receiving the err _ en enabling signal and accumulates error counts of corresponding areas according to err _ info information.
In one embodiment, the information format entering the error correction module comprises a data code, a check code, an error identification bit and error information, wherein the length of the error information in the information format is the same as that of the data code; the error correction module is used for generating an error mark at the error identification position and enabling the level of the corresponding position in the error information to be overturned when recognizing that the data reading has an error; the error correction module is also used for intercepting the check code, the error identification and the error information after error correction, sending an err _ en enabling signal when the error identification occurs, and sending the intercepted error information to the statistical module through err _ info information;
and the counting module starts counting after receiving the err _ en enabling signal and accumulates error counts of corresponding areas according to err _ info information.
In one embodiment, the error information entering the error correction module is all 0 characters, the position of each character in the error information is the same as the position of the corresponding character in the data code, and when the error information intercepted by the error correction module has a character 1, it indicates that the data code has an error at the current position.
In one embodiment, the error detection module comprises a backup area, the backup area comprises a backup data area, a block information area with an external interface and a detection progress area with an external structure,
the error detection module is used for storing the received address of the target area and the error count data information detected by the target area in the block information area, and the block information area transmits the error count data information through a corresponding external interface;
the detection progress area is used for storing detection algorithms, an external interface of the detection progress area is used for modifying internal detection algorithms, the error detection module is used for backing up data of a target area to the backup data area and then calling the detection algorithms of the detection progress area to detect the target area, and the detection progress is stored in the detection progress area when detection is interrupted so as to restore detection according to the detection progress when detection is carried out next time.
In one embodiment, the timing module includes a page area timing submodule and a sector timing submodule, the time enable signal includes a page area enable signal and a sector enable signal, the page area timing submodule is configured to send the page area enable signal according to a page area cycle interval, the sector timing submodule is configured to send the sector enable signal according to a sector cycle interval, wherein the sector cycle interval is greater than the page area cycle interval;
when only the page area enabling signal appears, the sector continuously counts, takes the page area with the maximum error count as a target area, clears the count of the page area and eliminates the page area enabling signal;
when the sector enable signal occurs, the sector having the largest error count is taken as a target area and the counts of the sector and the page area are cleared at the same time and the page area enable signal and the sector enable signal are eliminated.
According to another aspect of the present invention, a Flash fast detection method is provided, including:
setting a period interval, timing and sending out a time enabling signal according to the set period interval;
acquiring error position information of transmission information during data reading and writing during timing;
counting error counts of each area according to the error position information, comparing the counts of each area when a time enable signal and an idle enable signal representing Flash data reading stop exist at the same time, eliminating the time enable signal and clearing the counts of each area after the area with the maximum count is taken as a target area;
when an idle enable signal appears, backing up data of a target area and detecting the target area after the backup, when Flash data reading operation is to be executed, suspending detection and reserving backup data, saving detection progress and continuing to detect the target area which is not detected completely at the next time when the idle enable signal appears until a new target area is obtained for detection after the current target area is detected completely.
In one of the embodiments, the first and second electrodes are,
setting a period interval, timing and sending out a time enable signal according to the set period interval, comprising:
setting a page area period interval and a sector period interval, timing the page area and the sector respectively, sending a page area enabling signal once the page area period interval is reached, and sending a sector enabling signal once the sector period interval is reached;
when the time enable signal and the idle enable signal which represents the stop of reading the Flash data exist at the same time, the method compares the counts of the areas, eliminates the time enable signal and clears the counts of the areas after the area with the maximum count is taken as a target area, and comprises the following steps:
when only the page area enabling signal appears, the sector continuously counts, takes the page area with the maximum error count as a target area, clears the count of the page area and eliminates the page area enabling signal;
when the sector enable signal occurs, the sector having the largest error count is taken as a target area and the counts of the sector and the page area are cleared at the same time and the page area enable signal and the sector enable signal are eliminated.
In general, compared with the prior art, the above technical solution contemplated by the present invention can achieve the following beneficial effects:
according to the method, the position information of errors in read data is identified by using an error correction module arranged in Flash, so that the errors in each area are accumulated, through a preset period interval, timing is carried out during the operation of the Flash and a time enable signal is sent out according to the period interval, when the time enable signal is received, the current period is shown to be ended, and the next period is about to enter, at the moment, once an idle signal for stopping reading of the Flash is obtained, error counts in each area are compared, the area with the largest error count is used as a target area for local detection, and the local detection is used for replacing the traditional comprehensive detection to improve the detection efficiency.
The frequency of the error detection can be adjusted by setting the period interval, the longer the period interval is, the lower the frequency of the error detection is, and the shorter the period interval is, the higher the frequency of the error detection is. Therefore, the detection frequency can be adjusted according to the performance and the state of Flash, if the data reading error rate of Flash is high, the detection frequency can be increased to find problems in time, and if the data reading error rate of Flash is low, the detection frequency can be reduced to reduce loss. Meanwhile, in the method and the device, after the current target area is determined, the time enable signal is eliminated in time, error counting is cleared, statistics of the next period can be started, a new target area is determined and detected, and the detection period is ensured to be continuously carried out.
During the detection process, if Flash needs to perform data reading and interrupts the error detection process being executed, backup is reserved and the detection progress is saved, and detection is recovered according to detection when the next idle, so that repeated detection on the detected part is avoided, and the detection efficiency is further improved.
Drawings
FIG. 1 is a block diagram illustrating a Flash rapid detection apparatus according to an embodiment of the present application;
FIG. 2 is a specific structural diagram of a Flash rapid detection device in an embodiment of the present application;
FIG. 3 is a timing diagram illustrating a trigger compare operation in one embodiment of the present application;
FIG. 4 shows an information format for Flash data reading in an embodiment of the present application;
FIG. 5 is a diagram illustrating marking of an error location by error information in an embodiment of the present application;
FIG. 6 is a flowchart illustrating the detection by setting the information format according to an embodiment of the present application;
fig. 7 is a structural diagram of a backup area in an embodiment of the present application;
fig. 8 is a flowchart illustrating steps of a Flash rapid detection method in an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
As shown in fig. 1, the Flash fast detection device includes an error correction module, a timing module, a statistics module, and an error detection module.
The error correction module is a module carried in the Flash, and when the Flash is subjected to data reading, the error correction module identifies and corrects errors of transmission information during the data reading. When Flash stops reading data, the main controller sends out an idle enable signal free _ en. In the present application, the error module transmits the identified error location information err _ info to the statistics module during operation.
The timing module is used for timing, sending a time enable signal time to the counting module when a set period interval is reached, setting the period interval to be delta t according to needs, and sending the time enable signal time every delta t. Specifically, the timing module may be controlled by a program or may be implemented by using a built-in clock circuit.
The counting module has two functions of accumulation and comparison, wherein the accumulation is to count the error count of each area according to the error position information err _ info, and when a plurality of error position information err _ info are continuously received, the count of the corresponding area is accumulated. When the counting module receives the time enabling signal and the space signal, a comparison operation is started, namely when the time enabling signal and an idle enabling signal representing Flash data reading stop exist at the same time, the counting of each area is compared, and the area with the largest counting is taken as a target area to be sent to the error detection module. The time enable signal is then removed and the count for each zone is cleared so that the count for the next cycle and the location of the target zone can be performed.
After the error detection module obtains a new target area address, the error detection work is started in the Flash data reading idle stage. Specifically, when an idle enable signal free _ en appears, data of a target area is backed up and the target area is detected after the data is backed up; when the Flash data reading operation is to be executed, the detection is suspended, the backup data is reserved, the detection progress is saved, the target area which is not detected completely is detected continuously when the idle enabling signal appears next time, and the new target area is obtained for detection after the current target area is detected completely.
According to the method and the device, the error correction module in the Flash is used for identifying the position information of the error in the read data so as to accumulate the errors in each area. Timing during the Flash operation period through a preset period interval, sending a time enabling signal according to the period interval, and when the time enabling signal is received, indicating that the current period is finished, namely entering the next period. At this time, once the idle signal that the Flash stops reading is acquired, the error counts of the regions are compared, the region with the largest error count is used as the target region for local detection, and the local detection is used for replacing the traditional overall detection so as to improve the detection efficiency. The frequency of the error detection can be adjusted by setting the period interval, the longer the period interval is, the lower the frequency of the error detection is, and the shorter the period interval is, the higher the frequency of the error detection is. Therefore, the detection frequency can be adjusted according to the performance and the state of the Flash. If the data reading error rate of Flash is larger, the detection frequency can be increased to find problems in time, and if the data reading error rate of Flash is smaller, the detection frequency can be reduced to reduce loss. Meanwhile, in the method and the device, after the current target area is determined, the time enable signal is eliminated in time, the error count is cleared, the statistics of the next period can be started, a new target area is determined and detected, and the continuous operation of the detection period is ensured. During the detection process, if Flash needs to perform data reading and interrupts the error detection process being executed, backup is reserved and the detection progress is saved, and detection is recovered according to detection when the next idle, so that repeated detection on the detected part is avoided, and the detection efficiency is further improved.
In a specific embodiment, when the main controller stops reading data from Flash, the idle enable signal free _ en is continuously sent out, and when the data reading operation from Flash is to be resumed, the idle enable signal free _ en is cancelled, so that whether the main controller is in the read idle state can be judged according to whether the idle enable signal free _ en exists or not. In a specific embodiment, the time enable signal time is a pulse signal sent out after the timer period interval is reached, the time enable signal time is stored in the statistical module, and the stored time enable signal time is cleared when the time enable signal time is eliminated after the target area is determined.
In an embodiment, as shown in fig. 2, the statistical module includes an address calculation module, an error count register module, and a maximum detection module, wherein the error correction module may be a Flash module, and the address calculation module, the error count register module, the maximum detection module, and the error detection module may be externally extended fast detection modules.
After receiving the error position information err _ info fed back by the error correction module, the address error module calculates an error occurring address, and transmits the address to the error counting and registering module through addr _ num information. It should be noted that the error position in the transmission data acquired by the error correction module is a position in the string of data, data reading and writing in the flash is performed according to a page, the address calculation module performs calculation according to the position where the error occurs and the initial address where the error occurs, so as to determine the address information of the page area where the error occurs and the corresponding sector address information, and then transmits the address information addr _ num to the error number registration module.
The error counting register module is used for receiving the addr _ num information and increasing the counting of the corresponding address area after receiving the addr _ num information each time.
The maximum value detection module is used for executing comparison operation, and the condition for starting the operation comprises that an idle enable signal free _ en and a time enable signal time are received, when the two signals exist simultaneously, the error count corresponding to each area address addr _ all in the error number register module is scanned and compared, and the address corresponding to the maximum error count is recorded as a target area.
As shown in fig. 3, there are various cases of starting the comparison operation:
first, for example, in the detection count segment 1 of fig. 3, a time enable signal time is sent after the first periodic interval ends, and then an idle enable signal free _ en is received after a period of time, at which time the comparison operation is started. In this case, although there is a certain margin of deviation in the actual detection count period from the preset cycle interval, the deviation in this time is generally small and its influence is negligible.
Second, for example, in the detection count segment 2 of fig. 3, the time enable signal time is sent after the second periodic interval is over, and is already idle, so that the comparison operation can be started when the time enable signal time appears.
Third, when the enable signal time and the idle enable signal free _ en are simultaneously asserted, the compare operation may be initiated.
In a special case, the previously scanned area is taken as the target area if the error count of the plurality of areas is simultaneously maximized. And after the target area is determined, the address of the target area is sent to an error detection module, then a time enable signal time is eliminated, the error count is cleared, and the statistics and the search of the next period are restarted.
In an embodiment, as shown in fig. 2, after the maximum module finishes scanning, an act _ en signal is sent to the error detection module, and then the address err _ addr of the target area is sent to the error detection module, after the error detection module finishes all detection tasks, the error detection module restores the backup data to the original area space, and then an act _ end signal is sent to the maximum detection module to indicate that the detection task has ended. And after the maximum value detection module sends the last target area, judging whether an act _ end signal is received, if so, selecting the next target area and continuing to send, and if not, not working.
In one embodiment, as shown in fig. 2, the timing module includes a page area timing submodule and a sector timing submodule, the timing enable signal includes a page area enable signal t1 and a sector enable signal t2, the page area timing submodule is configured to send out a page area enable signal t1 according to a page area cycle interval, the sector timing submodule is configured to send out a sector enable signal t2 according to a sector cycle interval, wherein the sector cycle interval is greater than the page area cycle interval, and a plurality of page area cycle intervals exist in one sector cycle interval. When the idle enable signal is present:
when only the page area enable signal t1 exists, the sector keeps counting, takes the page area with the largest error count as the target area and clears the count of the page area and eliminates the page area enable signal;
when only the sector enable signal t2 exists, or both the sector enable signal t2 and the page area enable signal t1 exist, the sector having the largest error count is taken as a target area and the counts of the sector and the page area are cleared and the page area enable signal and the sector enable signal are eliminated at the same time, i.e., the priority of sector detection is higher.
In one embodiment, the error correction module comprises a BCH decoding module and an error information error correction sub-module, and the BCH decoding module comprises a syndrome calculation module, an error polynomial calculation module and a chien search module. When the syndrome calculation module is started, as long as there is an error in the transmitted data, an err _ en enabling signal is sent to the error number registration module when the syndrome calculation is finished, so that the error number registration module is started to record the error number. And then the chien search module calculates error positions in sequence, and each time an error position is obtained, an err _ info message is sent to the address calculation module, wherein the err _ info comprises the position of the error occurring in a string of data. The address calculation module calculates according to the position where the error occurs and the initial address where the error occurs, so as to determine the address information of the page area where the error occurs and the corresponding sector address information, and then transmits the address information addr _ num to the error number registration module. The error number register module receives the address information of the target area and then increases the count on the corresponding sector and page area register module.
The common information includes a data code and a check code, and in an embodiment, as shown in fig. 4, the information transmission direction is along the arrow direction, and an error flag and an error message are added on the basis of the original information, where an initial value of the error message is a preset information value. During external transmission, only the data code is sent out by the Flash, and other information (check code, error sign and error information) can be intercepted internally.
In the error correction process, as shown in fig. 5, all 0 error information is set and the same length as the original information, and when error correction occurs (that is, the corresponding position is level-inverted 0- >1), error information is obtained. The address module can analyze the address of the area where the error occurs only by knowing the first address and the position of 1 in the scanning error information, and set an error flag bit as long as one 1 exists in the content of the error information, which means that the error occurs.
As shown in fig. 6, after the system is started, when data is read from Flash, the error-corrected data is transmitted according to the data format, the detection module waits for an error flag to appear, if the error flag is not detected, no operation is performed, and if the error flag appears, an err _ en enable signal is sent to the error register.
After receiving the err _ en signal, the subsequent error location information err _ info is sent to the address calculation module. If the transmission is not over, the data is read, and the error flag is detected.
In an embodiment, as shown in fig. 7, the error detection module includes a backup area, and the backup area includes a block information area, a detection progress area, and a backup data area. And external interfaces are reserved in the block information area and the detection progress area. The external interface of the block information area mainly transmits the detected error data information, including error address and error type. And the external interface of the detection progress area is used for modifying the built-in algorithm data.
Firstly, the error detection module will preferentially put the address information of the target area into the block information area in the backup area, then backup the data in the target area to the backup data area, and then detect the target area.
The error detection module is divided into a plurality of different detections according to detection algorithms, and when each detection is finished, the detection progress is stored in the detection progress area, meanwhile, data required by part of algorithm detection is also stored in the area, and the data required in the detection is read from the area in the actual detection.
The error detection module packs the error address and the error type into an error data information packet and writes the error data information packet into the block information area every time the error detection module detects an error.
When the error detection module works, if the free enable signal free _ en is ended, the Flash memory is to restore the working state. At this moment, the error detection module stops working, restores the data in the backup data area to the original area, continuously retains the data stored in the backup area until the next arrival of the free _ en signal, directly restores the detection state at this moment, restores the stored progress condition according to the progress data in the detection progress area, and then continuously detects. After the detection of the block is completed, all error data information is stored in the block information area.
After finishing all detection tasks, the error detection module restores the backup data to the original area space and then sends an escape _ end signal to the maximum detection module to indicate that the detection tasks are finished. After the maximum detection module receives the act _ end signal, a new round of process is started.
Correspondingly, the present application also relates to a Flash rapid detection method, as shown in fig. 8, the Flash rapid detection method includes:
timing: setting a period interval, timing and sending out a time enable signal according to the set period interval;
information acquisition: acquiring error position information of transmission information during data reading and writing during timing;
target positioning: and counting error counts of the regions according to the error position information, comparing the counts of the regions when the time enable signal and the idle enable signal representing the stop of reading the Flash data exist at the same time, eliminating the time enable signal and clearing the counts of the regions after the region with the maximum count is taken as a target region.
Error detection: when an idle enable signal appears, backing up data of a target area and detecting the target area after the backup, when Flash data reading operation is to be executed, suspending detection and reserving backup data, saving detection progress and continuing to detect the target area which is not detected completely at the next time when the idle enable signal appears until a new target area is obtained for detection after the current target area is detected completely.
Specifically, in the timing step, the page area cycle interval and the sector cycle interval may be set respectively, the page area and the sector are timed respectively, the page area enable signal t1 is sent once the page area cycle interval is reached, and the sector enable signal t2 is sent once the sector cycle interval is reached. Correspondingly, in the target positioning step, when only the page area enable signal t1 appears, the sectors continuously count, the page area with the largest error count is taken as the target area and the count of the page area is cleared and the page area enable signal t1 is eliminated; when the sector enable signal t2 occurs, the sector having the largest error count is taken as a target area and the counts of the sector and the page area are cleared at the same time and the page area enable signal t1 and the sector enable signal t2 are eliminated.
The Flash rapid detection method corresponds to the Flash rapid detection device, and details thereof can be introduced above, and are not described herein again.
The method and the device utilize the error correction module in the Flash to identify and read the position information of the error in the data so as to accumulate the errors in each area. Timing in the Flash running period through a preset period interval, sending a time enabling signal according to the period interval, and when the time enabling signal is received, indicating that the current period is finished, namely entering the next period. At the moment, once the idle signal that the Flash stops reading is obtained, the error counts of all the areas are compared, the area with the largest error count is used as a target area for local detection, comprehensive detection of the Flash storage module is avoided, the detection frequency is reduced through targeted detection, the detection efficiency and the utilization rate of the controller are improved, and meanwhile the service life of the Flash storage is prolonged. The frequency of the error detection can be adjusted by setting the period interval, the longer the period interval is, the lower the frequency of the error detection is, and the shorter the period interval is, the higher the frequency of the error detection is. Therefore, the detection frequency can be adjusted according to the performance and the state of the Flash. If the data reading error rate of Flash is high, the detection frequency can be increased to find problems in time, and if the data reading error rate of Flash is low, the detection frequency can be reduced to reduce loss. Meanwhile, in the method and the device, after the current target area is determined, the time enable signal is eliminated in time, error counting is cleared, statistics of the next period can be started, a new target area is determined and detected, and the detection period is ensured to be continuously carried out. During the detection process, if Flash needs to perform data reading and interrupts the error detection process being executed, backup is reserved and the detection progress is saved, and detection is recovered according to detection when the next idle, so that repeated detection on the detected part is avoided, and the detection efficiency is further improved.
It will be understood by those skilled in the art that the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the invention, and that any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (10)
1. A Flash rapid detection device is characterized by comprising:
the error correction module is used for identifying error position information of the transmission information during data reading and writing;
the timing module is used for timing and sending out a time enabling signal according to a set periodic interval;
the counting module is used for counting the error counts of all the areas according to the error position information fed back by the error correction module, comparing the counts of all the areas when the time enable signal and the idle enable signal representing the stop of reading the Flash data exist at the same time, eliminating the time enable signal and clearing the counts of all the areas after the area with the maximum count is taken as a target area and sent to the error detection module;
and the error detection module is used for backing up the data of the target area when the idle enabling signal occurs and detecting the target area after the backup, when the Flash data reading operation is to be executed, suspending detection and reserving the backup data, saving the detection progress, and continuously detecting the target area which is not detected completely when the idle enabling signal occurs next time until a new target area is obtained for detection after the detection of the current target area is finished.
2. The Flash rapid detection device according to claim 1, wherein the statistical module comprises an address calculation module, an error count register module and a maximum value detection module, wherein,
the address calculation module is used for calculating an error occurring address according to the error position information err _ info and transmitting the address to the error counting and registering module through addr _ num information;
the error counting register module is used for receiving addr _ num information and increasing the counting of the corresponding address area after receiving the addr _ num information each time;
the maximum value detection module is used for acquiring a time enable signal and an idle enable signal, comparing error counts of all areas when the time enable signal and the idle enable signal exist at the same time, sending the area with the maximum count to the error detection module as a target area, eliminating the time enable signal and clearing the count of all areas in the error count register.
3. The Flash fast detection device according to claim 2, wherein the error detection module returns an act _ end signal to the maximum detection module after the current target area is detected, the maximum detection module determines whether the act _ end signal is received after sending the previous target area, if so, the next target area is selected and sent continuously, and if not, the operation is not performed.
4. The Flash fast detection apparatus according to claim 1, wherein the error correction module comprises a BCH decoder comprising a syndrome calculation module, an error polynomial calculation module, and a chien search module, wherein,
the syndrome calculation module identifies errors in data transmission and sends an err _ en enable signal when an error occurs;
the money searching module calculates error positions in sequence and sends out corresponding err _ info information when an error position is obtained, wherein each err _ info information comprises a position where a corresponding error occurs;
and the counting module starts counting after receiving the err _ en enabling signal and accumulates error counts of corresponding areas according to err _ info information.
5. The Flash rapid detection device according to claim 1, wherein the information format entered into the error correction module includes a data code, a check code, an error identification bit and error information, and the error information in the information format has the same length as the data code; the error correction module is used for generating an error mark at the error identification position and enabling the level of the corresponding position in the error information to be overturned when recognizing that the data reading has an error; the error correction module is also used for intercepting the check code, the error identification and the error information after error correction, sending an err _ en enabling signal when the error identification occurs, and sending the intercepted error information to the statistical module through err _ info information;
and the counting module starts counting after receiving the err _ en enabling signal and accumulates error counts of corresponding areas according to err _ info information.
6. The Flash rapid detection device according to claim 1, wherein the error information entered into the error correction module is all 0 characters, the position of each character in the error information is the same as the position of the corresponding character in the data code, and when there is a character 1 in the error information intercepted by the error correction module, it indicates that there is an error in the data code at the current position.
7. The Flash rapid detection device according to claim 1, wherein the error detection module comprises a backup area, the backup area comprises a backup data area, a block information area with an external interface, and a detection progress area with an external structure,
the error detection module is used for storing the received address of the target area and the error count data information detected by the target area in the block information area, and the block information area transmits the error count data information through a corresponding external interface;
the detection progress area is used for storing a detection algorithm, an external interface of the detection progress area is used for modifying an internal detection algorithm, the error detection module is used for backing up data of a target area to the backup data area and then calling the detection algorithm of the detection progress area to detect the target area, and the detection progress is stored in the detection progress area when detection is interrupted so as to restore detection according to the detection progress when detection is carried out next time.
8. The Flash fast detection device according to claim 1, wherein the timing module includes a page area timing submodule and a sector timing submodule, the time enable signal includes a page area enable signal and a sector enable signal, the page area timing submodule is configured to send out the page area enable signal according to a page area cycle interval, the sector timing submodule is configured to send out the sector enable signal according to a sector cycle interval, wherein the sector cycle interval is greater than the page area cycle interval;
when only the page area enabling signal appears, the sector continuously counts, takes the page area with the maximum error count as a target area, clears the count of the page area and eliminates the page area enabling signal;
when the sector enable signal occurs, the sector having the largest error count is taken as a target area and the counts of the sector and the page area are cleared at the same time and the page area enable signal and the sector enable signal are eliminated.
9. A Flash rapid detection method is characterized by comprising the following steps:
setting a period interval, timing and sending out a time enabling signal according to the set period interval;
acquiring error position information of transmission information during data reading and writing during timing;
counting error counts of each area according to the error position information, comparing the counts of each area when a time enable signal and an idle enable signal representing Flash data reading stop exist at the same time, eliminating the time enable signal and clearing the counts of each area after the area with the maximum count is taken as a target area;
when an idle enable signal appears, backing up data of a target area and detecting the target area after the backup, when Flash data reading operation is to be executed, suspending detection and reserving backup data, saving detection progress and continuing to detect the target area which is not detected completely at the next time when the idle enable signal appears until a new target area is obtained for detection after the current target area is detected completely.
10. The Flash rapid detection method according to claim 9,
setting a period interval, timing and sending out a time enable signal according to the set period interval, comprising:
setting a page area period interval and a sector period interval, timing the page area and the sector respectively, sending a page area enabling signal once the page area period interval is reached, and sending a sector enabling signal once the sector period interval is reached;
when the time enable signal and the idle enable signal which represents the stop of reading the Flash data exist at the same time, the method compares the counts of the areas, eliminates the time enable signal and clears the counts of the areas after the area with the maximum count is taken as a target area, and comprises the following steps:
when only the page area enabling signal appears, the sector continuously counts, takes the page area with the maximum error count as a target area, clears the count of the page area and eliminates the page area enabling signal;
when the sector enable signal occurs, the sector having the largest error count is taken as a target area and the counts of the sector and the page area are cleared at the same time and the page area enable signal and the sector enable signal are eliminated.
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