CN114563689A - Method for testing performance of chip pin - Google Patents

Method for testing performance of chip pin Download PDF

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Publication number
CN114563689A
CN114563689A CN202210218678.1A CN202210218678A CN114563689A CN 114563689 A CN114563689 A CN 114563689A CN 202210218678 A CN202210218678 A CN 202210218678A CN 114563689 A CN114563689 A CN 114563689A
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chip pin
test
performance
chip
pin
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钱裕香
周春晓
袁宝弟
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Wuxi Soft Test Certification Co ltd
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Wuxi Soft Test Certification Co ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

The invention discloses a method for testing the performance of a chip pin, which comprises the following steps: testing mechanical properties; testing the conductivity of the pin; loading voltage testing; testing the loading current; testing the level state; the chip pin can have various test items in the actual test process by performing the performance test of the electrical performance test based on the loading voltage, the loading current and the level state on the chip pin, so that the problem of one-sidedness of the test result of the chip pin in the performance test process can not occur, and meanwhile, the test result of the electrical performance can comprehensively react on the test quality of the chip pin by performing the test of the electrical performance in different aspects, so that the accuracy of the test result is ensured, the quality of the chip pin is ensured through the test, and the chip product which meets the product specification and is qualified in quality is provided for customers.

Description

Method for testing performance of chip pin
Technical Field
The invention relates to the technical field of chip pin performance test, in particular to a method for testing the performance of a chip pin.
Background
Chip pins, also called chip pins, are wires led out from a chip internal circuit and connected with a peripheral circuit, all the pins form an interface of the chip, along with the original higher complexity of the chip, more and more modules are arranged in the chip, the manufacturing process is more and more advanced, and more corresponding failure modes are arranged, so that the whole chip and the pins thereof need to be tested completely and effectively, and the current chip pin testing methods are many, such as basic function testing, electrical performance testing, safety testing, environmental safety and reliability testing and aging life testing;
but at present at the in-process of testing the chip pin, owing to only possess the test function of single aspect, thereby make the performance result that test data reacted have one-sidedness easily, lead to this performance result can't satisfy the comprehensive reaction to chip pin quality, simultaneously, at present, test to the chip pin is generally mostly the test of electrical property, but before the electrical property test, because can't guarantee the manufacturing yield of the mechanical properties and the conductivity of chip pin, and then make follow-up electrical property test's result also cause the deviation, thereby make can't obtain the accurate test result of chip pin performance through the test.
Disclosure of Invention
The invention provides a method for testing the performance of a chip pin, which can effectively solve the problem that the accurate test result of the performance of the chip pin cannot be obtained through the test because the method only has a single-aspect test function in the process of testing the chip pin at present, so that the performance result reflected by test data is easy to have one-sidedness, and the performance result cannot meet the comprehensive response of the quality of the chip pin.
In order to achieve the purpose, the invention provides the following technical scheme: a method for testing the performance of a chip pin specifically comprises the following steps:
s1, testing mechanical properties;
s2, testing the conductivity of the pin;
s3, loading voltage testing;
s4, testing the loading current;
s5, testing the level state;
and S6, evaluating the performance grade.
In S3, the loading voltage test is to load a current test voltage to the chip pin to obtain a test voltage value after the mechanical performance and the conductivity of the chip pin both meet the standard, compare the collected test voltage value with a set voltage parameter, and determine whether the test voltage value meets the requirement by comparison, thereby determining whether the chip pin meets the requirement of the voltage test performance;
in S4, the loading current test is to obtain a test current value by loading a voltage test current to the chip pin after the mechanical performance and the conductivity of the chip pin both meet the standard, compare the collected test current value with a set current parameter, and determine whether the test current value meets the requirement by comparison, thereby determining whether the chip pin meets the requirement of the current test performance;
in S5, the level state test is to load specific logic level and waveform data to a chip pin after the mechanical performance and the conductivity of the chip pin meet the standard, collect the level state of the pin in a set clock cycle, compare the collected level state with an expected logic state, and determine whether the level state meets the requirement by comparison, thereby determining whether the level state test of the chip pin meets the performance requirement.
According to the technical scheme, in S1, the mechanical performance test is to test each welding performance of chip pins, the number, flatness, gap and width of the chip pins are mainly tested by chip pin detection equipment, the horizontal straightness and coplanarity of the pins are mainly tested when the flatness of the pins is tested, and the horizontal straightness of the pins is mainly obtained by measuring the geometric dimensions of multiple positions of the chip pins in the test process.
According to the technical scheme, the chip pin detection equipment is machine vision detection equipment and is mainly used for testing based on a photoelectric integrated system, and when the chip pin detection equipment detects that the mechanical performance of the pin has a quality problem, an alarm signal is sent to prompt and respond.
According to the above technical solution, in S2, the pin connectivity test refers to testing connectivity between each pin, and in a specific test process, the pin connectivity test mainly includes off-path detection and on-path detection;
the off-circuit detection is carried out when the chip pin is not welded into the circuit, positive and negative resistance values between the pins corresponding to the grounding pins are measured by a universal meter, and the measured resistance values are compared with the measured value of the intact chip pin, so that the off-circuit conduction condition of the chip pin is judged.
According to the technical scheme, the on-line detection mainly comprises a detection method for detecting direct current resistance, alternating current and direct current voltage to ground and total working current of each pin of the chip in a circuit through a universal meter, and the on-line conduction condition of the pin of the chip is judged by comparing the data results of the detected direct current resistance, the alternating current and direct current voltage to ground and the total working current with a standard test result, wherein the standard test result refers to the test result of the universal meter on the intact pin of the chip.
According to the above technical solution, in S6, the performance grade evaluation means that the performance of the chip pin is graded according to the test results of the voltage value, the current value and the level state of the chip pin, and the test result of the chip pin is reflected in time by grading the test performance of the chip pin so as to make a judgment in time, specifically, the chip pin is classified into three quality standards of a poor product, a defective product and a good product according to the test results.
According to the technical scheme, the performance grade evaluation specifically comprises the following evaluation conditions in the specific evaluation process:
and when the chip pin cannot meet the requirement of the voltage testing performance, the chip pin cannot meet the requirement of the current testing performance and the chip pin cannot meet the requirement of the level state testing performance, judging that the quality standard of the chip pin is a poor product.
According to the technical scheme, when the chip pin meets the requirement of the voltage test performance, the chip pin cannot meet the requirement of the current test performance, and the chip pin cannot meet the requirement of the level state test performance, the quality standard of the chip pin is judged to be a defective product;
when the chip pin can not meet the requirement of the voltage test performance, the chip pin can not meet the requirement of the current test performance, and the chip pin can not meet the requirement of the level state test performance, judging the quality standard of the chip pin to be a defective product;
and when the chip pin cannot meet the requirement of the voltage testing performance, the chip pin cannot meet the requirement of the current testing performance and the chip pin meets the requirement of the level state testing performance, judging that the quality standard of the chip pin is a defective product.
According to the technical scheme, when the chip pin meets the requirement of the voltage test performance, the chip pin meets the requirement of the current test performance, and the chip pin cannot meet the requirement of the level state test performance, the quality standard of the chip pin is judged to be a defective product;
when the chip pin meets the requirement of the voltage test performance, the chip pin cannot meet the requirement of the current test performance, and the chip pin meets the requirement of the level state test performance, judging the quality standard of the chip pin to be a defective product;
and when the chip pin cannot meet the requirement of the voltage testing performance, the chip pin meets the requirement of the current testing performance and the chip pin meets the requirement of the level state testing performance, judging that the quality standard of the chip pin is a defective product.
According to the technical scheme, when the chip pin meets the requirement of the voltage test performance, the chip pin meets the requirement of the current test performance and the chip pin meets the requirement of the level state test performance, the quality standard of the chip pin is judged to be a superior product.
Compared with the prior art, the invention has the beneficial effects that:
1. before the chip pin is subjected to the electrical performance test based on the states of loading voltage, loading current and level, the mechanical performance and the conduction performance of the chip pin are ensured to be in a good state before the subsequent electrical performance test by testing the mechanical performance and the conduction performance of the chip pin, so that the test result cannot be influenced by each welding performance of the chip pin when the subsequent chip pin is subjected to the electrical performance test, and the performance test result cannot deviate due to the influence of the conduction performance of the chip pin when the subsequent electrical performance test is carried out, so that the chip pin can be subjected to the performance test based on a simple entry test mode before the performance test, an substandard chip can be quickly found out in the early stage of the test, and the substandard chip can be found sooner, thereby reducing unnecessary waste earlier;
2. the chip pin can have various test items in the actual test process by performing the performance test of the electrical performance test based on the loading voltage, the loading current and the level state on the chip pin, so that the problem that the chip pin has one-sidedness in the test result in the performance test process of the chip pin can not occur, and meanwhile, the test result of the electrical performance can comprehensively react on the test quality of the chip pin by performing the test of the electrical performance in different aspects, so that the accuracy of the test result is ensured, the quality of the chip pin is ensured through the test, and the chip product which meets the product specification and is qualified in quality is provided for customers;
3. after the chip pin is subjected to the electrical performance test, the performance grade evaluation processing is carried out on the result of the performance test, so that the chip pin can be conveniently divided into three quality standards of poor quality, defective quality and excellent quality according to the test result, the test result of the chip pin can be conveniently and timely reflected by carrying out the grade division on the test performance of the chip pin, so as to accurately judge the test quality result of the chip in time, and by grading the test result of the chip pins, so that the chips with different quality grades can be repaired in time when the chip pins are repaired subsequently, the efficiency of the repair treatment is improved, so that the chips with different quality grades can obtain the repair processing modes corresponding to the quality, therefore, the repair cost of the chip pins is effectively reduced, and unnecessary loss in chip production is also reduced.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention.
In the drawings:
FIG. 1 is a flow chart of the steps of the test method of the present invention;
FIG. 2 is a schematic diagram of chip pin performance grading according to the present invention.
Detailed Description
The preferred embodiments of the present invention will be described in conjunction with the accompanying drawings, and it will be understood that they are described herein for the purpose of illustration and explanation and not limitation.
Example 1: as shown in fig. 1, the present invention provides a technical solution, a method for testing performance of a chip pin, and the method specifically includes the following steps:
s1, testing mechanical properties;
s2, testing the conductivity of the pin;
s3, loading voltage testing;
s4, testing the loading current;
s5, testing the level state;
and S6, evaluating the performance grade.
In the step S3, the voltage loading test refers to obtaining a test voltage value by loading a current test voltage to the chip pin after the mechanical performance and the conductivity of the chip pin both meet the standard, and comparing the collected test voltage value with a set voltage parameter;
in the step S4, the loading current test is to load a voltage test current to the chip pin to obtain a test current value after the mechanical performance and the conductivity of the chip pin both meet the standard, and compare the collected test current value with a set current parameter;
in S5, the level state test is to load specific logic level and waveform data to a chip pin after the mechanical performance and the conductivity of the chip pin meet the standard, collect the level state of the pin in a set clock cycle, and compare the collected level state with an expected logic state.
Based on the above technical solution, in S1, the mechanical performance test refers to testing each welding performance of the chip pins, the number, flatness, gap and width of the chip pins are mainly tested by the chip pin detection device, the horizontal straightness and coplanarity of the chip pins are mainly tested when the pin flatness is tested, and the horizontal straightness of the chip pins is mainly obtained by measuring the geometric dimensions of multiple positions of the chip pins in the test process.
Based on the technical scheme, the chip pin detection equipment is machine vision detection equipment and is mainly used for testing based on a photoelectric integrated system, and when the chip pin detection equipment detects that the mechanical performance of the pin has a quality problem, an alarm signal is sent to prompt and respond.
Based on the above technical solution, in S2, the pin connectivity test refers to testing connectivity between each pin, and in a specific test process, the pin connectivity test mainly includes off-path detection and on-path detection;
the non-on-path detection is carried out when the chip pin is not welded into the circuit, positive and negative resistance values between the pins corresponding to the grounding pins are measured by a universal meter, and the measured resistance values are compared with the measured values of the intact chip pin, so that the non-on-path conduction condition of the chip pin is judged.
Based on the technical scheme, the on-road detection mainly comprises a detection method for detecting direct current resistance, alternating current and direct current voltage to ground and total working current of each pin of the chip in a circuit through a universal meter, and the on-road conduction condition of the pin of the chip is judged by comparing the data results of the detected direct current resistance, the alternating current and direct current voltage to ground and the total working current with a standard test result, wherein the standard test result refers to the test result of the universal meter on the intact pin of the chip.
As shown in fig. 2, based on the above technical solution, in S6, the performance level evaluation means that the performance of the chip pin is graded according to the test results of the voltage value, the current value and the level state of the chip pin, and the test result of the chip pin is reflected in time by grading the test performance of the chip pin, so as to make a judgment in time.
Based on the above technical scheme, in the specific evaluation process of the performance grade evaluation, if the chip pin cannot meet the requirement of the voltage test performance, the chip pin cannot meet the requirement of the current test performance, and the chip pin cannot meet the requirement of the level state test performance, the quality standard of the chip pin is judged to be a poor product.
Example 2: as shown in fig. 1, the present invention provides a technical solution, a method for testing performance of a chip pin, the method specifically includes the following steps:
s1, testing mechanical properties;
s2, testing the conductivity of the pin;
s3, loading voltage testing;
s4, testing the loading current;
s5, testing the level state;
and S6, evaluating the performance grade.
In the step S3, the voltage loading test means that after the mechanical performance and the conductivity of the chip pin meet the standard, a test voltage value is obtained by loading a current test voltage to the chip pin, and the collected test voltage value is compared with a set voltage parameter;
in the step S4, the loading current test is to load a voltage test current to the chip pin to obtain a test current value after the mechanical performance and the conductivity of the chip pin both meet the standard, and compare the collected test current value with a set current parameter;
in S5, the level state test is to load specific logic level and waveform data to a chip pin after the mechanical performance and the conductivity of the chip pin meet the standard, collect the level state of the pin in a set clock cycle, and compare the collected level state with an expected logic state.
Based on the above technical solution, in S1, the mechanical performance test refers to testing each welding performance of the chip pins, the number, flatness, gap and width of the chip pins are mainly tested by the chip pin detection device, the horizontal straightness and coplanarity of the chip pins are mainly tested when the pin flatness is tested, and the horizontal straightness of the chip pins is mainly obtained by measuring the geometric dimensions of multiple positions of the chip pins in the test process.
Based on the technical scheme, the chip pin detection equipment is machine vision detection equipment and is mainly used for testing based on a photoelectric integrated system, and when the chip pin detection equipment detects that the mechanical performance of the pin has a quality problem, an alarm signal is sent to prompt and respond.
Based on the above technical solution, in S2, the pin connectivity test refers to testing connectivity between each pin, and includes mainly off-path detection and on-path detection in a specific test process;
the non-on-path detection is carried out when the chip pin is not welded into the circuit, positive and negative resistance values between the pins corresponding to the grounding pins are measured by a universal meter, and the measured resistance values are compared with the measured values of the intact chip pin, so that the non-on-path conduction condition of the chip pin is judged.
Based on the technical scheme, the on-road detection mainly comprises a detection method for detecting direct current resistance, alternating current and direct current voltage to ground and total working current of each pin of the chip in a circuit through a universal meter, and the on-road conduction condition of the pin of the chip is judged by comparing the data results of the detected direct current resistance, the alternating current and direct current voltage to ground and the total working current with a standard test result, wherein the standard test result refers to the test result of the universal meter on the intact pin of the chip.
As shown in fig. 2, based on the above technical solution, in S6, the performance level evaluation means that the performance of the chip pin is graded according to the test results of the voltage value, the current value and the level state of the chip pin, and the test result of the chip pin is reflected in time by grading the test performance of the chip pin, so as to make a judgment in time.
Based on the technical scheme, in the specific evaluation process of the performance grade evaluation, when the chip pin meets the requirement of the voltage test performance, the chip pin cannot meet the requirement of the current test performance and the chip pin cannot meet the requirement of the level state test performance, the quality standard of the chip pin is judged to be a defective product;
when the chip pin cannot meet the requirement of the voltage test performance, the chip pin reaches the requirement of the current test performance and the chip pin cannot meet the requirement of the level state test performance, judging that the quality standard of the chip pin is a defective product;
and when the chip pin cannot meet the requirement of the voltage test performance, the chip pin cannot meet the requirement of the current test performance and the chip pin reaches the requirement of the level state test performance, judging that the quality standard of the chip pin is a defective product.
When the chip pin meets the requirement of the voltage test performance, the chip pin meets the requirement of the current test performance and the chip pin cannot meet the requirement of the level state test performance, judging the quality standard of the chip pin to be a defective product;
when the chip pin meets the requirement of the voltage test performance, the chip pin cannot meet the requirement of the current test performance and the chip pin meets the requirement of the level state test performance, judging the quality standard of the chip pin to be a defective product;
and when the chip pin cannot meet the requirement of the voltage test performance, the chip pin meets the requirement of the current test performance and the chip pin meets the requirement of the level state test performance, judging that the quality standard of the chip pin is a defective product.
Example 3: as shown in fig. 1, the present invention provides a technical solution, a method for testing performance of a chip pin, the method specifically includes the following steps:
s1, testing mechanical properties;
s2, testing the conductivity of the pin;
s3, loading voltage testing;
s4, testing the loading current;
s5, testing the level state;
and S6, evaluating the performance grade.
In the step S3, the voltage loading test means that after the mechanical performance and the conductivity of the chip pin meet the standard, a test voltage value is obtained by loading a current test voltage to the chip pin, and the collected test voltage value is compared with a set voltage parameter;
in the step S4, the loading current test is to load a voltage test current to the chip pin to obtain a test current value after the mechanical performance and the conductivity of the chip pin both meet the standard, and compare the collected test current value with a set current parameter;
in S5, the level state test is to load specific logic level and waveform data to a chip pin after the mechanical performance and the conductivity of the chip pin meet the standard, collect the level state of the pin in a set clock cycle, and compare the collected level state with an expected logic state.
Based on the above technical solution, in S1, the mechanical performance test refers to testing each welding performance of the chip pins, the number, flatness, gap and width of the chip pins are mainly tested by the chip pin detection device, the horizontal straightness and coplanarity of the chip pins are mainly tested when the pin flatness is tested, and the horizontal straightness of the chip pins is mainly obtained by measuring the geometric dimensions of multiple positions of the chip pins in the test process.
Based on the technical scheme, the chip pin detection equipment is machine vision detection equipment and is mainly used for testing based on a photoelectric integrated system, and when the chip pin detection equipment detects that the mechanical performance of the pin has a quality problem, an alarm signal is sent to prompt and respond.
Based on the above technical solution, in S2, the pin connectivity test refers to testing connectivity between each pin, and in a specific test process, the pin connectivity test mainly includes off-path detection and on-path detection;
the non-on-path detection is carried out when the chip pin is not welded into the circuit, positive and negative resistance values between the pins corresponding to the grounding pins are measured by a universal meter, and the measured resistance values are compared with the measured values of the intact chip pin, so that the non-on-path conduction condition of the chip pin is judged.
Based on the technical scheme, the on-road detection mainly comprises a detection method for detecting direct current resistance, alternating current and direct current voltage to ground and total working current of each pin of the chip in a circuit through a universal meter, and the on-road conduction condition of the pin of the chip is judged by comparing the data results of the detected direct current resistance, the alternating current and direct current voltage to ground and the total working current with a standard test result, wherein the standard test result refers to the test result of the universal meter on the intact pin of the chip.
As shown in fig. 2, based on the above technical solution, in S6, the performance grade evaluation means that the performance of the chip pin is graded according to the test results of the voltage value, the current value and the level state of the chip pin, and the test result of the chip pin is reflected in time by grading the test performance of the chip pin, so as to make a judgment in time.
Based on the above technical scheme, in the specific evaluation process of the performance grade evaluation, when the chip pin meets the requirements of the voltage test performance, the chip pin meets the requirements of the current test performance, and the chip pin meets the requirements of the level state test performance, the quality standard of the chip pin is judged to be a superior product.
Finally, it should be noted that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that changes may be made in the embodiments and/or equivalents thereof without departing from the spirit and scope of the invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (10)

1. A method for testing the performance of a chip pin is characterized by comprising the following steps: the test method specifically comprises the following steps:
s1, testing mechanical properties;
s2, testing the conductivity of the pin;
s3, loading voltage testing;
s4, testing the loading current;
s5, testing the level state;
s6, evaluating the performance grade;
in S3, the loading voltage test is to load a current test voltage to the chip pin to obtain a test voltage value after the mechanical performance and the conductivity of the chip pin both meet the standard, compare the collected test voltage value with a set voltage parameter, and determine whether the test voltage value meets the requirement by comparison, thereby determining whether the chip pin meets the requirement of the voltage test performance;
in S4, the loading current test is to obtain a test current value by loading a voltage test current to the chip pin after the mechanical performance and the conductivity of the chip pin both meet the standard, compare the collected test current value with a set current parameter, and determine whether the test current value meets the requirement by comparison, thereby determining whether the chip pin meets the requirement of the current test performance;
in S5, the level state test refers to loading specific logic level and waveform data to a chip pin after the mechanical performance and conductivity of the chip pin meet the standard, acquiring the level state of the pin in a set clock cycle, comparing the acquired level state with an expected logic state, and determining whether the level state of the test meets the requirement by comparison, thereby determining whether the level state test of the chip pin meets the performance requirement.
2. The method for testing the performance of the chip pin according to claim 1, wherein the method comprises the following steps: in S1, the mechanical performance test is to test each welding performance of the chip pins, and mainly tests the number, flatness, gap and width of the chip pins through the chip pin detection device, and mainly tests the horizontal straightness and coplanarity of the chip pins when testing the flatness of the chip pins, and the horizontal straightness of the chip pins is mainly obtained by measuring the geometric dimensions of multiple positions of the chip pins during the test.
3. The method for testing the performance of the chip pin according to claim 2, wherein: the chip pin detection equipment is machine vision detection equipment and is mainly used for testing based on a photoelectric integrated system, and when the chip pin detection equipment detects that the mechanical performance of a pin has a quality problem, an alarm signal is sent out to prompt and respond.
4. The method for testing the performance of the chip pin according to claim 1, wherein the method comprises the following steps: in S2, the pin connectivity test refers to testing connectivity between each pin, and includes mainly off-path detection and on-path detection in a specific test process;
the off-circuit detection is carried out when the chip pin is not welded into the circuit, positive and negative resistance values between the pins corresponding to the grounding pins are measured by a universal meter, and the measured resistance values are compared with the measured value of the intact chip pin, so that the off-circuit conduction condition of the chip pin is judged.
5. The method for testing the performance of the chip pin according to claim 4, wherein the method comprises the following steps: the on-line detection mainly comprises a detection method for detecting direct current resistance, alternating current and direct current voltage to ground and total working current of each pin of a chip in a circuit through a universal meter, and the on-line conduction condition of the pin of the chip is judged by comparing the data results of the detected direct current resistance, the alternating current and direct current voltage to ground and the total working current with a standard test result, wherein the standard test result refers to the test result of the universal meter on the intact pin of the chip.
6. The method for testing the performance of the chip pin according to claim 1, wherein the method comprises the following steps: in S6, the performance grading evaluation refers to grading the performance of the chip pin according to the test results of the voltage value, the current value, and the level state of the chip pin, and the grading of the test performance of the chip pin is performed to reflect the test result of the chip pin in time so as to make a judgment in time, specifically, the grading of the chip pin into three quality standards of poor product, defective product, and good product is performed according to the test results.
7. The method for testing the performance of the chip pin according to claim 6, wherein the method comprises the following steps: in the specific evaluation process, the performance grade evaluation specifically comprises the following evaluation conditions:
and when the chip pin cannot meet the requirement of the voltage testing performance, the chip pin cannot meet the requirement of the current testing performance and the chip pin cannot meet the requirement of the level state testing performance, judging that the quality standard of the chip pin is a poor product.
8. The method for testing the performance of the chip pin according to claim 6, wherein the method comprises the following steps: when the chip pin meets the requirement of the voltage test performance, the chip pin cannot meet the requirement of the current test performance and the chip pin cannot meet the requirement of the level state test performance, judging the quality standard of the chip pin to be a defective product;
when the chip pin can not meet the requirement of the voltage test performance, the chip pin can not meet the requirement of the current test performance, and the chip pin can not meet the requirement of the level state test performance, judging the quality standard of the chip pin to be a defective product;
and when the chip pin cannot meet the requirement of the voltage testing performance, the chip pin cannot meet the requirement of the current testing performance and the chip pin meets the requirement of the level state testing performance, judging that the quality standard of the chip pin is a defective product.
9. The method for testing the performance of the chip pin according to claim 6, wherein the method comprises the following steps: when the chip pin meets the requirement of the voltage test performance, the chip pin meets the requirement of the current test performance and the chip pin cannot meet the requirement of the level state test performance, judging the quality standard of the chip pin to be a defective product;
when the chip pin meets the requirement of the voltage test performance, the chip pin cannot meet the requirement of the current test performance and the chip pin meets the requirement of the level state test performance, judging the quality standard of the chip pin to be a defective product;
when the chip pin can not meet the requirement of the voltage test performance, the chip pin meets the requirement of the current test performance and the chip pin meets the requirement of the level state test performance, the quality standard of the chip pin is judged to be a defective product.
10. The method for testing the performance of the chip pin according to claim 6, wherein: and when the chip pin meets the requirements of the voltage test performance, the current test performance and the level state test performance, judging the quality standard of the chip pin to be a high-quality product.
CN202210218678.1A 2022-03-08 2022-03-08 Method for testing performance of chip pin Pending CN114563689A (en)

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Application Number Priority Date Filing Date Title
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