CN114553329A - Vector network analysis system - Google Patents
Vector network analysis system Download PDFInfo
- Publication number
- CN114553329A CN114553329A CN202210442119.9A CN202210442119A CN114553329A CN 114553329 A CN114553329 A CN 114553329A CN 202210442119 A CN202210442119 A CN 202210442119A CN 114553329 A CN114553329 A CN 114553329A
- Authority
- CN
- China
- Prior art keywords
- signal
- unit
- frequency
- mixer
- excitation signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B17/00—Monitoring; Testing
- H04B17/10—Monitoring; Testing of transmitters
- H04B17/101—Monitoring; Testing of transmitters for measurement of specific parameters of the transmitter or components thereof
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
- G01R27/28—Measuring attenuation, gain, phase shift or derived characteristics of electric four pole networks, i.e. two-port networks; Measuring transient response
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B17/00—Monitoring; Testing
- H04B17/20—Monitoring; Testing of receivers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B17/00—Monitoring; Testing
- H04B17/30—Monitoring; Testing of propagation channels
- H04B17/382—Monitoring; Testing of propagation channels for resource allocation, admission control or handover
Abstract
The disclosure relates to the technical field of measurement and development, in particular to a vector network analysis system, which comprises a radio frequency source circuit; the power distribution module is connected with the radio frequency source circuit and used for dividing the excitation signal into a first excitation signal and a second excitation signal, and a first output end of the power distribution module is connected with a test port of the device to be tested; the frequency synthesis circuit is connected with the second output end of the power distribution module and used for processing the second excitation signal to obtain a local oscillation signal; and the receiver circuit is respectively connected with the frequency synthesis circuit and the test port of the device to be tested, and is used for separating the signal at the test port, mixing the signal with the local oscillation signal to acquire an intermediate frequency signal, and analyzing the data of the intermediate frequency signal to acquire the test information of the device to be tested. The circuit design of the vector network analysis system is effectively simplified and the hardware cost is reduced by performing power division on the radio frequency signal source and providing the local oscillation signal by using one path of the excitation signal.
Description
Technical Field
The invention relates to the technical field of measurement and development, in particular to a vector network analysis system.
Background
The vector network analysis system is a signal source and receiver integrated measuring instrument, is an excitation/response test system and can be used for measuring S parameters of radio frequency devices. The system architecture of the conventional vector network analysis system is shown in fig. 1 (taking a dual-PORT vector network analyzer as an example), in which PORT1 and PORT2 are respectively connected to two test PORTs of a device under test in fig. 1. The directional coupler connected to PORT1 separates two signals from PORT1 as a1 and B1, respectively, and the directional coupler connected to PORT2 separates two signals from PORT1 as a2 and B2, respectively. A1, B1, A2 and B2 are respectively mixed with local oscillation signals to form 4 groups of intermediate frequency signals IF, and an ADC (Analog-to-Digital Converter) chip collects the 4 groups of intermediate frequency signals IF and transmits the signals IF to a DSP (Digital Signal Processing) for data analysis. The circuit portion within the dashed box is the receiver path. The receiver path typically includes down-conversion circuitry, amplification circuitry, and signal processing circuitry.
As can be seen from fig. 1, a network analyzer architecture under a conventional link needs to include two signal source devices, one is a radio frequency signal source and the other is a local oscillator signal source. However, since the vector network analyzer needs to operate in a very wideband and high frequency range, the two ultra wideband signal sources greatly increase the design difficulty and the production cost of the vector network analyzer.
Disclosure of Invention
Therefore, it is necessary to provide a vector network analysis system aiming at the problems that two ultra-wideband signal sources are needed in a network analyzer architecture under a traditional link, and the design difficulty and the production cost of a vector network analyzer are greatly increased.
A vector network analysis system comprises a radio frequency source circuit for providing an excitation signal; the power distribution module is connected with the radio frequency source circuit and used for dividing the excitation signal into a first excitation signal and a second excitation signal, a first output end of the power distribution module is connected with a test port of a device to be tested, and the first excitation signal is an input excitation signal of the device to be tested; the frequency synthesis circuit is connected with the second output end of the power distribution module and used for processing the second excitation signal to obtain a local oscillation signal; and the receiver circuit is respectively connected with the frequency synthesis circuit and the test port of the device to be tested, and is used for separating the signal at the test port, mixing the signal with the local oscillator signal to acquire an intermediate frequency signal, and analyzing the data of the intermediate frequency signal to acquire the test information of the device to be tested.
In one embodiment, the power dividing module includes a first power divider, and the first power divider equally divides the driving signal into the first driving signal and the second driving signal.
In one embodiment, the power distribution module further includes a first rf signal amplifying unit, connected to the first output terminal of the first power divider, for amplifying the first driving signal; the second radio-frequency signal amplification unit is connected with the second output end of the first power divider and used for amplifying the second excitation signal; and the switch unit is respectively connected with the first radio-frequency signal amplification unit, the first test port of the device to be tested and the second test port of the device to be tested and is used for conducting a connection path between the first radio-frequency signal amplification unit and the first test port of the device to be tested or conducting a connection path between the first radio-frequency signal amplification unit and the second test port of the device to be tested.
In one embodiment, the frequency synthesizing circuit comprises a modulating unit, wherein a first end of the modulating unit is grounded and is used for providing a modulating signal; the first frequency mixer is respectively connected with the second output end of the power distribution module and the second end of the modulation unit, and is used for mixing the second excitation signal with the modulation signal to obtain a local oscillation signal; the second power divider is connected with the first frequency mixer and used for dividing the local oscillation signal into a first local oscillation signal and a second local oscillation signal; the first filtering unit is connected with the first end of the second power divider and used for filtering the first local oscillator signal; the third radio frequency signal amplifying unit is connected with the first filtering unit and used for amplifying the first local oscillation signal; the third power divider is connected with the third radio frequency signal amplification unit and used for dividing the first local oscillator signal into two paths; the second filtering unit is connected with a second end of the second power divider and used for filtering the second local oscillator signal; the fourth radio frequency signal amplifying unit is connected with the second filtering unit and used for amplifying the second local oscillation signal; and the fourth power divider is connected with the fourth radio-frequency signal amplification unit and used for dividing the second local oscillator signal into two paths.
In one embodiment, the modulation unit comprises a crystal oscillator.
In one embodiment, the receiver circuit includes a signal splitting unit connected to the test port of the device under test for splitting a signal at the test port into a transmission signal and a reflection signal; the first frequency mixing unit is respectively connected with the first output end of the signal separation unit and the frequency synthesis circuit and is used for mixing the transmission signal and the local oscillator signal to obtain a first intermediate frequency signal; the second frequency mixing unit is respectively connected with the second output end of the signal separation unit and the frequency synthesis circuit and is used for mixing the reflected signal and the local oscillator signal to obtain a second intermediate frequency signal; and the signal processing unit is respectively connected with the first frequency mixing unit and the second frequency mixing unit and is used for carrying out data analysis on the first intermediate frequency signal and the second intermediate frequency signal so as to obtain the test information of the device to be tested.
In one embodiment, the signal splitting unit includes a first directional coupler and a second directional coupler, the first frequency mixing unit includes a second frequency mixer and a third frequency mixer, the second frequency mixing unit includes a fourth frequency mixer and a fifth frequency mixer, the signal processing unit includes an analog-to-digital converter and a digital signal processor, the first excitation signal is transmitted to the first port of the device under test through the first directional coupler, a first output terminal of the first directional coupler is connected to a first input terminal of the second frequency mixer, a second input terminal of the second frequency mixer is connected to a first output terminal of a third power divider, an output terminal of the second frequency mixer is connected to the analog-to-digital converter, a second output terminal of the first directional coupler is connected to a first input terminal of the fourth frequency mixer, a second input terminal of the fourth frequency mixer is connected to a second output terminal of the third power divider, the output end of the fourth mixer is connected to the analog-to-digital converter, the first excitation signal is transmitted to the second port of the device under test through the second directional coupler, the first output end of the second directional coupler is connected to the first input end of the third mixer, the second input end of the third mixer is connected to the first output end of the fourth power divider, the output end of the third mixer is connected to the analog-to-digital converter, the second output end of the second directional coupler is connected to the first input end of the fifth mixer, the second input end of the fifth mixer is connected to the second output end of the fourth power divider, the output end of the fifth mixer is connected to the analog-to-digital converter, and the analog-to-digital converter is connected to the digital signal processor.
In one embodiment, the radio frequency source circuit comprises a radio frequency signal source, the frequency range of the output of the radio frequency signal source is 75 MHz-6 GHz, and the power range is-60 dbm-10 dbm.
In one embodiment, the rf source circuit further includes an output matching unit, connected to the rf signal source, for implementing impedance matching between the excitation signal and an external load resistor; and the third filtering unit is connected with the output matching unit and is used for filtering the excitation signal.
In one embodiment, the vector network analysis system further includes a display module, connected to the receiver circuit, for displaying test information of the device under test.
The vector network analysis system provides an excitation signal by using the radio frequency source circuit, divides the excitation signal into two paths by using the power distribution module, and transmits one path of the excitation signal to the device to be tested to be used as an input excitation signal of the device to be tested; and the other path of the local oscillation signal is transmitted to a frequency synthesis circuit, and the local oscillation signal is formed through the processing of the frequency synthesis circuit. The receiver circuit separates and couples signals at a test port of the device under test, and mixes the signals with a local oscillator signal to obtain an intermediate frequency signal. The receiver circuit can acquire the test information of the tested device by performing data analysis on the intermediate frequency signal. According to the vector network analysis system, the single radio frequency signal source is subjected to power division by optimizing the radio frequency source circuit of the vector network analysis system, namely, the excitation signal sent by the radio frequency source circuit is divided into two paths. The local oscillation signal is provided by utilizing one path of excitation signal to replace a local oscillation signal source in a traditional link structure, so that the circuit design of the vector network analysis system can be effectively simplified, and the production cost of a hardware architecture is reduced.
Drawings
In order to more clearly illustrate the embodiments of the present specification or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments described in the specification, and other drawings can be obtained by those skilled in the art without inventive labor.
FIG. 1 is a schematic diagram of a conventional two-port vector network analysis system;
FIG. 2 is a schematic structural diagram of a vector network analysis system according to an embodiment of the present invention;
FIG. 3 is a schematic structural diagram of a power distribution module according to an embodiment of the present disclosure;
fig. 4 is a schematic structural diagram of a frequency synthesizing circuit in one embodiment of the disclosure;
FIG. 5 is a schematic diagram of a receiver circuit according to an embodiment of the disclosure;
fig. 6 is a schematic diagram of a receiver circuit according to another embodiment of the disclosure;
fig. 7 is a schematic structural diagram of an rf source circuit according to an embodiment of the present disclosure.
Detailed Description
To facilitate an understanding of the invention, the invention will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present invention are shown in the drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "secured to" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. As used herein, the terms "vertical," "horizontal," "left," "right," "upper," "lower," "front," "rear," "circumferential," and the like are based on the orientation or positional relationship shown in the drawings for ease of description and simplicity of description, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and are therefore not to be considered limiting of the present invention.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
The vector network analyzer is a common radio frequency measuring instrument and is mainly used for measuring performance parameters of high-frequency devices, circuits and systems, such as linear parameters, nonlinear parameters, variable frequency parameters and the like. The traditional network analyzer architecture requires two signal sources, one is a radio frequency signal source and the other is a local oscillator signal source. However, the vector network analyzer needs to operate in a very wideband and high frequency range, and thus, the two ultra wideband signal sources greatly increase the design difficulty and cost of the vector network analyzer.
The utility model provides a vector network analytic system with simplified design can practice thrift a local oscillator signal source. Fig. 2 is a schematic diagram of a vector network analysis system according to an embodiment of the present invention, in which the vector network analysis system may include a radio frequency source circuit 100, a power distribution module 200, a frequency synthesis circuit 300, and a receiver circuit 400.
When testing the device under test, the network analyzer needs to generate an excitation signal inside to meet the requirements of test frequency and power. The excitation signal may be provided by the rf source circuit 100 in a vector network analysis system provided by the present disclosure. The power distribution module 200 is connected to the rf source circuit 100, and the power distribution module 200 may divide the excitation signal output by the rf source circuit 100 into two paths, which are the first excitation signal and the second excitation signal respectively. The first output terminal of the power distribution module 200 is connected to the test port of the device under test, i.e. the first excitation signal is transmitted to the device under test through the first output terminal of the power distribution module 200. The first excitation signal may be an input excitation signal for the device under test, which may respond to the excitation signal by transmission and reflection.
Since the network analyzer is used to test the relationship between the transmission and reflection characteristics of the device under test and the operating frequency and power, the receiver circuit 400 is connected to the test port of the device under test, and the receiver circuit 400 can be used to receive the signal at the test port of the device under test. The excitation signal is reflected after being input into the device under test, and the reflected signal at the port of the device under test and the input excitation signal propagate on the same physical path, so that the signal propagating in the opposite direction on the same physical path can be separated and extracted by using the receiver circuit 400. In some embodiments of the present disclosure, after the receiver circuit 400 separates the signals at the device under test port, a transmission signal and a reflection signal of the device under test can be obtained, wherein the transmission signal can be the first excitation signal, i.e., the input excitation signal of the device under test.
The frequency synthesizing circuit 300 is connected to the second output terminal of the power distribution module 200, i.e. the second excitation signal is transmitted to the frequency synthesizing circuit 300 through the second output terminal of the power distribution module 200. The frequency synthesizing circuit 300 may process the second excitation signal to obtain a local oscillator signal. After the receiver circuit 400 completes the separation of the signals at the port of the device under test, the separated signals are mixed with the local oscillation signals, so as to obtain an intermediate frequency signal with a lower frequency. After the intermediate frequency signal is band-pass filtered, the bandwidth of the receiver can be narrowed, and the sensitivity and the dynamic range can be obviously improved. The receiver circuit 400 then processes the intermediate frequency signal to obtain test information such as amplitude, phase, etc. In some embodiments of the present disclosure, the test information may also be an S parameter (Scatter parameter) of the device under test.
The vector network analysis system optimizes the circuit design of the signal source part and performs power division on a single radio frequency signal source, namely, dividing the excitation signal sent by the radio frequency source circuit 100 into two paths. One path of the excitation signal is used as an input excitation signal of a device to be tested, and the other path of the excitation signal can be used for providing a local oscillation signal after being processed, so that a local oscillation signal source in a traditional link structure is replaced. The vector network analysis system provided by the disclosure can realize the functions of two signal sources by using one signal source, effectively simplifies the circuit design of the vector network analysis system, and can also reduce the production cost of a hardware architecture.
Fig. 3 is a schematic structural diagram of a power distribution module in an embodiment of the present disclosure, and in an embodiment, the power distribution module 200 may include a first power divider 210. The input end of the first power divider 210 is connected to the output end of the rf source circuit 100, and the first power divider 210 may equally divide the excitation signal output by the rf source circuit 100 into two paths, that is, the first excitation signal and the second excitation signal are two same rf signals. For example, when the rf source circuit 100 outputs an excitation signal of 200MHz, the first power divider 210 may equally divide the excitation signal into two paths, and both the first excitation signal and the second excitation signal are rf signals of 100 MHz.
In the vector network analysis system, the first power divider 210 is used to averagely divide the excitation signal emitted by the rf source circuit 100 into two paths. One path of the excitation signal can be used as an input excitation signal of the device under test, and the other path of the excitation signal can be used for providing a local oscillator signal after being processed. The function of two signal sources is realized by using one signal source, and compared with the traditional network analyzer, the network analyzer saves one signal source and greatly reduces the cost of a single board card. Therefore, the vector network analysis system solves the problems of high design difficulty and high production cost caused by the fact that two ultra-wideband signal sources are needed in a network analyzer framework under a traditional link.
In one embodiment, the power distribution module 200 may further include a first radio frequency signal amplifying unit 220, a second radio frequency signal amplifying unit 230, and a switching unit 240.
The first rf signal amplifying unit 220 is connected to the first output terminal of the first power divider 210, and is configured to amplify the first driving signal. The second rf signal amplifying unit 230 is connected to the second output terminal of the first power divider 210, and is configured to amplify the second driving signal. Since the excitation signal output by the rf source circuit 100 is divided into two paths by the first power divider 210, the frequencies of the first excitation signal and the second excitation signal are attenuated to a certain degree compared to the excitation signal before power division. The first rf signal amplifying unit 220 and the second rf signal amplifying unit 230 are used to amplify the first excitation signal and the second excitation signal, respectively, so that the first excitation signal and the second excitation signal can meet the test requirement of the device under test.
The vector network analysis system can be divided into a dual port, a 3 port, a 4 port and a 6 port according to the number of the test ports. In some embodiments of the present disclosure, the switch unit 240 may be a single-pole double-throw radio frequency switch, and the vector network analysis system may be enabled to achieve the purpose of a dual-port test by using the single-pole double-throw radio frequency switch. The input terminal of the switch unit 240 is connected to the first rf signal amplifying unit 220, the first output terminal of the switch unit 240 is connected to the first test port of the device under test, and the second output terminal of the switch unit 240 is connected to the second test port of the device under test.
When the first test port of the device under test is tested, the switch unit 240 may be controlled to turn on the connection path between the first rf signal amplifying unit 220 and the first test port of the device under test, so as to transmit the amplified first excitation signal to the first test port of the device under test. Since the switch unit 240 is a single-pole double-throw rf switch, when the connection between the first rf signal amplifying unit 220 and the first test port of the device under test is turned on, the connection between the first rf signal amplifying unit 220 and the second test port of the device under test is turned off.
Similarly, when the second test port of the device under test is tested, the switch unit 240 may be controlled to turn on the connection path between the first rf signal amplifying unit 220 and the second test port of the device under test, so as to transmit the amplified first excitation signal to the second test port of the device under test. When the connection between the first rf signal amplifying unit 220 and the second test port of the device under test is turned on, the connection between the first rf signal amplifying unit 220 and the first test port of the device under test is turned off.
In some other embodiments, the number of test ports of the vector network analysis system can be 3 ports, 4 ports, and 6 ports by increasing the number of rf switches or using single-pole multi-throw rf switches. For example, the input ends of two single-pole double-throw rf switches are connected to the output end of the first rf signal amplifying unit 220, two output ends of one single-pole double-throw rf switch are connected to the first test port and the second test port of the device under test, and two output ends of the other single-pole double-throw rf switch are connected to the third test port and the fourth test port of the device under test, so that the purpose that the number of the test ports of the vector network analysis system is 4 is achieved.
In one embodiment, one or more sets of rf signal amplifying units may be disposed between the first output terminal of the switch unit 240 and the first test port of the device under test, so as to further amplify the first excitation signal transmitted to the first test port, so as to ensure that the first excitation signal is an excitation signal meeting the test frequency and power requirements.
Similarly, one or more sets of rf signal amplifying units may be disposed between the second output terminal of the switch unit 240 and the second test port of the device under test to further amplify the first excitation signal transmitted to the second test port, so as to ensure that the first excitation signal is an excitation signal meeting the test frequency and power requirements.
Fig. 4 is a schematic structural diagram of a frequency synthesis circuit in one embodiment of the disclosure, and in one embodiment of the disclosure, the frequency synthesis circuit 300 may include a modulation unit 310, a first mixer 320, a second power divider 330, a first filtering unit 340, a third rf signal amplification unit 350, a third power divider 360, a second filtering unit 370, a fourth rf signal amplification unit 380, and a fourth power divider 390.
A first terminal of the modulation unit 310 is connected to ground, and the modulation unit 310 may be used to provide a modulation signal. The first mixer 320 is respectively connected to the second output end of the power distribution module 200 and the second end of the modulation unit 310, and is configured to mix the second excitation signal with the modulation signal to obtain the local oscillation signal. By mixing the modulation signal provided by the modulation unit 310 with the second excitation signal, the magnitude of the local oscillation signal can be adjusted according to actual test requirements. For example, when the second excitation signal is a radio frequency signal of 100MHz and the local oscillator signal required in the actual test is 90MHz, the modulation unit 310 may provide a modulation signal of 10MHz, and the first mixer 320 may perform down-conversion mixing on the modulation signal and the second excitation signal to obtain the local oscillator signal of 90 MHz.
In one embodiment, the modulation unit 310 may include a crystal oscillator. The crystal oscillator has the advantages of accurate travel time, low power consumption, durability, low device cost, high output frequency precision and the like, so that the crystal oscillator can be selected to provide stable modulation signals. Among them, it is preferable to use a 10MHz crystal oscillator as the modulation unit 310.
The radio frequency source circuit 100 of the vector network analysis system performs power division on a single radio frequency signal source, optimizes the frequency synthesis circuit 300, performs down-conversion frequency mixing on a common 10MHz crystal filter and one divided excitation signal to replace a local oscillation signal source in the traditional structure, and performs filtering on the mixed signal and power division on a link. And simultaneously, after signal amplification, power distribution is carried out. In the vector analyzer architecture provided by the disclosure, no local oscillator signal source is additionally added, the design of a complex vector network analysis system can be simplified, the hardware architecture cost is reduced, and the output link of an ultra-wideband radio frequency signal source is simplified.
In one embodiment, in some application scenarios, one or more sets of attenuators may be further added to the link of the vector network analysis system, and the attenuators are used to adjust the signal size in the circuit and/or improve the impedance matching.
To ensure phase accuracy, the receiver circuit 400 needs to be designed globally symmetrically during the circuit layout process. Meanwhile, in the connection link between the frequency synthesis circuit 300 and the receiver circuit 400, the phase and amplitude of the local oscillator signal link are also ensured to be symmetrical. Signals at a test port are separated into two different signals, namely a reflection signal and a transmission signal, and the two signals need to be mixed with a local oscillator signal to obtain an intermediate frequency signal of a low frequency band, so that the intermediate frequency signal is subjected to further data analysis. Therefore, the frequency synthesis circuit 300 in the dual-port vector network analysis system needs to output 4 local oscillation signals transmitted to the receiver circuit 400 in total, so as to realize the dual-port transmission/reflection characteristic test of the device under test.
The second power divider 330 in the frequency synthesizing circuit 300 is connected to the first frequency mixer 320, and may equally divide the local oscillator signal output by the first frequency mixer 320 into two paths, which are the first local oscillator signal and the second local oscillator signal respectively. A first output terminal of the second power divider 330 is connected to the first filtering unit 340, and a second output terminal of the second power divider 330 is connected to the second filtering unit 370. First filtering unit 340 may perform filtering processing on the first local oscillator signal to remove noise in the first local oscillator signal, improve accuracy and stability of the first local oscillator signal, and further ensure accuracy of a test result of the vector network analysis system. Similarly, the second filtering unit 370 may perform filtering processing on the second local oscillator signal to remove noise in the second local oscillator signal, so as to improve accuracy and stability of the second local oscillator signal.
The output end of the first filtering unit 340 is connected to the input end of the third rf signal amplifying unit 350, and the first local oscillator signal after filtering is transmitted to the third rf signal amplifying unit 350. The output end of the second filtering unit 370 is connected to the input end of the fourth rf signal amplifying unit 380, and the filtered second local oscillator signal is transmitted to the fourth rf signal amplifying unit 380. Considering that after division by the power divider, the frequencies of the first local oscillator signal and the second local oscillator signal are attenuated to a certain extent compared with the local oscillator signal before power division. Therefore, the third rf signal amplifying unit 350 and the fourth rf signal amplifying unit 380 are used to amplify the first local oscillator signal and the second local oscillator signal, respectively, so as to ensure that the first local oscillator signal and the second local oscillator signal meet the test requirement of the device under test.
An output end of the third rf signal amplifying unit 350 is connected to an input end of the third power divider 360, and the first local oscillator signal after filtering and amplifying is transmitted to the third power divider 360. The output end of the fourth rf signal amplifying unit 380 is connected to the input end of the fourth power divider 390, and the second local oscillator signal after filtering and amplifying is transmitted to the fourth power divider 390. The third power divider 360 may equally divide the first local oscillator signal into two paths, and the fourth power divider 390 may equally divide the second local oscillator signal into two paths. The two first local oscillator signals and the two second local oscillator signals may be mixed with each received signal in the receiver circuit 400, so as to down-convert the received signal into an intermediate frequency signal, and have a good effect of suppressing clutter distortion components in the output signal of the device under test.
In one embodiment, one or more sets of rf signal amplifying units may be respectively disposed at two output terminals of the third power divider 360, so as to further amplify the two first local oscillator signals, so as to ensure that the two first local oscillator signals can meet the requirements of testing frequency and power.
Similarly, one or more sets of rf signal amplifying units may be respectively disposed at the two output terminals of the fourth power divider 390, so as to further amplify the two second local oscillator signals, so as to ensure that the two second local oscillator signals can meet the requirements of testing frequency and power.
Fig. 5 is a schematic diagram of a receiver circuit according to an embodiment of the disclosure, and in an embodiment, the receiver circuit 400 may include a signal separation unit 410, a first mixing unit 420, a second mixing unit 430, and a signal processing unit 440.
Since the first stimulus signal is reflected after being input to the device under test, the reflected signal at the test port of the device under test propagates on the same physical path as the input stimulus signal. The vector network analysis system uses the signal separation unit 410 to separate and extract the signals propagating in the opposite directions on the same physical path, and the signal separation unit 410 can separate the signals at the test port into transmission signals and reflection signals. Wherein the signal splitting unit 410 may be directly connected to a certain port of the device under test when the port has a reflection characteristic/transmission characteristic to be tested.
The first mixing unit 420 is connected to the first output terminal of the signal separating unit 410 and the frequency synthesizing circuit 300, respectively. The first mixing unit 420 may modulate the transmission signal with the higher frequency into the first intermediate frequency signal by mixing the transmission signal separated by the signal separating unit 410 with the local oscillation signal output by the frequency synthesizing circuit 300. By down-converting the transmission signal to the first intermediate frequency signal, the noise distortion component in the transmission signal at the tested port of the device is well inhibited. For example, when the transmission signal is a radio frequency signal of 100MHz and the local oscillation signal is 90MHz, the first mixing unit 420 is used to mix the local oscillation signal with the transmission signal, and then the intermediate frequency signal of 10MHz can be obtained.
The second mixing unit 430 is connected to the second output terminal of the signal separating unit 410 and the frequency synthesizing circuit 300, respectively. Similarly, the second mixing unit 430 may modulate the reflected signal with a higher frequency into a second intermediate frequency signal by mixing the reflected signal separated by the signal separating unit 410 with the local oscillator signal output by the frequency synthesizing circuit 300. By down-converting the reflected signal to a second intermediate frequency signal, spurious distortion components in the reflected signal at the test port of the device under test are also well suppressed.
The signal processing unit 440, respectively connected to the first mixing unit 420 and the second mixing unit 430, may be configured to perform data analysis on the first intermediate frequency signal and the second intermediate frequency signal to obtain test information of the device under test. The signal processing unit 440 may perform analog-to-digital conversion, band-pass filtering, and the like on the first intermediate frequency signal and the second intermediate frequency signal, so that the bandwidth of the receiver may be narrowed and the sensitivity and the dynamic range may be significantly improved. Meanwhile, the signal processing unit 440 may also perform fourier transform on the first intermediate frequency signal and the second intermediate frequency signal in the digital signal state to acquire test information such as amplitude, phase, and the like. In some embodiments of the present disclosure, the test information may also be an S parameter (Scatter parameter) of the device under test.
Fig. 6 is a schematic diagram of a receiver circuit according to another embodiment of the disclosure, in one embodiment, the signal separation unit 410 may include a first directional coupler 411 and a second directional coupler 412, the first mixing unit 420 may include a second mixer 421 and a third mixer 422, the second mixing unit 430 may include a fourth mixer 431 and a fifth mixer 432, and the signal processing unit 440 may include an analog-to-digital converter 441 and a digital signal processor 442.
As shown in FIG. 6, PORT1 may be a PORT where the vector network analysis system connects to a first test PORT of a device under test, and PORT2 may be a PORT where the vector network analysis system connects to a second test PORT of the device under test.
The first directional coupler 411 is connected at PORT1, and when the switching unit 240 turns on the connection path between the power distribution block 200 and the first test PORT, the first excitation signal can be transmitted to the first test PORT through the first directional coupler 411. At the same time, the reflected signal emitted by the first test PORT in response to the first excitation signal is also transmitted at PORT 1. That is, the coupled transmitted and reflected signals are available at PORT1 by first directional coupler 411. The transmitted and reflected signals at PORT1 can be separated by first directional coupler 411.
The second directional coupler 412 is connected at the PORT2, and when the switching unit 240 turns on the connection path between the power distribution block 200 and the second test PORT, the first stimulus signal is transmitted to the second test PORT through the second directional coupler 412. At the same time, the reflected signal emitted by the second test PORT in response to the first stimulus signal is also transmitted at PORT 2. That is, the coupled transmitted and reflected signals are available at PORT2 by the second directional coupler 412. The transmitted and reflected signals at PORT2 can be separated by the second directional coupler 412.
Two output ends of the third power divider 360 are defined as a1 and B1, respectively, that is, the third power divider 360 outputs two paths of first local oscillator signals through two output ends a1 and B1, respectively. Two output ends of the fourth power divider 390 are defined as a2 and B2, respectively, that is, the fourth power divider 390 outputs two paths of second local oscillator signals through two output ends a2 and B2, respectively.
A first output terminal of the first directional coupler 411 is connected to a first input terminal of the second mixer 421, the transmission signal split by the first directional coupler 411 is transmitted to the second mixer 421, and a second input terminal of the second mixer 421 may be connected to an a1 output terminal of the third power divider 360. The second mixer 421 performs down-conversion frequency mixing on the transmission signal and the first local oscillation signal output by the a1 end of the third power divider 360, so as to modulate the reflected signal with a higher frequency into an intermediate frequency signal IFA1, which has a good effect of suppressing clutter distortion components in the transmission signal at the first test port of the device under test.
A second output terminal of the first directional coupler 411 is connected to a first input terminal of the fourth mixer 431, the reflected signal split by the first directional coupler 411 is transmitted to the fourth mixer 431, and a second input terminal of the fourth mixer 431 may be connected to the B1 output terminal of the third power divider 360. The fourth mixer 431 performs down-conversion mixing on the transmission signal and the first local oscillation signal output by the B1 terminal of the third power divider 360, and may modulate the reflected signal with a higher frequency into an intermediate frequency signal IFB1, so as to suppress a clutter distortion component in the reflected signal.
The first output terminal of the second directional coupler 412 is connected to the first input terminal of the third mixer 422, the transmission signal split by the second directional coupler 412 is transmitted to the third mixer 422, and the second input terminal of the third mixer 422 can be connected to the a2 output terminal of the fourth power divider 390. The third mixer 422 performs down-conversion frequency mixing on the transmission signal and the second local oscillator signal output by the a2 terminal of the fourth power divider 390, and may modulate the transmission signal with a higher frequency into the intermediate frequency signal IFA2, so as to suppress the spurious distortion component in the transmission signal.
A second output terminal of the second directional coupler 412 is connected to a first input terminal of the fifth mixer 432, the reflected signal split by the second directional coupler 412 is transmitted to the fifth mixer 432, and a second output terminal of the fifth mixer 432 may be connected to the output terminal of the B2 of the fourth power divider 390. The fifth mixer 432 performs down-conversion mixing on the transmission signal and the second local oscillator signal output by the B2 end of the fourth power divider 390, and may modulate the reflected signal with a higher frequency into the intermediate frequency signal IFB2 to suppress the spurious distortion component in the reflected signal.
The receiver circuit 400 is designed to perform link mixing with the signals of the two directional couplers at the same phase and amplitude to obtain four intermediate frequency signals. The outputs of the second 421, third 422, fourth 431 and fifth 432 mixers are connected to an analog-to-digital converter 441. The analog-to-digital converter 441 is connected to the digital signal processor 442. The analog-to-digital converter 441 can collect and transmit 4 sets of intermediate frequency signals IFA1, IFB1, IFA2 and IFB2 output by the second mixer 421, the third mixer 422, the fourth mixer 431 and the fifth mixer 432 to the digital signal processor 442 for data analysis. The analog-to-digital converter 441 can also perform analog-to-digital conversion processing on the 4 sets of intermediate frequency signals, so as to facilitate the subsequent analysis of the signals by the digital signal processor 442. The digital signal processor 442 may perform fourier transforms on 4 sets of intermediate frequency signals in the digital signal state to obtain test information such as amplitude, phase, etc.
In one embodiment, the digital signal processor 442 may be a DSP chip or an FPGA chip (Field Programmable Gate Array). The data analysis of the intermediate frequency signal is realized by utilizing a DSP chip or an FPGA chip, and the intermediate frequency signal can be subjected to filtering amplification, Fourier transform and other processing so as to extract corresponding data such as amplitude and phase information from the intermediate frequency signal.
Based on the framework, compared with the traditional dual-port network analyzer, the vector network analysis system provided by the disclosure saves an ultra-wideband signal source while the test data is consistent, thereby greatly reducing the cost of a single board card.
Fig. 7 is a schematic structural diagram of an rf source circuit according to an embodiment of the present disclosure, wherein the rf source circuit 100 may include an rf signal source 110 according to an embodiment. The radio frequency signal source 110 with the frequency range of 75MHz to 6GHz and the power range of-60 dbm to-10 dbm can be selected to provide the excitation signal.
The vector network analysis system optimizes the circuit design of the radio frequency source circuit, can generate radio frequency signals with the frequency range of 75 MHz-6 GHz and the power range of-60 dbm-10 dbm, and meanwhile performs power average distribution on excitation signals generated by the radio frequency signal source 110 to divide the excitation signals into two symmetrical links. The 10MHz crystal oscillator cooperates with one path of excitation signals distributed by the radio frequency source circuit 100 to perform down-conversion frequency mixing, signals after down-conversion after passing through the power distributor can obtain signals of 65MHz-5990MHz after being subjected to signal processing such as filtering and amplifying, the signals can be regarded as novel local oscillation signals, and the amplitude of the local oscillation signals can be controlled to be 0dbm in a full frequency band. Meanwhile, in the connection link between the frequency synthesis circuit 300 and the receiver circuit 400, it is necessary to ensure that the local oscillation signal link is symmetrical in phase and amplitude.
In one embodiment, the rf source circuit 100 may further include an output matching unit 120 and a third filtering unit 130.
The output matching unit 120 is connected to the rf signal source 110, and may be used to implement impedance matching between the driving signal and an external load resistor. The output matching unit 120 may transform the external load resistance into the optimal load resistance required by the amplifier to ensure the maximum output power. The output matching unit 120 can be used to realize high-efficiency energy transmission, filter out higher harmonic components to ensure that only high-frequency fundamental power is output on an external load, and realize impedance matching between an excitation signal and an external load resistor.
The third filtering unit 130, connected to the output matching unit 120, may be configured to filter the excitation signal. The third filtering unit 130 may perform filtering processing on the excitation signal to remove noise in the excitation signal, so as to improve the accuracy and stability of the excitation signal.
In one embodiment, the vector network analysis system may further include a display module. The display module is connected to the receiver circuit 400 and can be used to display the test information of the device under test. By displaying the test information of the tested device on the display module, a user can conveniently and intuitively know the test result of the tested device, and the use experience of the user is optimized.
In the description herein, references to the description of "some embodiments," "other embodiments," "desired embodiments," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, a schematic description of the above terminology may not necessarily refer to the same embodiment or example.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent should be subject to the appended claims.
Claims (10)
1. A vector network analysis system, comprising:
the radio frequency source circuit is used for providing an excitation signal;
the power distribution module is connected with the radio frequency source circuit and used for dividing the excitation signal into a first excitation signal and a second excitation signal, a first output end of the power distribution module is connected with a test port of a device to be tested, and the first excitation signal is an input excitation signal of the device to be tested;
the frequency synthesis circuit is connected with the second output end of the power distribution module and used for processing the second excitation signal to obtain a local oscillation signal;
and the receiver circuit is respectively connected with the frequency synthesis circuit and the test port of the device to be tested, and is used for separating the signal at the test port, mixing the signal with the local oscillator signal to acquire an intermediate frequency signal, and analyzing the data of the intermediate frequency signal to acquire the test information of the device to be tested.
2. The vector network analysis system of claim 1, wherein the power distribution module comprises a first power divider that equally divides the excitation signal into the first excitation signal and the second excitation signal.
3. The vector network analysis system of claim 2, wherein the power distribution module further comprises:
the first radio frequency signal amplification unit is connected with the first output end of the first power divider and used for amplifying the first excitation signal;
the second radio-frequency signal amplification unit is connected with the second output end of the first power divider and used for amplifying the second excitation signal;
and the switch unit is respectively connected with the first radio-frequency signal amplification unit, the first test port of the device to be tested and the second test port of the device to be tested and is used for conducting a connection path between the first radio-frequency signal amplification unit and the first test port of the device to be tested or conducting a connection path between the first radio-frequency signal amplification unit and the second test port of the device to be tested.
4. The vector network analysis system according to claim 1 or 2, wherein the frequency synthesizing circuit comprises:
the first end of the modulation unit is grounded and is used for providing a modulation signal;
the first frequency mixer is respectively connected with the second output end of the power distribution module and the second end of the modulation unit, and is used for mixing the second excitation signal with the modulation signal to obtain a local oscillation signal;
the second power divider is connected with the first frequency mixer and used for dividing the local oscillation signal into a first local oscillation signal and a second local oscillation signal;
the first filtering unit is connected with the first end of the second power divider and used for filtering the first local oscillator signal;
the third radio frequency signal amplifying unit is connected with the first filtering unit and used for amplifying the first local oscillation signal;
the third power divider is connected with the third radio frequency signal amplification unit and used for dividing the first local oscillator signal into two paths;
the second filtering unit is connected with a second end of the second power divider and used for filtering the second local oscillator signal;
the fourth radio frequency signal amplifying unit is connected with the second filtering unit and used for amplifying the second local oscillation signal;
and the fourth power divider is connected with the fourth radio frequency signal amplification unit and is used for dividing the second local oscillation signal into two paths.
5. The vector network analysis system of claim 4, wherein the modulation unit comprises a crystal oscillator.
6. The vector network analysis system of claim 1, wherein the receiver circuit comprises:
the signal separation unit is connected with a test port of the tested device and used for separating signals at the test port into transmission signals and reflection signals;
the first frequency mixing unit is respectively connected with the first output end of the signal separation unit and the frequency synthesis circuit and is used for mixing the transmission signal and the local oscillator signal to obtain a first intermediate frequency signal;
the second frequency mixing unit is respectively connected with the second output end of the signal separation unit and the frequency synthesis circuit and is used for mixing the reflected signal and the local oscillator signal to obtain a second intermediate frequency signal;
and the signal processing unit is respectively connected with the first frequency mixing unit and the second frequency mixing unit and is used for carrying out data analysis on the first intermediate frequency signal and the second intermediate frequency signal so as to obtain the test information of the tested device.
7. The vector network analysis system of claim 6, wherein the signal splitting unit comprises a first directional coupler and a second directional coupler, the first mixing unit comprises a second mixer and a third mixer, the second mixing unit comprises a fourth mixer and a fifth mixer, the signal processing unit comprises an analog-to-digital converter and a digital signal processor,
the first excitation signal is transmitted to the first port of the device under test through the first directional coupler, a first output terminal of the first directional coupler is connected to a first input terminal of the second mixer, a second input terminal of the second mixer is connected to a first output terminal of a third power divider, and an output terminal of the second mixer is connected to the analog-to-digital converter,
a second output terminal of the first directional coupler is connected to a first input terminal of the fourth mixer, a second input terminal of the fourth mixer is connected to a second output terminal of the third power divider, an output terminal of the fourth mixer is connected to the analog-to-digital converter,
the first excitation signal is transmitted to the second port of the device under test through the second directional coupler, a first output terminal of the second directional coupler is connected to a first input terminal of the third mixer, a second input terminal of the third mixer is connected to a first output terminal of a fourth power divider, and an output terminal of the third mixer is connected to the analog-to-digital converter,
a second output terminal of the second directional coupler is connected to a first input terminal of the fifth mixer, a second input terminal of the fifth mixer is connected to a second output terminal of the fourth power divider, an output terminal of the fifth mixer is connected to the analog-to-digital converter,
the analog-to-digital converter is connected with the digital signal processor.
8. The vector network analysis system of claim 1, wherein the radio frequency source circuit comprises a radio frequency signal source, the radio frequency signal source outputs a frequency range of 75MHz to 6GHz and a power range of-60 dbm to-10 dbm.
9. The vector network analysis system of claim 8, wherein the radio frequency source circuit further comprises:
the output matching unit is connected with the radio frequency signal source and used for realizing impedance matching between the excitation signal and an external load resistor;
and the third filtering unit is connected with the output matching unit and is used for filtering the excitation signal.
10. The vector network analysis system of claim 1, further comprising:
and the display module is connected with the receiver circuit and used for displaying the test information of the tested device.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210442119.9A CN114553329B (en) | 2022-04-26 | 2022-04-26 | Vector network analysis system |
| PCT/CN2023/075177 WO2023207252A1 (en) | 2022-04-26 | 2023-02-09 | Vector network analysis system |
| TW112108682A TW202343006A (en) | 2022-04-26 | 2023-03-09 | Vector network analysis system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210442119.9A CN114553329B (en) | 2022-04-26 | 2022-04-26 | Vector network analysis system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114553329A true CN114553329A (en) | 2022-05-27 |
| CN114553329B CN114553329B (en) | 2022-07-15 |
Family
ID=81667229
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210442119.9A Active CN114553329B (en) | 2022-04-26 | 2022-04-26 | Vector network analysis system |
Country Status (3)
| Country | Link |
|---|---|
| CN (1) | CN114553329B (en) |
| TW (1) | TW202343006A (en) |
| WO (1) | WO2023207252A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023207252A1 (en) * | 2022-04-26 | 2023-11-02 | 苏州华兴源创科技股份有限公司 | Vector network analysis system |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117687101A (en) * | 2024-02-04 | 2024-03-12 | 中国石油大学(华东) | Multichannel radio detection and positioning device |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103840899A (en) * | 2014-03-12 | 2014-06-04 | 荆州市南湖机械总厂 | Automatic test device of transceiving assembly |
| CN108614207A (en) * | 2018-05-23 | 2018-10-02 | 中国电子科技集团公司第四十研究所 | A kind of the signal source switching device and method of vector network analyzer |
| CN109361479A (en) * | 2018-12-05 | 2019-02-19 | 航天南湖电子信息技术股份有限公司 | A kind of automation T/R component test system |
| CN111665404A (en) * | 2020-05-27 | 2020-09-15 | 中国计量科学研究院 | Method and device for measuring nonlinear vector network analyzer with accurate phase synchronization |
| CN111766463A (en) * | 2020-06-01 | 2020-10-13 | 中山香山微波科技有限公司 | Vector network analyzer and spread spectrum module thereof |
| CN212845878U (en) * | 2020-05-12 | 2021-03-30 | 杭州矢志信息科技有限公司 | Portable vector network analyzer |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104714114A (en) * | 2013-12-11 | 2015-06-17 | 北海海狮信息技术有限公司 | Vector network analyzer |
| JP2021067539A (en) * | 2019-10-23 | 2021-04-30 | 日置電機株式会社 | Vector network analyzer |
| CN114553329B (en) * | 2022-04-26 | 2022-07-15 | 苏州华兴源创科技股份有限公司 | Vector network analysis system |
-
2022
- 2022-04-26 CN CN202210442119.9A patent/CN114553329B/en active Active
-
2023
- 2023-02-09 WO PCT/CN2023/075177 patent/WO2023207252A1/en unknown
- 2023-03-09 TW TW112108682A patent/TW202343006A/en unknown
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103840899A (en) * | 2014-03-12 | 2014-06-04 | 荆州市南湖机械总厂 | Automatic test device of transceiving assembly |
| CN108614207A (en) * | 2018-05-23 | 2018-10-02 | 中国电子科技集团公司第四十研究所 | A kind of the signal source switching device and method of vector network analyzer |
| CN109361479A (en) * | 2018-12-05 | 2019-02-19 | 航天南湖电子信息技术股份有限公司 | A kind of automation T/R component test system |
| CN212845878U (en) * | 2020-05-12 | 2021-03-30 | 杭州矢志信息科技有限公司 | Portable vector network analyzer |
| CN111665404A (en) * | 2020-05-27 | 2020-09-15 | 中国计量科学研究院 | Method and device for measuring nonlinear vector network analyzer with accurate phase synchronization |
| CN111766463A (en) * | 2020-06-01 | 2020-10-13 | 中山香山微波科技有限公司 | Vector network analyzer and spread spectrum module thereof |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023207252A1 (en) * | 2022-04-26 | 2023-11-02 | 苏州华兴源创科技股份有限公司 | Vector network analysis system |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114553329B (en) | 2022-07-15 |
| TW202343006A (en) | 2023-11-01 |
| WO2023207252A1 (en) | 2023-11-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN114553329B (en) | Vector network analysis system | |
| CN113630194B (en) | X-band high-isolation radio frequency receiving and transmitting system and channel consistency calibration method thereof | |
| CN106095705B (en) | It is a kind of to realize signal/spectrum analyzer ultra wide band spread spectrum device and method | |
| CN102843159B (en) | Microwave hyperspectral receiver and method | |
| CN111766463A (en) | Vector network analyzer and spread spectrum module thereof | |
| CN109462414A (en) | A kind of 18-30GHz front end receiver component | |
| CN214591434U (en) | Receiving and transmitting frequency conversion device based on high isolation | |
| CN103138845A (en) | Amplitude phase characteristic test method for down-conversion reception channel of ultra-wide band synthetic aperture radar (SAR) receiver | |
| CN109743069A (en) | A kind of down-conversion device and method receiving analysis instrument for superheterodyne signal | |
| US8416018B2 (en) | Variable frequency amplifier | |
| CN104880621A (en) | Self calibration passive intermodulation tester | |
| CN114204950B (en) | High-performance broadband microwave receiving channel | |
| CN105577294A (en) | Multifunctional handheld passive intermodulation analyzer | |
| CN212463221U (en) | Vector network analyzer and spread spectrum module thereof | |
| CN208836123U (en) | A kind of 18-30GHz front end receiver component | |
| CN109150207B (en) | Self-mixing frequency conversion device | |
| CN112688702A (en) | Superheterodyne cubic frequency conversion broadband receiver | |
| CN210246765U (en) | Detection system suitable for microwave shielding effectiveness | |
| CN103575986A (en) | Microwave integrated device of radio frequency front end low waveband circuit of spectrum analyzer | |
| CN111585514A (en) | Millimeter wave down conversion subassembly | |
| CN210893160U (en) | Intermediate frequency signal generating circuit for portable communication and navigation tester | |
| CN207782758U (en) | A kind of broadband Larger Dynamic down conversion module | |
| CN108459203B (en) | Ultra-wideband frequency-sweeping pulse power detection device and method | |
| CN102545933A (en) | Two-stage frequency conversion broadband receiver | |
| CN220359157U (en) | Broadband radio frequency signal spread spectrum device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |