CN114551239A - Preparation method of diamond-based gallium nitride device with etching protective layer - Google Patents
Preparation method of diamond-based gallium nitride device with etching protective layer Download PDFInfo
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- 229910002601 GaN Inorganic materials 0.000 title claims abstract description 81
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 title claims abstract description 71
- 229910003460 diamond Inorganic materials 0.000 title claims abstract description 27
- 239000010432 diamond Substances 0.000 title claims abstract description 27
- 238000005530 etching Methods 0.000 title claims abstract description 25
- 238000002360 preparation method Methods 0.000 title claims abstract description 14
- 239000011241 protective layer Substances 0.000 title claims abstract description 13
- 239000010410 layer Substances 0.000 claims description 72
- 239000000463 material Substances 0.000 claims description 52
- 229910052751 metal Inorganic materials 0.000 claims description 32
- 239000002184 metal Substances 0.000 claims description 32
- 239000000758 substrate Substances 0.000 claims description 29
- 238000004140 cleaning Methods 0.000 claims description 21
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 16
- 238000005516 engineering process Methods 0.000 claims description 16
- 238000000137 annealing Methods 0.000 claims description 14
- 150000002739 metals Chemical class 0.000 claims description 14
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 12
- 229920002120 photoresistant polymer Polymers 0.000 claims description 11
- 229910002704 AlGaN Inorganic materials 0.000 claims description 9
- 238000000151 deposition Methods 0.000 claims description 9
- 238000000034 method Methods 0.000 claims description 9
- 238000005566 electron beam evaporation Methods 0.000 claims description 8
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 8
- 229910052737 gold Inorganic materials 0.000 claims description 8
- 239000010931 gold Substances 0.000 claims description 8
- 238000001465 metallisation Methods 0.000 claims description 8
- VNWKTOKETHGBQD-UHFFFAOYSA-N methane Chemical compound C VNWKTOKETHGBQD-UHFFFAOYSA-N 0.000 claims description 8
- 229910052759 nickel Inorganic materials 0.000 claims description 8
- 238000001259 photo etching Methods 0.000 claims description 8
- 230000008020 evaporation Effects 0.000 claims description 7
- 238000001704 evaporation Methods 0.000 claims description 7
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 claims description 6
- 230000004888 barrier function Effects 0.000 claims description 6
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 6
- 239000010408 film Substances 0.000 claims description 6
- 229910052757 nitrogen Inorganic materials 0.000 claims description 6
- 230000006911 nucleation Effects 0.000 claims description 5
- 238000010899 nucleation Methods 0.000 claims description 5
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 4
- 238000005234 chemical deposition Methods 0.000 claims description 4
- 238000000576 coating method Methods 0.000 claims description 4
- 239000001257 hydrogen Substances 0.000 claims description 4
- 229910052739 hydrogen Inorganic materials 0.000 claims description 4
- 238000005498 polishing Methods 0.000 claims description 4
- 239000010409 thin film Substances 0.000 claims description 4
- 229910052719 titanium Inorganic materials 0.000 claims description 4
- 239000010936 titanium Substances 0.000 claims description 4
- 230000017525 heat dissipation Effects 0.000 abstract description 5
- 239000004065 semiconductor Substances 0.000 abstract description 5
- 229910004205 SiNX Inorganic materials 0.000 description 4
- 230000015556 catabolic process Effects 0.000 description 2
- 238000002425 crystallisation Methods 0.000 description 2
- 230000008025 crystallization Effects 0.000 description 2
- 230000006378 damage Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000002210 silicon-based material Substances 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000008642 heat stress Effects 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000035882 stress Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3171—Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3732—Diamonds
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
- H01L29/7787—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
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Abstract
The invention discloses a preparation method of a diamond-based gallium nitride device with an etching protective layer, which relates to the technical field of semiconductors. So as to improve the heat dissipation capability of the gallium nitride power device.
Description
Technical Field
The invention belongs to the technical field of semiconductors, and particularly relates to a preparation method of a diamond-based gallium nitride device with an etching protective layer and a device obtained by using the method.
Background
Although the gallium nitride semiconductor material has multiple advantages of wide forbidden bandwidth, high critical breakdown electric field, high electron saturation drift velocity, direct band gap semiconductor, low dielectric constant, high temperature resistance, radiation resistance, good chemical stability and the like, the gallium nitride semiconductor material has low thermal conductivity and becomes a key obstacle for limiting the technical development of gallium nitride. The gallium nitride power device generally adopts silicon materials as an epitaxial substrate, and the low thermal conductivity of the silicon materials becomes a key obstacle for restricting the application and the development of the gallium nitride power device, and an effective solution is not provided.
In the prior art, the gallium nitride material is etched and grown on the diamond, so that the damage of the gallium nitride material can affect the performance of a gallium nitride transistor, and the gallium nitride material is grown on the diamond to improve the heat dissipation problem of the gallium nitride, so that the influence caused by lattice stress can exist, and the device characteristics of the gallium nitride are difficult to effectively improve.
Disclosure of Invention
In order to effectively solve the problems in the prior art, the invention provides a preparation scheme of diamond-based gallium nitride with a substrate protective layer, which can effectively solve the problems of damage, heat dissipation and stress caused by etching the gallium nitride. So as to improve the heat dissipation capability of the gallium nitride power device. Meanwhile, the growth condition is optimized, and the crystallization quality of the polycrystalline diamond is improved.
In order to achieve the purpose, all layers of the device structure are sequentially arranged from bottom to top and comprise a diamond substrate, a first substrate, an aluminum nitride nucleating layer, a gallium nitride buffer layer, a gallium nitride channel layer, an aluminum gallium nitrogen barrier layer, a drain electrode, a source electrode, a gate electrode, a dielectric layer and a protective layer.
The preparation method of the device comprises the following steps:
(1) growing an AlN nucleating layer on the first substrate, wherein the thickness is 1nm-1 um;
(2) growing a gallium nitride buffer layer on the aluminum nitride nucleating layer, wherein the thickness of the gallium nitride buffer layer is 10-100 um;
(3) growing a temporary protective layer on the gallium nitride buffer layer to protect the gallium nitride material and finish the preparation of the gallium nitride material;
(4) polishing and thinning the back of a first substrate made of a gallium nitride material, and keeping 1-100 um;
(5) etching a plurality of grooves on the back of the thinned substrate by an icp etching method, wherein the depth of each groove is 0.1-10um, and the width of each groove is 0.5-1 um;
(6) growing polycrystalline diamond on the groove substrate to finish the preparation of the diamond substrate gallium nitride material, wherein the specific growth conditions are as follows: the pressure of the cavity is 100Torr, the flow rate of methane is 24sccm, the flow rate of hydrogen is 376sccm, and the growth thickness of the polycrystalline diamond is 1-10 um;
(7) removing the temporary protective layer of the gallium nitride material, and growing a gallium nitride channel layer on the gallium nitride material, wherein the thickness of the gallium nitride channel layer is 0.1-1 um;
(8) growing an aluminum gallium nitrogen barrier layer on the gallium nitride channel layer, wherein the thickness is 10-100 nm;
(9) depositing a layer of SiN on the surface of the AlGaN/GaN heterojunction material by adopting a plasma enhanced chemical deposition methodxThe film layer is used as a dielectric layer and has the thickness of 200 nm;
(10) carrying out organic cleaning on the materials, removing the thin film dielectric layers at two ends of the AlGaN/GaN heterojunction by adopting photoetching and etching technologies after cleaning is finished, and reserving the photoresist coating at the rest positions to form grooves of a source electrode and a drain electrode;
(11) performing metal deposition by adopting an electron beam evaporation technology, sequentially depositing four metals of titanium, aluminum, nickel and gold, wherein the thicknesses of the four metal layers are respectively 20nm, 150nm, 30nm and 50nm, and removing the multilayer metal on the photoresist by adopting metal stripping equipment after evaporation is finished to form a pattern with the multilayer metal only existing in the source electrode and the drain electrode;
(12) carrying out organic cleaning on the material, and carrying out annealing treatment on the material after cleaning is finished, wherein the annealing temperature is 800 ℃, and the annealing time is 30 s;
(13) carrying out organic cleaning on the materials, forming a gate electrode groove by adopting photoetching and etching technologies, carrying out metal deposition by adopting an electron beam evaporation technology, sequentially depositing two metals of nickel and gold, wherein the thicknesses are respectively 30nm and 200nm, and removing the multilayer metal on the photoresist by adopting metal stripping equipment after evaporation is finished to finish the manufacture of a gate electrode;
(14) the material is used to deposit a dielectric layer on the device by ALD to a thickness of 100nm to 900 nm.
Compared with the prior art, the invention has the following advantages and technical effects:
the device is a GaN-based high-electron-mobility transistor power device, the heat dissipation capacity of the power device manufactured by the method can be effectively improved, the crystallization quality of the AlGaN/GaN heterojunction can be improved through process optimization, and the power device has the characteristic of good repeatability. Meanwhile, the gallium nitride HEMT device is fully exerted to have high breakdown voltage and low on resistance, and is suitable for high-voltage high-power electronic devices.
Drawings
Fig. 1 is a schematic illustration of growing gallium nitride material on a first substrate.
Fig. 2 is a schematic diagram of a first substrate thinning etched recess.
Fig. 3 is a schematic view of growing diamond.
Fig. 4 is a schematic structural diagram of the present invention.
Wherein: 101 diamond substrate, 102 first substrate, 103 aluminum nitride nucleation layer, 104 gallium nitride buffer layer, 105 gallium nitride channel layer, 106 aluminum gallium nitrogen barrier layer, 107 drain electrode, 108 source electrode, 109 gate electrode, 110 dielectric layer, 111 protection layer.
Detailed Description
In order to make the technical means, the creation characteristics, the achievement purposes and the effects of the invention easy to understand, the invention is further described with the specific embodiments.
Example 1
(1) Growing an AlN nucleating layer on the first substrate 102, wherein the thickness is 1nm-1 um;
(2) growing a gallium nitride buffer layer 104 on the aluminum nitride nucleation layer 103, wherein the thickness is 10-100 um;
(3) growing a temporary protective layer 111 on the gallium nitride buffer layer 104 to protect the gallium nitride material, thereby completing the preparation of the gallium nitride material;
(4) polishing and thinning the back of a first substrate 102 made of a gallium nitride material, and keeping 1um-100 um;
(5) etching a plurality of grooves on the back of the thinned substrate by an icp etching method, wherein the depth of each groove is 0.1-10um, and the width of each groove is 0.5-1 um;
(6) growing polycrystalline diamond on the groove substrate to finish the preparation of the diamond substrate 101 gallium nitride material, wherein the specific growth conditions are as follows: the pressure of the cavity is 100Torr, the flow rate of methane is 24sccm, the flow rate of hydrogen is 376sccm, and the growth thickness of the polycrystalline diamond is 1-10 um;
(7) removing the temporary protective layer 111 of the gallium nitride material, and growing a gallium nitride channel layer 105 on the gallium nitride material, wherein the thickness of the gallium nitride channel layer is 0.1-1 um;
(8) growing an aluminum gallium nitrogen barrier layer 106 on the gallium nitride channel layer 105, wherein the thickness is 10-100 nm;
(9) depositing a SiNx film layer on the surface of the AlGaN/GaN heterojunction material by adopting a plasma enhanced chemical deposition method to serve as a dielectric layer 110, wherein the thickness of the SiNx film layer is 200 nm;
(10) organically cleaning the materials, removing the thin film dielectric layers 110 at two ends of the AlGaN/GaN heterojunction by adopting photoetching and etching technologies after cleaning is finished, and reserving photoresist coatings at other places to form grooves of the source electrode 108 and the drain electrode 107;
(11) performing metal deposition by adopting an electron beam evaporation technology, sequentially depositing four metals of titanium, aluminum, nickel and gold, wherein the thicknesses of the four metal layers are respectively 20nm, 150nm, 30nm and 50nm, and removing the multilayer metal on the photoresist by adopting metal stripping equipment after evaporation is finished to form a pattern with the multilayer metal only existing in the source electrode and the drain electrode;
(12) carrying out organic cleaning on the material, and carrying out annealing treatment on the material after cleaning is finished, wherein the annealing temperature is 800 ℃, and the annealing time is 30 s;
(13) the materials are subjected to organic cleaning, grooves of the gate electrode 109 are formed by adopting photoetching and etching technologies, metal deposition is carried out by adopting an electron beam evaporation technology, two metals of nickel and gold are sequentially deposited, the thicknesses of the two metals are respectively 30nm and 200nm, and after evaporation is finished, multilayer metals on the photoresist are removed by adopting metal stripping equipment, so that the gate electrode is manufactured;
(14) material dielectric layer 110 was deposited over the device using ALD to a thickness of 100nm to 900 nm.
Example 2
(1) Growing an AlN nucleating layer on the first substrate 102, wherein the thickness is 1nm-1 um;
(2) growing a gallium nitride buffer layer 104 on the aluminum nitride nucleation layer 103, wherein the thickness is 10-100 um;
(3) growing a gallium nitride channel layer 105 on the gallium nitride material, wherein the thickness of the gallium nitride channel layer is 0.1-1 um;
(4) growing an aluminum gallium nitrogen barrier layer 106 on the gallium nitride channel layer 105, wherein the thickness is 10-100 nm;
(5) depositing a SiNx film layer on the surface of the AlGaN/GaN heterojunction material by adopting a plasma enhanced chemical deposition method to serve as a dielectric layer 110, wherein the thickness of the SiNx film layer is 200 nm;
(6) organically cleaning the materials, removing the thin film dielectric layers 110 at two ends of the AlGaN/GaN heterojunction by adopting photoetching and etching technologies after cleaning is finished, and reserving photoresist coatings at other places to form grooves of the source electrode 108 and the drain electrode 107;
(7) after cleaning, performing metal deposition by adopting an electron beam evaporation technology, sequentially depositing four metals of titanium, aluminum, nickel and gold, wherein the thicknesses of the four metal layers are respectively 20nm, 150nm, 30nm and 50nm, and finishing the manufacture of a source electrode and a drain electrode;
(8) carrying out organic cleaning on the material, and carrying out annealing treatment on the material after cleaning is finished, wherein the annealing temperature is 800 ℃, and the annealing time is 30 s;
(9) the materials are subjected to organic cleaning, grooves of the gate electrode 109 are formed by adopting photoetching and etching technologies, metal deposition is carried out by adopting an electron beam evaporation technology, two metals of nickel and gold are sequentially deposited, the thicknesses of the two metals are respectively 30nm and 200nm, and after evaporation is finished, multilayer metals on the photoresist are removed by adopting metal stripping equipment, so that the gate electrode is manufactured;
(10) material dielectric layer 110 was deposited over the device using ALD to a thickness of 100nm to 900 nm.
(11) Polishing and thinning the back of a first substrate 102 made of a gallium nitride material, and keeping 1um-100 um;
(12) etching a plurality of grooves on the back of the thinned substrate by an icp etching method, wherein the depth of each groove is 0.1-10um, and the width of each groove is 0.5-1 um;
(13) growing polycrystalline diamond on the groove substrate to finish the preparation of the diamond substrate 101 gallium nitride material, wherein the specific growth conditions are as follows: the pressure of the cavity is 100Torr, the flow rate of methane is 24sccm, the flow rate of hydrogen is 376sccm, and the growth thickness of the polycrystalline diamond is 1-10 um;
it will be appreciated by those skilled in the art that the invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The embodiments disclosed above are therefore to be considered in all respects as illustrative and not restrictive. All changes which come within the scope of or equivalence to the invention are intended to be embraced therein.
Claims (4)
1. A preparation method of a diamond-based gallium nitride device with an etching protective layer is characterized by comprising the following steps:
(1) growing an AlN nucleation layer on a first substrate (102) to a thickness of 1nm-1 um;
(2) growing a gallium nitride buffer layer on the aluminum nitride nucleation layer (103), wherein the thickness of the gallium nitride buffer layer is 10-100 um;
(3) growing a temporary protective layer on the gallium nitride buffer layer (104) to protect the gallium nitride material and finish the preparation of the gallium nitride material;
(4) polishing and thinning the back of a first substrate made of a gallium nitride material, and keeping 1-100 um;
(5) etching a plurality of grooves on the back of the thinned substrate by an icp etching method, wherein the depth of each groove is 0.1-10um, and the width of each groove is 0.5-1 um;
(6) growing polycrystalline diamond on the groove substrate to finish the preparation of the gallium nitride material of the diamond substrate (101), wherein the specific growth conditions are as follows: the pressure of the cavity is 100Torr, the flow rate of methane is 24sccm, the flow rate of hydrogen is 376sccm, and the growth thickness of the polycrystalline diamond is 1-10 um;
(7) removing the temporary protective layer (111) of the gallium nitride material, and growing a gallium nitride channel layer (105) on the gallium nitride material, wherein the thickness of the gallium nitride channel layer is 0.1-1 um;
(8) growing an aluminum gallium nitrogen barrier layer (106) on the gallium nitride channel layer, wherein the thickness is 10-100 nm;
(9) depositing a layer of SiN on the surface of the AlGaN/GaN heterojunction material by adopting a plasma enhanced chemical deposition methodxThe film layer is used as a dielectric layer (110) and is 200nm thick;
(10) organically cleaning the materials, removing the thin film dielectric layers at two ends of the AlGaN/GaN heterojunction by adopting photoetching and etching technologies after cleaning, and reserving photoresist coatings at other places to form grooves of a source electrode (108) and a drain electrode (107);
(11) performing metal deposition by adopting an electron beam evaporation technology, sequentially depositing four metals of titanium, aluminum, nickel and gold, wherein the thicknesses of the four metal layers are respectively 20nm, 150nm, 30nm and 50nm, and removing the multilayer metal on the photoresist by adopting metal stripping equipment after evaporation is finished to form a pattern with the multilayer metal only existing in the source electrode and the drain electrode;
(12) carrying out organic cleaning on the material, and carrying out annealing treatment on the material after cleaning is finished, wherein the annealing temperature is 800 ℃, and the annealing time is 30 s;
(13) the materials are subjected to organic cleaning, a gate electrode (109) groove is formed by adopting photoetching and etching technologies, metal deposition is carried out by adopting an electron beam evaporation technology, two metals of nickel and gold are sequentially deposited, the thicknesses of the two metals are respectively 30nm and 200nm, and after evaporation is finished, multilayer metals on the photoresist are removed by adopting metal stripping equipment, so that the gate electrode is manufactured;
(14) materials dielectric layers (110) were deposited over the devices using ALD to a thickness of 100nm-900 nm.
2. The method for preparing a diamond-based gallium nitride device with an etching protection layer as claimed in claim 1, wherein the first substrate is made of Si material.
3. The method for preparing a diamond-based gallium nitride device with an etching protection layer according to claim 1, wherein in the step (4), the depth of the groove is 0.1-10um, and the width of the groove is 0.5-1 um.
4. The method for preparing a diamond-based gallium nitride device with an etching protection layer according to claim 1, wherein the annealing temperature in step (12) is 800 ℃ and the annealing time is 30 s.
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