CN114550650B - Display panel and display device - Google Patents
Display panel and display device Download PDFInfo
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- CN114550650B CN114550650B CN202210189285.2A CN202210189285A CN114550650B CN 114550650 B CN114550650 B CN 114550650B CN 202210189285 A CN202210189285 A CN 202210189285A CN 114550650 B CN114550650 B CN 114550650B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
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Abstract
The invention provides a display panel and a display device comprising the same, comprising: and the potential adjusting module is used for pulling down the voltage of the second node at least after the first reset transistor finishes voltage reset of the first node and before the light emitting element emits light. Furthermore, the current from the first node to the second node can be increased, so that the current from the first node to the second node and the current from the third node to the first node are stable, the potential of the first node is stabilized, the flickering phenomenon of the display panel when the display screen is displayed is improved, and the watching experience of a user is improved.
Description
Technical Field
The present invention relates to the field of display technologies, and in particular, to a display panel and a display device including the display panel.
Background
With the development of display technology, the application of display panels is becoming more common, and the display panels have been gradually applied to daily work and life of people. Among them, the OLED display panel has the advantages of high contrast, thin thickness, wide viewing angle, fast reaction speed, wide application temperature range, simple structure and process, and the like, and is a mainstream trend of the display panel. However, the flicker phenomenon of the display panel can occur when displaying the picture, which affects the user experience.
Disclosure of Invention
In view of this, the present invention provides a display panel and a display device including the display panel, which effectively solves the existing technical problems, improves the flicker phenomenon of the display panel when displaying the picture, and improves the viewing experience of the user.
In order to achieve the above purpose, the technical scheme provided by the invention is as follows:
a display panel comprising a plurality of display pixels including a light emitting element and a pixel circuit that controls a light emitting state of the light emitting element, wherein the pixel circuit comprises:
a driving transistor for supplying a driving current to the light emitting element so that the light emitting element emits light, a gate of the driving transistor being connected to a first node;
a first reset transistor for voltage resetting the first node, the first reset transistor including a first sub-transistor and a second sub-transistor, a first pole of the first sub-transistor inputting a reference voltage signal, a second pole of the first sub-transistor being connected to a second node, a first pole of the second sub-transistor being connected to the second node, a second pole of the second sub-transistor being connected to the first node;
A compensation transistor for threshold voltage compensation of the driving transistor, the compensation transistor including a third sub-transistor and a fourth sub-transistor, a first pole of the third sub-transistor being connected to the first node, a second pole of the third sub-transistor being connected to the third node, a first pole of the fourth sub-transistor being connected to the third node, a second pole of the fourth sub-transistor being connected to the first pole of the driving transistor;
the potential regulating module is used for
After the first reset transistor finishes the voltage reset of the first node and before the light emitting element emits light, the voltage of the second node is pulled down.
Correspondingly, the invention also provides a display device comprising the display panel.
Compared with the prior art, the technical scheme provided by the invention has at least the following advantages:
the invention provides a display panel and a display device comprising the same, comprising: and the potential adjusting module is used for pulling down the voltage of the second node at least after the first reset transistor finishes voltage reset of the first node and before the light emitting element emits light. Furthermore, the current from the first node to the second node can be increased, so that the current from the first node to the second node and the current from the third node to the first node are stable, the potential of the first node is stabilized, the flickering phenomenon of the display panel when the display screen is displayed is improved, and the watching experience of a user is improved.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a pixel circuit according to another embodiment of the present invention;
FIG. 5 is a timing diagram according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a pixel circuit according to another embodiment of the present invention;
fig. 7 is a schematic structural diagram of a pixel circuit according to another embodiment of the present invention;
FIG. 8 is a timing diagram of another embodiment of the present invention;
fig. 9 is a schematic structural diagram of a pixel circuit according to another embodiment of the present invention;
Fig. 10 is a schematic structural diagram of a pixel circuit according to another embodiment of the present invention;
FIG. 11 is a schematic diagram of a pixel circuit according to another embodiment of the present invention;
fig. 12 is a schematic structural diagram of a pixel circuit according to another embodiment of the present invention;
fig. 13 is a schematic structural diagram of a pixel circuit according to another embodiment of the present invention;
fig. 14 is a schematic structural diagram of a pixel circuit according to another embodiment of the present invention;
fig. 15 is a schematic structural diagram of a pixel circuit according to another embodiment of the present invention;
fig. 16 is a schematic structural diagram of a pixel circuit according to another embodiment of the present invention;
fig. 17 is a schematic structural diagram of a pixel circuit according to another embodiment of the present invention;
fig. 18 is a schematic structural diagram of a pixel circuit according to another embodiment of the present invention;
fig. 19 is a schematic structural diagram of a pixel circuit according to another embodiment of the present invention;
fig. 20 is a schematic structural diagram of a pixel circuit according to another embodiment of the present invention;
fig. 21 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention, but the present invention may be practiced in other ways other than those described herein, and persons skilled in the art will readily appreciate that the present invention is not limited to the specific embodiments disclosed below.
As described in the background section, with the development of display technology, the application of display panels is becoming more and more popular, and has been gradually applied to daily work and life of people. Among them, the OLED display panel has the advantages of high contrast, thin thickness, wide viewing angle, fast reaction speed, wide application temperature range, simple structure and process, and the like, and is a mainstream trend of the display panel. However, the flicker phenomenon of the display panel can occur when displaying the picture, which affects the user experience.
Specifically, when the current pixel circuit works, the brightness of the light-emitting element continuously changes in a frame of display picture, and when the brightness of the light-emitting element changes greatly, a user easily sees the picture flickering phenomenon. Especially when the display pixels are driven at low frequency, the human eyes can feel more on the flickering phenomenon of the display picture, and if the brightness of the light-emitting element is changed greatly in one frame of display picture, the human eyes can see the obvious picture flickering phenomenon, so that the user experience is affected.
The inventors have found that the reason why the luminance of the light emitting element continuously varies in one frame of display screen is that the voltage of the gate electrode of the driving transistor in the pixel circuit is unstable, and the gate voltage of the driving transistor is related to the electric leakage between the gate electrode of the driving transistor and the reset transistor, and the electric leakage between the gate electrode of the driving transistor and the compensation transistor.
The inventors have further found that, when the pixel circuit is in operation, the leakage between the gate of the drive transistor and the compensation transistor is greater than the leakage between the gate of the drive transistor and the reset transistor, thereby causing the gate voltage of the drive transistor to be unstable.
Based on the above, the embodiment of the invention provides a display panel and a display device comprising the display panel, which effectively solve the existing technical problems, improve the flickering phenomenon of the display panel when displaying pictures, and improve the viewing experience of users.
Referring to fig. 1 and fig. 2, fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention, and fig. 2 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention. The display panel provided by the embodiment of the invention comprises: a display area AA and a non-display area NA, wherein the display area AA includes a plurality of display pixels Pi, the display pixels Pi include a light emitting element 200 and a pixel circuit 100 for controlling a light emitting state of the light emitting element 200, and the pixel circuit 100 includes:
A driving transistor T0 for supplying a driving current to the light emitting element 200 to make the light emitting element 200 emit light, the gate of the driving transistor T0 being connected to the first node N1.
A first reset transistor Tr1 for voltage resetting the first node N1, the first reset transistor Tr1 including a first sub-transistor Tr11 and a second sub-transistor Tr12, a first pole of the first sub-transistor Tr11 inputting a reference voltage signal Vref, a second pole of the first sub-transistor Tr11 being connected to the second node N2, a first pole of the second sub-transistor Tr12 being connected to the second node N2, a second pole of the second sub-transistor Tr12 being connected to the first node N1; and the gates of the first sub-transistor Tr11 and the second sub-transistor Tr12 are both connected to the reset control signal Kr.
A compensation transistor Tb for performing threshold voltage compensation on the driving transistor T0, wherein the compensation transistor Tb includes a third sub-transistor Tb11 and a fourth sub-transistor Tb12, a first pole of the third sub-transistor Tb11 is connected to the first node N1, a second pole of the third sub-transistor Tb11 is connected to the third node N3, a first pole of the fourth sub-transistor Tb12 is connected to the third node N3, and a second pole of the fourth sub-transistor Tb12 is connected to the first pole of the driving transistor T0. And the gates of the third and fourth sub-transistors Tb11 and Tb12 are both connected to the compensation control signal Kb.
The potential adjusting module 110 is configured to pull down the voltage of the second node N2 after the voltage reset of the first node N1 by the first reset transistor Tr1 is completed and before the light emitting element 200 emits light.
It can be understood that the first reset transistor Tr1 and the compensation transistor Tb provided in the embodiment of the present invention are dual-gate transistors, and the voltage of the gate of the driving transistor T0 is leaked through the dual-gate transistors due to the coupling capacitance in the dual-gate transistors. Therefore, in the embodiment of the present invention, a first leakage current exists between the driving transistor T0 and the first reset transistor Tr1, and a second leakage current exists between the driving transistor T0 and the compensation transistor Tb, wherein the second leakage current is greater than the first leakage current, resulting in unstable gate voltage of the driving transistor T0.
In the embodiment of the present invention, the potential adjusting module 110 provided by the present invention may operate after the reset of the first reset transistor Tr, and in the phase of the compensation transistor Tb performing the threshold compensation on the driving transistor T0. Furthermore, in the technical solution provided in the embodiment of the present invention, after the voltage reset of the first node N1 by the first reset transistor Tr is finished, before the threshold voltage compensation of the driving transistor T0 by the compensation transistor Tb is finished, the voltage signal having a voltage value smaller than that of the reference voltage signal Vref is output by the voltage adjustment module 110 to the second node N2, so that after the voltage reset of the first node N1 by the first reset transistor Tr1 is finished, the voltage of the second node N2 is further lowered before the threshold voltage compensation of the driving transistor T0 by the compensation transistor Tb is finished. Therefore, by increasing the voltage difference between the second node N2 and the first node N1, the purpose of increasing the first leakage current between the second node N2 and the first node N1 is achieved, and then the difference between the leakage current between the second node N2 and the first node N1 and the leakage current between the first node N1 and the third node N3, that is, the difference between the first leakage current and the second leakage current is reduced, the voltage fluctuation of the first node N1 is reduced, the stability of the gate voltage of the driving transistor T0 is improved, the display screen flickering phenomenon of the display panel T0 is reduced, and the user experience is improved.
It should be noted that, in the embodiment of the present invention, the starting time of the voltage adjustment of the second node N2 by the voltage adjustment module 110 is not earlier than the ending time of the voltage reset of the first node N1 by the first reset transistor Tr1, so as to avoid that the voltage adjustment of the second node N2 by the voltage adjustment module 110 affects the voltage reset process of the first node N1. Moreover, the end time of the voltage adjustment module 110 to the second node N2 is no later than the end time of the threshold compensation process of the compensation transistor Tb to the first node N1, so as to avoid that the voltage adjustment module 110 continues to pull down the voltage of the second node N2 after the threshold compensation of the compensation transistor T0 to the first node N1 is ended, thereby affecting the voltage of the first node N1 and causing the gate voltage of the driving transistor M0 to fluctuate.
It should be noted that, in the above embodiment, the driving transistor T0, the first reset transistor Tr1 and the compensation transistor Tb provided by the present invention may be P-type transistors or N-type transistors, which is not limited in this regard, and the present invention is specifically defined as the case may be.
In one embodiment of the present invention, the voltage difference between the second node N2 and the first node N1 provided by the present invention is less than or equal to the voltage difference between the third node N3 and the first node N1. The voltage difference between the second node N2 and the first node N1 provided by the present invention may be smaller than the voltage difference between the third node N3 and the first node N1, so that the voltage of the second node N2 is further reduced by the voltage adjustment module 110, the voltage difference between the second node N2 and the first node N1 is increased, and the difference between the first leakage current and the second leakage current is reduced by increasing the first leakage current, so that the fluctuation of the gate voltage of the driving transistor T0 is reduced, and the flicker phenomenon of the display screen of the display panel is alleviated.
In another embodiment of the present invention, the voltage difference between the second node N2 and the first node N1 provided by the present invention is equal to the voltage difference between the third node N3 and the first node N1, so that the first leakage current is equal to the second leakage current, so that the current flowing in the first node N1 and the current flowing out of the first node N1 are equal, further, the voltage of the first node N1 is kept stable, and the flicker phenomenon of the display screen of the display panel is alleviated.
It should be noted that, in the above embodiment, the flow direction of the first leakage current may flow from the first node N1 to the second node N2, or may flow from the second node N2 to the first node N1; similarly, the second leakage current may flow from the first node N1 to the third node N3, or may flow from the third node N3 to the first node N1, which is not limited in the present invention, and is specifically determined according to circumstances.
As further shown in fig. 2, in one embodiment of the present invention, the input terminal of the light emitting element 200 is connected to the fourth node N4, and in this embodiment, the pixel circuit 100 further includes:
a second reset transistor Tr2 for resetting the fourth node N4, a first electrode of the second reset transistor Tr2 being electrically connected to a first electrode of the first reset transistor Tr1 (i.e., the access reference voltage signal Vref), and a second electrode of the second reset transistor Tr2 being electrically connected to the fourth node N4. And, the gate of the second reset transistor Tr2 is connected to the reset control signal Kr.
The light-emitting control transistor comprises a first light-emitting control transistor Tf1 and a second light-emitting control transistor Tf2, wherein a first pole of the first light-emitting control transistor Tf1 is input with a power supply signal Vvdd, a second pole of the first light-emitting control transistor Tf1 is electrically connected with a second pole of the driving transistor T0, a grid electrode of the first light-emitting control transistor Tf1 is input with a first light-emitting control signal Kf1, a first pole of the second light-emitting control transistor Tf2 is electrically connected with the fourth node N4, a second pole of the second light-emitting control transistor Kf2 is electrically connected with a first pole of the driving transistor T0, a grid electrode of the second light-emitting control transistor Kf2 is electrically connected with a grid electrode of the first light-emitting control transistor Tf1, and both the first light-emitting control transistor Tf1 and the second light-emitting control transistor Tf2 are connected with the first light-emitting control signal Kf1.
A data input transistor Td, a first pole of the data input transistor Td inputs a data signal Vdata, and a second pole of the data input transistor Td is electrically connected to the second pole of the first light emitting control transistor Tf1 and the second pole of the driving transistor T0 for writing the data signal Vdata to the second pole of the driving transistor T0. And the storage capacitor C is further included, a first pole of the storage capacitor C is connected to the power supply signal Vvdd, and a second pole of the storage capacitor C is electrically connected with the first node N1. The output terminal of the light emitting element 200 is connected to the cathode signal Vpvee.
In the above embodiment, the second reset transistor Tr2, the light emitting control transistors Tf1 and Tf2, and the data input transistor Td may be P-type transistors or N-type transistors, which is not limited in the present invention, as the case may be.
In one embodiment of the present invention, the function of the potential adjustment module provided by the embodiment of the present invention may be implemented by a transistor and a related signal. Referring to fig. 3, the potential adjusting module 110 provided in the embodiment of the present invention includes: a potential adjusting transistor Tt, a first pole of which inputs a first signal V1, a second pole of which is connected to the second node N2, and a gate of which is connected to a first control signal K1; wherein, the first control signal K1 controls the potential adjusting transistor Tt to be in a conducting state after the first reset transistor Tr1 finishes voltage resetting the first node N1 and before the compensation transistor Tb finishes threshold voltage compensation for the driving transistor T0; the voltage of the first signal V1 is smaller than the voltage of the reference voltage signal Vref input to the first pole of the first reset transistor Tr 1.
The potential adjusting transistor Tt may be a P-type transistor or an N-type transistor, which is not limited in the present invention and is specifically defined as appropriate.
The display panel provided in the embodiment of the present invention is described below by taking the driving transistor T0, the first reset transistor Tr1, the second reset transistor Tr2, the compensation transistor Tb, the first light emitting control transistor Tf1, the second light emitting control transistor Tf2, the data input transistor Td, and the potential regulating transistor Tt as examples.
In an embodiment of the present invention, the gates of the compensation transistor Tb and the data input transistor Td provided by the present invention may be connected to the same control signal; wherein the gate of the compensation transistor Tb and the gate of the data input transistor Td may be connected. As shown in fig. 4, the gate of the third sub-transistor Tb11 and the gate of the fourth sub-transistor Tb12 and the gate of the data input transistor Td according to the embodiment of the present invention both input compensation control signals Kb. Wherein the compensation control signal Kb is used for controlling the third sub-transistor Tb11, the fourth sub-transistor Tb12 and the data input transistor Td to be turned on to perform threshold voltage compensation on the driving transistor T0; the first light emission control signal Kf1 is used for controlling the first light emission control transistor Tf1 and the second light emission control transistor Tf2 to be turned on after the threshold voltage compensation of the driving transistor T0, so as to connect the path from the power supply signal Vpvdd to the light emitting element 200. The gate of the second reset transistor Tr2 and the gate of the first reset transistor Tr provided in the embodiment of the present invention are both connected to the reset control signal Kr.
Referring to fig. 4 and 5, fig. 5 is a timing chart according to an embodiment of the invention, wherein a driving process of the pixel circuit 100 includes a reset phase R11, a threshold compensation phase R12 and a light emitting phase R13 sequentially performed. Specific:
in the reset phase R11, the reset control signal Kr is at a low level, and controls the first reset transistor Tr1 and the second reset transistor Tr2 to be turned on, so as to perform a reset process on the connection lines of the first node N1 and the fourth node N4, respectively.
In the threshold compensation phase R12, the compensation control signal Kb is low, and the data input transistor Td and the compensation transistor Tb are respectively controlled to be turned on to input the data signal Vdata. The data signal Vdata is transmitted to the first node N1 through the data input transistor Td, the driving transistor T0 and the compensation transistor Tb until the potential of the gate electrode of the driving transistor T0 (i.e. the first node N1) is Vdata-Vth, vdata is the voltage value of the data signal, and Vth is the absolute value of the threshold voltage of the driving transistor T0. At this time, after the reset phase R11 is finished, the first control signal K1 is at a low level, and the potential adjusting transistor Tt is controlled to be turned on, that is, the potential adjusting module 110 may start to work to pull down the potential of the second node N2, so that the current in the direction from the first node N1 to the second node N2 can be increased, the current from the first node N1 to the second node N2 and the current from the third node N3 to the first node N1 are stable, and the potential of the first node N1 is stabilized.
Finally, in the light emitting stage R13, the first light emitting control signal Kf1 is at a low level, and the first light emitting control transistor Kf1 and the second light emitting control transistor Kf2 are controlled to be turned on, so that the driving current generated by the driving transistor T0 is transmitted to the light emitting element 200. Wherein drive current i=k (Vgs-Vth) 2 ＝K*(Vpvdd-Vdata) 2 Vgs=vpvdd-vdata+vth, vpvdd being the voltage of the power supply signal.
Further referring to fig. 6, the gate of the second reset transistor Tr2 provided in the embodiment of the present invention is electrically connected to the gate of the first reset transistor Tr; the gate of the data input transistor Kd is electrically connected to the gate of the compensation transistor Kb. Thus, by connecting the gates of the transistors connected to the same control signal, the number of wirings can be reduced.
Alternatively, in another embodiment of the present invention, the gates of the compensation transistor Tb and the data input transistor Td provided by the present invention may be connected to different control signals. As shown in fig. 7, the gate of the third sub-transistor Tr11 and the gate of the fourth sub-transistor Tr12 provided in the embodiment of the present invention both input the compensation control signal Kb, and the gate of the data input transistor Td and the gate of the second reset transistor Tr2 input the data control signal Kd; wherein the compensation control signal Kb is used for controlling the third sub-transistor Tr11 and the fourth sub-transistor Tr12 to be turned on so as to perform threshold voltage compensation on the driving transistor T0; the first light emission control signal Kf1 is configured to control the first light emission control transistor Tf1 and the second light emission control transistor Tf2 to alternately operate in a first state R01 and a second state R02 after the threshold voltage compensation of the driving transistor T0, wherein the first light emission control transistor Tf1 and the second light emission control transistor Tf2 are turned on to connect the path of the power supply signal Vpvdd to the light emitting element 200 in the first state R01, and the first light emission control transistor Tf1 and the second light emission control transistor Tf2 are turned off to disconnect the path of the power supply signal Vpvdd to the light emitting element 200 in the second state R02; and, the data control signal Kd is used to control the data input transistor Td to be turned on during the threshold voltage compensation control of the driving transistor T0, and is also used to control the data input transistor Td and the second reset transistor Tr2 to be turned on during the second state R02.
Therefore, after the pixel circuit 100 provided by the embodiment of the invention drives the light emitting element 200 to enter the light emitting stage, the light emitting control transistor is controlled to work in the first state R01 and the second state R02 so as to control the light emitting element 200 to alternately emit light and extinguish, thereby satisfying the visual effect of human eyes and improving the user experience. Meanwhile, in the second state R02, the data input transistor Td is turned on to transmit the data signal Vdata to the driving transistor T0, so as to compensate for the attenuation of the data signal Vdata, thereby further ensuring the high brightness effect of the light emitting device 200.
Referring to fig. 7 and 8, fig. 8 is another timing chart provided in an embodiment of the invention, wherein the driving process of the pixel circuit 100 includes a reset phase R11', a threshold compensation phase R12' and a light emitting phase R13 'sequentially performed, and the light emitting phase R13' includes a plurality of alternating first states R01 and second states R02. Specific:
in the reset phase R11', the reset control signal Kr is at a low level, and controls the first reset transistor Tr1 to be turned on, so as to perform a reset process on the line connected to the first node N1.
In the threshold compensation phase R12', the data control signal Kd and the compensation control signal Kb are both at low level, and the data input transistor Td and the compensation transistor Tb are respectively controlled to be turned on to input the data signal Vdata. The data signal Vdata is transmitted to the first node N1 through the data input transistor Td, the driving transistor T0 and the compensation transistor Tb until the potential of the gate electrode of the driving transistor T0 (i.e. the first node N1) is Vdata-Vth, vdata is the voltage value of the data signal, and Vth is the absolute value of the threshold voltage of the driving transistor T0. At this time, after the reset phase R11' is finished, the first control signal K1 is at a low level, and the potential adjusting transistor Tt is controlled to be turned on, that is, the potential adjusting module 110 may start to work to pull down the potential of the second node N2, so that the current in the direction from the first node N1 to the second node N2 can be increased, the current from the first node N1 to the second node N2 and the current from the third node N3 to the first node N1 are stable, and the potential of the first node N1 is stabilized.
Finally, in the light-emitting phase R13, a plurality of alternating first states R01 and second states R02 are included; in the first state R01, the first light emission control signal Kf1 is low to control the first light emission control transistor Kf1And the second light emission control transistor Kf2 is turned on, and transmits the driving current generated by the driving transistor T0 to the light emitting element 200, and the light emitting element 200 emits light in response to the driving current. In the second state R02, the first light emission control signal Kf1 is at a high level, and the first light emission control transistor Kf1 and the second light emission control transistor Kf2 are controlled to be turned off; meanwhile, the data control signal Kb includes a low level, which controls the data input transistor Td and the second reset transistor Tr2 to be turned on, transmits the data signal Vdata to the driving transistor T0 for voltage compensation, and simultaneously transmits the reference voltage signal Vref to the light emitting element 200, which controls the light emitting element 200 to be turned off. Wherein drive current i=k (Vgs-Vth) 2 ＝K*(Vpvdd-Vdata) 2 Vgs=vpvdd-vdata+vth, vpvdd being the voltage of the power supply signal.
Further referring to fig. 9, the gate of the second reset transistor Tr2 according to the embodiment of the present invention is electrically connected to the gate of the data input transistor Kd. Thus, by connecting the gates of the transistors connected to the same control signal, the number of wirings can be reduced.
On the basis of the above-described embodiments, in one embodiment of the present invention, the potential adjusting transistor Tt pulls down the voltage of the second node N2 in the process of the compensation transistor Tb performing the threshold voltage compensation for the driving transistor T0. As shown in fig. 5 and 8, after the reset period R11 and before the end of the data writing period R12, the first control signal K1 includes a low level, so as to control the potential adjusting transistor Tt to be turned on to pull the potential of the N2 node low.
In one embodiment of the present invention, the on state of the potential regulating transistor Tt is synchronized with the on state of the compensation transistor Tb, so that the gate of the potential regulating transistor Tt and the gate of the compensation transistor Tb can be controlled by the same control signal. Specifically, as shown in fig. 10, the first control signal K1 of the gate access of the potential adjusting transistor Tt provided in the embodiment of the present invention is the same signal as the compensation control signal Kb of the gate access of the compensation transistor Tb.
It can be appreciated that the potential adjusting transistor Tt provided in the embodiment of the present invention is configured to switch on between the first signal V1 and the second node N2 during the threshold voltage compensation process of the compensation transistor Tb on the driving transistor T0, that is, the on state of the voltage adjusting transistor Tt may be synchronous with the on state of the compensation transistor Tb; therefore, the gate of the potential adjusting transistor Tt and the gate of the compensation transistor Tb are set to be connected to the same control signal, and the number of signal ports is reduced on the basis of satisfying the threshold voltage compensation and the communication between the first signal V1 and the second node N2. As shown in fig. 10, the gate of the data input transistor Td provided in the embodiment of the present invention may input the compensation control signal Kb. Alternatively, as shown in fig. 11, the gate of the data input transistor Td provided in the embodiment of the present invention inputs the data control signal Kd.
Further, in one embodiment of the present invention, the gate of the potential adjusting transistor Tt is electrically connected to the gate of the compensation transistor Tb, so that the gate of the potential adjusting transistor Tt and the gate of the compensation transistor Tb can be controlled by the same control signal line, reducing the number of signal lines in the display panel. As shown in fig. 12, the gate of the compensation transistor Tb and the gate of the potential adjusting transistor Tt are connected, so that the potential adjusting transistor Tt and the compensation transistor Tb are controlled to be turned on and off by a control signal line K, and the effective wiring structure of the display panel is enlarged. As shown in fig. 12, the gate of the data input transistor Td provided in the embodiment of the present invention may input the compensation control signal Kb. Alternatively, as shown in fig. 13, the gate of the data input transistor Td provided in the embodiment of the present invention inputs the data control signal Kd.
The potential adjusting module 110 provided in the embodiment of the present invention is configured to pull the potential of the second node N2 low, wherein the voltage of the first signal V1 connected to the potential adjusting transistor Tt needs to be lower than the voltage of the reference voltage signal Vref. Specifically, the first signal V1 provided in the embodiment of the present invention may be a voltage signal transmitted by a signal line with a fixed voltage value, or may also be a voltage signal transmitted by another line in the display panel. Some of the lines that are capable of providing a functional voltage that are encompassed by the present invention are described in detail below with reference to the accompanying drawings.
In one embodiment of the present invention, as shown in fig. 1, a plurality of display pixels Pi may be arranged in a pixel array, where the pixel array includes a plurality of rows of display pixels Pi, and each row of display pixels Pi is connected to a light emitting control signal to control a pixel circuit 100 included therein to enter a light emitting stage. When the light emission control signal accessed to the display pixel Pi of the nth row controls the pixel circuit to enter the light emission stage, the light emission control signal of the n+i row is still in a low-level maintenance state, so that the first signal V1 provided by the invention can multiplex the light emission control signal of the n+i row, i is not less than 2, and the problem that the level of the light emission control signal of the adjacent row changes and the function of the potential regulating module cannot be realized is avoided. As shown in fig. 14, the first electrode of the potential adjusting transistor Tt inputs a second light emission control signal Kf2, that is, the first signal may be the second light emission control signal Kf2, wherein the first light emission control signal Kf1 is a light emission control signal of the display pixels of the nth row, and the second light emission control signal Kf2 is a light emission control signal of the display pixels of the n+i row, wherein i is an integer not less than 2. And multiplexing the light-emitting control signals of the display pixels of the n+i row, and pulling down the voltage of the second node N2 after the first reset transistor Tr1 finishes the voltage reset of the first node N1 and before the compensation transistor Tb finishes the threshold voltage compensation of the driving transistor T0. The invention reduces the number of signal lines in the display panel by multiplexing the first signal with the light emission control signal. As shown in fig. 14, the gate of the data input transistor Td provided in the embodiment of the present invention may input the compensation control signal Kb. Alternatively, as shown in fig. 15, the gate of the data input transistor Td provided in the embodiment of the present invention inputs the data control signal Kd.
Optionally, in one embodiment of the present invention, i is 2, that is, the second light emission control signal Kf2 is a light emission control signal of the n+2th row of display pixels, so as to multiplex the light emission control signal of the n+2th row of display pixels, pull down the voltage of the second node N2, and reduce the distance between the signal line transmitting the second light emission control signal Kf2 and the potential adjusting transistor Tt on the basis of reducing the number of signal lines in the display panel, so as to facilitate the electrical connection between the signal line transmitting the second light emission control signal Kf2 and the potential adjusting transistor Tt of the N-th row of display pixels. The invention is not limited thereto and is specifically applicable.
In another embodiment of the present invention, the display panel further includes a clock signal, such as a clock signal for driving the gate driving circuit. The first signal provided by the embodiment of the invention can also multiplex the clock signal, so long as the clock signal is at a low-level potential when the potential regulating transistor is conducted. As shown in fig. 16, the first pole of the potential adjusting transistor Tt inputs the clock signal CK, wherein the clock signal CK is at a low level potential when the potential adjusting transistor Tt is turned on, and further, the second node N2 is pulled down after the first reset transistor Tr1 finishes the voltage reset on the first node N1 and before the compensation transistor Tb finishes the threshold voltage compensation on the driving transistor T0 by using the low level potential in the clock signal CK. The invention can reduce the number of signal lines in the display panel by multiplexing the first signal with the clock signal.
In an embodiment of the present invention, when the potential adjusting transistor Tt provided by the present invention is a P-type transistor, the first pole of the potential adjusting transistor Tt may be connected to the gate thereof. In still another embodiment of the present invention, as shown in fig. 17, since the control signal of the P-type transistor is a low level signal, the first electrode of the potential adjusting transistor Tt is electrically connected to the gate of the potential adjusting transistor Tt to multiplex the first control signal K1 of the potential adjusting transistor Tt as the signal of the first electrode of the potential adjusting transistor Tt, and the potential of the second node N2 is pulled down before the end of the voltage reset of the first node N1 by the first reset transistor Tr and before the end of the threshold voltage compensation of the driving transistor T0 by the compensation transistor Tb. Thus, by multiplexing the first control signal K1 to which the gate of the potential regulating transistor Tt is connected, the number of signal lines in the display panel can be reduced. As shown in fig. 17, the gate of the data input transistor Td provided in the embodiment of the present invention may input the compensation control signal Kb. Alternatively, as shown in fig. 18, the gate of the data input transistor Td provided in the embodiment of the present invention inputs the data control signal Kd.
In an embodiment of the present invention, when the gate of the compensation transistor Tb is connected to the compensation control signal Kb and the gate of the data input transistor Td is connected to the data control signal Kd, and the potential adjusting transistor Tt is a P-type transistor, the first pole of the potential adjusting transistor Tt may be connected to the gate thereof. As shown in fig. 19, the gate of the potential regulating transistor Tt and the first pole of the potential regulating transistor Tt are both input with a data control signal Kd. In this way, in the threshold compensation stage, the low level control potential adjusting transistor Tt of the data control signal Kd is turned on, and the low level of the data control signal Kd is connected to the path of the second node N2, thereby achieving the purpose of balancing the potential of the first node N1. And, during the light emission phase, in the first state R01, the high level control potential adjusting transistor Tt of the data control signal Kd is turned off; and in the second state R02, the low level of the data control signal Kd again controls the potential regulating transistor Tt to be turned on, so that the potential of the first node N1 can be balanced in the light emitting stage, and the display effect of the display panel is improved.
In an embodiment of the present invention, when the gate of the compensation transistor Tb is connected to the compensation control signal Kb and the gate of the data input transistor Td is connected to the data control signal Kd, and the potential adjusting transistor Tt is a P-type transistor, the gate of the potential adjusting transistor Tt inputs the data control signal Kb; the first pole of the potential regulating transistor Tt inputs a fixed level signal Vg. As shown in fig. 20, in the threshold compensation stage, the potential adjustment transistor Tt is turned on by the low level control of the data control signal Kd, and the fixed level signal Vg is connected to the path of the second node N2, thereby balancing the potential of the first node N1. And, during the light emission phase, in the first state R01, the high level control potential adjusting transistor Tt of the data control signal Kd is turned off; and in the second state R02, the low level of the data control signal Kd again controls the potential regulating transistor Tt to be turned on, so that the potential of the first node N1 can be balanced in the light emitting stage, and the display effect of the display panel is improved.
Correspondingly, the invention also provides a display device which comprises the display panel provided by any embodiment. The display device provided by the embodiment of the invention can be a mobile terminal and the like.
Referring to fig. 21, a schematic structural diagram of a display device according to an embodiment of the present invention is shown, where the display device is a mobile terminal 1000, and includes a display panel according to any one of the above embodiments.
The embodiment of the invention provides a display panel and a display device comprising the display panel, comprising: and the potential adjusting module is used for pulling down the voltage of the second node at least after the first reset transistor finishes voltage reset of the first node and before the light emitting element emits light. Furthermore, the current from the first node to the second node can be increased, so that the current from the first node to the second node and the current from the third node to the first node are stable, the potential of the first node is stabilized, the flickering phenomenon of the display panel when the display screen is displayed is improved, and the watching experience of a user is improved.
In the description, each part is described in a parallel and progressive mode, and each part is mainly described as a difference with other parts, and all parts are identical and similar to each other.
The features described in the various embodiments of the present disclosure may be interchanged or combined with one another in the description to enable those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (17)
1. A display panel comprising a plurality of display pixels including a light emitting element and a pixel circuit that controls a light emitting state of the light emitting element, wherein the pixel circuit comprises:
a driving transistor for supplying a driving current to the light emitting element so that the light emitting element emits light, a gate of the driving transistor being connected to a first node;
a first reset transistor for voltage resetting the first node, the first reset transistor including a first sub-transistor and a second sub-transistor, a first pole of the first sub-transistor inputting a reference voltage signal, a second pole of the first sub-transistor being connected to a second node, a first pole of the second sub-transistor being connected to the second node, a second pole of the second sub-transistor being connected to the first node;
A compensation transistor for threshold voltage compensation of the driving transistor, the compensation transistor including a third sub-transistor and a fourth sub-transistor, a first pole of the third sub-transistor being connected to the first node, a second pole of the third sub-transistor being connected to the third node, a first pole of the fourth sub-transistor being connected to the third node, a second pole of the fourth sub-transistor being connected to the first pole of the driving transistor;
and the potential adjusting module is used for turning on the compensation transistor after the first reset transistor finishes voltage reset on the first node and pulling down the voltage of the second node before the light emitting element emits light.
2. The display panel of claim 1, wherein a voltage difference between the second node and the first node is less than or equal to a voltage difference between the third node and the first node.
3. The display panel according to claim 1, wherein an input terminal of the light emitting element is connected to a fourth node, the pixel circuit further comprising:
a second reset transistor for resetting the fourth node, a first pole of the second reset transistor being electrically connected to a first pole of the first reset transistor, a second pole being electrically connected to the fourth node;
A light emission control transistor including a first light emission control transistor and a second light emission control transistor, wherein a first pole of the first light emission control transistor inputs a power supply signal, a second pole of the first light emission control transistor is electrically connected to a second pole of the driving transistor, a gate of the first light emission control transistor inputs the first light emission control signal, a first pole of the second light emission control transistor is electrically connected to the fourth node, a second pole of the second light emission control transistor is electrically connected to a first pole of the driving transistor, and a gate of the second light emission control transistor is electrically connected to a gate of the first light emission control transistor;
and a data input transistor having a first pole to which a data signal is input and a second pole electrically connected to the second pole of the first light emitting control transistor for writing the data signal to the second pole of the driving transistor.
4. A display panel according to claim 3, wherein the potential adjustment module comprises:
a potential adjusting transistor having a first electrode to which a first signal is input, a second electrode connected to the second node, and a gate connected to a first control signal;
After the first reset transistor performs voltage reset on the first node, the first control signal controls the potential regulating transistor to be in a conducting state before the compensation transistor performs threshold voltage compensation on the driving transistor; the voltage of the first signal is less than the voltage of the reference voltage signal.
5. The display panel according to claim 4, wherein the gate of the third sub-transistor and the gate of the fourth sub-transistor and the gate of the data input transistor each input a compensation control signal;
the compensation control signal is used for controlling the third sub-transistor, the fourth sub-transistor and the data input transistor to be conducted so as to perform threshold voltage compensation on the driving transistor;
the first light-emitting control signal is used for controlling the first light-emitting control transistor and the second light-emitting control transistor to be conducted after threshold voltage compensation is conducted on the driving transistor, so that a path from the power supply signal to the light-emitting element is communicated.
6. The display panel according to claim 4, wherein the gates of the third and fourth sub-transistors each input a compensation control signal, and the gates of the data input transistor and the second reset transistor input a data control signal;
The compensation control signal is used for controlling the third sub-transistor and the fourth sub-transistor to be conducted so as to perform threshold voltage compensation on the driving transistor;
the first light-emitting control signal is used for controlling the first light-emitting control transistor and the second light-emitting control transistor to alternately operate in a first state and a second state after threshold voltage compensation is performed on the driving transistor, wherein the first light-emitting control transistor and the second light-emitting control transistor are conducted to connect a passage of the power supply signal to the light-emitting element in the first state, and the first light-emitting control transistor and the second light-emitting control transistor are turned off to disconnect a passage of the power supply signal to the light-emitting element in the second state;
and the data control signal is used for controlling the data input transistor to be conducted in the process of carrying out threshold voltage compensation control on the driving transistor, and is also used for controlling the data input transistor and the second reset transistor to be conducted in the process of the second state.
7. The display panel according to claim 5 or 6, wherein the potential adjusting transistor pulls down the voltage of the second node in the process of compensating for the threshold voltage of the driving transistor.
8. The display panel according to claim 7, wherein a conductive state of the potential adjusting transistor is synchronized with a conductive state of the compensation transistor.
9. The display panel according to claim 8, wherein a gate of the potential adjusting transistor is electrically connected to a gate of the compensation transistor.
10. The display panel according to claim 9, wherein a second light emission control signal is input to a first electrode of the potential regulating transistor;
the first light-emitting control signal is a light-emitting control signal of an nth row of display pixels, and the second light-emitting control signal is a light-emitting control signal of an (n+i) th row of display pixels, wherein i is an integer not less than 2.
11. The display panel according to claim 9, wherein a first pole of the potential regulating transistor inputs a clock signal.
12. The display panel according to claim 9, wherein a first electrode of the potential adjusting transistor is electrically connected to a gate of the potential adjusting transistor.
13. The display panel according to claim 6, wherein a gate of the potential adjusting transistor and a first pole of the potential adjusting transistor are both input with a data control signal.
14. The display panel according to claim 6, wherein a gate of the potential adjusting transistor inputs a data control signal;
the first pole of the potential regulating transistor inputs a fixed level signal.
15. The display panel of claim 5, wherein a gate of the second reset transistor is electrically connected to a gate of the first reset transistor; the gate of the data input transistor is electrically connected to the gate of the compensation transistor.
16. The display panel of claim 6, wherein a gate of the second reset transistor is electrically connected to a gate of the data input transistor.
17. A display device comprising the display panel of any one of claims 1-16.
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| CN115050330A (en) * | 2022-07-20 | 2022-09-13 | 武汉天马微电子有限公司 | Display panel, pixel circuit thereof and display driving method |
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| CN113192460A (en) * | 2021-05-17 | 2021-07-30 | 厦门天马微电子有限公司 | Display panel and display device |
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| CN112259050A (en) * | 2020-10-30 | 2021-01-22 | 上海天马有机发光显示技术有限公司 | Display panel, driving method thereof and display device |
| CN113192460A (en) * | 2021-05-17 | 2021-07-30 | 厦门天马微电子有限公司 | Display panel and display device |
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