CN115050330A - Display panel, pixel circuit thereof and display driving method - Google Patents
Display panel, pixel circuit thereof and display driving method Download PDFInfo
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
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Abstract
The application discloses display panel and pixel circuit and display drive method thereof, pixel circuit includes: the grid electrode of the driving transistor is connected with the first node, the first pole of the driving transistor is connected with the second node, and the second pole of the driving transistor is connected with the third node; the first reset transistor is a first double-grid transistor, the grid of the first double-grid transistor is used for accessing a first scanning signal, the first pole of the first double-grid transistor is connected with the first node, and the second pole of the first double-grid transistor is used for accessing a reference voltage; the intermediate node of the first pole and the second pole of the first double-grid transistor is connected with a control module, and the control module is used for controlling the potential of the intermediate node so as to reduce the voltage difference between the intermediate node and the first node in the light-emitting stage. The technical scheme of the application solves the problem of flicker in low-frequency display of the display panel and improves the image display quality.
Description
Technical Field
The present disclosure relates to the field of display device technologies, and more particularly, to a display panel, a pixel circuit thereof, and a display driving method.
Background
With the continuous development of scientific technology, more and more electronic devices with display function are widely applied to daily life and work of people, bring great convenience to daily life and work of people, and become an indispensable important tool for people at present.
The main component of the electronic device that implements the display function is the display panel. The existing display panel has the problem of display flicker. The flicker problem is particularly serious especially in low frequency displays.
Disclosure of Invention
In view of the above, the present application provides a display panel, a pixel circuit thereof and a display driving method, and the scheme is as follows:
a pixel circuit of a display panel, one period of the pixel circuit includes a reset phase, a data writing phase and a light emitting phase according to time sequence, the pixel circuit includes:
the grid electrode of the driving transistor is connected with the first node, the first pole of the driving transistor is connected with the second node, and the second pole of the driving transistor is connected with the third node;
the first reset transistor is a first double-grid transistor, the grid of the first double-grid transistor is used for accessing a first scanning signal, the first pole of the first double-grid transistor is connected with the first node, and the second pole of the first double-grid transistor is used for accessing a reference voltage;
the intermediate node of the first pole and the second pole of the first double-grid transistor is connected with a control module, and the control module is used for controlling the potential of the intermediate node so as to reduce the voltage difference between the intermediate node and the first node in the light-emitting stage.
The present application also provides a display panel, including:
a light emitting element;
the pixel circuit is connected with the light-emitting element and used for controlling the light-emitting element to perform light-emitting display based on a scanning signal;
and a scanning circuit connected to the pixel circuit, the scanning circuit being configured to apply a scanning signal to the pixel circuit body.
The present application also provides a display driving method of a display panel, in which a pixel circuit in the display panel includes: the grid electrode of the driving transistor is connected with the first node, the first pole of the driving transistor is connected with the second node, and the second pole of the driving transistor is connected with the third node; the first reset transistor is a first double-grid transistor, the grid of the first double-grid transistor is used for accessing a first scanning signal, the first pole of the first double-grid transistor is connected with the first node, and the second pole of the first double-grid transistor is used for accessing a reference voltage;
the display driving method includes:
in a reset stage, a first reset transistor is controlled to be conducted through a first scanning signal, and voltage reset is carried out on a first node;
in the data writing stage, voltage resetting is carried out on the second node;
in the light-emitting stage, a pixel circuit is used for providing a driving current for the light-emitting element so as to control the light-emitting element to emit light for display;
in the data writing stage, the potential of the intermediate node of the first pole and the second pole of the first double-grid transistor is controlled so as to reduce the voltage difference between the intermediate node and the first node in the light emitting stage.
As can be seen from the above description, in the display panel, the pixel circuit and the display driving method thereof provided in the technical solution of the present application, the control module is connected to the intermediate node between the first pole and the second pole of the first double-gate transistor, and the control module can control the potential of the intermediate node, so as to reduce the voltage difference between the intermediate node and the first node in the light-emitting stage, thereby reducing the leakage current of the first double-gate transistor, further reducing the potential variation of the first node, and avoiding the flicker problem caused by the leakage current of the first double-gate transistor.
Drawings
In order to more clearly illustrate the embodiments of the present application or technical solutions in related technologies, the drawings used in the embodiments or descriptions of the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
The structures, proportions, and dimensions shown in the drawings and described in the specification are for illustrative purposes only and are not intended to limit the scope of the present disclosure, which is defined by the claims, but rather by the claims, it is understood that these drawings and their equivalents are merely illustrative and not intended to limit the scope of the present disclosure.
Fig. 1 is a schematic structural diagram of a pixel circuit in a display panel according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of a pixel circuit in another display panel according to an embodiment of the present disclosure;
fig. 3 is a schematic structural diagram of a pixel circuit in another display panel according to an embodiment of the present disclosure;
fig. 4 is a schematic structural diagram of a pixel circuit in another display panel according to an embodiment of the present disclosure;
fig. 5 is a schematic structural diagram of a pixel circuit in another display panel according to an embodiment of the present disclosure;
fig. 6 is a schematic structural diagram of a pixel circuit in another display panel according to an embodiment of the present disclosure;
fig. 7 is a timing diagram of a pixel circuit according to an embodiment of the present disclosure;
FIG. 8 is a graph of voltage versus time for a first node potential in a conventional pixel circuit without a control block;
FIG. 9 is a graph showing the voltage variation with time of the first node potential in the pixel circuit according to the embodiment of the present application;
fig. 10 is a schematic structural diagram of a display panel according to an embodiment of the present disclosure;
fig. 11 is a flowchart of a method of a display driving method according to the present embodiment.
Detailed Description
Embodiments of the present application will now be described more fully hereinafter with reference to the accompanying drawings, in which embodiments of the application are shown, and in which it is to be understood that the embodiments described are merely illustrative of some, but not all, of the embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The display panel has a problem of display flicker. The flicker problem is particularly serious in low frequency display, because the period time of one frame is prolonged in low frequency display, and the potential variation of the node in the pixel circuit is larger under the same leakage current, so the flicker problem is more serious in low frequency display driving.
In order to solve the above problem, embodiments of the present application provide a display panel, a pixel circuit thereof, and a display driving method, wherein one cycle of the pixel circuit includes a reset phase, a data writing phase, and a light emitting phase in time sequence.
The pixel circuit includes:
the grid electrode of the driving transistor is connected with the first node, the first pole of the driving transistor is connected with the second node, and the second pole of the driving transistor is connected with the third node;
the first reset transistor is a first double-grid transistor, the grid of the first double-grid transistor is used for accessing a first scanning signal, the first pole of the first double-grid transistor is connected with the first node, and the second pole of the first double-grid transistor is used for accessing a reference voltage;
the intermediate node of the first pole and the second pole of the first double-grid transistor is connected with a control module, and the control module is used for controlling the potential of the intermediate node so as to reduce the voltage difference between the intermediate node and the first node in the light-emitting stage.
In the embodiment of the application, the control module is connected to the intermediate node between the first pole and the second pole of the first double-gate transistor, the potential of the intermediate node can be controlled through the control module, the voltage difference between the intermediate node and the first node in the light emitting stage is reduced, and therefore the leakage current of the first double-gate transistor is reduced, the potential variation of the first node is further reduced, and the problem of flicker caused by the leakage current of the first double-gate transistor is avoided.
In order to make the aforementioned objects, features and advantages of the present application more comprehensible, the present application is described in further detail with reference to the accompanying drawings and the detailed description.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a pixel circuit in a display panel according to an embodiment of the present disclosure, where one cycle of the pixel circuit includes a reset stage, a data writing stage, and a light emitting stage according to a time sequence.
As shown in fig. 1, the illustrated pixel circuit 11 includes:
a driving transistor T3, a gate of the driving transistor T3 being connected to the first node N1, a first pole being connected to the second node N2, and a second pole being connected to the third node N3;
a first reset transistor T5, the first reset transistor T5 is a first double-gate transistor, a gate of the first double-gate transistor T5 is used for receiving a first scan signal S1, a first pole is connected to the first node N1, and a second pole is used for receiving a reference voltage Vref;
the control module 10 is connected to an intermediate node N6 between the first and second electrodes of the first double-gate transistor, and the control module 10 is configured to control the potential of the intermediate node N6 to reduce the voltage difference between the intermediate node N6 and the first node N1 during the light emitting phase.
Although the first double-gate transistor is adopted as the first reset transistor T5, the influence of the leakage current in the first reset transistor on the display effect can be reduced to some extent. However, in the low frequency display, the leakage current in the first reset transistor T5 still causes the flicker problem.
In the embodiment of the present application, the control module 10 is connected to the intermediate node N6 between the first and second poles of the first dual-gate transistor, the potential of the intermediate node N6 can be controlled by the control module 10, and the voltage difference between the intermediate node N6 and the first node in the light-emitting phase is reduced, so that the leakage current of the first dual-gate transistor is reduced, the potential variation of the first node N1 is reduced, and the flicker problem caused by the leakage current of the first dual-gate transistor is avoided.
Specifically, before the light-emitting stage, the potential of the intermediate node N6 can be pulled high, and the voltage difference between the intermediate node N6 and the first node N1 can be reduced, so that the leakage current of the first double-gate transistor can be reduced, the voltage difference between the intermediate node and the first node in the light-emitting stage can be reduced, the potential variation of the first node can be reduced, the flicker problem caused by the leakage current of the first double-gate transistor can be avoided, and the problem of low-frequency flicker of the display panel can be effectively solved.
In the light emitting stage, the driving transistor T3 is turned on to supply a driving current to the light emitting element D, thereby controlling the light emitting element D to perform light emitting display. In the embodiment of the present application, the display panel is an OLED display panel, and the light emitting elements are OLED pixels.
In the reset phase, the first reset transistor T5 is controlled to be turned on by the first scan signal S1, and the first node N1 is voltage-reset based on the reference voltage Vref, thereby resetting the gate voltage of the driving transistor T3.
In the embodiment of the application, in the data writing phase, the control module 11 is configured to input a high level signal to the intermediate node N6 in response to the input control signal Scan2, for example, to prevent the first double-gate transistor from generating a leakage current to affect the potential of the first node N1, so as to keep the potential of the first node N1 stable.
Referring to fig. 2, fig. 2 is a schematic structural diagram of another pixel circuit in a display panel according to an embodiment of the present disclosure, based on the manner shown in fig. 1, the pixel circuit 11 shown in fig. 2 has a data writing transistor T2, and a gate of the data writing transistor T2 is used for receiving a second scan signal S2; in the data writing phase, the second scan signal S2 is used to control the data writing transistor T2 to turn on, writing the data voltage Vdata into the second node; the second Scan signal S2 is multiplexed as the control signal Scan2, so that the second Scan signal S1 existing in the pixel circuit 11 is multiplexed as the control signal Scan2, and the control signal Scan2 does not need to be added separately, thereby simplifying the circuit structure and the driving timing.
Referring to fig. 3, fig. 3 is a schematic structural diagram of a pixel circuit in a display panel according to another embodiment of the present disclosure, based on the manner shown in fig. 1, the pixel circuit 11 shown in fig. 3 includes a first control transistor T6, a gate of the first control transistor T6 is used for receiving a light emitting signal EM, a first pole is connected to a third node N3, and a second pole is connected to a fourth node N4; the fourth node N4 is connected to the positive electrode of the light-emitting element D; the light-emitting signal EM is used to control the first control transistor T6 to be turned on in the light-emitting phase, so as to control the light-emitting element D to perform light-emitting display; the control module 10 is connected to the fourth node N4, and multiplexes the potential of the fourth node N4 as the control signal Scan 2.
In the embodiment shown in fig. 3, the potential of the fourth node N4 is multiplexed as the control signal Scan2 in the pixel circuit 11, and the control signal Scan2 is not required to be added separately, thereby simplifying the circuit configuration and the driving timing.
Referring to fig. 4, fig. 4 is a schematic structural diagram of a pixel circuit in a display panel according to another embodiment of the present disclosure, based on the manner shown in fig. 1, in the pixel circuit 11 shown in fig. 4, a control module 10 is a node voltage control capacitor C1, a first plate of a node voltage control capacitor C1 is connected to an intermediate node N6, and a second plate is used for receiving a control signal Scan 2.
The node voltage control capacitor C1 is used as the control module 10 to control the potential of the intermediate node N6, and the control signal Scan2 is used to control the potential of the second plate of the node voltage control capacitor C1, so that the potential of the first plate of the controller can be controlled, the potential of the intermediate node N6 can be controlled, and the voltage difference between the intermediate node N6 and the first node N1 in the light-emitting stage can be reduced. When the potential of the intermediate node N6 is controlled by the control signal Scan2 based on the characteristics of the capacitor, when the control signal Scan2 is low, the potential of the first plate, that is, the potential of the intermediate node N6, is pulled high by inputting a low level to the second plate. Based on this characteristic of the capacitance, the potential of the second Scan signal S2 or the fourth node N4 can be multiplexed as the control signal Scan 2.
As shown in fig. 4, the pixel circuit 11 includes: the storage capacitor Cst, a first plate of the first storage capacitor Cst is used for receiving the first power voltage PVDD, and a second plate is connected to the first node N1.
In the embodiment of the present application, the first plate of the node voltage control capacitor C1 and the first plate of the storage capacitor Cst are located on the same layer, and the second plate of the node voltage control capacitor C1 and the second plate of the storage capacitor Cst are located on the same layer. When the conductive layers of the two plates of the storage capacitor Cst in the multiplexing pixel circuit 11 are respectively used to prepare the two plates of the node voltage control capacitor C1, the manufacturing process is not increased, and only the graphic structures of the two conductive layers of the storage capacitor Cst are required to be modified appropriately, and the node voltage control capacitor C1 connected to the intermediate node N6 is reserved. Thus, the conductive layer of the storage capacitor Cst in the multiplexing pixel circuit 11 is used to prepare the two-electrode plate of the node voltage control capacitor C1, without increasing the thickness of the panel.
Referring to fig. 5, fig. 5 is a schematic structural diagram of a pixel circuit in another display panel provided in the present embodiment, based on the manner shown in fig. 1, in the manner shown in fig. 5, a control module 10 is a node voltage control transistor Q; the grid electrode of the node voltage control transistor Q is used for accessing a control signal Scan2, the first pole is connected with the middle node N6, and the second pole is accessed with a high-level signal VGH; in the write data phase, the control signal Scan2 controls the node voltage control transistor Q to be turned on, and the high level signal VGH is input to the intermediate node N6.
In the manner shown in fig. 5, the node voltage control transistor Q is controlled to be turned on during the data writing period by the node voltage control transistor Q seat control module 10, so as to write the high level signal VGH into the intermediate node N6, thereby reducing the voltage difference between the intermediate node N6 and the first node N1 during the light emitting period.
In the embodiment of the present application, the display panel has a scan circuit, and the scan circuit includes a shift register, and the shift register is configured to input a scan signal to the pixel circuit 11 based on a clock signal, a high level signal VGH, and a low level signal VGL; the second polarity of the node voltage control transistor Q multiplexes the high level signal VGH inputted to the shift register. Therefore, the high-level signal VGH in the display panel is multiplexed as the high-level signal VGH input by the second pole of the node voltage control transistor Q without increasing the number of signals, and the structure of the panel is simplified.
In the embodiment shown in fig. 5, the voltage control transistor Q is the same layer as the other transistors in the pixel circuit 11. If the voltage control transistor Q is prepared in the same process step while the transistor in the pixel circuit 11 is prepared, the manufacturing process is not increased, and the film structure is not increased, so that the manufacturing process of the display panel is simple, the manufacturing cost is low, and the display panel has a thin thickness.
The voltage control transistor Q and other transistors in the pixel circuit 11 are both PMOS or NMOS, for example, the voltage control transistor Q can multiplex the potential of the second Scan signal S2 or the fourth node N4 as the control signal Scan 2.
Referring to fig. 6, fig. 6 is a schematic structural diagram of a pixel circuit in a display panel according to yet another embodiment of the present application, in this way, a control module 10 in a pixel circuit 11 with a 7T1C structure is taken as an example for description, wherein a node voltage control capacitor C1 is taken as the control module 10.
As shown in fig. 6, the pixel circuit includes:
a driving transistor T3, a gate of the driving transistor T3 being connected to the first node N1, a first pole being connected to the second node N2, and a second pole being connected to the third node N3;
a first reset transistor T5, the first reset transistor T5 is a first double-gate transistor, a gate of the first double-gate transistor T5 is used for receiving a first scan signal S1, a first pole is connected to the first node N1, and a second pole is used for receiving a reference voltage Vref;
a data writing transistor T2, wherein a gate of the data writing transistor T2 is used for receiving a second scan signal S2, a first pole is connected to the second node N2, and a second pole is connected to the data voltage Vdata;
a first control transistor T6, a gate of the first control transistor T6 is used for receiving the emission signal EM, a first pole is connected to the third node N3, and a second pole is connected to the fourth node N4; the fourth node N4 is connected to the positive electrode of the light-emitting element D;
a first plate of the first storage capacitor Cst is connected to a first power voltage PVDD, and a second plate of the first storage capacitor Cst is connected to a first node N1;
a second control transistor T1, a gate of the second control transistor T1 is connected to the emission signal EM, a first pole is connected to the first power voltage PVDD, and a second pole is connected to the second node N2;
the compensation transistor T4 is a second double-gate transistor, and the second double-gate transistor is adopted as the compensation transistor T4, so that the leakage current of the compensation transistor T4 can be reduced; the gate of the compensating transistor T4 is connected to the second scan signal S2, the first pole is connected to the first node N1, and the second pole is connected to the third node N3;
and a second reset transistor T7, a gate of the second reset transistor T7 receiving the second scan signal S2, a first pole receiving the reference voltage Vref, and a second pole connected to the fourth node.
Taking each transistor in the circuit as a PMOS as an example, the PMOS is turned off at a high level and turned on at a low level. The timing of the pixel circuit 11 may be as shown in fig. 7.
Referring to fig. 7, in the driving timing diagram of the pixel circuit provided in the embodiment of fig. 7, in the reset phase T1, the first scan signal S1 is at a low level, the first reset transistor T5 is turned on, and the voltage at the first node N1 is reset. In the data writing period T2, the second scan signal S2 is at a low level, the data writing transistor T2 is turned on, and the data voltage Vdata is written into the second node N2. In the light emitting period T3, the light emission control signal EM is at a low level, and the driving transistor T3 and the first control transistor T6 are both turned on to supply a driving current to the light emitting element D, and the controller emits light for display.
In the drawings of the embodiments of the present application, each transistor is taken as a PMOS as an example, and the PMOS is turned off at a high level, turned on at a low level, and turned off at a high level. Obviously, each transistor may also be set to be an NMOS, the NMOS is turned on at a high level and turned off at a low level, and the control timing may be set based on this, which is not described in the embodiment of the present application.
In the embodiment of the present application, the pixel circuit 11 is not limited to the T71C structure shown in fig. 6. In the embodiment of the present application, the problem of display flicker of a real panel is solved by adding the control module 10 to the pixel circuit 11. The pixel circuit may have a 7T1C structure with the addition of the control block 10 to the pixel circuit 11 having a 7T1C structure, or the pixel circuit may have an 8T1C structure with the addition of the control block 10 to the pixel circuit 11 having an 8T1C structure. In the embodiment of the present application, the pixel circuit 11 may have a T71C structure, an 8T1C structure, or other pixel circuit structures, and the specific implementation manner of the pixel circuit 11 in the embodiment of the present application is not particularly limited.
Referring to fig. 8 and 9, fig. 8 is a graph showing the voltage variation with time of the first node potential in the conventional pixel circuit without the control module, fig. 9 is a graph showing the voltage variation with time of the first node potential in the pixel circuit according to the embodiment of the present application, in fig. 8 and 9, the horizontal axis shows time, and the vertical axis shows voltage, and as compared with the simulation result of the voltage signals shown in fig. 8 and 9, in the light emitting stage, the manner shown in fig. 8 shows that the magnitude of the potential variation of the first node is large, while in the technical solution shown in fig. 9, the magnitude of the potential variation of the first node is small, and has a stable potential.
Based on the above pixel circuit embodiments, another embodiment of the present application further provides a display panel, and the structure of the display panel signboard can be as shown in fig. 10.
Referring to fig. 10, fig. 10 is a schematic structural diagram of a display panel according to an embodiment of the present application, where the display panel 20 includes:
a light emitting element P;
the pixel circuit provided in the above embodiment is connected to the light emitting element P, and configured to control the light emitting element P to perform light emitting display based on a scan signal;
and a scanning circuit 21 connected to the pixel circuit, the scanning circuit 21 being used for scanning signals for the pixel circuit bodies.
The pixel circuit is not shown in fig. 10. The display panel includes a display area AA and a bezel area BB including the display area AA. The scanning circuit 21 is located in the frame area BB, and the pixel circuit and the light emitting element P are located in the display area.
In the display panel provided by the embodiment of the application, the pixel circuit provided by the embodiment is adopted to control the light-emitting element to display images, so that the problem of display flicker of the display panel is solved, and the display quality is improved. The display panel can be used for mobile phones, tablet computers, household appliances with a display function, wearable equipment and other electronic equipment.
Based on the foregoing embodiment, another embodiment of the present application further provides a display driving method of a display panel, where as described above, a pixel circuit in the display panel includes: the grid electrode of the driving transistor is connected with the first node, the first pole of the driving transistor is connected with the second node, and the second pole of the driving transistor is connected with the third node; the first reset transistor is a first double-grid transistor, the grid of the first double-grid transistor is used for accessing a first scanning signal, the first pole of the first double-grid transistor is connected with the first node, and the second pole of the first double-grid transistor is used for accessing a reference voltage.
Referring to fig. 11, fig. 11 is a flowchart of a method of driving a display according to the present embodiment, where the method includes:
step S11: in the reset phase, the first reset transistor is controlled to be conducted through the first scanning signal, and voltage reset is carried out on the first node.
Step S12: and in the data writing phase, the second node is subjected to voltage reset.
Step S13: in the light-emitting stage, the pixel circuit provides the light-emitting element with driving current to control the light-emitting element to emit light for display.
In the data writing stage, the electric potential of the intermediate node of the first pole and the second pole of the first double-grid transistor in the light emitting stage is controlled so as to reduce the voltage difference between the intermediate node and the first node.
As described in the above embodiments, the intermediate node may be provided with a control module connected thereto. At this time, in the data writing phase, the method for controlling the potential of the intermediate node includes: in the data writing stage, the control module responds to the control signal and inputs a high level signal for the intermediate node. The implementation of the control module and the implementation of the control signal may be described with reference to the above embodiments, and embodiments of the display driving method are not limited in detail.
In the display driving method provided by the embodiment of the application, by using the pixel circuit, the potentials of the first electrode and the middle node of the second electrode of the first double-gate transistor in the light emitting stage can be controlled in the data writing stage, so that the voltage difference between the middle node and the first node is reduced, the first node has a stable potential in the light emitting stage, the problem of low-frequency flicker is solved, and the display quality is improved.
The embodiments in the present description are described in a progressive manner, or in a parallel manner, or in a combination of a progressive manner and a parallel manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments can be referred to each other. For the display panel and the display driving method disclosed in the embodiments, since the display panel and the display driving method correspond to the pixel circuit disclosed in the embodiments, the description is relatively simple, and the relevant points can be referred to the description of the corresponding part of the pixel circuit.
It is to be understood that in the description of the present application, the drawings and the description of the embodiments are to be regarded as illustrative in nature and not as restrictive. Like numerals refer to like structures throughout the description of the embodiments. Additionally, the figures may exaggerate the thicknesses of some layers, films, panels, regions, etc. for ease of understanding and ease of description. It will also be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements may also be present. In addition, "on …" means that an element is positioned on or under another element, but does not essentially mean that it is positioned on the upper side of another element according to the direction of gravity.
The terms "upper," "lower," "top," "bottom," "inner," "outer," and the like refer to an orientation or positional relationship relative to an orientation or positional relationship shown in the drawings for ease of description and simplicity of description, but do not indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the present application. When a component is referred to as being "connected" to another component, it can be directly connected to the other component or intervening components may also be present.
It is further noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that an article or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such article or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in an article or device that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (12)
1. A pixel circuit of a display panel, one cycle of the pixel circuit including a reset phase, a write data phase and a light emitting phase in time sequence, the pixel circuit comprising:
the grid electrode of the driving transistor is connected with a first node, the first pole of the driving transistor is connected with a second node, and the second pole of the driving transistor is connected with a third node;
the first reset transistor is a first double-grid transistor, the grid of the first double-grid transistor is used for accessing a first scanning signal, the first pole of the first double-grid transistor is connected with the first node, and the second pole of the first double-grid transistor is used for accessing a reference voltage;
the control module is used for controlling the potential of the intermediate node so as to reduce the voltage difference between the intermediate node and the first node in the light-emitting stage.
2. The pixel circuit of claim 1, wherein the control module is configured to input a high signal to the intermediate node in response to an input control signal during the write data phase.
3. The pixel circuit according to claim 2, wherein the pixel circuit has a data writing transistor, a gate of the data writing transistor is used for switching in a second scanning signal; in the data writing stage, the second scanning signal is used for controlling the data writing transistor to be conducted and writing a data voltage into the second node;
wherein the second scan signal is multiplexed as the control signal.
4. The pixel circuit according to claim 2, wherein the pixel circuit comprises a first control transistor, a gate of the first control transistor is used for receiving a light emitting signal, a first pole is connected to the third node, and a second pole is connected to a fourth node;
the fourth node is connected with the anode of the light-emitting element; the light-emitting signal is used for controlling the first control transistor to be conducted in the light-emitting stage so as to control the light-emitting element to perform light-emitting display;
the control module is connected with the fourth node, and multiplexes the potential of the fourth node as the control signal.
5. The pixel circuit of claim 2, wherein the control module is a node voltage control capacitor having a first plate connected to the intermediate node and a second plate for receiving the control signal.
6. The pixel circuit according to claim 5, wherein the pixel circuit comprises: a first plate of the first storage capacitor is used for accessing a first power voltage, and a second plate of the first storage capacitor is connected with the first node;
the first pole plate of the node voltage control capacitor and the first pole plate of the storage capacitor are located on the same layer, and the second pole plate of the node voltage control capacitor and the second pole plate of the storage capacitor are located on the same layer.
7. The pixel circuit according to claim 2, wherein the control module is a node voltage control transistor; the grid electrode of the node voltage control transistor is used for accessing the control signal, the first pole of the node voltage control transistor is connected with the middle node, and the second pole of the node voltage control transistor is accessed with the high-level signal;
in the data writing phase, the control signal controls the node voltage control transistor to be conducted, and the high-level signal is input to the intermediate node.
8. The pixel circuit according to claim 7, wherein the display panel has a scan circuit including a shift register for inputting a scan signal to the pixel circuit based on a clock signal, a high-level signal, and a low-level signal;
and the second pole of the node voltage control transistor multiplexes the high-level signal input by the shift register.
9. The pixel circuit according to claim 7, wherein the node voltage control transistor is in the same layer as other transistors in the pixel circuit.
10. A display panel, comprising:
a light emitting element;
the pixel circuit according to any one of claims 1 to 9, connected to the light emitting element, for controlling the light emitting element to perform light emitting display based on a scan signal;
and the scanning circuit is connected with the pixel circuit and is used for scanning signals for the pixel circuit body.
11. A display driving method of a display panel, wherein a pixel circuit in the display panel comprises: the grid electrode of the driving transistor is connected with a first node, the first pole of the driving transistor is connected with a second node, and the second pole of the driving transistor is connected with a third node; the first reset transistor is a first double-grid transistor, the grid of the first double-grid transistor is used for accessing a first scanning signal, the first pole of the first double-grid transistor is connected with the first node, and the second pole of the first double-grid transistor is used for accessing a reference voltage;
the display driving method includes:
in a reset stage, the first reset transistor is controlled to be conducted through the first scanning signal, and voltage reset is carried out on the first node;
in a data writing phase, carrying out voltage resetting on the second node;
in the light-emitting stage, a driving current is provided for the light-emitting element through the pixel circuit so as to control the light-emitting element to emit light for display;
in the data writing phase, the potential of an intermediate node of a first pole and a second pole of the first double-grid transistor is controlled so as to reduce the voltage difference between the intermediate node and the first node in the light emitting phase.
12. The display driving method according to claim 11, wherein a control module is connected to the intermediate node;
in the data writing phase, the method for controlling the potential of the intermediate node comprises the following steps:
and in the data writing stage, the control module responds to a control signal and inputs a high-level signal to the intermediate node.
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| CN202210851333.XA CN115050330A (en) | 2022-07-20 | 2022-07-20 | Display panel, pixel circuit thereof and display driving method |
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