CN114545620B - Compensation design method for preparing dielectric super-surface by non-ideal etching process - Google Patents
Compensation design method for preparing dielectric super-surface by non-ideal etching process Download PDFInfo
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- CN114545620B CN114545620B CN202210123406.3A CN202210123406A CN114545620B CN 114545620 B CN114545620 B CN 114545620B CN 202210123406 A CN202210123406 A CN 202210123406A CN 114545620 B CN114545620 B CN 114545620B
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B27/00—Optical systems or apparatus not provided for by any of the groups G02B1/00 - G02B26/00, G02B30/00
- G02B27/0012—Optical design, e.g. procedures, algorithms, optimisation routines
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B1/00—Optical elements characterised by the material of which they are made; Optical coatings for optical elements
- G02B1/002—Optical elements characterised by the material of which they are made; Optical coatings for optical elements made of materials engineered to provide properties not available in nature, e.g. metamaterials
Abstract
The invention discloses a compensation design method for preparing a dielectric super-surface by a non-ideal etching process, which is based on the structure of the dielectric super-surface, the preparation process and an equivalent dielectric theory. By the method, once the structure shape and the size of the patterns etched by the etching process under the etching depth required by the design are known, the compensation method provided by the invention is used as a guide, and the pattern size of the exposure pattern is adjusted on the premise that the processing process parameters are unchanged, so that the efficiency loss caused by the non-ideal etching process can be reduced to a certain extent. The parameters for correction and compensation in the invention only comprise the parameters of the pattern size in the designed exposure layout. The compensation design method can reduce the period and cost for developing the dielectric super-surface prepared based on the etching process, and can improve the performance of the dielectric super-surface prepared based on the etching process.
Description
Technical Field
The invention relates to the field of micro-nano optical design and manufacture, in particular to a compensation design method for preparing a dielectric super-surface by a non-ideal etching process. The compensation design method is suitable for the dielectric super-surface prepared by the etching process with the etching depth-to-width ratio or the side wall sharpness not reaching the design requirement.
Background
In recent years, the super surface of all-dielectric materials has been widely focused on due to the advantages of small volume, high controllable degree of freedom, low loss and the like. The prepared high-performance all-dielectric super-surface is often an optical material such as TiO2 and Si which are mature by using an etching process, however, on one hand, the TiO2 and Si materials are more absorbed in certain wave bands and are not preferred optical materials in certain wave bands, and on the other hand, when the high-performance all-dielectric super-surface is applied to devices made of different materials in a transferring and integrating mode, larger technical bottlenecks are encountered, and the feasibility and the yield of integration are greatly reduced. Based on the above two aspects, development of all-dielectric supersurfaces of other materials is becoming a great need.
For development of all-dielectric super-surfaces of other materials, development and optimization of etching processes are mainly focused at present, however, the processes of etching most materials are not as mature as those of Si and TiO2, the depth-to-width ratio of etched grooves is not up to standard, the loading effect is serious, and side wall inclination is a common phenomenon. In addition, the etching process parameters of many materials are complex, the optimization is difficult, and especially when the etching process with extremely small line width and high aspect ratio is optimized, the cost and period of optimization can be greatly increased. Therefore, based on the above, optimizing the dielectric super surface of the non-ideal etching process in design becomes an important means for reducing the cost and shortening the development period.
Disclosure of Invention
The invention aims to provide a compensation design method for preparing a dielectric super-surface by a non-ideal etching process, so that the process requirement is reduced, and the performance of the prepared dielectric super-surface is not greatly influenced, thereby reducing the development period and cost of the dielectric super-surface and reducing the performance loss caused by the non-ideal preparation process.
The design scheme of the invention is as follows:
the first step: determining the working wavelength lambda, and calculating the phase distribution of the emergent wave front according to the required optical functions such as focusing, deflection, divergence and the like;
and a second step of: firstly, determining a design structure, which can be a grating, a cylinder, a square column or other shaped columns, wherein the unit period length p is smaller than the wavelength lambda of incident light and the etching depth h, then determining the range of a main regulating and controlling structural parameter K, which can be one or more, depending on a cell structure, then carrying out electromagnetic simulation on the obtained unit structure, scanning the change phi of different structural parameters K on the wave front phase, and enabling the value of phi to cover at least one 2 pi;
and a third step of: calculating the duty ratio S of an ideal unit structure corresponding to the regulation and control parameter K c Obtain the duty ratio S c And phase ofCorresponding relation of (3);
fourth step: the regulating parameter K is equally spaced in the variation range to take n values K 1 —K n N can be determined with a value of 5-40 according to the required precision, and the regulation and control parameter is designed to be K 1 —K n The period length is p, and a series of period arrays are arranged;
fifth step: according to the test layout, a series of processes such as photoetching and the like and the existing etching process parameters are used for processing the sample to prepare a regulating parameter K 1 —K n A corresponding periodic sample structure;
sixth step: calibrating the regulation and control parameter as K 1 —K n The actual duty cycle S of the corresponding periodic sample structure 1 —S n Re-fitting the regulating parameter K and the actual duty ratio S r According to the relation between K and S r Relation of (c) and S c And phase ofIs re-fitted to the relation between the regulation parameter K and the phase +.>Is a relationship of (2);
seventh step: from the phase distribution calculated in the first step, the resulting K and K are re-fittedObtaining the distribution of the corresponding regulation and control parameters K, thereby designing a corresponding super-surface layout;
eighth step: according to the new layout, preparing the super surface by a series of processes such as photoetching and the etching process parameters adopted in the fifth step.
The invention has the advantages that:
1. the compensation design method for the dielectric super-surface prepared by the non-ideal etching process provided by the invention can reduce the process requirements and simultaneously ensure that the performance of the dielectric super-surface is not greatly influenced.
2. The invention can reduce the requirement on the etching process in design, thereby reducing the development period and cost of the process, and further reducing the development period and cost of preparing the super-surface of the medium.
The method has the advantages that the medium super surface designed based on the equivalent medium theory can be rapidly and efficiently researched and developed, and the research and development of integrated products of the medium super surface are accelerated, so that the method has very positive significance for accelerating popularization of micro-nano optics in military and civil use.
Drawings
The schematic diagram of the invention is as follows:
in order to more clearly illustrate the technical solutions and advantages of the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be further described in detail.
FIG. 1 is a schematic diagram of a cylindrical array structure in a dielectric supersurface structure;
FIG. 2 is a schematic diagram of a grating structure in a dielectric supersurface structure;
FIG. 3 is a schematic diagram of an idealized topography of a partial cross-section of a supersurface structure of a grating medium;
FIG. 4 is a schematic diagram of the topography of a partial cross section of a practical processed grating medium supersurface structure;
FIG. 5 shows the relationship between the dielectric super surface before compensation design and the fixed value P by electromagnetic simulation 0max Is a central light field intensity distribution;
FIG. 6 shows the relationship between the super surface of the medium after the compensation design and a fixed value P by electromagnetic simulation 0max Is a central light field intensity distribution;
FIG. 7 is a flow chart of a design method in the present invention.
Detailed Description
The following detailed description of the present invention is, but not limited to, embodiments with reference to the drawings and examples, and modifications and equivalent substitutions for the technical solution of the present invention and the mentioned shape structure and function of the super surface should be made without departing from the spirit and scope of the technical solution of the present invention.
In view of the fact that the existing deep etching technology of some materials cannot meet the design requirement of the super surface, the invention provides a compensation design method for preparing the medium super surface by a non-ideal etching technology.
The invention aims to provide a design method for compensating a dielectric super-surface prepared by an undesirable etching process, so that the process requirement is reduced, and meanwhile, the performance of the dielectric super-surface is ensured not to be greatly influenced, thereby reducing the development period and cost of the dielectric super-surface. (reduction of Process-induced Performance losses)
In this embodiment, the dielectric super-surface is composed of gratings with different widths and identical heights, see fig. 2, and the function of the dielectric super-surface is to focus the incident single-wavelength parallel light in air. The height of the cylinder is h, the focal length of the super surface is f, the wavelength of incident light is lambda, and the diameter and the height of the cylinder are smaller than or close to the working wavelength. The super surface is prepared by photoetching and dry etching, and the etched actual morphology and ideal morphology of the grating section are shown in fig. 4 and 3.
The first step: the phase distribution of the outgoing wavefront on the hypersurface outgoing plane satisfies the following formula:
where λ is the wavelength of the incident light in air, x is the distance from the focus center in the horizontal direction, and f is the focal length.
And a second step of: determining period length p (p)<Lambda/2), etching depth h, electromagnetic simulation of the unit structure of the grating, and modulation and control parameters, namely width w (w)<p) scanning to find the change of the wave front phase by the grating units with different widthsAnd let->At least one 2 pi can be covered.
And a third step of: calculating duty ratios S corresponding to different widths w of the grating units c Obtain the duty ratio S c And phase ofCorresponding relation of (3).
Fourth step: the grating width w is equally divided into n values w in a variation range i (i=0, 1,2,3, …, n). A series of periods with the length p and the width w are designed i (i=0, 1,2,3, …, n) periodic test layout of gratings.
Fifth step: transferring the test layout to a material to be processed by photoetching, and then processing a sample by an etching process to prepare a width w i (i＝0,1,2,3,…Test sample of periodic grating structure of n).
Sixth step: the width of the observation domain is w i The cross section of the grating after etching is marked with the width w i Actual duty ratio S of unit structure prepared by etching process for grating layout of (i=0, 1,2,3, …, n) ri (i=0, 1,2,3, …, n) and re-fitting the width w to the actual duty cycle S r According to the relation of w and S r Is re-fitted to w and phaseIs a relationship of (3).
Seventh step: from the phase distribution calculated in the first step, the resulting widths w and re-fittingAnd the distribution of the grating unit width w is obtained according to the phase correspondence of the grating unit, so that a corresponding super-surface layout is designed.
Eighth step: and preparing the super surface by using photoetching and etching technological parameters adopted in the fifth step according to the new layout.
While the foregoing is directed to embodiments of the present invention, other and further details of the invention may be had by the present invention, it should be understood that the foregoing description is merely illustrative of the present invention and that no limitations are intended to the scope of the invention, except insofar as modifications, equivalents, improvements or modifications are within the spirit and principles of the invention.
Claims (1)
1. A compensation design method for preparing a dielectric super-surface by a non-ideal etching process is characterized by comprising the following steps:
the first step: determining the working wavelength lambda, and calculating the phase distribution of the emergent wave front according to the required focusing, deflecting and diverging optical functions;
and a second step of: firstly, determining a design structure, wherein the unit period length p is smaller than the wavelength lambda of incident light and the etching depth h, then determining the range of a main regulation and control structural parameter K, wherein one or more regulation and control structural parameters depend on a cell structure, then carrying out electromagnetic simulation on the obtained unit structure, scanning the change phi of different structural parameters K on the wave front phase, and enabling the value of phi to cover at least one 2 pi;
and a third step of: calculating the duty ratio S of an ideal unit structure corresponding to the regulated structural parameter K c Obtain the duty ratio S c And phase ofCorresponding relation of (3);
fourth step: taking n values K from the regulated structural parameter K at equal intervals in a variation range 1 —K n The value of n is 5-40, which is determined according to the required precision, and the regulation and control parameter is designed to be K 1 —K n The period length is p, and a series of period arrays are arranged;
fifth step: processing the sample according to the test layout to prepare a regulated structural parameter K 1 —K n A corresponding periodic sample structure;
sixth step: the structural parameter of the standard regulation is K 1 —K n The actual duty cycle S of the corresponding periodic sample structure 1 —S n Re-fitting the regulated structural parameter K and the actual duty cycle S r According to the relation between K and S r Relation of (c) and S c And phase ofIs re-fitted to the relation of the regulated structural parameters K and phase +.>Is a relationship of (2);
seventh step: from the phase distribution calculated in the first step, the resulting K and K are re-fittedCorresponding relation of phases to obtain corresponding regulated structureThe distribution of the parameter K is adopted, so that a corresponding super-surface layout is designed;
eighth step: and according to the super-surface layout designed in the seventh step, preparing the super-surface according to the etching process parameters adopted in the fifth step.
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