CN114531157A - Digital-to-analog conversion circuit, digital-to-analog conversion method and display driving chip - Google Patents

Abstract

The application provides a digital-to-analog conversion circuit, a digital-to-analog conversion method and a display driving chip, wherein the digital-to-analog conversion circuit comprises: the current mode converting circuit is used for generating a first voltage signal according to low-order data of the digital signal; and the resistance type conversion circuit is connected with the output end of the first voltage signal of the current type conversion circuit and is used for generating a second voltage signal according to the high-order data of the digital signal and outputting an analog signal corresponding to the digital signal according to the first voltage signal and the second voltage signal.

Description

Digital-to-analog conversion circuit, digital-to-analog conversion method and display driving chip

Technical Field

The present disclosure relates to display technologies, and in particular, to a digital-to-analog conversion circuit, a digital-to-analog conversion method, and a display driver chip.

Background

The output voltage vr _ out of the traditional resistance type digital-to-analog conversion circuit (DAC) is vs < N:0> I R or is VDD _ out is VDD-vs < N:0> I R; wherein vs < N:0> represents the input digital signal and "+" represents the multiplication. Because the resistance matching is good, the output DNL (differential nonlinearity) and INL (integral nonlinearity) of the DAC are small, and the monotonicity is better. The disadvantage is that when the number of bits is large, the number of resistors and switches is increased exponentially, and a large chip area is occupied.

The output voltage vr _ out of the traditional current type digital-to-analog conversion circuit is vs < N:0> I R or VDD-vs < N:0> I R; wherein vs < N:0> represents the output digital signal. Because each current source with different weight is not an ideal current source and there is a matching error between them, the DAC outputs DNL and INL are large and have poor linearity and monotonicity. If the monotonicity is to be improved, the matching precision of the current source needs to be improved, so that the size of a device is increased, and the area of a chip is greatly increased.

Therefore, the traditional digital-to-analog conversion circuit cannot take both the area and the monotonicity of the circuit into consideration, so that the monotonicity is poor or the occupied area of the circuit is too large, and the area of a chip is increased.

Disclosure of Invention

The embodiment of the application provides a digital-to-analog conversion circuit, which gives consideration to circuit area and monotonicity, and improves the monotonicity while reducing the circuit area.

The embodiment of the application provides a digital-to-analog conversion circuit, including:

the current mode converting circuit is used for generating a first voltage signal according to low-order data of the digital signal;

and the resistance type conversion circuit is connected with the output end of the first voltage signal of the current type conversion circuit and is used for generating a second voltage signal according to the high-order data of the digital signal and outputting an analog signal corresponding to the digital signal according to the first voltage signal and the second voltage signal.

In one embodiment, the current mode conversion circuit includes:

a first end of the first resistor is grounded or connected with a power supply, and a second end of the first resistor is used for generating the first voltage signal;

the first current sources are connected to the second end of the first resistor in parallel;

and the gating control module is connected with the plurality of first current sources and used for controlling the on-off of the branch circuits where the plurality of first current sources are located according to the low-bit data of the digital signal.

In an embodiment, if the low-level data of the digital signal is encoded in a multilevel manner, the current values output by the first current sources respectively correspond to the weight value of each bit of the low-level data.

In an embodiment, if the low-order data of the digital signal is thermometer-coded, the current values output by the first current sources are equal.

In one embodiment, the gating control module comprises a plurality of switching tubes;

the plurality of switch tubes are connected with the plurality of first current sources in a one-to-one correspondence manner; and the low-level data of the digital signal is used as a control signal of the switch tube and is used for controlling the on-off of the branch where the first current sources are located.

In one embodiment, the resistive switching circuit includes:

a second current source, wherein the current value output by the second current source corresponds to the weight value of the lowest bit of the high-bit data;

a first end of the series resistor is connected with a second end of the first resistor, and the second end of the series resistor is used for outputting the analog signal;

and the multiplexer is connected with the second current source and the series resistor and is used for selecting the number of resistors connected with the second current source in series according to the high-order data of the digital signal.

In one embodiment, the series resistance comprises a plurality of second resistances;

the second resistors are connected in series, and the resistance values of the second resistors are equal to the resistance value of the first resistor;

the second resistors are connected with the multiplexer, and the multiplexer is used for controlling the number of the second resistors connected with the second current source in series according to the high-order data of the digital signal.

In one embodiment, the multiplexer includes a plurality of crystal switches;

the crystal switches are connected with the second resistors and the second current sources in a one-to-one correspondence manner;

and the high-order data of the digital signal is used as a control signal of the crystal switch and is used for controlling the number of second resistors connected with the second current source in series.

The embodiment of the application provides a digital-to-analog conversion method, which is applied to a digital-to-analog conversion circuit, wherein the digital-to-analog conversion circuit comprises a current type conversion circuit and a resistance type conversion circuit, and the resistance type conversion circuit is connected with a voltage output end of the current type conversion circuit; the method comprises the following steps:

the current mode conversion circuit converts low-order data of the digital signal into a first voltage signal;

the resistance type conversion circuit generates a second voltage signal according to the high-order data of the digital signal;

the resistance type conversion circuit outputs an analog signal corresponding to the digital signal according to the first voltage signal and the second voltage signal.

In one embodiment, the current mode converting circuit includes a first resistor, a plurality of first current sources, and a gating control module; the first end of the first resistor is grounded or connected with a power supply, and the first current sources are connected to the second end of the first resistor after being connected in parallel; the gate control module is connected with a plurality of first current sources, and converts low-order data of a digital signal into a first voltage signal through the current mode conversion circuit, and comprises:

the gating control module controls the on-off of the branch circuits where the first current sources are located according to the low-bit data of the digital signals;

generating the first voltage signal at a second end of the first resistor;

in an embodiment, the resistance type conversion circuit includes a second current source, a series resistor, and a multiplexer, and a current value output by the second current source corresponds to a weight value of a lowest bit of the high-order data; the first end of the series resistor is connected to the second end of the first resistor, the multiplexer is connected to the second current source and the series resistor, generates a second voltage signal according to high-order data of the digital signal, and outputs an analog signal corresponding to the digital signal according to the first voltage signal and the second voltage signal, including:

the multiplexer selects the number of resistors connected in series with the second current source according to the high-order data of the digital signal;

the current of the second current source generates a second voltage signal through the series resistor and the first resistor;

and outputting the analog signal according to the first voltage signal and the second voltage signal at a second end of the series resistor.

The embodiment of the application provides a display driving chip, which comprises the digital-to-analog conversion circuit.

According to the digital-to-analog conversion circuit provided by the embodiment of the application, the high-bit data are converted by the resistance type conversion circuit, so that compared with a current type digital-to-analog converter, the monotonicity is improved, and the low-bit data are converted by the current type conversion circuit, so that compared with the resistance type digital-to-analog converter, the circuit area is reduced, the circuit area and the monotonicity are considered, and the monotonicity is improved while the circuit area is reduced.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required to be used in the embodiments of the present application will be briefly described below.

Fig. 1 is a schematic diagram of a resistance type switching circuit according to an embodiment of the present application;

fig. 2 is a schematic diagram of a current mode conversion circuit according to an embodiment of the present disclosure;

fig. 3 is a schematic diagram of a digital-to-analog conversion circuit according to an embodiment of the present disclosure;

fig. 4 is a schematic diagram of a digital-to-analog conversion circuit according to an embodiment of the present application;

fig. 5 is a schematic diagram of a digital-to-analog conversion circuit according to another embodiment of the present application;

fig. 6 is a schematic diagram of a digital-to-analog conversion circuit according to another embodiment of the present application;

FIG. 7 is a diagram of a digital-to-analog conversion circuit according to yet another embodiment of the present application;

fig. 8 is a flowchart illustrating a digital-to-analog conversion method according to an embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application.

Like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only for distinguishing the description, and are not to be construed as indicating or implying relative importance.

For understanding the digital-to-analog conversion circuit provided in the embodiment of the present application, before describing the digital-to-analog conversion circuit provided in the embodiment of the present application, a resistive digital-to-analog conversion circuit and a current digital-to-analog conversion circuit are introduced.

Fig. 1 is a schematic diagram of a resistance type switching circuit according to an embodiment of the present application. As shown in FIGS. 1A and 1B, resistors R0, R1, R2 … …, R2^N-1 in series with a current source, a Multiplexer (MUX) for selecting the digital signal vs from the input<N:0>The voltage signal is selected to be output at one end of the resistor. Taking fig. 1A as an example, the binary digital signal 0, vr _ out ═ vr<0>VDD-1 × ir; binary digital signal 1, vr _ out ═ vr<1>VDD-2 × ir; binary digital signal 2, vr _ out ═ vr<2>VDD-3 × ir, and so on. Taking fig. 1B as an example, the binary digital signal 0, vr _ out ═ vr<0>1 ═ R; binary digital signal 1, vr _ out ═ vr<1>2 x R; binary digital signal 2, vr _ out ═ vr<2>And 3, converting the digital signal into a voltage signal and outputting the voltage signal by analogy. The impedance matching is good, so the monotonicity is goodPreferably, when the number of bits is large, the number of resistors and switches is exponential, and the occupied area of the resistor type conversion circuit is large.

Fig. 2 is a schematic diagram of a current mode conversion circuit according to an embodiment of the present disclosure. As shown in fig. 2A and 2B, a plurality of current sources are connected in parallel and then connected in series with a resistor R. From right to left, the current value output by the current source on each branch is I, 2I, 4I … 2^N-1. Suppose a digital signal vs<N:0>Is 1011, then switch vs<0>Closing, switching vs<1>Closing, switching vs<2>Cut-off and switch vs<3>And when the switch is closed, other switches are all opened. Taking fig. 2A as an example, vr _ out is VDD-vs<N:0>L R, in fig. 2B, vr _ out vs<N:0>I R, whereby the digital signal is converted into an analog voltage signal. The current mode conversion circuit only needs to increase one switch and one current source when one bit is added, the occupied area is small, but errors exist because the current source is not an ideal current source, and the monotonicity of the current mode conversion circuit is poor.

Fig. 3 is an architecture diagram of a digital-to-analog conversion circuit according to an embodiment of the present disclosure. As shown in fig. 3, the digital-to-analog conversion circuit includes a resistance type conversion circuit 100 and a current type conversion circuit 200. The current mode converting circuit 200 is configured to generate a first voltage signal according to low-order data of the digital signal; the resistive switching circuit 100 is connected to an output terminal of the first voltage signal of the current switching circuit 200. The resistive switching circuit 100 is configured to generate a second voltage signal according to the high-order data of the digital signal, and output an analog signal corresponding to the digital signal according to the first voltage signal and the second voltage signal.

The lower data is relative to the higher data, for example, a 4-bit digital signal, the lower 2 bits can be regarded as the lower data, and the higher 2 bits can be regarded as the higher data. A 5-bit digital signal, the lower 2 bits (or the lower 3 bits) are lower data, and the upper 3 bits (or the upper 2 bits) are upper data. Therefore, the digital signal is divided into low-order data and high-order data, and the number of bits of the low-order data or the high-order data is not limited.

The first voltage signal is a voltage signal into which lower data of the digital signal is converted, and the second voltage signal is a voltage signal into which upper data of the digital signal is converted. The analog signal may be a superimposed signal of the first voltage signal and the second voltage signal with ground as a reference potential. The analog signal may be a voltage value obtained by subtracting the first voltage signal and the second voltage signal from the power supply voltage, using the power supply as a reference potential.

In one embodiment, assume that the binary digital signal is 1110, the lower data is 10, and the upper data is 11; the current-type conversion circuit 200 converts low-order data (10) of a digital signal into a first voltage signal V1, the resistance-type conversion circuit 100 converts high-order data (11) of the digital signal into a second voltage signal V2, and the output end of the resistance-type conversion circuit 100 outputs an analog signal vr _ out ═ VDD- (V1+ V2) or vr _ out ═ V1+ V2.

The principle of the resistive switching circuit 100 can be referred to as shown in fig. 1, and the principle of the current switching circuit 200 can be referred to as shown in fig. 2. The digital-to-analog conversion circuit provided by the embodiment of the application gives consideration to both the circuit area and the monotonicity, because high-order data are converted by the resistance type conversion circuit 100, the monotonicity is improved compared with a current type digital-to-analog converter, and because low-order data are converted by the current type conversion circuit 200, the circuit area is reduced compared with a resistance type digital-to-analog converter, so that the technical scheme provided by the embodiment of the application reduces the circuit area and simultaneously improves the monotonicity.

Fig. 4 is a schematic diagram of a digital-to-analog conversion circuit according to an embodiment of the present disclosure. As shown in fig. 4, the current mode conversion circuit 200 includes: a first resistor 210, a plurality of first current sources 230, and a gate control module 220.

A first terminal of the first resistor 210 may be connected to a power supply VDD. A second terminal vr of the first resistor 210<0>For generating a first voltage signal; the first current sources 230 are connected in parallel to the second end of the first resistor 210. Assuming that the digital signal is multilevel coded, the current values output by the first current sources 230 respectively correspond to the weight value of each bit of the low-level data. For the most common binary system, for example, the digital signal of the binary system is assumed to have M bits in total, from low to lowThe bit-to-high weight values are 1, 2, 4, 8, 16 … … 2 in order^M-1Accordingly, the current values of the first current sources 230 are I, 2I, 4I, 8I, 16I … … 2 in this order^M-1I, as shown in fig. 4.

The gating control module 220 is connected to the plurality of first current sources 230, and configured to control on/off of a branch where the plurality of first current sources 230 are located according to low-bit data of the digital signal.

For example, assuming that the digital signal is 1011_1101 and the lower bit data is 1101, since the second bit is 0 and the first bit, the third bit and the fourth bit are 1, the gating control module 220 controls the first branch vs <0> to be turned on, the second branch vs <1> to be turned off, the third branch vs <2> to be turned on, the fourth branch vs <3> to be turned on, and the remaining branches to be turned off. Assuming that the resistance of the first resistor 210 is R, the first voltage signal vr <0> -I +4I + 8I-R is generated at the second end of the first resistor 210.

In one embodiment, the gating control module 220 may include a plurality of switching tubes, and the plurality of switching tubes are connected to the plurality of first current sources 230 in a one-to-one correspondence; the low-level data of the digital signal is used as a control signal of the switching tube for controlling the on/off of the branch where the first current sources 230 are located.

That is, each branch of the first current source 230 has a switch, and the control signal of each switch can be provided by the value of the bit corresponding to the first current source 230 of the branch. For example, a first switch tube vs <0> may be controlled by a first bit of the digital signal, a second switch tube vs <1> may be controlled by a second bit of the digital signal, a third switch tube vs <2> may be controlled by a third bit of the digital signal, and so on. The switch tube can be an NMOS tube (N-type field effect transistor), for example, the low-order data is 1101, the first bit is 1, and the first switch tube is conducted; the second position is 0, and the second switch tube is disconnected; the third bit is 1, and the third switch tube is conducted; the fourth bit is 1, the fourth switch tube is connected, and the switch tubes at other bits are all disconnected.

In one embodiment, as shown in fig. 4, the resistive switching circuit 100 includes: a second current source 110, a series resistor 120, and a multiplexer 130.

The current value output by the second current source 110 corresponds to the weight value of the lowest bit of the high-order data. The encoding of the high-order data may be multilevel encoding, such as binary encoding. For example, assuming that the binary digital signal is 1011_1101, the lower data is 1101, and the upper data is 1011, the lowest bit of the upper data corresponds to the fifth bit, and the weight of the fifth bit of the binary digital signal is 16, so the current value output by the second current source 110 may be 16I.

A first end of the series resistor 120 is connected to a second end of the first resistor 210, and the second end of the series resistor 120 is configured to output the analog signal. The series resistor 120 includes a plurality of resistors connected in series, and may be referred to as a plurality of second resistors connected in series for distinction. Referring to fig. 4, the terminal vr _ out may be considered as a second terminal of the series resistor 120, and the terminal vr <0> may be considered as a first terminal of the series resistor 120.

The multiplexer 130 is connected to the second current source 110 and the series resistor 120, and selects the number of resistors connected in series to the second current source 110 for the high data of the digital signal.

For simplicity of calculation, the resistance of each second resistor is equal to the resistance of the first resistor 210. The plurality of second resistors are connected to the multiplexer 130, and the multiplexer 130 is configured to control the number of second resistors connected in series to the second current source 110 according to the high-order data of the digital signal.

For example, assuming that the digital signal is 1011_1101, the lower data is 1101, the upper data is 1011, and the upper data is converted to decimal data of 11, the multiplexer 130 may select 11 resistors to be connected in series with the second current source 110, and the second voltage signal may be 11R 16I. See above, the first voltage signal vr<0>(I +4I +8I) × R. Therefore vr _ out equals vr<10>＝VDD-[(11R*16I)+(I+4I+8I)*R]. Suppose a digital signal vs<N-1:0>With N bits, the lower M bits being lower data, the signal being denoted as vs<(M-1):0>The high N-M bits are high bits, and the signal is expressed as vs<(N-1):M>Therefore vr _ out is VDD- [ vs. ]<(M-1):0>*I*R+VS<(N-1):M>*2^M*I*R]。

Fig. 5 is a schematic diagram of a digital-to-analog conversion circuit according to another embodiment of the present application. The digital-to-analog conversion circuit is a conversion circuit of a digital signal with 4 bits, the lower 2 bits are lower data, and the upper 2 bits are higher data. The multiplexer 130 includes a plurality of crystal switches, which are connected to the plurality of second resistors and the second current source 110 in a one-to-one correspondence; the high data of the digital signal is used as a control signal of the crystal switch for controlling the number of second resistors connected in series with the second current source 110.

The transistor switches may be PMOS or NMOS, assuming that the digital signal vs <3:0> -11 _11, low 2-bit passes through the current-type switching circuit 200, the switching transistors vs <0> and vs <1> in the gate control module 220 are turned on, the voltage drop contributed at vr <0> is 3 × R, high 2-bit passes through the resistance-type switching circuit 100, the multiplexer 130 selects vs <3> to be turned on, and the others are turned off, 3 resistors R are connected in series with the second current source 110, the voltage drop contributed is 3 × R4 × I12 × ir, and the first terminal of the first resistor 210 is connected to VDD, so that the final voltage output vr _ out is VDD- (3 × R +12 × I) — I — 15 × R.

Similarly, it is assumed that the input digital signal vs <3:0> is 00_10, the low 2-bit current mode DAC contributes to a voltage drop of 2 × I × R, the high 2-bit resistance mode DAC contributes to a voltage drop of 0, and finally the voltage output vr _ out is VDD-2 × I R.

Fig. 6 is a schematic diagram of a digital-to-analog conversion circuit according to another embodiment of the present application. The difference between the embodiment shown in fig. 6 and the embodiment shown in fig. 4 is that the first terminal of the first resistor 210 may be grounded.

Referring to the above embodiments, for a binary digital signal of N bits, the lower M bits may be regarded as lower data, and the upper N-M bits may be regarded as upper data. When the ground is taken as a reference potential, the digital-to-analog conversion circuit simulates and outputs: and vr _ out is VS (M-1) 0I R + VS (N-1) M2M I R.

Fig. 7 is a schematic diagram of a digital-to-analog conversion circuit according to another embodiment of the present application. The embodiment shown in fig. 7 differs from the embodiment shown in fig. 4 in that the lower data of the digital signal may be thermometer coded, so that the currents of the plurality of first current sources 230 are equal and may be denoted by I. For example, an N-bit digital signal, the lower M bits may be thermometer coded, and the N-M bits may be binary coded, for example, the lower 3 bits of the digital signal may be 11111111 (thermometer coded), which is 8 in decimal, so that 8 switching tubes of vs <0>, vs <1> … … vs <7> need to be turned on, and the other switching tubes are turned off, thereby generating the first voltage signal 8I at vr <0 >. The conversion of the high-order data by the resistive switching circuit, see above, generates a second voltage signal. Similarly, the output analog signal can be obtained with ground as a reference potential or with a power supply as a reference potential. The low-level data is encoded by using thermometers, the currents of the first current sources 230 of each branch are equal, the thermometers are encoded by several 1 s, the first current sources 230 of the branches are turned on, a first voltage signal is generated at the second end of the first resistor 210, and compared with binary encoding, monotonicity of a digital-to-analog conversion circuit corresponding to the thermometers is better.

Fig. 8 is a schematic flowchart of a digital-to-analog conversion method according to an embodiment of the present application. The method may be applied to the digital-to-analog conversion circuit of the above embodiment, as shown in fig. 8, the method includes:

step S810: the current mode conversion circuit converts low-order data of the digital signal into a first voltage signal;

step S820: the resistance type conversion circuit generates a second voltage signal according to the high-order data of the digital signal;

step S830: the resistance type conversion circuit outputs an analog signal corresponding to the digital signal according to the first voltage signal and the second voltage signal.

In one embodiment, referring to fig. 4-7, the current mode converting circuit includes a first resistor 210, a plurality of first current sources 230, and a gate control module 220; the first end of the first resistor 210 is grounded or connected to a power supply, and a plurality of first current sources 230 are connected to the second end of the first resistor 210 in parallel; the gating control module 220 is connected to the plurality of first current sources 230, and the step S810 specifically includes: the gating control module 220 controls the on/off of the branch where the first current sources 230 are located according to the low-bit data of the digital signal; the first voltage signal is generated at a second terminal of the first resistor 210.

In one embodiment, the resistance type conversion circuit includes a second current source 110, a series resistor 120 and a multiplexer 130, wherein a current value output by the second current source 110 corresponds to a weight value of a lowest bit of the high-order data; a first end of the series resistor 120 is connected to a second end of the first resistor 210, the multiplexer 130 is connected to the second current source 110 and the series resistor 120, and the steps S820 and S830 specifically include: the multiplexer 130 selects the number of resistors connected in series with the second current source 110 according to the high-order data of the digital signal; the current of the second current source 110 generates a second voltage signal through the series resistor 120 and the first resistor 210; the analog signal is output at a second end of the series resistor 120 according to the first voltage signal and the second voltage signal.

For example, assuming that the binary digital signal is 1011_1101, the low bit data is 1101, the high bit data is 1011, the current mode converting circuit controls the branches where the currents I, 4I, and 8I are located to be turned on through the gating switch according to the low bit data 1101, and the other branches are turned off, so as to generate the first voltage signal vr <0> (I +4I +8I) × R at vr <0 >. The resistance type conversion circuit controls 11 resistors of 10 second resistors and one first resistor 210 to be connected in series with the second current source 110 through the multiplexer 130 according to the high-order data 1011, and the second voltage signal may be 11R × 16I. Therefore, vr _ out ═ vr <10> ═ VDD- [ (11R ═ 16I) + (I +4I +8I) × R ].

The embodiment of the present application further provides a display driving chip, where the display driving chip may include the digital-to-analog conversion circuit described in the above embodiment, and the display driving chip may be used to control an LED (light emitting diode) display panel to perform display. Because the digital-to-analog conversion circuit provided by the embodiment of the application reduces the occupied area, the area of the display driving chip can be reduced when the display driving chip adopts the digital-to-analog conversion circuit provided by the application.

In the embodiments provided in the present application, the disclosed apparatus and method can be implemented in other ways. The apparatus embodiments described above are merely illustrative and, for example, the flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

In addition, functional modules in the embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.

The functions, if implemented in the form of software functional modules and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the methods according to the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.

Claims (12)

1. A digital-to-analog conversion circuit, comprising:

the current mode converting circuit is used for generating a first voltage signal according to low-order data of the digital signal;

and the resistance type conversion circuit is connected with the output end of the first voltage signal of the current type conversion circuit and is used for generating a second voltage signal according to the high-order data of the digital signal and outputting an analog signal corresponding to the digital signal according to the first voltage signal and the second voltage signal.

2. The digital-to-analog conversion circuit of claim 1, wherein the current-mode conversion circuit comprises:

a first end of the first resistor is grounded or connected with a power supply, and a second end of the first resistor is used for generating the first voltage signal;

the first current sources are connected to the second end of the first resistor in parallel;

and the gating control module is connected with the plurality of first current sources and used for controlling the on-off of the branch circuits where the plurality of first current sources are located according to the low-bit data of the digital signal.

3. The dac circuit of claim 2 wherein, if the low-level data of the digital signal is encoded in multilevel, the current values output by the first current sources correspond to the weight values of each bit of the low-level data one by one.

4. The DAC circuit of claim 2 wherein the first current source outputs a same current value if the low bits of the digital signal are thermometer coded.

5. The digital-to-analog conversion circuit according to claim 2, wherein the gate control module comprises a plurality of switching tubes;

the plurality of switch tubes are connected with the plurality of first current sources in a one-to-one correspondence manner; and the low-level data of the digital signal is used as a control signal of the switch tube and is used for controlling the on-off of the branch where the first current sources are located.

6. The digital-to-analog conversion circuit according to claim 2, wherein the resistive type conversion circuit comprises:

a second current source, wherein the current value output by the second current source corresponds to the weight value of the lowest bit of the high-bit data;

a first end of the series resistor is connected with a second end of the first resistor, and the second end of the series resistor is used for outputting the analog signal;

and the multiplexer is connected with the second current source and the series resistor and is used for selecting the number of resistors connected with the second current source in series according to the high-order data of the digital signal.

7. The digital-to-analog conversion circuit of claim 6, wherein the series resistance comprises a plurality of second resistances;

the second resistors are connected in series, and the resistance values of the second resistors are equal to the resistance value of the first resistor;

the second resistors are connected with the multiplexer, and the multiplexer is used for controlling the number of the second resistors connected with the second current source in series according to the high-order data of the digital signal.

8. The digital-to-analog conversion circuit of claim 7, wherein the multiplexer comprises a plurality of crystal switches,

the crystal switches are connected with the second resistors and the second current sources in a one-to-one correspondence manner;

and the high-order data of the digital signal is used as a control signal of the crystal switch and is used for controlling the number of second resistors connected with the second current source in series.

9. A digital-to-analog conversion method is characterized in that the method is applied to a digital-to-analog conversion circuit, the digital-to-analog conversion circuit comprises a current type conversion circuit and a resistance type conversion circuit, and the resistance type conversion circuit is connected with a voltage output end of the current type conversion circuit; the method comprises the following steps:

the current mode conversion circuit converts low-order data of the digital signal into a first voltage signal;

the resistance type conversion circuit generates a second voltage signal according to the high-order data of the digital signal;

the resistance type conversion circuit outputs an analog signal corresponding to the digital signal according to the first voltage signal and the second voltage signal.

10. The method of claim 9, wherein the current mode converting circuit comprises a first resistor, a plurality of first current sources, and a gating control module; the first end of the first resistor is grounded or connected with a power supply, and a plurality of first current sources are connected to the second end of the first resistor after being connected in parallel; the gate control module is connected with a plurality of first current sources, the current type conversion circuit converts low-order data of a digital signal into a first voltage signal, and the gate control module comprises:

the gating control module controls the on-off of the branch circuits where the first current sources are located according to the low-bit data of the digital signals;

the first voltage signal is generated at a second end of the first resistor.

11. The method according to claim 10, wherein the resistance type switching circuit comprises a second current source, a series resistor and a multiplexer, and a current value output by the second current source corresponds to a weight value of a lowest bit of the high-order data; the first end of the series resistor is connected to the second end of the first resistor, the multiplexer is connected to the second current source and the series resistor, generates a second voltage signal according to high-order data of the digital signal, and outputs an analog signal corresponding to the digital signal according to the first voltage signal and the second voltage signal, including:

the multiplexer selects the number of resistors connected in series with the second current source according to the high-order data of the digital signal;

the current of the second current source generates a second voltage signal through the series resistor and the first resistor;

and outputting the analog signal according to the first voltage signal and the second voltage signal at a second end of the series resistor.

12. A display driver chip comprising the digital-to-analog conversion circuit according to any one of claims 1 to 8.

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