CN114531155A - Current integral sampling method for bridge-type driving circuit of direct current motor - Google Patents
Current integral sampling method for bridge-type driving circuit of direct current motor Download PDFInfo
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Abstract
The invention relates to the technical field of data security, and discloses a direct current motor bridge type driving road current integral sampling method, which comprises the following steps: the first step is as follows: preparing a sampling tool; the second step is that: the sampling circuit is connected with the first circuit; the third step: the sampling circuit is connected with the second sampling circuit. The sampling tool comprises an MOS bridge motor driving circuit, a sampling resistor, an operational amplification circuit and a current integrating circuit, wherein a driving bridge MOS end Q2 is connected with an RS current sampling resistor in series, one end of R4 is connected with Vs, one end of the R4 is connected with a non-inverting input end Vin of U1, one end of R1 is connected with a non-inverting input end Vin-one end of U1 and is connected with R5 and C2, C2 is connected with the other end of the R3834 and is connected with Vin +, the middle of Vin-Vout is connected with R2 and C3, one end of R3 is connected with Vout, one end of the R3 is connected with ADC, the output end of the operational amplification circuit is connected with one end of a resistor R3, the other end of R3 is connected with an integrating capacitor C1, and the integrating capacitor C1 is connected with an input pin of the ADC.
Description
Technical Field
The invention relates to the technical field of data security, in particular to a current integral sampling method for a bridge-type driving path of a direct current motor.
Background
The current of the motor at the starting moment is 5.5-7 times larger than the rated current of the motor during normal operation, and signals have certain time delay when passing through a connecting wire and a logic unit in the FPGA device. The size of the delay is related to the length of the connecting line and the number of logic units, and is also influenced by conditions such as the manufacturing process of the device, working voltage, temperature and the like, and certain transition time is also required for the high-low level conversion of the signal. Due to the existence of the two factors, when the level values of the multipath signals change, the output of the combinational logic is in a sequential order at the moment of the signal change, the output of the combinational logic does not change at the same time, some incorrect peak signals are often generated, the peak signals are called burrs, and if the burrs occur in one combinational logic circuit, the circuit is indicated to have 'hazard'. (unlike discrete components, these glitches are especially prominent in LD, FPGA designs because they are completely retained and passed to the next stage due to the absence of parasitic capacitance inductance inside the PLD).
The direct current motor control usually adopts a bridge type driving circuit and a PWM driving mode, in order to improve the control reliability, most driving circuits are connected with a sampling resistor RS in series at a lower MOS tube of a bridge type to sample a current signal, the current signal is sent to an ADC to be subjected to analog-to-digital signal conversion after being subjected to signal conditioning by an operational amplifier, and a current value is obtained through calculation.
Therefore, a direct current motor bridge type driving circuit current integral sampling method is provided.
Disclosure of Invention
The invention mainly solves the technical problems in the prior art and provides a bridge type driving path current integral sampling method for a direct current motor.
In order to achieve the purpose, the invention adopts the following technical scheme that the bridge type driving path current integral sampling method of the direct current motor comprises the following steps:
the first step is as follows: preparing a sampling tool;
the second step is that: the sampling circuit is connected with the first circuit;
the third step: the sampling circuit is connected with the second sampling circuit.
Preferably, the sampling tool comprises a MOS bridge motor driving circuit, a sampling resistor, an operational amplifier circuit, and a current integrator circuit.
Preferably, in the first step, a 0.01% precision resistor is adopted as the sampling resistor, the sampling resistor requires high power, the power is doubled compared with the common low resistance under the conditions of the same volume and the same resistance value, the sampling resistor requires low resistance value which can be 0.0001R at the lowest, the sampling resistor requires high reliability, and the temperature coefficient of the alloy sampling resistor is generally within 75ppm and 50 ppm.
Preferably, in the first step, the operational amplifier circuit is composed of a signal source, an amplifier composed of a transistor, and a load, and amplifies the weak signal without distortion, and the integrator circuit is composed of a resistor and an integrating capacitor C1.
Preferably, in the second step, the driving bridge MOS terminal Q2 is connected in series with an RS current sampling resistor, one end of R4 is connected to Vs, one end of the R4 is connected to the non-inverting input terminal Vin + of U1, one end of R1 is connected to the inverting input terminal Vin of U1, one end of the R1 is connected to R5 and C2, the other end of the C2 is connected to Vin +, the connection between Vin-Vout is connected to R2 and C3, one end of R3 is connected to Vout, one end of the R3 is connected to ADC, and the C1 is connected to ADC.
Preferably, in the third step, the under-drive-bridge MOS terminal Q2 is connected to an RS current sampling resistor, one end of R4 is connected to an RS, one end of R4 is connected to a non-inverting input terminal of U1 and is connected to the RS sampling resistor, an inverting input terminal of R1 and R2, the other end of R2 is connected to an output terminal of the operational amplifier circuit, an output terminal of the operational amplifier circuit is connected to one end of R3, the other end of R3 is connected to an integrating capacitor C1, the integrating capacitor is connected to an input pin of the ADC, a positive 5V power supply is provided for the operational amplifier circuit, and a negative ground power supply for the operational amplifier circuit is provided.
Preferably, in the third step, the current signal of the motor is converted into a voltage signal by the sampling resistor RS, the filter is composed of R4, R5 and C2, differential mode interference and burrs are suppressed, the proportional amplifying circuit is composed of U1, R1 and R2, the sampled weak current signal is amplified, and the low-pass filter is composed of R3 and C1.
Preferably, in the third step, the glitch in the detection signal is filtered and eliminated through a low-pass filter consisting of R3 and C1, and at the same time, the C1 integrates the current signal, shapes the PWM waveform into a direct current signal, and sends the direct current signal to the ADC for sampling.
Advantageous effects
The invention provides a current integral sampling method for a bridge type driving path of a direct current motor. The method has the following beneficial effects:
(1) the current integral sampling method for the bridge-type driving path of the direct current motor is characterized in that a driving bridge MOS end Q2 is connected with an RS current sampling resistor in series, one end of R4 is connected with Vs, one end of the R4 is connected with a non-inverting input end Vin + of U1, one end of R1 is connected with an inverting input end Vin-of U1, one end of the R3538 is connected with R5 and C2, the other end of the C2 is connected with Vin +, the space between Vin-and Vout is connected with R2 and C3, one end of R3 is connected with Vout, and one end of the R3 is connected with an ADC; c1 is connected with ADC, one end of R4 is connected with RS, one end of the R4 is connected with the same-phase input end of U1 and is connected with RS sampling resistor, the reverse-phase input end is connected with R1 and R2, the other end of R2 is connected with the output end of operational amplifier circuit, the output end of the operational amplifier circuit is connected with one end of resistor R3, the other end of R3 is connected with integrating capacitor C1, the integrating capacitor is connected to the input pin of ADC, the power supply of the operational amplifier circuit is positively powered by 5V, the power supply of the operational amplifier circuit is negatively grounded, the sampling resistor RS converts the current signal of the motor into a voltage signal, and a filter is formed by R4, R5 and C2, so that the effects of inhibiting differential mode interference and burr are achieved, the switching noise interference of the signal is reduced, the current sampling precision is improved, and the reliability of the system is enhanced.
(2) This a direct current motor bridge type drive way current integral sampling method, constitute low pass filter through R3 and C1 and filter the elimination to the burr in the detected signal, C1 integrates the current signal simultaneously, be direct current signal with PWM wave form plastic, send to the ADC and sample, the PWM switching signal who avoids the high frequency introduces harmonic noise, the current signal shake of operational amplifier circuit output, the effect of further eliminating the burr has been reached, avoid the burr to lead to being difficult to record true current value, make the ADC measuring value more accurate, better filter motor opens and stops instantaneous disturbance current.
(3) The sampling resistor is used in current sampling and voltage sampling, the sampling resistor requires high power, the power is in the same volume and is doubled compared with the power of a common low resistor under the condition of the same resistance value, the sampling resistor requires low resistance value, the lowest resistance value can be 0.0001R, the sampling resistor requires high reliability, the temperature coefficient of the alloy sampling resistor is generally within 75ppm and 50ppm, the temperature coefficient of the common low resistor is generally more than 200ppm and 200ppm, and a 0.01% precision resistor is adopted, so that the sampling precision rate is improved.
(4) According to the direct current motor bridge type driving road current integral sampling method, square wave current signals generated by PWM control are converted into direct current signals after integral processing, ADC sampling difficulty is reduced, and sampling accuracy is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below. It should be apparent that the drawings in the following description are merely exemplary, and that other embodiments can be derived from the drawings provided by those of ordinary skill in the art without inventive effort.
The structures, ratios, sizes, and the like shown in the present specification are only used for matching with the contents disclosed in the specification, so as to be understood and read by those skilled in the art, and are not used to limit the conditions that the present invention can be implemented, so that the present invention has no technical significance, and any structural modifications, changes in the ratio relationship, or adjustments of the sizes, without affecting the effects and the achievable by the present invention, should still fall within the range that the technical contents disclosed in the present invention can cover.
Fig. 1 is a current integration sampling circuit diagram of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The first embodiment is as follows: a method for sampling the current of a bridge drive path of a dc motor by integration, as shown in fig. 1, includes the following steps:
the first step is as follows: preparing a sampling tool; the sampling tool comprises an MOS bridge motor driving circuit, a sampling resistor, an operational amplification circuit and a current integrating circuit, wherein the sampling resistor is used in current sampling and voltage sampling, the sampling resistor requires high power, the power is within the same volume and is doubled compared with the common low resistance under the condition of the same resistance, the sampling resistor requires low resistance and can be 0.0001R at the lowest, the sampling resistor requires high reliability, the temperature coefficient of an alloy sampling resistor is generally within 75ppm and 50ppm, the temperature coefficient of the common low resistance is generally more than 200ppm and more than 200ppm, a 0.01% precision resistor is adopted, the sampling precision is improved, and by utilizing electronic elements with amplification characteristics, such as a crystal triode, after the working voltage is added to the triode, the change of the larger current of an input end can be caused by the tiny current change of the input end, and the change of the output end is several times to hundreds times larger than the change of the input end, the operational amplifier circuit is composed of a signal source, an amplifier composed of a transistor and a load, and amplifies weak signals without distortion, the operational amplifier is primarily used for executing mathematical calculations such as addition, subtraction, multiplication, division, function operation and the like, under the current technical conditions, the mathematical operation function of the operational amplifier is no longer outstanding, and the operational amplifier is mainly applied to signal amplification and active filter design at present, in most conventional designs, an ideal model of the operational amplifier is used, the internal structure of the operational amplifier is ignored, the operational amplifier is taken as an element with amplification effect, a power supply is connected, and the operational amplifier circuit can play the amplification effect, namely the ideal operational amplifier circuit has infinite input impedance and zero output impedance, the in-phase amplifier circuit has the characteristic of infinitesimal output impedance, the in-phase amplifier circuit keeps the characteristic of operational amplifier, the integrator circuit is a circuit which enables an output signal to be proportional to the time integral value of an input signal, the integrator circuit consists of a resistor R3 and an integrating capacitor C1, the condition of forming the integrator circuit is that the time constant of the circuit must be more than or equal to 10 times the time width of an input waveform, and the output signal is proportional to the integral of the input signal.
The second step is that: the sampling circuit is connected with the first circuit; a driving bridge MOS end Q2 is connected with an RS current sampling resistor in series, one end of R4 is connected with Vs, one end of the R4 is connected with a non-inverting input end Vin + of U1, one end of R1 is connected with an inverting input end Vin-of U1, one end of the R2 is connected with R5 and C2, the other end of the C2 is connected with Vin +, and R2 and C3 are connected between Vin + and Vout, one end of R3 is connected with Vout, and one end of the R3 is connected with the ADC; the integrating capacitor C1 is connected to the ADC, and the peak current and the rising rate output by the driving circuit and the driving pin all affect the MOS switch performance, and it is particularly important to select a suitable driving circuit to connect the power supply and the MOS transistor after the power supply IC and the MOS transistor are selected.
The third step: the sampling circuit is connected with the second circuit; the MOS end Q2 under the drive bridge is connected with an RS current sampling resistor, one end of R4 is connected with the non-inverting input end of the RS, one end of the R4 is connected with the non-inverting input end of U1 and is connected with the RS sampling resistor, the inverting input end of the R4 is connected with R1 and R2, the other end of the R2 is connected with the output end of an operational amplifier circuit, the output end of the operational amplifier circuit is connected with one end of a resistor R3, the other end of the R3 is connected with an integrating capacitor C1, the integrating capacitor C1 is connected with an input pin of an ADC (analog to digital converter), the power supply of the operational amplifier circuit is supplied with positive 5V power, the power supply of the operational amplifier circuit is grounded negatively, the sampling resistor RS converts the current signal of a motor into a voltage signal, the R4, R5 and C2 form a filter for inhibiting differential mode interference and burrs, the U1, the R1 and the R2 form a proportional amplifier circuit for amplifying the sampled weak current signal, the R3 and the C1 form a low-pass through a low-pass filter for filtering the burrs, and the signals pass through a logic unit, a certain time delay is provided, the size of the delay is related to the length of the connecting line and the number of logic units, and is also influenced by conditions such as manufacturing process, working voltage, temperature and the like of devices, a certain transition time is also needed for high-low level conversion of signals, due to the two factors, when the level values of multiple paths of signals change, at the moment of signal change, the output of combinational logic has a sequence and does not change simultaneously, some incorrect peak signals are often generated, the peak signals are called 'glitches', if the 'glitches' appear in one combinational logic circuit, the circuit has 'adventure', different from discrete elements, because parasitic capacitance inductance does not exist in PLD, the glitches are completely reserved and transmitted to the next stage, so the glitches are particularly prominent in LD and FPGA designs, the glitches in detection signals are filtered and eliminated through a low-pass filter composed of R3 and C1, meanwhile, the C1 integrates the current signal, shapes the PWM waveform into a direct current signal, and sends the direct current signal to the ADC for sampling, so that harmonic noise is prevented from being introduced into a high-frequency PWM switching signal, the current signal output by the operational amplification circuit is jittered, and burrs cause difficulty in measuring a real current value, and the detection value of the ADC is more accurate.
Example two: a method for sampling the current of a bridge drive path of a dc motor by integration, as shown in fig. 1, includes the following steps:
the first step is as follows: preparing a sampling tool; the sampling tool comprises an MOS bridge motor driving circuit, a sampling resistor, an integrated operational amplifying circuit and a current integrating circuit, wherein the sampling resistor is used in current sampling and voltage sampling, the sampling resistor requires high power, the power is doubled compared with the common low resistance under the conditions of the same volume and the same resistance, the sampling resistor requires low resistance, the lowest resistance can be 0.0001R, the sampling resistor requires high reliability, the temperature coefficient of the alloy sampling resistor is generally within 75ppm and 50ppm, the temperature coefficient of the common low resistance is generally more than 200ppm and 200ppm, a 0.01% precision resistor is adopted, the sampling precision rate is improved, the integrated operational amplifying circuit and the integration process are utilized, the consistency of parameters of adjacent components is good, a complex circuit of a polycrystalline transistor is adopted, the performance of the complex circuit is very superior, and the amplified signal is amplified under the condition of no distortion, an ideal operational amplifier circuit of integrated operational amplifier circuit has the characteristics of infinite input impedance and infinite output impedance, the in-phase amplifier circuit keeps the characteristic of operational amplifier, the integrator circuit is a circuit which makes the time integral value of the output signal and the input signal proportional, the integrator circuit is composed of a resistor and an integrator capacitor C1, the condition of forming the integrator circuit is that the time constant of the circuit must be larger than or equal to 10 times the time width of the input waveform, the output signal and the integral of the input signal are proportional, the integrator circuit is characterized in that the integrator circuit can convert the input square wave into triangular wave or oblique wave, the integrator circuit resistor is connected in series in the main circuit, the capacitor is in the main circuit, and the input and the output of the integrator circuit are in integral relation.
The second step is that: the sampling circuit is connected with the first circuit; a driving bridge MOS end Q2 is connected with an RS current sampling resistor in series, one end of R4 is connected with a Vs end, one end of the R4 is connected with a non-inverting input end Vin + of U1, one end of R1 is connected with an inverting input end Vin-of U1, one end of the R1 is connected with R5 and C2, the other end of the R2 is connected with Vin +, R2 and C3 are connected between Vin-Vout, one end of R3 is connected with Vout, and one end of the R3 is connected with an ADC; the integrating capacitor C1 is connected to the ADC, and the peak current and the rising rate output by the driving circuit and the driving pin all affect the MOS switch performance, and it is particularly important to select a suitable driving circuit to connect the power supply and the MOS transistor after the power supply IC and the MOS transistor are selected.
The third step: the sampling circuit is connected with the second circuit; an MOS end Q2 under a drive bridge is connected with an RS current sampling resistor, one end of R4 is connected with an RS end, the other end of R4 is connected with a non-inverting input end of U1 and is connected with the RS sampling resistor, an inverting input end of the R4 is connected with R1 and R2, the other end of R2 is connected with an output end of an operational amplifier circuit, an output end of the operational amplifier circuit is connected with one end of R3, the other end of R3 is connected with an integrating capacitor C1, the integrating capacitor C1 is connected with an input pin of the ADC, the power supply of the operational amplifier circuit is positively powered by 5V, the power supply of the operational amplifier circuit is negatively grounded, the sampling resistor RS converts a current signal of a motor into a voltage signal, R4, R5 and C2 form a filter to suppress differential mode interference and burrs, the U1, R1 and R2 form a proportional amplifier circuit to amplify a sampled weak current signal, R3 and C1 form a low-pass through a connecting line and a logic unit, the filter to filter burrs in the signal, and have a certain time delay, the size of the delay is related to the length of the connecting line and the number of logic units, and is also influenced by conditions such as manufacturing process, working voltage, temperature and the like of devices, a certain transition time is also needed for high-low level conversion of signals, due to the two factors, when the level values of multiple paths of signals change, at the moment of signal change, the output of combinational logic has a sequence and does not change simultaneously, some incorrect peak signals are often generated, the peak signals are called 'glitches', if the 'glitches' appear in one combinational logic circuit, the circuit has 'adventure', different from discrete elements, because parasitic capacitance inductance does not exist in PLD, the glitches are completely reserved and transmitted to the next stage, so the glitches are particularly prominent in LD and FPGA designs, the glitches in detection signals are filtered and eliminated through a low-pass filter composed of R3 and C1, meanwhile, the C1 integrates the current signal, shapes the PWM waveform into a direct current signal, and sends the direct current signal to the ADC for sampling, so that harmonic noise is prevented from being introduced into a high-frequency PWM switching signal, the current signal output by the operational amplification circuit is jittered, burrs are caused to be difficult to measure a real current value, and the ADC detection value is more accurate.
The industrial principle is as follows: a MOS end Q2 under a drive bridge is connected with an RS current sampling resistor, one end of R4 is connected with an RS end, the other end of the R4 is connected with an in-phase input end of U1 and is connected with the RS sampling resistor, an anti-phase input end is connected with R1 and R2, the other end of R2 is connected with an output end of an operational amplifier circuit, the output end of the operational amplifier circuit is connected with one end of a resistor R3, the other end of R3 is connected with an integral capacitor C1, the integral capacitor C1 is connected with an input pin of an ADC, the power supply of the operational amplifier circuit is positively powered by 5V, the power supply of the operational amplifier circuit is negatively grounded, the sampling resistor RS converts a current signal of a motor into a voltage signal, R4, R5 and C2 form a filter to suppress differential mode interference and burrs, the U1, R1 and R2 form a proportional amplifier circuit to amplify a sampled weak current signal, R3 and C1 form a low-pass filter to filter burrs in the signal, and the signal has a certain time delay when the signal passes through a connecting line and a logic unit in the circuit, the size of the delay is related to the length of the connecting line and the number of logic units, and is also influenced by conditions such as manufacturing process, working voltage, temperature and the like of devices, a certain transition time is also needed for high-low level conversion of signals, due to the two factors, when the level values of multiple paths of signals change, at the moment of signal change, the output of combinational logic has a sequence and does not change simultaneously, some incorrect peak signals are often generated, the peak signals are called 'glitches', if the 'glitches' appear in one combinational logic circuit, the circuit has 'adventure', different from discrete elements, because parasitic capacitance inductance does not exist in PLD, the glitches are completely reserved and transmitted to the next stage, so the glitches are particularly prominent in LD and FPGA designs, the glitches in detection signals are filtered and eliminated through a low-pass filter composed of R3 and C1, meanwhile, the C1 integrates the current signal, shapes the PWM waveform into a direct current signal, and sends the direct current signal to the ADC for sampling, so that harmonic noise is prevented from being introduced into a high-frequency PW M switching signal, and the current signal output by the operational amplifier circuit is jittered and burred to cause difficulty in measuring a real current value, so that the detection value of the ADC is more accurate.
A low-pass filter composed of R3 and C1 is used for filtering and eliminating burrs in a detection signal, meanwhile, C1 is used for integrating a current signal, PWM waveform shaping is carried out to form a direct current signal, the direct current signal is sent to an ADC for sampling, harmonic noise is prevented from being introduced into a high-frequency PWM switching signal, the current signal output by an operational amplification circuit is jittered, the burrs cause difficulty in measuring a real current value, and the detection value of the ADC is further more accurate.
The sampling resistor is used in current sampling and voltage sampling, the sampling resistor requires high power, the power is doubled compared with the common low resistance under the conditions of the same volume and the same resistance, the sampling resistor requires low resistance and can be 0.0001R at the lowest, the sampling resistor requires high reliability, the temperature coefficient of the alloy sampling resistor is generally within 75ppm and 50ppm, the temperature coefficient of the common low resistance is generally more than 200ppm and 200ppm, and 0.01% precision resistor is adopted, so that the sampling precision rate is improved.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in a figure, it need not be further defined or explained in subsequent figures, and the terms "mounted," "connected," and "secured" are to be construed broadly herein, e.g., as fixedly connected, detachably connected, or integral, unless expressly stated or limited otherwise; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
The foregoing shows and describes the general principles and broad features of the present invention and advantages thereof. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, which are given by way of illustration of the principles of the present invention, but that various changes and modifications may be made without departing from the spirit and scope of the invention, and such changes and modifications are within the scope of the invention as claimed. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (8)
1. A direct current motor bridge type driving path current integral sampling method is characterized in that: the method comprises the following steps:
the first step is as follows: preparing a sampling tool;
the second step: the sampling circuit is connected with the first circuit;
the third step: the sampling circuit is connected with the second sampling circuit.
2. The method for sampling the current integral of the bridge type driving path of the direct current motor according to claim 1, wherein the method comprises the following steps: in the first step, the sampling tool comprises an MOS bridge motor driving circuit, a sampling resistor, an operational amplifier circuit and a current integrating circuit.
3. The method for sampling the current integral of the bridge type driving path of the direct current motor according to claim 1, wherein the method comprises the following steps: in the first step, a 0.01% precision resistor is adopted as a sampling resistor, the sampling resistor requires high power, the power is doubled compared with the common low resistance under the conditions of the same volume and the same resistance, the sampling resistor requires low resistance which can be 0.0001R at the lowest, the sampling resistor requires high reliability, and the temperature coefficient of the alloy sampling resistor is generally within 75ppm and 50 ppm.
4. The method for sampling the current integral of the bridge type driving path of the direct current motor according to claim 1, wherein the method comprises the following steps: in the first step, the operational amplifier circuit is composed of a signal source, an amplifier composed of a transistor and a load, so that the weak signal of the transmission and the amplification is amplified without distortion, and the integrating circuit is composed of a resistor and an integrating capacitor C1.
5. The method for integrating and sampling the current of the bridge-type driving path of the direct current motor according to claim 1, wherein: in the second step, a driving bridge MOS end Q2 is connected with an RS current sampling resistor in series, one end of R4 is connected with Vs, one end of the R4 is connected with a non-inverting input end Vin + of U1, one end of R1 is connected with an inverting input end Vin-of U1, one end of the R2 is connected with R5 and C2, the other end of the C2 is connected with Vin +, and R2 and C3 are connected between Vin-and Vout, one end of R3 is connected with Vout, and one end of the R3 is connected with an ADC; c1 is connected to the ADC.
6. The method for sampling the current integral of the bridge type driving path of the direct current motor according to claim 1, wherein the method comprises the following steps: and in the third step, a MOS end Q2 under the drive bridge is connected with an RS current sampling resistor, one end of R4 is connected with an RS, one end of the RS is connected with a non-inverting input end of U1 and is connected with the RS sampling resistor, an inverting input end of the R4 is connected with R1 and R2, the other end of R2 is connected with the output end of the operational amplification circuit, the output end of the operational amplification circuit is connected with one end of R3, the other end of R3 is connected with an integral capacitor C1, the integral capacitor is connected with an ADC input pin, a positive 5V power supply of the operational amplification circuit is supplied, and a negative ground of the power supply of the operational amplification circuit is connected.
7. The method of claim 6, wherein the method comprises the steps of: and thirdly, converting a current signal of the motor into a voltage signal by using a sampling resistor RS, forming a filter by using R4, R5 and C2, inhibiting differential mode interference and burrs, forming a proportional amplifying circuit by using U1, R1 and R2, amplifying the sampled weak current signal, and forming a low-pass filter by using R3 and C1.
8. The method of claim 6, wherein the method comprises the steps of: and thirdly, filtering and eliminating burrs in the detection signal through a low-pass filter formed by R3 and C1, integrating the current signal by C1, shaping the PWM waveform into a direct-current signal, and sending the direct-current signal to an ADC (analog-to-digital converter) for sampling.
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| CN202210008206.3A CN114531155A (en) | 2022-01-06 | 2022-01-06 | Current integral sampling method for bridge-type driving circuit of direct current motor |
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| CN202210008206.3A CN114531155A (en) | 2022-01-06 | 2022-01-06 | Current integral sampling method for bridge-type driving circuit of direct current motor |
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