CN109212448B - Self-stabilizing zero circuit - Google Patents

Self-stabilizing zero circuit Download PDF

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CN109212448B
CN109212448B CN201810961677.XA CN201810961677A CN109212448B CN 109212448 B CN109212448 B CN 109212448B CN 201810961677 A CN201810961677 A CN 201810961677A CN 109212448 B CN109212448 B CN 109212448B
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module
signal
amplifier
main amplifier
output
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CN109212448A (en
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真齐辉
底青云
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Institute of Geology and Geophysics of CAS
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Institute of Geology and Geophysics of CAS
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R35/00Testing or calibrating of apparatus covered by the other groups of this subclass
    • G01R35/005Calibrating; Standards or reference devices, e.g. voltage or resistance standards, "golden" references
    • G01R35/007Standards or reference devices, e.g. voltage or resistance standards, "golden references"

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Abstract

The invention discloses a self-stabilizing zero circuit which comprises a module A and a module B. The module A comprises: when all K1 are closed and K2 is opened, the output voltage VoA obtains a signal for eliminating offset voltage and is stored on a capacitor Cos, and the offset voltage of the main amplifier is obtained on the capacitor Cos because the system is in a deep negative feedback state; when all K1 are switched off and K2 is switched on, the net input of the main amplifier subtracts the offset voltage of the main amplifier on the capacitor and then obtains the net amplified signal of the input signal through the main feedback network, thereby realizing the purpose of offset voltage elimination. The structure of the module B is completely consistent with that of the module A, and the complementation of the two modules is realized. The invention ensures that the whole system works in a linear region, and eliminates injected charge noise and zero-stabilized switching noise.

Description

Self-stabilizing zero circuit
Technical Field
The invention relates to the technical field of self-stabilizing zero circuits, in particular to a self-stabilizing zero circuit which overcomes the distortion caused by injected charges of zero-stabilizing chopping, ensures that the whole system works in a linear region, eliminates injected charge noise and zero-stabilizing switching noise and can be easily built by using common devices in a laboratory. The noise caused by the temperature drift of the offset voltage and the offset current of the device and the inherent 1/f noise of the device are overcome.
Background
As shown in fig. 1, an output end of a conventional operational amplifier has an error due to an offset voltage, and an inverse proportional operational amplifier has an offset voltage of 1mV and inputs a 10-Hz sine wave signal of 10mV, where R ═ Rf,R’=R//Rf
As shown in fig. 1a and 1b, the thick line represents the output signal, the thin line represents the input signal, and it can be seen that the offset voltage is sent to the output end together, the output signal is lifted by 1mV upwards as a whole, and if the amplification factor of the proportional operational amplifier is 10, the output signal is lifted by 10mV upwards as a whole, thereby bringing about the error of the measurement signal. In the precision measurement instrument, since the measurement errors caused by offset voltage, offset current, temperature drift, low frequency 1/f noise and the like can be equivalently processed as the input offset voltage of the operational amplifier, the error caused by the offset voltage must be eliminated in the precision measurement instrument.
The self-zero-stabilizing is a technology for dynamically offsetting offset voltage and offset voltage drift of an amplifier, the technology can reduce the influence of the offset voltage and the offset voltage drift on operational amplifier to the minimum, and simultaneously, the self-zero-stabilizing can also reduce low-frequency noise, particularly 1/f noise, and the basic idea is as follows: the two input ends of the amplifier are short-circuited or common-mode input signals are added, the output voltage in the state is measured and stored by a capacitor, and the voltage is subtracted from the output voltage when the amplifier normally works, so that the influence of offset voltage and temperature change on the output of the amplifier can be effectively reduced, and the common-mode signals can be effectively inhibited.
In a precision measuring instrument, a measuring signal is very weak, the offset voltage and the temperature drift thereof have great influence on the measurement of the signal, the traditional data acquisition method is that after an input short circuit or a common-mode input signal is added, an analog-to-digital converter (ADC) is used for acquisition, then a normal measuring signal is accessed, the analog-to-digital converter (ADC) is used for acquisition, and the results of measurement at two sides are subtracted to obtain a stable zero. The other method for eliminating the offset voltage is a chopping technology, but the chopping method needs to meet the condition that the frequency of an input signal is lower than half of the chopping frequency so as to avoid aliasing, and chopping can also cause the occurrence of obvious burrs, so that ripples need to be filtered, but because the frequency components of the burrs are very rich, the filtering of the burrs has certain complexity in special occasions. A representative of the latest self-zeroing technology is a chopper-stabilized operational amplifier integrated circuit, which uses two amplifiers, i.e., a "main" amplifier and a "zeroing" amplifier, in which the main amplifier is monitored and corrected for offset after the zeroing amplifier is short-circuited at an input terminal and zeroed. Because the main amplifier is clocked into the input and output terminals, the bandwidth of the input signal is determined by the bandwidth of the main amplifier and is no longer dependent on the chopping frequency. Charge injection by this technique is still a significant problem in switching operations, which can lead to signal transients, and the injected charge can couple with the input signal, causing intermodulation distortion.
The traditional data acquisition method needs the ADC to stay for a period of time to acquire a zero point, signal acquisition is discontinuous, and an amplifier easily enters a nonlinear area to influence measurement accuracy under the condition of larger amplification factor along with the change of offset voltage.
The traditional chopping method has the advantages that the frequency of an input signal is lower than half of the chopping frequency, aliasing is avoided, the chopping can also cause the occurrence of remarkable burrs, ripple waves need to be filtered, and the filtering of the burrs has certain complexity due to the fact that frequency components of the burrs are very rich and special occasions are adopted.
The charge injection caused by the switching operation of the latest self-standing zero-steady-state chopping remains a big problem, which can cause signal transients, and the injected charge can couple with the input signal, causing intermodulation distortion.
Disclosure of Invention
The invention aims to overcome the defects of the prior art, the invention overcomes the distortion caused by the injected charge of the steady-state chopping, ensures the whole system to work in a linear region, eliminates the injected charge noise and the stable zero switching noise, can easily build the circuit by using a common device in a laboratory by an engineer, can select a common amplifier or a high-performance amplifier according to the own engineering requirement without using an expensive chip to process the simple engineering application problem, has clear theoretical basis, is simple and easy to use, and is extremely easy to popularize.
In order to achieve the purpose, the invention adopts the following technical scheme: a self-stabilizing zero circuit is provided, which comprises a module A and a module B:
the module A comprises: the device comprises a main amplifier and a zero setting amplifier, wherein the main amplifier and the zero setting amplifier are respectively provided with a corresponding main feedback network and a corresponding zero setting feedback network, a measurement signal is connected to the negative end of the main amplifier through an analog switch controlled by K2, the positive input end and the negative input end of the main amplifier are connected through an analog switch controlled by K1, the positive end of the main amplifier is connected with a capacitor Cos and is connected to the output end of the zero setting amplifier through an analog switch controlled by K1, and the other end of the capacitor Cos is grounded; the input end of the main feedback network is connected to the negative end of the main amplifier, the output end of the main feedback network is respectively connected to the output end of the main amplifier through an analog switch controlled by K2, an analog switch controlled by K1 is connected to the output end of the zeroing amplifier, and an analog switch controlled by K3 is used forAs output V of module AoAThe zero setting feedback network is respectively connected to the input end and the output end of the zero setting amplifier;
the structure of the module B is completely consistent with that of the module A, in the module A and the module B, a switch driving signal of the module B has a translation in time relative to a switch driving signal of the module A, so that the two modules can work in a complementary mode, the module A and the module B are respectively output through two resistors R with equal resistance values, and the other ends of the two resistors R are connected to serve as the output Vo of the whole circuit.
In the module A and the module B: when all K1 are closed and K2 is open, the output voltage V is due to the system in a deep negative feedback stateoAObtaining a signal for eliminating offset voltage and storing the signal on a capacitor Cos, wherein the capacitor Cos obtains the offset voltage of the main amplifier; when all K1 are switched off and K2 is switched on, the net input of the main amplifier subtracts the offset voltage of the main amplifier on the capacitor and then obtains the net amplification signal of the input signal through the main feedback network, thereby realizing the purpose of offset voltage elimination. In the module A and the module B, the main amplifier and the zero setting amplifier work in a linear region. In the module a and the module B, the switch driving signal of the module B is delayed in time by half a cycle with respect to the switch driving signal of the module a.
In the module A and the module B, at least one of the module A and the module B is ensured to work in a signal measurement state, and the module A and the module B alternately enter the signal measurement state.
When the module A and the module B work in a signal measuring state and a zero filling state, the frequency of a measuring signal and the zero filling frequency are in a complete decoupling relation.
The invention has the beneficial effects that: the distortion caused by injected charges of steady-state chopping is overcome, the whole system is ensured to work in a linear region, and the problems of injected charge noise and stable zero switching noise are solved. An engineer can easily build the circuit by using a common device in a laboratory, and the engineer can select a common amplifier or a high-performance amplifier according to own engineering requirements without using a chip with high price to solve the problem of simple engineering application, so that the theoretical basis of the circuit is clear, the circuit is simple and easy to use, and the circuit is extremely easy to popularize.
Drawings
Fig. 1a is a circuit diagram of a conventional inverting proportional operational amplifier.
Fig. 1b is a schematic diagram illustrating signal input and output of the inverting phase ratio proportional operational amplifier circuit shown in fig. 1.
Fig. 2 is a circuit diagram of an embodiment of the self-zeroing circuit of the present invention.
Fig. 3 is a schematic diagram of the switch driving signal of the self-zeroing circuit shown in fig. 2.
Fig. 4 is a schematic diagram of an output waveform of the module a during operation.
Fig. 5 is a diagram illustrating a dual-mode output waveform of the self-zeroing circuit shown in fig. 2.
FIG. 6 is a schematic diagram of the output signal of the main amplifier with the frequency of the measurement signal being greater than the zero-padding frequency.
FIG. 7 is a schematic diagram comparing the output of module A with the output of two modules.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not to be construed as limiting the invention.
As shown in fig. 2 and 3, the self-stabilizing zero circuit provided by the embodiment of the present invention includes a module a and a module B, which have identical structures except that the switch driving signals in the module a and the module B are different, and the driving of the two modules has a half-cycle delay in time, so as to implement complementary operation of the two modules.
As shown in fig. 2, taking a module a as an example, the module a includes a main amplifier and a nulling amplifier, and the main amplifier and the nulling amplifier are respectively provided with a corresponding main feedback network and a corresponding nulling feedback network, so as to ensure that the two main amplifiers and the nulling amplifier always operate in a linear region. As shown in FIG. 2, the measurement signal is connected to the master through an analog switch controlled by K2The positive end of the main amplifier is connected with a capacitor Cos and is connected to the output end of the zeroing amplifier through the analog switch controlled by K1, and the other end of the capacitor Cos is grounded; the input end of the main feedback network is connected to the negative end of the main amplifier, the output ends of the main feedback network are respectively connected to the output end of the main amplifier through analog switches controlled by K2, the analog switch controlled by K1 is connected to the output end of the zeroing amplifier, and the analog switch controlled by K3 is used as the output V of the module AoAThe zero setting feedback network is respectively connected to the input end and the output end of the zero setting amplifier;
since the module a operates in the zeroing state and the signal measuring state, and there are transient switching actions in the two states, the output voltage has many glitch spikes, assuming that the input signal is 10mV, the zero-padding switching frequency is 1kHz, the output passes through an RC low-pass filter with a resistance of 100 Ω and a capacitance of 20nF, and the waveforms before and after filtering are as shown in fig. 4.
Fig. 4 shows a case where a thin line is an output waveform of the module a and a thick line is a waveform obtained by filtering the output waveform of the module a. As can be seen from fig. 4, although the RC filter can better filter the glitch, it is still not smooth enough, and it can be improved by increasing the resistance or capacitance of the RC filter, but there is also a problem of phase shift, and as the frequency of the measurement signal increases, there is a certain restriction on the passband of the RC filter. The problems of good filtering effect of high-frequency input signals, poor filtering effect of low-frequency signals, or good low-frequency effect and poor high-frequency effect exist.
In order to solve the above problem, it is necessary to introduce a module B to work together, and the two modules have identical structures, except that the switch driving signals in the module a and the module B are different, and the driving of the two modules has a half-cycle delay. As shown in fig. 3, the switch driving signals of two modules, i.e., module a and module B, are simultaneously improved, so that at least one module is ensured to operate in the measurement state at any time, and the zero padding process only takes a short time of the system, as shown in fig. 2, for module a or module B, when K1 is driven to be high level, K1 is closed, the module operates in the measurement state, and when K2 is driven to be high level, K2 is closed, and the module operates in the zero padding state. When the measurement signal and the operational amplifier are consistent with the indexes of fig. 2 and 3 and the amplification factor is 10, the filter resistance is 1k Ω, the filter capacitance is 200nF, and the output waveform is as shown in fig. 5.
As shown in fig. 5, the thick line is an output signal that is completely eliminated by the circuit of the present invention, and the thin line is an input signal, which are alternately output by two modules, so as to obtain the ideal smooth proportional amplification of the measurement signal without measurement error. And output filtering is not needed, and high-bandwidth and high-precision signal operation is realized.
For illustration of the present invention, the present invention can also be applied to high frequency measurement signals, for example, the measurement signal is 10 times of zero-padding frequency, 10kHz, other parameters are not changed, and the output signal and the input signal of the main amplifier in the module are obtained as shown in fig. 6.
As shown in fig. 6, the main amplifier has no output when in the zero padding operating state, and at this time, since the other module is in the measurement state, there is no influence on the output signal, and the system obtains a stable output waveform, and the module output signal and the system output signal are as shown in fig. 7.
FIG. 7 is a schematic diagram comparing the output of module A with the output of two modules. As can be seen from fig. 7, when the measurement frequency is greater than the zero-padding frequency, a part of the measurement signal will be lost by module a or module B, and since the other module is in the measurement state, the total output signal is not lost, so that the complete measurement signal is output, and the offset voltage of the system is completely suppressed, so that a weak measurement signal amplification without error is obtained.
It can be seen that when the measurement frequency is greater than the zero-padding frequency, a part of the measurement signal will be lost by one module, and since the other module is in the measurement state, the total output signal is not lost, so that the complete measurement signal is output, and the offset voltage of the system is completely suppressed, so that the error-free weak measurement signal amplification is obtained.
The above-described embodiments of the present invention should not be construed as limiting the scope of the present invention. Any other corresponding changes and modifications made according to the technical idea of the present invention should be included in the protection scope of the claims of the present invention.

Claims (6)

1. A self-stabilizing zero circuit, comprising a module A and a module B:
the module A comprises: the device comprises a main amplifier and a zero setting amplifier, wherein the main amplifier and the zero setting amplifier are respectively provided with a corresponding main feedback network and a corresponding zero setting feedback network, a measurement signal is connected to the negative end of the main amplifier through an analog switch controlled by K2, the positive input end and the negative input end of the main amplifier are connected through an analog switch controlled by K1, the positive end of the main amplifier is connected with a capacitor Cos and is connected to the output end of the zero setting amplifier through an analog switch controlled by K1, and the other end of the capacitor Cos is grounded; the input end of the main feedback network is connected to the negative end of the main amplifier, the output ends of the main feedback network are respectively connected to the output end of the main amplifier through analog switches controlled by K2, the analog switch controlled by K1 is connected to the output end of the zeroing amplifier, and the analog switch controlled by K3 is used as the output V of the module AoAThe zero setting feedback network is respectively connected to the input end and the output end of the zero setting amplifier;
the structure of the module B is completely consistent with that of the module A, in the module A and the module B, a switch driving signal of the module B has a translation in time relative to a switch driving signal of the module A, so that the two modules can work in a complementary mode, the module A and the module B are respectively output through two resistors R with equal resistance values, and the other ends of the two resistors R are connected to serve as the output Vo of the whole circuit.
2. The self-zeroing circuit of claim 1, wherein in module a and module B: when all K1 are closed and K2 is open, the output voltage V is due to the circuit in a deep negative feedback stateoAObtaining a signal for eliminating offset voltage and storing the signal on a capacitor Cos, wherein the capacitor Cos obtains the offset voltage of the main amplifier; when all K1 are open and K2 are closed, the net input to the main amplifier will subtract the main amplifier detuning current on the capacitorAnd after the voltage is reduced, a net amplification signal of the input signal is obtained through the main feedback network, so that the purpose of offset voltage elimination is realized.
3. The self-zeroing circuit of claim 1, wherein in both module a and module B, the main amplifier and the zeroing amplifier operate in a linear region.
4. The self-zeroing circuit of claim 1, wherein in both module a and module B, the switch drive signal of module B is delayed in time relative to the switch drive signal of module a by half a cycle.
5. The self-zeroing circuit of claim 4, wherein at least one of the modules A and B is guaranteed to operate in the signal measurement state, and the modules A and B are alternately put into the signal measurement state.
6. The self-stabilizing zero circuit as claimed in any one of claims 1 to 5, wherein when the module A and the module B work in the signal measurement state and the zero-padding state, the frequency of the measurement signal and the zero-padding frequency are completely decoupled.
CN201810961677.XA 2018-08-22 2018-08-22 Self-stabilizing zero circuit Expired - Fee Related CN109212448B (en)

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CN110687432A (en) * 2019-10-18 2020-01-14 中国电子科技集团公司第五十八研究所 Signal processing circuit for ATE
CN113551693A (en) * 2021-07-26 2021-10-26 联合微电子中心有限责任公司 Step-by-step self-zero-adjusting detection circuit and method
CN114978054B (en) * 2022-06-20 2024-05-14 圣邦微电子(北京)股份有限公司 Self-zeroing operational amplifier

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