CN114513213A - Error capturing circuit and decoding method based on asymmetric quantum cycle burst error code - Google Patents

Error capturing circuit and decoding method based on asymmetric quantum cycle burst error code Download PDF

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CN114513213A
CN114513213A CN202210036668.6A CN202210036668A CN114513213A CN 114513213 A CN114513213 A CN 114513213A CN 202210036668 A CN202210036668 A CN 202210036668A CN 114513213 A CN114513213 A CN 114513213A
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error
decoding
syndrome
error syndrome
code
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樊继豪
李骏
王诚
钱玉文
梅镇
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Nanjing University of Science and Technology
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Nanjing University of Science and Technology
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/17—Burst error correction, e.g. error trapping, Fire codes
    • H03M13/175—Error trapping or Fire codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/1545—Determination of error locations, e.g. Chien search or other methods or arrangements for the determination of the roots of the error locator polynomial

Abstract

The invention discloses an error capturing circuit and a decoding method based on asymmetric quantum cycle burst error codes, wherein the error capturing circuit can rapidly position an error position by circularly shifting an error syndrome, and can correct any burst X errors and Z errors in a code word design decoding length range and the like; the decoding method is based on the asymmetric quantum cycle burst error code and the error capturing circuit, can respectively correct Z errors and X errors, optimizes the decoding performance, fully considers the degeneracy characteristic in decoding to fully exert the decoding limit of a quantum coding theory, and realizes the correction of more quantum burst errors under the same code rate.

Description

Error capturing circuit and decoding method based on asymmetric quantum cycle burst error code
Technical Field
The invention belongs to the field of quantum error correction code decoding, and particularly relates to an error capturing circuit and a decoding method based on quantum cycle burst error codes.
Background
In the process of quantum information processing, interaction is inevitably generated between a quantum system and an external environment, so that the coherence of the quantum system is seriously attenuated, and finally, a coherent superposition state is degraded into a mixed state, so that quantum decoherence is caused. Quantum noise interference caused by quantum decoherence is a major obstacle in the quantum information processing process; on the other hand, the inaccuracy of the quantum logic gate can cause the quantum error to spread rapidly in the quantum computation process, and finally cause the computation failure, which is another big obstacle faced by the quantum information processing. The quantum error correction technology is a necessary means for protecting quantum information against quantum decoherence effect and quantum noise influence in the quantum computing and quantum communication process, and the designed quantum error correction code is an important guarantee for realizing future quantum computing and quantum communication.
The traditional coding and decoding research of quantum error correcting codes assumes that the error influence of quantum noise interference on quantum channels is completely independent, namely, a discretization independent error model based on Shor. However, the noise interference of quantum correlation error to quantum memory channel is more practical. But both classical and quantum memory channels tend to lack deterministic probabilistic models to describe them well. In classical communication and digital storage, burst error correction codes are often used to correct the associated type of error and tend to have a higher code rate than random error correction codes.
However, most of the current quantum error correction techniques, especially the construction of quantum error correction codes, are for correcting independent and random errors, and the research on quantum error correction coding and decoding for correcting the related errors in the quantum memory channel is lacking. The quantum burst error correcting code obtained at present is only based on the direct popularization of a CSS construction method, and has great limitation. More importantly, in addition to the problem of encoding and constructing quantum codes, an effective decoding algorithm is also needed to realize low-delay and high-reliability quantum communication and fault-tolerant quantum computation.
Disclosure of Invention
The invention aims to provide a rapid decoding algorithm of an asymmetric quantum cycle burst error code, which can rapidly position an error position by circularly shifting an error syndrome.
The technical scheme for realizing the purpose of the invention is as follows:
an error capturing circuit based on a quantum cycle burst error code comprises a first switch, a second switch, a third switch and an error syndrome shift register;
the first switch is connected to the error syndrome shift register, the error syndrome shift register is connected to the second switch, and the error syndrome shift register is also connected to the third switch.
The quick decoding method of the asymmetric quantum cycle burst error code based on the error capturing circuit comprises the following steps:
step 1, acquiring needed X error syndrome and Z error syndrome by using a quantum measurement circuit, and respectively storing results in an X decoding register and a Z decoding register;
step 2, circularly shifting the X error syndrome in the X decoding register into an error capturing circuit for decoding, detecting whether the whole error sequence is completely captured or not by continuously circularly shifting the X error syndrome register, if the X error sequence is completely captured, outputting a decoding sequence X, otherwise, failing to decode;
step 3, circularly moving the Z error syndrome in the Z decoding register into an error capturing circuit to decode the Z error, if the Z error sequence is detected to be completely captured, outputting a decoding sequence Z, otherwise, failing to decode;
and 4, if the decoders with the X error and the Z error return successful decoding, the final decoding is successful, otherwise, the decoding fails, and meanwhile, whether degenerate errors occur is judged.
Compared with the prior art, the invention has the beneficial effects that:
(1) according to the technical scheme, through an error capturing circuit based on the quantum cycle burst error code, the error syndrome is circularly shifted to quickly position the error position, and any burst X errors and Z errors in a code word design decoding length range can be corrected;
(2) in most of channels, the occurrence of errors has great asymmetry, the probability of Z errors is far higher than that of X errors, and the asymmetric quantum error correcting code can better adapt to the asymmetry of the channels;
(3) the technical scheme of the invention considers the quantum coding theory as a new coding system, wherein the degeneracy characteristic is a special phenomenon which does not exist in the prior classical coding, and the invention fully considers the degeneracy characteristic in the decoding to fully exert the decoding limit of the quantum coding theory and realize the correction of more quantum burst errors under the same code rate.
The invention is further described with reference to the following figures and detailed description.
Drawings
FIG. 1 is a flow chart of steps of a method for fast decoding an asymmetric quantum cycle burst error code according to the present invention.
FIG. 2 is a circuit diagram of an X quantum error trapping circuit according to an embodiment of the present invention.
FIG. 3 is a circuit diagram of a Z quantum error trapping circuit according to an embodiment of the present invention.
Fig. 4-6 are schematic diagrams illustrating an error syndrome cyclic shift of the asymmetric qc-bler fast decoding method according to the present invention.
Detailed Description
An error capturing circuit based on a quantum cycle burst error code comprises a first switch 1, a second switch 2, a third switch 3 and an error syndrome shift register;
the first switch 1 is connected to an error syndrome shift register, the error syndrome shift register is connected to the second switch 2, and the error syndrome shift register is also connected to the third switch 3.
The quick decoding method of the asymmetric quantum cycle burst error code based on the error capturing circuit comprises the following steps:
step 1, acquiring needed X error syndrome and Z error syndrome by using a quantum measurement circuit, and respectively storing results in an X decoding register and a Z decoding register, wherein the method specifically comprises the following steps:
step 1-1, based on two classical linear cyclic codes C satisfying dual inclusion condition1＝[n,k1,l1]And C2＝[n,k2,l2]Constructing asymmetric quantum cycle error burst code QB＝[n,k1+k2-n,lZ/lX]Where n represents the code length, k represents the code rate, l represents the burst error correction capabilityXRepresenting the ability to correct X burst errors,/ZRepresents the ability to correct Z burst errors, and lZ≥lX，lX≥l1And lZ≥l2；
Step 1-2, based on cyclic code C1And C2Obtaining the syndrome of X error and Z error required by decoding:
Figure BDA0003468687910000031
Figure BDA0003468687910000032
wherein H1And H2Are respectively cyclic code C1And C2Check matrix of eXFor X errors occurring in the channel, eZZ errors that occur for a channel;
step 1-3, mixingXAnd fZRespectively record as
Figure BDA0003468687910000033
And
Figure BDA0003468687910000034
respectively expressing the X error syndrome and the Z error syndrome acquired in the step 1-2 as polynomial forms:
Figure BDA0003468687910000035
Figure BDA0003468687910000036
wherein r is1＝n-k1Is C1Number of check bits, r2＝n-k2Is C2A check digit;
and storing the results into an X decoding register and a Z decoding register respectively.
Step 2, circularly shifting the X error syndrome in the X decoding register into an error capturing circuit for decoding, detecting whether the whole error sequence is completely captured or not by continuously circularly shifting the X error syndrome register, if the X error sequence is completely captured, outputting a decoding sequence X, otherwise, failing to decode, specifically:
step 2-1, circularly shifting the X error syndrome in the X decoding register into an error capturing circuit for decoding, circularly shifting the error syndrome, and judging whether the error is completely captured, wherein the method specifically comprises the following steps:
step 2-1-1, passing through i is more than or equal to 0 and is more than or equal to r1-lXAfter the sub-shift, if the last l in the X error syndromeXThe bit check positions are not all 0, and r is in front1-lXBit check positions are all 0, then the X error is successfully trapped in the first l of the X error syndromeXEnding decoding, outputting a decoding result, and otherwise, entering the step 2-1-2;
step 2-1-2, passing through1-lX+1≤i≤r1After the second shift, if the last l in the shifted X error syndromeXThe bit check positions are not all 0, and front r1-lXBit check positions are all 0, then the X error is successfully captured in the first l of the X error syndrome of the shifted codeword sequenceXEnding decoding, outputting a decoding result, and otherwise, entering the step 2-1-3;
step 2-1-3, continuing to shift the X error syndrome until the whole cyclic shift process is completed, and if the last l in the shifted X error syndromeXThe bit check positions are not all 0, and front r1-lXAll 0 s, then the X error is successfully captured in the first l of the shifted codeword sequence X error syndromeXEnding decoding, outputting a decoding result, and otherwise, entering the step 2-1-4;
step 2-1-4,After the whole cyclic shift process, if the shifted X error syndrome has the front r1-lXIf all the bit check positions are not always 0, the X error decoding failure is returned.
And 2-2, if the error is completely captured, outputting a decoding sequence X, otherwise, judging that the decoding fails.
And 3, circularly moving the Z error syndrome in the Z decoding register into an error capturing circuit to decode the Z error, if the Z error sequence is detected to be completely captured, outputting a decoding sequence Z, otherwise, failing to decode, specifically:
step 3-1, circularly shifting the Z error syndrome in the Z decoding register into an error capturing circuit for decoding, circularly shifting the error syndrome, and judging whether the error is completely captured, wherein the steps are as follows:
step 3-1-1, passing through i is more than or equal to 0 and is more than or equal to r2-lZAfter the second shift, if the last l in the Z error syndromeZThe bit check positions are not all 0, and r is in front2-lZBit check positions are all 0, then the Z error is successfully captured in the first l of the Z error syndromeZEnding decoding, outputting a decoding result, and otherwise, entering the step 3-1-2;
step 3-1-2, passing through2-lZ+1≤i≤r2After the second shift, if the last l in the shifted Z error syndromeZThe bit check positions are not all 0, and front r2-lZBit check positions are all 0, then the Z error is successfully captured in the first l of the Z error syndrome of the shifted codeword sequenceZEnding decoding, outputting a decoding result, and otherwise, entering a step 3-1-3;
step 3-1-3, continuing to shift the Z error syndrome until the whole cyclic shift process is completed, and if the last l in the shifted Z error syndromeZThe bit check positions are not all 0, and front r2-lZAll 0 s, then the Z error is successfully captured in the first l of the Z error syndrome of the shifted codeword sequenceZEnding decoding, outputting a decoding result, and otherwise, entering the step 3-1-4;
step 3-1-4, finishingA cyclic shift process if the shifted Z error syndrome is the first r2-lZIf all the bit check positions are not always 0, a Z error decoding failure is returned.
And 3-2, if the error is completely captured, outputting a decoding sequence Z, otherwise, judging that the decoding fails.
Step 4, if the decoders with the X error and the Z error return successful decoding, the final decoding is successful, otherwise, the decoding is failed, and meanwhile, whether degenerate errors occur is judged;
wherein the judging whether the degenerate error occurs specifically is:
if l isX＝l1And lZ＝l2Then the burst error code of quantum cycle is a non-degenerate code, otherwise it belongs to degenerate code. The degenerate code has a stronger error correction capability and can correct more burst errors than the non-degenerate code. The quantum capture decoder in step 3 can not only correct burst errors with length less than or equal to l1And can correct for non-degenerate X errors of length greater than l1But is less than or equal to lXDegenerate X error of (1). Meanwhile, not only can the burst error length be corrected to be less than or equal to l2And can correct non-degenerate Z errors of length greater than l2But is less than or equal to lZDegenerate Z error of (1).
If the decoders with the X error and the Z error return successful decoding, the final decoding is successful, otherwise, the decoding fails. Meanwhile, if the length of the translated X error is larger than l1Then the X error is a degenerate error, if the length of the translated Z error is greater than l2Then the occurrence of Z errors is declared a degenerate error.
A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the following steps when executing the computer program:
step 1, acquiring needed X error syndrome and Z error syndrome by using a quantum measurement circuit, and respectively storing results in an X decoding register and a Z decoding register;
step 2, circularly shifting the X error syndrome in the X decoding register into an error capturing circuit for decoding, detecting whether the whole error sequence is completely captured or not by continuously circularly shifting the X error syndrome register, if the X error sequence is completely captured, outputting a decoding sequence X, otherwise, failing to decode;
step 3, circularly moving the Z error syndrome in the Z decoding register into an error capturing circuit to decode the Z error, if the Z error sequence is detected to be completely captured, outputting a decoding sequence Z, otherwise, failing to decode;
and 4, if the decoders with the X error and the Z error return successful decoding, the final decoding is successful, otherwise, the decoding fails, and meanwhile, whether degenerate errors occur is judged.
A computer-storable medium having stored thereon a computer program which, when executed by a processor, performs the steps of:
step 1, acquiring needed X error syndrome and Z error syndrome by using a quantum measurement circuit, and respectively storing results in an X decoding register and a Z decoding register;
step 2, circularly shifting the X error syndrome in the X decoding register into an error capturing circuit for decoding, detecting whether the whole error sequence is completely captured or not by continuously circularly shifting the X error syndrome register, if the X error sequence is completely captured, outputting a decoding sequence X, otherwise, failing to decode;
step 3, circularly moving the Z error syndrome in the Z decoding register into an error capturing circuit to decode the Z error, if the Z error sequence is detected to be completely captured, outputting a decoding sequence Z, otherwise, failing to decode;
and 4, if the decoders with the X error and the Z error return successful decoding, the final decoding is successful, otherwise, the decoding fails, and meanwhile, whether degenerate errors occur is judged.
The present invention will be further described with reference to the following examples.
Examples
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
An error capturing circuit based on a quantum cycle burst error code comprises a first switch 1, a second switch 2, a third switch 3 and an error syndrome shift register;
the first switch 1 is connected to an error syndrome shift register, the error syndrome shift register is connected to the second switch 2, and the error syndrome shift register is also connected to the third switch 3.
Referring to fig. 2 and 3, X-error and Z-error trapping circuits are shown.
Taking FIG. 2 as an example, first switch 1 is turned on to sequentially shift the X error syndrome in the X error register into r1A bit X error syndrome shift register, the shift of the register is controlled by a second switch 2, and after each shift, the front r of the register is detected1-lXWhether the bits are all 0, if all 0's are detected, the third switch 3 is opened, the X error sequence is output, otherwise the third switch 3 remains closed.
The capture principle of Z errors is similar to X errors and can be performed with reference to FIG. 3.
With reference to fig. 1, the method for fast decoding the asymmetric quantum cycle burst error code based on the error trapping circuit includes the following steps:
step 1, acquiring needed X error syndrome and Z error syndrome by using a quantum measurement circuit, and respectively storing results in an X decoding register and a Z decoding register, wherein the method specifically comprises the following steps:
step 1-1, based on two classical linear cyclic codes C satisfying dual inclusion condition1＝[n,k1,l1]And C2＝[n,k2,l2]Constructing asymmetric quantum cycle burst error code QB＝[n,k1+k2-n,lZ/lX]Where n represents the code length, k represents the code rate, l represents the burst error correction capabilityXRepresenting the ability to correct X burst errors,/ZRepresents the ability to correct Z burst errors, and lZ≥lX，lX≥l1And lZ≥l2；
Step 1-2, based on cyclic code C1And C2Obtaining the syndrome of X error and Z error required by decoding:
Figure BDA0003468687910000071
Figure BDA0003468687910000072
wherein H1And H2Are respectively cyclic code C1And C2Check matrix of eXFor X errors occurring in the channel, eZZ errors that occur for a channel;
step 1-3, mixingXAnd fZRespectively record as
Figure BDA0003468687910000073
And
Figure BDA0003468687910000074
respectively expressing the X error syndrome and the Z error syndrome acquired in the step 1-2 as polynomial forms:
Figure BDA0003468687910000075
Figure BDA0003468687910000076
wherein r is1＝n-k1Is C1Number of check bits, r2＝n-k2Is C2Checking digit;
and storing the results into an X decoding register and a Z decoding register respectively.
Step 2, with reference to fig. 4, circularly shifting the X error syndrome in the X decoding register into an error capturing circuit (error capturing decoder) for decoding, and continuously circularly shifting the X error syndrome register to detect whether the entire error sequence is completely captured, if it is detected that the X error sequence is completely captured, outputting a decoding sequence X, otherwise, failing to decode, specifically:
step 2-1, circularly shifting the X error syndrome in the X decoding register into an error capturing circuit (error capturing decoder) for decoding, circularly shifting the error syndrome, and judging whether the error is completely captured, wherein the method specifically comprises the following steps:
step 2-1-1, passing through i is more than or equal to 0 and less than or equal to r1-lXAfter the second shift, if the last l in the X error syndromeXThe bit check positions are not all 0, and r is in front1-lXBit check positions are all 0, then the X error is successfully trapped in the first l of the X error syndromeXEnding decoding, outputting a decoding result, and otherwise, entering the step 2-1-2;
step 2-1-2, passing through1-lX+1≤i≤r1After the second shift, if the last l in the shifted X error syndromeXThe bit check positions are not all 0, and front r1-lXBit check positions are all 0, then the X error is successfully captured in the first l of the X error syndrome of the shifted codeword sequenceXEnding decoding, outputting a decoding result, and otherwise, entering the step 2-1-3;
step 2-1-3, continuing to shift the X error syndrome until the whole cyclic shift process is completed, and if the last l in the shifted X error syndromeXThe bit check positions are not all 0, and front r1-lXAll 0 s, then the X error is successfully captured in the first l of the shifted codeword sequence X error syndromeXEnding decoding, outputting a decoding result, and otherwise, entering the step 2-1-4;
step 2-1-4, through the whole cyclic shift process, if the shifted X error syndrome is the front r in the syndrome1-lXIf all the bit check positions are not always 0, the X error decoding failure is returned.
And 2-2, if the error is completely captured, outputting a decoding sequence X, otherwise, judging that the decoding fails.
Step 3, circularly moving the Z error syndrome in the Z decoding register into an error capturing circuit (error capturing decoder) to decode the Z error, if the Z error sequence is detected to be completely captured, outputting a decoding sequence Z, otherwise, failing to decode, specifically:
step 3-1, circularly shifting the Z error syndrome in the Z decoding register into an error capturing circuit (an error capturing decoder) for decoding, circularly shifting the error syndrome, and judging whether the error is completely captured, wherein the method specifically comprises the following steps:
step 3-1-1, passing through i is more than or equal to 0 and less than or equal to r2-lZAfter the second shift, if the last l in the Z error syndromeZThe bit check positions are not all 0, and r is in front2-lZBit check positions are all 0, then the Z error is successfully captured in the first l of the Z error syndromeZEnding decoding, outputting a decoding result, and otherwise, entering the step 3-1-2;
step 3-1-2, passing through2-lZ+1≤i≤r2After the second shift, if the last l in the shifted Z error syndromeZThe bit check positions are not all 0, and front r2-lZBit check positions are all 0, then the Z error is successfully captured in the first l of the Z error syndrome of the shifted codeword sequenceZEnding decoding, outputting a decoding result, and otherwise, entering a step 3-1-3;
step 3-1-3, continuing to shift the Z error syndrome until the whole cyclic shift process is completed, and if the last l in the shifted Z error syndromeZThe bit check positions are not all 0, and front r2-lZAll 0 s, then the Z error is successfully captured in the first l of the Z error syndrome of the shifted codeword sequenceZEnding decoding, outputting a decoding result, and otherwise, entering the step 3-1-4;
step 3-1-4, through the whole cyclic shift process, if the shifted Z error syndrome is the front r in the syndrome2-lZIf all the bit check positions are not always 0, a Z error decoding failure is returned.
And 3-2, if the error is completely captured, outputting a decoding sequence Z, otherwise, judging that the decoding fails.
Step 4, if the decoders with the X error and the Z error return successful decoding, the final decoding is successful, otherwise, the decoding is failed, and whether degenerate errors occur is judged;
wherein the judging whether the degenerate error occurs specifically is:
if l isX＝l1And lZ＝l2Then the burst error code of quantum cycle is a non-degenerate code, otherwise it belongs to degenerate code. The degenerate code has a stronger error correction capability and can correct more burst errors than the non-degenerate code.
The error trapping circuit in steps 2 and 3 can correct burst error with length less than or equal to l1And can correct for non-degenerate X errors of length greater than l1But is less than or equal to lXDegenerate X error of (2). Meanwhile, not only can the burst error length be corrected to be less than or equal to l2And can correct non-degenerate Z errors of length greater than l2But is less than or equal to lZDegenerate Z error of (1).
If the decoders with the X error and the Z error return successful decoding, the final decoding is successful, otherwise, the decoding fails. Meanwhile, if the length of the translated X error is larger than l1Then the X error is a degenerate error, if the length of the translated Z error is greater than l2Then the Z error that occurred is a degenerate error.
According to the technical scheme, through an error capturing circuit based on the quantum cycle burst error code, the error syndrome is circularly shifted to quickly position the error position, and any burst X errors and Z errors in a code word design decoding length range can be corrected; and based on the asymmetric quantum cycle burst error code, Z errors and X errors are respectively corrected, so that the decoding performance is optimized, and simultaneously, the degeneracy characteristic is fully considered in decoding to fully exert the decoding limit of a quantum coding theory, so that more quantum burst errors can be corrected under the same code rate.

Claims (10)

1. An error capturing circuit based on a quantum cycle burst error code is characterized by comprising a first switch (1), a second switch (2), a third switch (3) and an error syndrome shift register;
the first switch (1) is connected with an error syndrome shift register, the error syndrome shift register is connected with the second switch (2), and the error syndrome shift register is also connected with the third switch (3).
2. The method for fast decoding an asymmetric quantum cycle burst error code based on the error trapping circuit of claim 1, characterized by comprising the steps of:
step 1, acquiring needed X error syndrome and Z error syndrome by using a quantum measurement circuit, and respectively storing results in an X decoding register and a Z decoding register;
step 2, circularly shifting the X error syndrome in the X decoding register into an error capturing circuit for decoding, detecting whether the whole error sequence is completely captured or not by continuously circularly shifting the X error syndrome register, if the X error sequence is completely captured, outputting a decoding sequence X, otherwise, failing to decode;
step 3, circularly moving the Z error syndrome in the Z decoding register into an error capturing circuit to decode the Z error, if the Z error sequence is detected to be completely captured, outputting a decoding sequence Z, otherwise, failing to decode;
and 4, if the decoders with the X error and the Z error return successful decoding, the final decoding is successful, otherwise, the decoding fails, and meanwhile, whether degenerate errors occur is judged.
3. The method as claimed in claim 2, wherein the X error syndrome and the Z error syndrome required for obtaining in step 1 are specifically:
step 1-1, based on two classical linear cyclic codes C satisfying dual inclusion condition1＝[n,k1,l1]And C2＝[n,k2,l2]Constructing asymmetric quantum cycle error burst code QB＝[n,k1+k2-n,lZ/lX]Where n represents the code length, k represents the code rate, l represents the burst error correction capabilityXRepresenting the ability to correct X burst errors,/ZRepresents the ability to correct Z burst errors, and lZ≥lX，lX≥l1And lZ≥l2；
Step 1-2, based on cyclic code C1And C2Obtaining the syndrome of X error and Z error required by decoding:
Figure FDA0003468687900000011
Figure FDA0003468687900000012
wherein H1And H2Are respectively cyclic code C1And C2Check matrix of eXFor X errors occurring in the channel, eZZ errors that occur for a channel;
step 1-3, mixingXAnd fZRespectively record as
Figure FDA0003468687900000013
And
Figure FDA0003468687900000014
respectively expressing the X error syndrome and the Z error syndrome acquired in the step 1-2 as polynomial forms:
Figure FDA0003468687900000021
Figure FDA0003468687900000022
wherein r is1＝n-k1Is C1Number of check bits, r2＝n-k2Is C2The number of check bits.
4. The method according to claim 2, wherein the decoding of the X error syndrome in step 2 specifically comprises:
step 2-1, circularly shifting the X error syndrome in the X decoding register into an error capturing circuit for decoding, circularly shifting the error syndrome, and judging whether the error is completely captured;
and 2-2, if the error is completely captured, outputting a decoding sequence X, otherwise, judging that the decoding fails.
5. The method for rapidly decoding an asymmetric quantum cycle burst error code according to claim 4, wherein the error syndrome in step 2-1 is cyclically shifted to determine whether the error is completely captured, specifically:
step 2-1-1, passing through i is more than or equal to 0 and is more than or equal to r1-lXAfter the sub-shift, if the last l in the X error syndromeXThe bit check positions are not all 0, and r is in front1-lXBit check positions are all 0, then the X error is successfully trapped in the first l of the X error syndromeXEnding decoding, outputting a decoding result, and otherwise, entering the step 2-1-2;
step 2-1-2, passing through1-lX+1≤i≤r1After the second shift, if the last l in the shifted X error syndromeXThe bit check positions are not all 0, and front r1-lXBit check positions are all 0, then the X error is successfully captured in the first l of the X error syndrome of the shifted codeword sequenceXEnding decoding, outputting a decoding result, and otherwise, entering the step 2-1-3;
step 2-1-3, the X error syndrome is continuously shifted until the whole cyclic shift is completedProcedure, if the last l in shifted X error syndromeXThe bit check positions are not all 0, and front r1-lXAll 0 s, then the X error is successfully captured in the first l of the shifted codeword sequence X error syndromeXEnding decoding, outputting a decoding result, and otherwise, entering the step 2-1-4;
step 2-1-4, through the whole cyclic shift process, if the shifted X error syndrome is the front r in the syndrome1-lXIf all the bit check positions are not always 0, the X error decoding failure is returned.
6. The method according to claim 2, wherein the decoding of the Z error syndrome in step 3 specifically comprises:
3-1, circularly shifting the Z error syndrome in the Z decoding register into an error capturing circuit for decoding, circularly shifting the error syndrome, and judging whether the error is completely captured or not;
and 3-2, if the error is completely captured, outputting a decoding sequence Z, otherwise, judging that the decoding fails.
7. The method for rapidly decoding an asymmetric quantum cycle burst error code according to claim 6, wherein the error syndrome in step 3-1 is cyclically shifted to determine whether the error is completely captured, specifically:
step 3-1-1, passing through i is more than or equal to 0 and is more than or equal to r2-lZAfter the second shift, if the last l in the Z error syndromeZThe bit check positions are not all 0, and r is in front2-lZBit check positions are all 0, then the Z error is successfully captured in the first l of the Z error syndromeZEnding decoding, outputting a decoding result, and otherwise, entering the step 3-1-2;
step 3-1-2, passing through2-lZ+1≤i≤r2After the second shift, if the last l in the shifted Z error syndromeZThe bit check positions are not all 0, and front r2-lZBit check positions are all0, then the Z error is successfully captured in the first l of the Z error syndrome of the shifted codeword sequenceZEnding decoding, outputting a decoding result, and otherwise, entering a step 3-1-3;
step 3-1-3, continuing to shift the Z error syndrome until the whole cyclic shift process is completed, and if the last l in the shifted Z error syndromeZThe bit check positions are not all 0, and front r2-lZAll 0 s, then the Z error is successfully captured in the first l of the Z error syndrome of the shifted codeword sequenceZEnding decoding, outputting a decoding result, and otherwise, entering the step 3-1-4;
step 3-1-4, through the whole cyclic shift process, if the shifted Z error syndrome is the front r in the syndrome2-lZIf all the bit check positions are not always 0, a Z error decoding failure is returned.
8. The method according to claim 3, wherein the determining in step 4 whether a degenerate error occurs is specifically:
if l isX＝l1And lZ＝l2Then the burst error code of quantum cycle is a non-degenerate code, otherwise it belongs to degenerate code.
9. A computer arrangement comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the steps of the method according to any of claims 2-8 are implemented by the processor when executing the computer program.
10. A computer-storable medium having a computer program stored thereon, wherein the computer program is adapted to carry out the steps of the method according to any one of the claims 2-8 when executed by a processor.
CN202210036668.6A 2022-01-13 2022-01-13 Error capturing circuit and decoding method based on asymmetric quantum cycle burst error code Pending CN114513213A (en)

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