CN114497243A - Infrared detector chip and manufacturing method and application thereof - Google Patents

Infrared detector chip and manufacturing method and application thereof Download PDF

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CN114497243A
CN114497243A CN202210069584.2A CN202210069584A CN114497243A CN 114497243 A CN114497243 A CN 114497243A CN 202210069584 A CN202210069584 A CN 202210069584A CN 114497243 A CN114497243 A CN 114497243A
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layer
electrode
infrared detector
type electrode
type
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CN114497243B (en
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李明阳
李超
崔恒
刘建庆
杨文奕
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Zhongshan Dehua Chip Technology Co ltd
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Zhongshan Dehua Chip Technology Co ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
    • H01L31/105—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier being of the PIN type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0232—Optical elements or arrangements associated with the device
    • H01L31/02327—Optical elements or arrangements associated with the device the optical elements being integrated or being directly associated to the device, e.g. back reflectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/184—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP
    • H01L31/1844—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP comprising ternary or quaternary compounds, e.g. Ga Al As, In Ga As P
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

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Abstract

The invention discloses an infrared detector chip and a manufacturing method and application thereof, wherein the infrared detector chip comprises a substrate layer, wherein an epitaxial layer is arranged on the surface of the substrate layer, and an N-type electrode, a P-type electrode and a first insulating layer are arranged on the surface of the epitaxial layer; a reflective electrode is arranged on the surface part region of the first insulating layer; and a second insulating layer is arranged on the partial region of the surface of the N-type electrode. The reflection electrode can reflect infrared rays which are not completely absorbed to the photosensitive layer, so that optical response is improved, meanwhile, due to the reflection effect, the absorption layer can be optimally thinned, so that growth cost is reduced, in addition, when the reflection electrode is in alignment welding with the ROIC, the chip and the ROIC can have self-alignment effect due to the auxiliary alignment effect provided by the reflection electrode, and therefore, the welding alignment difficulty and cost are reduced.

Description

Infrared detector chip and manufacturing method and application thereof
Technical Field
The invention relates to the technical field of photoelectric detectors, in particular to an infrared detector chip and a manufacturing method and application thereof.
Background
In the related technology, the medium-short wave infrared InGaAs detector is developed vigorously, and in order to improve the sensitivity of infrared detection, the improvement of the optical response of the InGaAs short wave infrared detector is also very important while the dark current is reduced; meanwhile, the manufacturing cost of the chip is always high, for example, an InP substrate and MOCVD or MBE technology are adopted for growth, and the growth cost is high because the machine table and the materials are expensive; in addition, when the short wave infrared detector is interconnected and welded with a silicon read-out circuit ROIC, a high-precision bonding lead is adopted, and the equipment cost is high; various factors have prevented the development of infrared detectors along with high sensitivity and low cost.
Therefore, it is necessary to develop an infrared detector chip which has high sensitivity and low requirements for flip chip bonding accuracy.
Disclosure of Invention
In order to solve the problems in the prior art, the invention provides an infrared detector chip which is high in sensitivity and low in requirement on flip-chip welding precision.
The invention also provides a manufacturing method of the infrared detector chip.
The invention also provides application of the infrared detector chip in preparing an infrared detector.
The invention also provides an infrared detector.
The method comprises the following specific steps: the invention provides an infrared detector chip in a first aspect, which comprises a substrate layer, wherein an epitaxial layer is arranged on the surface of the substrate layer,
an N-type electrode, a P-type electrode and a first insulating layer are arranged on the surface of the epitaxial layer;
a reflective electrode is arranged on the surface part region of the first insulating layer;
the infrared detector chip sequentially comprises an N-type electrode area, a first groove area and a pixel array from outside to inside;
the pixel array consists of a plurality of pixel areas and a plurality of second isolation groove areas;
the pixel area and the second isolation groove area are correspondingly arranged;
and a second insulating layer is arranged on the partial region of the surface of the N-type electrode.
According to one embodiment of the infrared detector chip, the infrared detector chip has at least the following advantages:
according to the infrared detector chip, the reflecting electrode can reflect infrared rays which are not completely absorbed to the photosensitive layer, so that the photoresponse is improved, and the detection rate is improved; thereby improving the sensitivity; meanwhile, due to the reflection effect, the absorption layer can be optimally thinned, so that the growth cost is reduced.
According to some embodiments of the invention, the pixel region comprises a substrate layer and an epitaxial layer from bottom to top in sequence.
According to some embodiments of the present invention, a first insulating layer is provided on a partial region of the epitaxial layer in the pixel region.
According to some embodiments of the invention, the remaining area on the epitaxial layer in the pixel region is provided with a P-type electrode.
According to some embodiments of the invention, a surface of the first insulating layer in the pixel region is provided with a reflective electrode, and the reflective electrode extends into the first trench region and is in contact with the first insulating layer in the first trench region.
According to some embodiments of the invention, a reflective electrode is provided on a surface of the first insulating layer in the pixel region, and the reflective electrode extends into the second trench region and contacts with the first insulating layer in the second trench region.
According to some embodiments of the invention, a partial area reflective electrode is provided on a surface of the first insulating layer in the pixel, and the reflective electrode extends into the first trench region and contacts with the first insulating layer in the first trench region.
According to some embodiments of the invention, the pixel element is provided with a partial area reflective electrode on the surface of the first insulating layer, and the reflective electrode extends into the second trench area and contacts with the first insulating layer in the second trench area.
According to some embodiments of the invention, the surface of the P-type electrode is provided with a reflective electrode.
According to some embodiments of the invention, the first trench region comprises, from bottom to top, a substrate layer, a buffer layer, a stop layer and an N-type contact layer.
According to some embodiments of the invention, a partial region on the N-type contact layer in the first trench region is provided with a first insulating layer region.
According to some embodiments of the invention, the second trench region comprises, from bottom to top, a substrate layer, a buffer layer, a stop layer and an N-type contact layer.
According to some embodiments of the invention, a partial region on the N-type contact layer in the second trench region is provided with the first insulation layer region.
According to some embodiments of the invention, the N-type electrode region comprises a substrate layer and an epitaxial layer in sequence from bottom to top.
According to some embodiments of the invention, a first insulating layer is disposed on the epitaxial layer of the N-type electrode region.
According to some embodiments of the invention, an N-type electrode is disposed on a partial region of the first insulating layer of the N-type electrode region.
According to some embodiments of the invention, the N-type electrode in the N-type electrode region extends into an N-type electrode trench to electrically connect with the N-type contact region in the N-type electrode trench.
According to some embodiments of the invention, a partial region of the N-type electrode surface on the N-type electrode region is provided with a second insulating layer.
According to some embodiments of the invention, the reflective electrode comprises a gold reflective electrode.
According to some embodiments of the invention, the thickness of the reflective electrode is greater than or equal to the thickness of the P-type electrode.
According to some embodiments of the invention, the reflective electrode (110) has a thickness (C) that is ≦ the width (A) of the first trench region (C).
According to some embodiments of the present invention, twice the thickness (C) of the reflective electrode (110) is < the width (B) of the second trench region (C).
The reflecting electrode is an Au reflecting electrode, and Au is selected as the reflecting electrode in the detector device, so that the stability is good while the high reflectivity is provided.
The reflecting electrode is Au, the thickness of the Au is more than or equal to that of the pixel P-type electrode, and the thickness of the Au is less than the sum of the thicknesses of the pixel P-type electrode and the convex cylindrical electrode of the reading circuit, so that the Au meets the thickness condition, an excellent side wall reflecting effect is provided, meanwhile, a regular pit structure or a welding electrode with a large area is formed with the welding electrode on the upper surface, and when packaging is subjected to flip-chip welding, the Au corresponds to the convex cylindrical electrode of the reading circuit, so that the alignment-free packaging effect is achieved.
According to some embodiments of the invention, the second insulating layer has a thickness of 300nm to 500 nm.
According to some embodiments of the invention, the SiNx insulating film is used as the first insulating layer and the SiNx insulating film is used as the second insulating layer.
According to some embodiments of the invention, the first insulating layer has a thickness of 300nm to 500 nm.
According to some embodiments of the invention, the second insulating layer has a thickness of 300nm to 500 nm.
According to some embodiments of the invention, the P-type electrode comprises a Ti layer, a Pt layer and an Au layer from bottom to top.
According to some embodiments of the invention, the Ti layer is in contact with a P-type contact layer.
According to some embodiments of the invention, the Ti layer in the P-type electrode has a thickness of 50nm to 60 nm.
According to some embodiments of the invention, the thickness of the Pt layer in the P-type electrode is 50nm to 60 nm.
According to some embodiments of the invention, the thickness of the Au layer in the P-type electrode is 900nm to 1400 nm.
According to some embodiments of the invention, the N-type electrode is a Ti layer, a Pt layer, and an Au layer in this order from bottom to top.
According to some embodiments of the invention, the Ti layer is in contact with the N-type contact layer.
According to some embodiments of the invention, the Ti layer in the N-type electrode has a thickness of 50nm to 60 nm.
According to some embodiments of the invention, the thickness of the Pt layer in the N-type electrode is 50nm to 60 nm.
According to some embodiments of the invention, the thickness of the Au layer in the N-type electrode is 900nm to 1400 nm.
According to some embodiments of the invention, the epitaxial layer is a buffer layer, a stop layer, an N-type contact layer, an absorption layer and a P-type contact layer from bottom to top.
According to some embodiments of the invention, the substrate comprises an InP substrate.
According to some embodiments of the invention, the substrate has a thickness of 300 μm to 700 μm.
According to some embodiments of the invention, the buffer layer comprises an InP buffer layer.
According to some embodiments of the invention, the buffer layer has a thickness of 300nm to 500 nm.
According to some embodiments of the invention, the cut-off layer comprises an InGaAs cut-off layer.
According to some embodiments of the invention, the thickness of the cut-off layer is 150nm to 250 nm.
According to some embodiments of the invention, the N-type contact layer comprises an N-InP layer.
According to some embodiments of the invention, the N-type contact layer has a thickness of 50nm to 150 nm.
According to some embodiments of the invention, the absorption layer comprises an InGaAs absorption layer.
According to some embodiments of the invention, the thickness of the absorption layer is 2 μm to 4 μm.
According to some embodiments of the invention, the P-type contact layer comprises a P-InP layer.
According to some embodiments of the invention, the P-type contact layer has a thickness of 150nm to 250 nm.
According to the infrared detector chip, the epitaxial layer grows on the growth substrate and sequentially comprises a buffer layer, a cut-off layer, an N-type contact layer, an absorption layer and a P-type contact layer; the mesa epitaxial layer, the mesa bottom is the N-type contact layer; the patterned insulating passivation layer respectively exposes part of the N-type contact layer and part of the P-type contact layer; a negative electrode and a positive electrode on the N-type contact layer and the P-type contact; a patterned insulating layer over the negative electrode; and a reflective electrode on the insulating layer of the photosensitive region.
Reflection electrode can be with not absorbing complete infrared light reflection to photosensitive layer, thereby promote the photoresponse, simultaneously owing to there is the reflection effect, the light that is reflected can be utilized by secondary or even a lot of, when again with the thickness attenuate of absorbing layer, same photon absorption effect has, thereby reduce growth cost, in addition when carrying out counterpoint welding with ROIC, reflection electrode can provide supplementary counterpoint effect, can make chip and ROIC have from counterpoint effect, thereby reduce the welding and counterpoint the degree of difficulty and cost.
The second aspect of the present invention provides a method for manufacturing the above infrared detector chip, comprising the following steps:
s1, growing and sequentially forming the epitaxial layer and the first insulating layer on the substrate;
s2, etching the first insulating layer prepared in the step S1, and forming a P-type electrode groove in part of the surface of the pixel area; forming an N-type electrode groove on the partial surface of the N-type electrode region;
s3, growing P-type electrodes on the P-type electrode trenches formed in the step S2; growing an N-type electrode in the N-type electrode groove;
s4, forming the second insulating layer on the surface of the N-type electrode;
forming the reflective electrode in a region of the first insulating layer surface.
According to some embodiments of the invention, the infrared detector chip manufacturing method comprises: the method comprises the following steps:
s01, providing an epitaxial growth substrate;
s02, growing a detector epitaxial layer on the epitaxial growth substrate, wherein the detector epitaxial layer sequentially comprises a buffer layer, a stop layer, an N-type contact layer, an InGaAs absorption layer and a P-type contact layer;
s03, forming a patterned area through a photomask and an etching method to expose the N-type contact layer;
s04, depositing a passivation insulating layer, and respectively exposing the N-type contact layer and the P-type contact layer by using a photomask and an etching method;
s05, forming an N electrode and a P electrode by adopting a photomask, evaporation and stripping method;
s06, depositing a passivation insulating layer, and forming a patterned insulating layer by using a photomask and an etching method;
s07, forming a reflection counter electrode by using a photomask, evaporation and stripping method;
and S08, dividing the detector wafer to form a single detector chip.
The third aspect of the invention provides an application of the infrared detector chip in preparing an infrared detector.
The invention provides an infrared detector, and the preparation raw materials comprise the infrared detector chip.
According to some embodiments of the invention, the surface of the infrared detector chip is further provided with a readout circuit layer; the bottom of the readout circuit layer is provided with a plurality of cylindrical electrodes; the plurality of cylindrical electrodes are in contact with the correspondingly arranged P-type electrodes and the correspondingly arranged N-type electrodes.
According to some embodiments of the invention, the columnar electrode is an In electrode.
According to some embodiments of the invention, the thickness of the cylindrical electrode is 2 μm to 10 μm.
According to some embodiments of the invention, the thickness of the columnar electrode is 5 μm.
According to some embodiments of the invention, the size of the columnar electrode is consistent with the size of the pixel electrode of the detector chip.
According to some embodiments of the invention, the reflective electrode has a thickness less than a sum of thicknesses of the columnar electrode and the P-type electrode.
According to some embodiments of the invention, the remaining region of the surface of the N-type electrode is in contact with the columnar electrode.
According to at least one embodiment of the present invention, the following advantageous effects are provided:
according to the infrared detector chip, the reflecting electrode can reflect infrared rays which are not completely absorbed to the photosensitive layer, so that the photoresponse is improved, and the detection rate is improved; meanwhile, due to the reflection effect, the absorption layer can be optimally thinned, so that the growth cost is reduced; in addition, when the reflector electrode is in alignment welding with the ROIC, the height difference exists between the reflector electrode and the P-type electrode to form a step-shaped structure, so that a clamping groove effect can be provided, the chip and the ROIC can have a self-alignment effect, and the welding alignment difficulty and the welding alignment cost are reduced.
Drawings
Fig. 1 is a schematic structural diagram of an infrared detector chip manufactured in embodiment 1 of the present invention.
Fig. 2 is a schematic diagram of a readout circuit in embodiment 2 of the present invention.
Fig. 3 is a schematic structural diagram of an infrared detector in embodiment 2 of the present invention.
Fig. 4 is a schematic structural diagram of an infrared detector chip in embodiment 3 of the present invention.
FIG. 5 is a schematic diagram of the chip structure of the infrared detector in comparative example 1.
FIG. 6 is a graph showing the optical transmittance of the infrared detector chips in comparative example 1, comparative example 3 and example 4 according to the present invention.
Reference numerals:
firstly, an N-type electrode area; a first groove area; thirdly, a pixel area; and fourthly, a second groove area.
101. A substrate layer; 102. a buffer layer; 103. a cut-off layer; 104. an N-type contact layer; 105. an absorbing layer; 106. a P-type contact layer; 107. a first insulating layer; 108. a P-type electrode; 109. an N-type electrode; 110. a reflective electrode; 111. a second insulating layer; 112. a cylindrical electrode; 113. and reading out the circuit layer.
A. A width of the first trench region; B. a width of the second trench region; C. the thickness of the reflective electrode.
Detailed Description
The concept and technical effects of the present invention will be clearly and completely described below in conjunction with the embodiments to fully understand the objects, features and effects of the present invention. It is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments, and those skilled in the art can obtain other embodiments without inventive effort based on the embodiments of the present invention, and all embodiments are within the protection scope of the present invention.
In the description of the present invention, reference to the description of the terms "one embodiment," "some embodiments," "an illustrative embodiment," "an example," "a specific example," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The examples, in which specific conditions are not specified, were conducted under conventional conditions or conditions recommended by the manufacturer. The reagents or instruments used are not indicated by the manufacturer, and are all conventional products available commercially.
Specific examples of the present invention are described in detail below.
Example 1
The embodiment is an infrared detector chip and a manufacturing method thereof.
The structure of the infrared detector chip in this embodiment is shown in fig. 1, and includes a substrate layer 101(InP substrate); a buffer layer 102 (an InP buffer layer), a cut-off layer 103 (an InGaAs cut-off layer), and an N-type contact layer 104 (an N-type InP contact layer) are sequentially provided on a substrate layer 101 (an InP substrate);
an N-type electrode 109 contact region, a first insulating layer 107(SiNx layer) and an absorption layer 105(InGaAs absorption layer) are arranged on the N-type contact layer 104 (N-type InP contact layer);
a P-type contact layer 106 (P-type InP contact layer) is provided on the absorption layer 105(InGaAs absorption layer);
the P-type contact layer 106 (P-type InP contact layer) is provided with a P-type electrode 108 and a first insulating layer 107(SiNx layer);
an N-type electrode 109 extending to a first insulating layer 107(SiNx layer) on a P-type contact layer 106 (P-type InP contact layer) is arranged on the N-type electrode 109 contact region;
a second insulating layer 111(SiNx layer) is arranged on a partial surface region of the N-type electrode 109;
a reflective electrode region is arranged on the first insulating layer 107(SiNx layer) on the N-type contact layer 104 (N-type InP contact layer);
the reflective electrode region is provided with a reflective electrode 110 extending to a second insulating layer 111(SiNx layer) on the P-type contact layer 106 (P-type InP contact layer).
The infrared detector chip of the embodiment is sequentially composed of an N-type electrode area I, a first groove area II and a pixel array from outside to inside.
The pixel array is composed of a plurality of pixel areas and a plurality of second groove areas.
The pixel area (c) and the second groove area (c) are correspondingly arranged.
The thickness C of the reflective electrode 110 in the first trench region is 2 μm, and the width A of the first trench region is 50 μm;
the thickness C of the reflective electrode 110 in the first trench region is 2 μm, and the width B of the second trench region is 6 μm;
and the thickness of the reflecting electrode 110 is larger than that of the P-type electrode 108, and the height difference of 1.3 mu m exists between the two electrodes, so that a regular limiting structure is formed, the auxiliary alignment effect is realized, and the requirement on the accuracy of flip-chip welding is reduced.
The manufacturing method of the infrared detector chip in the embodiment comprises the following steps:
1) providing an epitaxial growth substrate, namely a substrate layer 101(InP substrate) with the thickness of 350 mu m;
2) growing a detector epitaxial layer on an epitaxial growth substrate by using MOCVD, wherein the detector epitaxial layer sequentially comprises a buffer layer 102(InP buffer layer), a stop layer 103(InGaAs stop layer), an N-type contact layer 104 (N-type InP contact layer), an absorption layer 105(InGaAs absorption layer) and a P-type contact layer 106 (P-type InP contact layer), and the thicknesses of the layers are 400nm, 200nm, 100nm, 3 mu m and 200nm sequentially;
3) masking with positive photoresist, and forming a patterned region by dry etching to expose the N-type contact layer 104;
4) a 400nm first insulating layer 107(SiNx layer) was deposited by PECVD, masked with a positive photoresist, with 6:1 ammonium fluoride: etching with hydrofluoric acid solution to respectively leak the N-type contact layer 104 and the P-type contact layer 106;
5) carrying out photomask by using negative photoresist, and then forming an N-type electrode 109 and a P-type electrode 108 by evaporation and stripping, wherein the N-type electrode 109 and the P-type electrode 108 sequentially comprise a Ti layer, a Pt layer and an Au layer from bottom to top, and the thickness is 50nm/50nm/1000 nm;
6) then, depositing a 400nm second insulating layer 111(SiNx layer) by a PECVD method, adopting a positive photoresist to perform masking, and adopting an ammonium fluoride solution to etch to form a patterned insulating layer;
7) carrying out light masking by using negative photoresist, and then forming a reflecting electrode 110 by evaporation and stripping, wherein the electrode is Au and has the thickness of 2 mu m;
8) and dividing the detector wafer to form a single detector chip.
Example 2
The embodiment is an infrared detector and a manufacturing method thereof.
An infrared detector of the present invention, as shown in fig. 4, comprises an infrared detector chip prepared in example 1 shown in fig. 1 and a readout circuit layer 113 shown in fig. 2; a plurality of protruding cylindrical electrodes 112 are arranged on the readout circuit layer 113; the columnar electrodes 112 are in contact with the P-type electrodes 108 and the N-type electrodes 109, which are disposed correspondingly.
1) Providing an infrared detector chip of the above embodiment, and providing a readout circuit chip;
2) a photomask stripping process is carried out on the read-out circuit chip to form the cylindrical electrode 112, the material of the cylindrical electrode is In, the thickness of the cylindrical electrode is 5 microns, and the size of the cylindrical electrode is consistent with that of the P-type electrode 108 In the pixel of the detector chip.
3) Providing a flip-chip welding platform, aligning the infrared detector chip and the reading circuit chip, and finishing alignment by using the auxiliary alignment effect of the reflective electrode 110 of the detector chip prepared in the embodiment 1;
4) the soldering station applied a pressure of 100000N at 150 ℃, held for a flip-chip contact time of 30min, and the soldering was completed.
5) And welding the temperature sensor and the refrigerator after welding, and then carrying out vacuum pumping and packaging on the tube shell to form the single infrared detector.
Example 3
The embodiment is an infrared detector chip and a manufacturing method thereof.
The difference between this embodiment and embodiment 1 is that, as shown in fig. 4, the height of the reflective electrode 110 is the same as that of the P-type electrode 108, so that the reflective electrode 110 and the P-type electrode 108 together form a weldable area, that is, the weldable area is increased from the original P-type electrode 108 to the reflective electrode 110 covering the whole pixel area (photosensitive element), thereby significantly reducing the accuracy of flip-chip welding alignment, reducing the dependence on equipment, and reducing the difficulty of flip-chip welding.
The infrared detector chip of the embodiment is sequentially composed of an N-type electrode area I, a first groove area II and a pixel array from outside to inside.
The pixel array is composed of a plurality of pixel areas and a plurality of second groove areas.
The pixel area (c) and the second groove area (c) are correspondingly arranged.
The thickness C of the reflective electrode 110 in the first trench region is 0.7 μm, and the width A of the first trench region is 50 μm;
the thickness C of the reflective electrode 110 in the first trench region is 0.7 μm, and the width B of the second trench region is 6 μm;
the manufacturing method of the infrared detector chip in the embodiment comprises the following steps:
1) providing an epitaxial growth substrate as a substrate layer 101(InP substrate) with the thickness of 350 μm;
2) growing a detector epitaxial layer on an epitaxial growth substrate by using MOCVD (metal organic chemical vapor deposition), wherein the detector epitaxial layer sequentially comprises a buffer layer 102(InP buffer layer), a stop layer (InGaAs stop layer), an N-type contact layer 104 (N-type InP contact layer), an absorption layer 105(InGaAs absorption layer) and a P-type contact layer 106 (P-type InP contact layer), and the thicknesses of the layers are 400nm, 200nm, 100nm, 3 mu m and 200nm sequentially;
3) masking with positive photoresist, and forming a patterned region by dry etching to expose the N-type contact layer 104;
4) depositing a 400nm first insulating layer 107(SiNx passivation insulating layer) by PECVD (plasma enhanced chemical vapor deposition), masking by using a positive photoresist, and etching by using an ammonium fluoride solution to respectively leak the N-type contact layer 104 and the P-type contact layer 106;
5) carrying out photomask by using negative photoresist, and then forming an N-type electrode 109 and a P-type electrode 108 by evaporation and stripping, wherein the N-type electrode 109 and the P-type electrode 108 are a Ti layer, a Pt layer and an Au layer from bottom to top in sequence, and the thickness is 50nm/50nm/1000 nm;
6) then, depositing a 400nm second insulating layer 111(SiNx passivation insulating layer) by a PECVD method, adopting a positive photoresist to perform masking, and adopting an ammonium fluoride solution to etch to form a patterned insulating layer;
7) carrying out light masking by using negative photoresist, and then forming a reflecting electrode 110 by evaporation and stripping, wherein the electrode is Au, the thickness of the electrode is 0.7 mu m, namely the sum of the thickness of a passivation film and the thickness of the reflecting electrode 110 is 1.1 mu m, so that the height of the electrode is consistent with the thickness of the P-type electrode 108, which is 1.1 mu m;
8) and dividing the detector wafer to form a single detector chip.
Example 4
The embodiment is an infrared detector chip and a manufacturing method thereof.
The difference from example 1 is that:
the thickness C of the reflective electrode 110 in the first trench region is 1.5 μm, and the width A of the first trench region is 50 μm;
the reflective electrode 110 has a thickness C of 1.5 μm in the first trench region and a width B of 6 μm in the second trench region.
Comparative example 1
The comparative example differs from example 1 in that: as shown in figure 5 of the drawings,
the present comparative example does not provide the reflective electrode 110 and the second insulating layer 111.
Comparative example 2
The comparative example differs from example 2 in that:
the infrared detector chip prepared in comparative example 1 was selected.
Comparative example 3
The comparative example differs from example 1 in that:
the thickness C of the reflective electrode 110 in the first trench region is 50nm, and the width A of the first trench region is 50 μm;
the reflective electrode 110 has a thickness C of 50nm in the first trench region and a width B of 6 μm in the second trench region.
When the infrared detector of the comparative example 1 is used, light rays sequentially penetrate through the epitaxial layers, and about 7% of the light rays are transmitted and not utilized by the detector under the wavelength of 1550nm although the thickness of the intrinsic layer reaches 3 microns; in the infrared detector chip of example 4, after the Au reflective electrode 110 with a thickness of 1.5 μm was added, the light was reflected back to the intrinsic layer again for secondary absorption utilization, and at 1550nm, the light was almost completely utilized and the transmittance was close to 0%. In contrast, in comparative example 3, the reflective electrode 110 has a thickness of 50nm, and the transmittance is reduced to 0.03% at the corresponding wavelength, but since the thickness thereof is smaller than that of the P electrode, it can only provide the reflective effect and does not play a role in assisting the alignment. Under the condition of high internal quantum efficiency, the light rays absorbed secondarily can provide about 7% of light response improvement amount, and under the same condition, the improvement amount of the detectivity is also improved by about 7%. FIG. 6 is a graph showing transmittance curves of the infrared detector chips in comparative example 1 and comparative example 3 for the infrared detector at a reference wavelength of 1550 nm.
In summary, in the infrared detector chip of the present invention, the epitaxial layer is grown on the growth substrate, and sequentially includes the buffer layer 102, the stop layer 103, the N-type contact layer 104, the absorption layer 105, and the P-type contact layer 106; a mesa epitaxial layer, the bottom of the mesa is an N-type contact layer 104; a patterned insulating passivation layer that leaks out portions of the N-type contact layer 104 and the P-type contact layer 106, respectively; negative and positive electrodes on the N-type contact layer 104 and the P-type contact layer 106, etc.; a patterned insulating layer over the negative electrode; and a reflective counter electrode on the insulating layer of the photosensitive region. Reflection counterpoint electrode can be with not absorbing complete infrared light reflection to photosensitive layer, thereby promote the photoresponse, simultaneously owing to there is the reflection effect, can optimize the attenuate with absorbed layer 105, thereby reduce growth cost, in addition when carrying out counterpoint welding with reading out circuit layer 113(ROIC), reflection counterpoint electrode provides supplementary counterpoint effect, can make chip and reading out circuit layer 113(ROIC) have from counterpoint effect, thereby reduce welding counterpoint degree of difficulty and cost.
While the embodiments of the present invention have been described in detail with reference to the specific embodiments, the present invention is not limited to the embodiments, and various changes can be made without departing from the spirit of the present invention within the knowledge of those skilled in the art. Furthermore, the embodiments of the present invention and the features of the embodiments may be combined with each other without conflict.

Claims (10)

1. The utility model provides an infrared detector chip, includes substrate layer (101), substrate layer (101) surface is equipped with the epitaxial layer, its characterized in that:
an N-type electrode (109), a P-type electrode (108) and a first insulating layer (107) are arranged on the surface of the epitaxial layer;
a reflective electrode (110) is arranged on the surface part of the first insulating layer (107);
the infrared detector chip sequentially comprises an N-type electrode area (I), a first groove area (II) and a pixel array from outside to inside;
the pixel array consists of a plurality of pixel areas (c) and a plurality of second isolation groove areas (c);
the pixel area (III) and the second isolation groove area (IV) are correspondingly arranged;
and a second insulating layer (111) is arranged on the partial region of the surface of the N-type electrode (109).
2. The infrared detector chip of claim 1, wherein: the reflective electrode (110) comprises a gold reflective electrode; preferably, the thickness (C) of the reflecting electrode (110) is more than or equal to that of the P-type electrode (108); preferably, the thickness (C) of the reflective electrode (110) is less than or equal to the width (A) of the first trench region (C); preferably, twice the thickness (C) of the reflective electrode (110) is < the width (B) of the second trench region (C).
3. The infrared detector chip of claim 1, wherein: the thickness of the P-type electrode (108) is 1000 nm-1500 nm.
4. The infrared detector chip of claim 1, wherein: the first insulating layer (107) and the second insulating layer (111) are made of SiNx insulating films independently; preferably, the thickness of the second insulating layer (111) is 300nm to 500 nm.
5. The infrared detector chip of claim 1, wherein: the P-type electrode (108) is sequentially provided with a Ti layer, a Pt layer and an Au layer from bottom to top; preferably, the N-type electrode (109) is a Ti layer, a Pt layer and an Au layer from bottom to top in sequence.
6. The infrared detector chip of claim 1, wherein: the epitaxial layer sequentially comprises a buffer layer (102), a stop layer (103), an N-type contact layer (104), an absorption layer (105) and a P-type contact layer (106) from bottom to top.
7. A method of fabricating an infrared detector chip as claimed in any one of claims 1 to 6, characterized in that: the method comprises the following steps:
s1, sequentially growing and forming the epitaxial layer and the first insulating layer (107) on the substrate;
s2, etching the first insulating layer (107) prepared in the step S1, and forming a P-type electrode groove on the partial surface area of the pixel area (c); forming an N-type electrode groove on a partial surface area of the N-type electrode area (I);
s3, growing a P-type electrode (108) on the P-type electrode groove formed in the step S2; growing an N-type electrode (109) in the N-type electrode groove;
s4, forming the second insulating layer (111) on the surface of the N-type electrode (109);
forming the reflective electrode (110) on a surface portion of the first insulating layer (107).
8. An infrared detector, characterized in that: the infrared detector comprises the infrared detector chip as set forth in any one of claims 1 to 6.
9. The infrared detector of claim 8, characterized in that: the surface of the infrared detector chip is also provided with a reading circuit layer (113); the bottom of the readout circuit layer (113) is provided with a plurality of cylindrical electrodes (112); the cylindrical electrodes (112) are in contact with the correspondingly arranged P-type electrodes (108) and the correspondingly arranged N-type electrodes (109).
10. The infrared detector of claim 9, wherein: the surface part of the N-type electrode (109) is in contact with the cylindrical electrode (112).
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