CN114497020A - Novel double-circuit optical coupling integrated circuit and plane type frame - Google Patents

Novel double-circuit optical coupling integrated circuit and plane type frame Download PDF

Info

Publication number
CN114497020A
CN114497020A CN202210236537.2A CN202210236537A CN114497020A CN 114497020 A CN114497020 A CN 114497020A CN 202210236537 A CN202210236537 A CN 202210236537A CN 114497020 A CN114497020 A CN 114497020A
Authority
CN
China
Prior art keywords
island
packaging body
isolation
light emitting
mosfets
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202210236537.2A
Other languages
Chinese (zh)
Inventor
袁野
张巧杏
全庆霄
王辉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuxi Haobang High Tech Co ltd
Original Assignee
Wuxi Haobang High Tech Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wuxi Haobang High Tech Co ltd filed Critical Wuxi Haobang High Tech Co ltd
Priority to CN202210236537.2A priority Critical patent/CN114497020A/en
Publication of CN114497020A publication Critical patent/CN114497020A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293—Organic, e.g. plastic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135—Double encapsulation or coating and encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838—Geometry or layout
    • H01L23/49844—Geometry or layout for devices being provided for in H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/165—Containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0203—Containers; Encapsulations, e.g. encapsulation of photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H01L33/54—Encapsulations having a particular shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H01L33/56—Materials, e.g. epoxy or silicone resin
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58—Optical field-shaping elements
    • H01L33/60—Reflective elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/78—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled
    • H03K17/785—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled controlling field-effect transistor switches
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Abstract

The invention relates to a novel double-path optical coupling integrated circuit and a planar frame, which comprise a planar frame, an inner packaging body, an outer packaging body, two light emitting pieces, two photoelectric receiving pieces and two groups of MOSFETs, wherein each light emitting piece, each photoelectric receiving piece and each MOSFET are arranged on the planar frame in the same plane, the light emitting pieces, the photoelectric receiving pieces and the MOSFETs correspond to each other one by one, the number of each group of MOSFETs is two, the two MOSFETs in the same group are arranged in front and back, the two light emitting pieces are arranged in front and back, the light emitting pieces are positioned on the left side of the photoelectric receiving pieces, the MOSFETs are positioned on the right side of the photoelectric receiving pieces, light paths are formed by the photoelectric pieces and the photoelectric receiving pieces through glue dispensing bodies, point glue bodies are coated and fixed through the inner packaging body, the outer packaging body is coated on the inner packaging body, the inner packaging body and the glue dispensing bodies form a concave reflecting curved surface, the color of the outer packaging body is black, the color of the inner packaging body is white, the color of the adhesive body is transparent.

Description

Novel double-circuit optical coupling integrated circuit and plane type frame
Technical Field
The invention relates to a novel double-path optical coupling integrated circuit and a planar frame.
Background
An optical coupler (Photo mos), also called a photoelectric coupler, includes a main control end and a controlled end, wherein the two ends are generally isolated from each other, and the main control end is also called an input end and is generally a low-power signal; and the controlled end is an output end and controls the on or off of the high-power load.
The input end of the photoelectric coupler is formed by semiconductor circuits such as a light emitting diode and a photosensitive transistor, and the input end of the photoelectric coupler triggers an MOSFET (metal oxide semiconductor field effect transistor) at the output end through an internal control circuit so as to conduct load current.
First, the photoelectric coupler compares the characteristic compared with the SSD (silicon controlled photoelectric coupler) of silicon controlled output
1. Can control tiny analog signals
2. AC/DC dual purpose
3. Good sensitivity
4. Small leakage current and bias voltage
Secondly, the prior art is characterized in
The existing products comprise products of manufacturers such as sharp and Toshiba, and the structure of the products is shown in figure 1:
as shown in fig. 1, the current optical coupler product adopts a three-dimensional packaging form, a light emitting tube core 101 in the three-dimensional packaging form is installed above, a light sensing device 102 in the three-dimensional packaging form is installed below 101, and the middle is filled with transparent silica gel 103 in the three-dimensional packaging form, so that a light path is ensured, and the light sensing device 102 in the three-dimensional packaging form below can receive sufficient luminous flux. Meanwhile, the transparent silica gel 103 with a three-dimensional packaging form and very good insulating property ensures necessary isolation voltage. Therefore, the mounting structure is a mounting form commonly used in the industry at present.
The three-dimensional packaging has the main defects that the production process is complex, two pairs of frame molds need to be opened, riveting needs to be performed by alignment operation during packaging, and the like, so that the production cost and the process difficulty are increased.
Disclosure of Invention
The invention aims to overcome the defects and provides a double-path optical coupling integrated circuit, a planar frame and a production method of the optical coupling integrated circuit.
The purpose of the invention is realized as follows:
a double-circuit optical coupling integrated circuit comprises a planar frame, an inner packaging body, an outer packaging body, two light emitting parts, two photoelectric receiving parts and two groups of MOSFETs, wherein the light emitting parts, the photoelectric receiving parts and the MOSFETs are arranged on the planar frame in the same plane, the light emitting parts, the photoelectric receiving parts and the MOSFETs correspond to each other one by one, the two MOSFETs in each group are arranged in front and back, the two light emitting parts are arranged in front and back, the light emitting parts are positioned on the left side of the photoelectric receiving parts, the MOSFETs are positioned on the right side of the photoelectric receiving parts, light paths are formed by the photoelectric parts and the photoelectric receiving parts through a glue dispensing body, a point glue body is coated and fixed through the inner packaging body, the outer packaging body is coated on the inner packaging body, the inner packaging body and the glue dispensing body form a downward concave reflecting curved surface, the color of the outer packaging body is black, the color of the inner packaging body is white, and the color of the glue dispensing body is transparent, the reflecting curved surface enables the light emitted by the light emitting piece to be fully reflected by the interface and received by the photoelectric receiver.
Preferably, the planar frame has 8 base islands, the first and second islands are used for mounting two light emitting elements, the third and fourth islands are used for mounting two photovoltaic receiving elements, and the fifth, sixth, seventh and eighth islands are used for mounting four MOSFETs.
Preferably, there is an isolation distance D between the light emitting element and the conductor region where the optoelectronic receiver is located, there is an isolation distance D between the first island and the third island, there is an isolation distance D between the second island and the fourth island, and D ranges from 0.35mm to 0.75 mm.
Preferably, first isolation grooves are formed in the fifth island and the sixth island, the seventh island and the eighth island, second isolation grooves are formed in the rear side of the first island and the rear side of the second island, two strip-shaped grooves are formed in each light path and are parallel to the front-rear direction, one strip-shaped groove is located in the right side of the first isolation groove and communicated with the first isolation groove, and the other strip-shaped groove is located in the left side of the second isolation groove and communicated with the second isolation groove.
Preferably, the length of the strip-shaped groove is D1, and the range of D1 is 0.6mm-1.2 mm.
Preferably, to prevent the discharge, the tips of the planar frame are chamfered, and the chamfer is set to be 2-8 °.
Preferably, the white encapsulant of the inner package has an absorption coefficient of less than 0.1 with respect to visible light.
Preferably, the inner packaging body is shaped as an oblate spheroid, the upper half section of an optical path formed by the oblate spheroid is an operating section, the thickness of the chip is H, the maximum distance from the surface of the chip to the dispensing is D2, and in order to meet the transmission requirement of the optical path, 0.5H < D2<5H needs to be met.
Preferably, the distance between the two optical paths is D3, and in order to avoid interference, 0.6mm < D3<1.2mm needs to be satisfied.
A production method of a double-path optical coupling integrated circuit is characterized by comprising the following steps:
a. frame preparation
Producing a planar frame; the planar frame is provided with 8 base islands which are respectively a first island, a second island, a third island, a fourth island, a fifth island, a sixth island, a seventh island and an eighth island, the distance between the first island and the second island and the distance between the third island and the fourth island are both D, the range of D is 0.35mm to 0.75mm, and the isolation voltage can be ensured to be more than 1500V to 5000V; the tips of the planar frame are all in a chamfer angle structure, and the chamfer angle is set to be 2-8 degrees;
b. chip mounting
Respectively installing two light emitting pieces on a first island and a second island on a planar frame, respectively installing two photoelectric receivers on a third island and a fourth island, and respectively installing four MOSFETs on a fifth island, a sixth island, a seventh island and an eighth island;
at the moment, the light-emitting piece is assembled in a plane and emits light perpendicular to the substrate, and the photoelectric receiver stops receiving optical signals;
c. bonding wire
d. Glue dispensing
An adhesive layer is formed between the first island and the third island and between the second island and the fourth island by covering insulating silica gel, and the insulating silica gel forms a spherical surface, so that a double-path optical path is established between the first island and the third island and between the second island and the fourth island, and optical signals in a plane can be transmitted;
in the step, the silica gel is used for dropping the silica gel with electrical insulation, an automatic matrix type glue dispenser is used for completely covering the surfaces of the four chips and the bonding wires, then the four chips are cured, the curing temperature is 25-150 ℃, the curing time is 1-24 hours, and the cured insulation gel forms a spherical surface, so that two paths of light paths are established between the first island and the third island, and between the second island and the fourth island, and the transmission of optical signals in a plane can be carried out;
e. one-step plastic package
The white packaging material is adopted for packaging to form the inner packaging body, only the light penetrating through the insulating glue can be reflected, and the light cannot be absorbed, so that the light transmission ratio is improved;
the packaging material takes epoxy resin and phenolic resin as main organic components, high-purity polycrystalline TiO2 is added into the packaging material, the content of the high-purity polycrystalline TiO2 accounts for 1-10% of the total weight, and the thickness of a plastic packaging body of an outer packaging body is not less than 0.5 mm.
F. Secondary plastic package
And the processed inner packaging body is packaged again by adopting black packaging materials, so that the reliability of the product is improved, and the performances of the product such as isolation voltage and the like are ensured.
The curing time is 120 seconds, and the curing temperature is 170-180 ℃.
A planar frame of a novel two-way optical coupling integrated circuit: the LED comprises 8 base islands, wherein the first island and the second island are used for mounting two light emitting parts, the third island and the fourth island are used for mounting two photoelectric receiving parts, and the fifth island, the sixth island, the seventh island and the eighth island are used for mounting four MOSFETs;
an isolation distance D is arranged between the first island and the third island, an isolation distance D is arranged between the second island and the fourth island, and the range of D is 0.35mm to 0.75 mm;
first isolation grooves are formed between the fifth island and the sixth island, and between the seventh island and the eighth island, second isolation grooves are formed in the rear side of the first island and the rear side of the second island, two strip-shaped grooves are formed in each light path, the strip-shaped grooves are parallel to the front and rear direction, one strip-shaped groove is formed in the two strip-shaped grooves in the same light path, is located on the right side of the first isolation groove and is communicated with the first isolation groove, the other strip-shaped groove is located on the left side of the second isolation groove and is communicated with the second isolation groove, the length of each strip-shaped groove is D1, and the range of D1 is 0.6mm-1.2 mm;
all tips in the planar frame are made into chamfer structures, and the chamfer angles are set to be 2-8 degrees;
the distance between the two optical paths is D3, and in order to avoid interference, 0.6mm < D3<1.2mm needs to be satisfied.
Compared with the prior art, the invention has the beneficial effects that:
the invention changes the traditional three-dimensional packaging structure into the existing plane packaging structure, and can control the change of the isolation distance D in the plane packaging structure, so that the plane packaging structure can operate under various working voltages, and avoids the phenomenon of point discharge, and in addition, by means of the arrangement of the transparent silica gel and the white plastic packaging body which are specially designed, the light emitted by the LED luminous tube establishes a light path in a plane, and is more easily received by the photoelectric receiving tube, the light transmission efficiency is improved, and the performance of the whole product is improved.
Drawings
Fig. 1 is a schematic diagram of a current optical coupler product in a three-dimensional packaging form.
Fig. 2 is a schematic view of a planar package of the present invention.
Fig. 3 is a schematic view of a flat type frame of the present invention.
FIG. 4 is a schematic view of step b of the production process of the present invention.
FIG. 5 is a schematic diagram of step d of the production process of the present invention.
FIG. 6 is a flow chart of the production method of the present invention.
Wherein:
a three-dimensional packaging type light emitting tube core 101, a three-dimensional packaging type photosensitive device 102, a three-dimensional packaging type transparent silica gel 103, a three-dimensional packaging type plastic packaging shell 104 and a three-dimensional packaging type electrode pin 105;
the planar frame 201, the first island 201.1, the second island 201.2, the third island 201.3, the fourth island 201.4, the fifth island 201.5, the sixth island 201.6, the seventh island 201.7, the eighth island 201.8, the inner package 202, the outer package 203, the light emitting element 204, the optical receiver 205, the MOSFET206, the glue body 207, the stripe groove 208, the first isolation groove 209, and the second isolation groove 210.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 2-6, the present invention relates to a dual-path optical coupling integrated circuit, which includes a planar frame 201 (hereinafter referred to as a lead frame), an inner package 202, an outer package 203, two light emitting devices 204, two optical receivers 205, and two sets of MOSFETs 206, wherein each light emitting device 204, each optical receiver 205, and each MOSFET206 are disposed on the planar frame 201, the light emitting devices 204, the optical receivers 205, and the MOSFETs 206 are in one-to-one correspondence, each set of MOSFETs 206 is two, the two MOSFETs 206 in the same set are disposed in front of and behind each other, the two light emitting devices 204 are disposed in front of and behind each other, the light emitting device 204 is located on the left side of the optical receiver 205, the MOSFETs 206 are located on the right side of the optical receiver 205, the light emitting devices 204 and the optical receivers 205 form a light path through a dot colloid 207, the dot colloid 207 is coated and fixed by the inner package 202, the outer package 203 is coated by the inner package 202, the inner package 202 and the dot colloid 207 form a downward concave reflective curved surface, the color of the outer packaging body 203 is black, the color of the inner packaging body 202 is white, the color of the point colloid 207 is transparent, the reflecting curved surface enables light rays emitted by the light emitting member 204 to be fully reflected by the interface and received by the photoelectric receiver 205, and the light receiving rate exceeds 99%.
The planar frame 201 is provided with 8 base islands, the first island 201.1 and the second island 201.2 are used for mounting two light emitting elements 204, the third island 201.3 and the fourth island 201.4 are used for mounting two photoreceiving elements 205, and the fifth island 201.5, the sixth island 201.6, the seventh island 201.7 and the eighth island 201.8 are used for mounting four MOSFETs 206.
The light emitting element 204 can be an LED or other light emitting chip; the photoelectric receiving element 205 can be a photoelectric receiving tube and/or an amplifying tube or other photosensitive wafer; the point colloid 207 is made of transparent insulating glue, and the inner packaging body 202 is made of white packaging material.
There is an isolation distance D between the first 201.1 and third 201.3 islands and an isolation distance D between the second 201.2 and fourth 201.4 islands, said D ranging from 0.35mm to 0.75 mm.
The magnitude of the isolation distance D determines the magnitude of the isolation voltage that can be sustained. While the isolation voltage mentioned in the circuit refers in particular to the isolation voltage at which the first 201.1 and the second 201.2 island are isolated from the other islands, respectively. The distance between the first island 201.1 and the second island 201.2 and the distance between the third island 201.3 and the fourth island 201.4 are both D, D is a key index of a design frame, the range of D is 0.35mm to 0.75mm, the general isolation distance is larger than 0.4 mm, according to the specific insulation parameters of the insulating silica gel adopted in the invention, the isolation voltage corresponding to the isolation distance of more than 0.35mm can reach more than 1500V, and if the isolation voltage is required to be more than 3000V, the isolation distance is required to be controlled to be more than 0.4 mm. In addition, in order to prevent the unexpected breakdown due to the tip discharge, all the tips in the plane type frame 201 are formed in a chamfered structure, and the angle of the chamfer is set to be between 2 ° and 8 °.
Table 1: isolation voltmeter
D Isolated voltage
0.35mm 1500V or more
0.4mm Over 3000V
0.45mm 3750V or more
0.55mm More than 4000V
0.75mm Above 5000V
When designing the isolation distance D, in addition to the necessary isolation voltage, the transmission problem of the optical path is also considered.
First isolation grooves 209 are formed between the fifth island 201.5 and the sixth island 201.6, and between the seventh island 201.7 and the eighth island 201.8, second isolation grooves 210 are formed in the rear side of the first island 201.1 and the rear side of the second island 201.2, two strip-shaped grooves 208 are formed in each optical path, the strip-shaped grooves 208 are parallel to the front-rear direction, one strip-shaped groove 208 is located on the right side of the first isolation groove 209 and communicated with the first isolation groove 209, the other strip-shaped groove 208 is located on the left side of the second isolation groove 210 and communicated with the second isolation groove 210 in the two strip-shaped grooves 208 on the same optical path, and the length of each strip-shaped groove 208 is D1.
Table 2: plastic packaging strength meter
D1 Plastic package strength
0.6mm 2kg or more
0.8mm 2.5kg or more
1mm Over 3kg
1.2mm 3.5kg or more
1.4mm 4kg or more
The plastic packaging strength is required to be 2kg-3.5kg, and as can be seen from Table 2, the range of D1 is 0.6mm-1.2mm
During the interior plastic envelope, interior packaging body 202 pours in bar groove 208, and interior packaging body 202 solidification back through the cooperation of interior packaging body 202 with bar groove 208 increases product plastic envelope cohesion, improves the reliability.
The optical path established in the insulating glue conforms to the optical reflection principle, and for this reason, the following characteristics are required:
1. the point colloid 207 is externally sealed with a white packaging material for reflecting light, and if a dark or black packaging material is used, the light emitted by the light-emitting member 204 is absorbed, which affects the normal transmission of light, and for this reason, the white packaging material is a key point of the patent, and the absorption coefficient of the white packaging material to visible light is less than 0.1.
2. The shape of the insulating glue is very important, generally, the insulating glue is a spherical surface, an ellipsoid or other smooth curved surfaces, and the smooth curved surfaces are very important for the light path, so that the size and the shape of the glue need to be reasonably controlled in the glue dripping process; meanwhile, after the glue is dripped, the silica gel needs to be placed at a certain temperature for a period of time to be solidified, so that the shape of the silica gel is ensured. The temperature is 25-150 ℃ and the standing time is 1-24 hours. Preferably, the curing time is 1 hour to 2 hours, and the curing temperature is 120-150 ℃.
3. There is a certain relation between the size of the inner package 202 and D2, generally speaking, the shape of the insulation paste is a sphere under an ideal state, but the sphere will have a certain collapse in an actual production process, after the collapse, the insulation paste forms a flat sphere, the upper half section of a light path formed by the flat sphere is a working section, the thickness of the chip is H, the radius of the flat sphere in a plane is R, at this time, H < R, and the maximum distance from the surface of the chip to the dispensing is D2.
Table 3: luminous flux
Figure BDA0003540135710000061
Figure BDA0003540135710000071
The luminous flux requirement is greater than 20LM, and it can be seen from table 3 that 0.5H < D2<5H needs to be satisfied in order to satisfy the transmission requirement of the optical path.
The planar frame 201 is illustrated as a single unit, and many lead frame structures are required to be connected in an array for mass production. The arrayed structure of the array includes crossing frames, and can be non-crossing frames. The array of frames may be more than two, including more.
Through a dispensing process, the silicone gel is dropped on the surface of the silicon wafer, after cooling and solidification, a smooth curved surface dispenser 207 is formed above the planar frame 201, preferably, the smooth curved surface is a spherical curved surface or an ellipsoidal curved surface, and a reliable optical path is established between the light emitting element 204 and the optical receiver 205 by the formation of the dispenser 207. The silicone gel does not actually exist above the flat frame 201, and cannot fall down from the gap to below the flat frame 201 due to the surface tension of the silicone gel.
The inner packaging body 202 is arranged outside the point colloid 207, and the traditional packaging material is black, has the function of light absorption and is not beneficial to the transmission of optical signals, so that the white packaging material is adopted in the invention, and can effectively reflect the light rays transmitted from the surface of the inner packaging body 202 and reflect the light rays back to the inner packaging body 202, thereby ensuring sufficient luminous flux.
As can be seen from the schematic diagram of the packaged circuit formed after the lead frame packaging is finished, the working principle of the circuit is as follows: when a voltage is applied to the light emitting element 204, the light emitting element 204 emits light, and the light is transmitted through the optical path of the silicon gel, received and amplified by the optical receiver 205, and used for driving the gate of the power device MOSFET206 mounted on the other island. The anode and cathode of the power device MOSFET206 are connected to an external circuit, such that the switching between the anode and cathode of the power device MOSFET206 is controlled by the control electrode of the power device. Generally speaking, the purpose of controlling the power device is achieved through the control of the light-emitting element 204.
The main technical indexes of the circuit are that the packaging circuit is provided with 1 pin, 2 pins, 3 pins and 4 pins on one side and 5 pins, 6 pins, 7 pins and 8 pins on the other side;
the voltage resistance between the 6 pins and the 8 pins is 600V-800V, so that the requirement of household appliances is met;
the conduction current between the 6 pin and the 8 pin is 0.5 to 1.5 amperes;
the withstand voltage between the input cathodes 1, 2, 3 and 4 and the outputs 5, 6, 7 and 8 is 1500V-6000V; the requirement of isolation voltage in safety regulations is met.
The distance between the two optical paths is D3, and in order to avoid interference, 0.6mm < D3<1.2mm needs to be satisfied.
A production method of a double-path optical coupling integrated circuit comprises the following steps:
a. frame preparation
Performing production of the flat-type frame 201; the planar frame 201 has 8 base islands: a first 201.1, a second 201.2, a third 201.3, a fourth 201.4, a fifth 201.5, a sixth 201.6, a seventh 201.7 and an eighth 201.8 island, respectively. The distance between the first island 201.1 and the second island 201.2 and the distance between the third island 201.3 and the fourth island 201.4 are both D, the range of D is 0.35mm to 0.75mm, and the isolation voltage can be ensured to be more than 1500V to 6000V; all tips in the planar frame 201 are made into a chamfer structure, and the chamfer is set to be 2-8 degrees;
b. chip mounting
Two light emitting elements 204 are respectively mounted on the first island 201.1 and the second island 201.2 of the planar-type frame 201, two photoreceivers 205 are respectively mounted on the third island 201.3 and the fourth island 201.4, and four MOSFETs 206 are respectively mounted on the fifth island 201.5, the sixth island 201.6, the seventh island 201.7 and the eighth island 201.8;
at this time, the light emitting element 204 is a planar assembly, and emits light perpendicular to the substrate, and the optical receiver 205 cannot receive the optical signal;
c. bonding wire
d. Glue dispensing
An adhesive layer is formed between the first island 201.1 and the third island 201.3, and between the second island 201.2 and the fourth island 201.4 by covering with insulating silica gel, and the insulating adhesive body 207 forms a spherical surface, so that a dual-path optical path is established between the first island 201.1 and the third island 201.3, and between the second island 201.2 and the fourth island 201.4, and the transmission of optical signals in a plane can be carried out;
in the step, the silica gel is used for dropping the silica gel with electrical insulation, an automatic matrix type glue dispenser is used for completely covering the surfaces of the four chips and the bonding wires, then the four chips are cured, the curing temperature is 25-150 ℃, the curing time is 1-24 hours, and the cured insulation glue forms a spherical surface, so that two paths of light paths are established between the first island 201.1 and the third island 201.3, and between the second island 201.2 and the fourth island 201.4, and the transmission of optical signals in a plane can be carried out;
e. one-step plastic package
The inner packaging body 202 is formed by packaging with white packaging materials, and only plays a role in reflecting light penetrating through the insulating glue, and the light cannot be absorbed, so that the light transmission ratio is improved;
the packaging material takes epoxy resin and phenolic resin as main organic components, high-purity polycrystalline TiO2 is added into the packaging material, the content of the high-purity polycrystalline TiO2 accounts for 1-10% of the total weight, and the thickness of a plastic packaging body of the outer packaging body 203 is not less than 0.5 mm.
The curing time is 120 seconds, and the curing temperature is 170-180 ℃.
F. Secondary plastic package
The processed inner packaging body 202 is packaged again by using black packaging material, so that the reliability of the product is improved, and the performances of the product such as isolation voltage and the like are ensured.
A planar frame of a novel two-way optical coupling integrated circuit: the first island 201.1 and the second island 201.2 are used for mounting two light emitting elements 204, the third island 201.3 and the fourth island 201.4 are used for mounting two photoelectric receiving elements 205, and the fifth island 201.5, the sixth island 201.6, the seventh island 201.7 and the eighth island 201.8 are used for mounting four MOSFETs 206;
there is an isolation distance D between the first 201.1 and third 201.3 islands, and an isolation distance D between the second 201.2 and fourth 201.4 islands, said D ranging from 0.35mm to 0.75 mm;
first isolation grooves 209 are formed between the fifth island 201.5 and the sixth island 201.6, and between the seventh island 201.7 and the eighth island 201.8, second isolation grooves 210 are formed on the rear side of the first island 201.1 and the rear side of the second island 201.2, two strip-shaped grooves 208 are formed on each optical path, the strip-shaped grooves 208 are parallel to the front-rear direction, one strip-shaped groove 208 is located on the right side of the first isolation groove 209 and communicated with the first isolation groove 209, the other strip-shaped groove 208 is located on the left side of the second isolation groove 210 and communicated with the second isolation groove 210, the length of the strip-shaped groove 208 is D1, and the range of D1 is 0.6mm-1.2 mm;
all tips in the planar frame 201 are made into a chamfer structure, and the chamfer is set to be 2-8 degrees;
the distance between the two optical paths is D3, and in order to avoid interference, 0.6mm < D3<1.2mm needs to be satisfied.
The above is only a specific application example of the present invention, and the protection scope of the present invention is not limited in any way. All the technical solutions formed by equivalent transformation or equivalent replacement fall within the protection scope of the present invention.

Claims (10)

1. A novel double-circuit optical coupling integrated circuit is characterized in that: the LED packaging structure comprises a planar frame (201), an inner packaging body (202), an outer packaging body (203), two light emitting parts (204), two photoelectric receiving parts (205) and two groups of MOSFETs (206), wherein the light emitting parts (204), the photoelectric receiving parts (205) and the MOSFETs (206) are arranged on the planar frame (201) in the same plane, the light emitting parts (204), the photoelectric receiving parts (205) and the MOSFETs (206) are in one-to-one correspondence, the number of the MOSFETs (206) in each group is two, the two MOSFETs (206) in the same group are arranged in front of and behind, the two light emitting parts (204) are arranged in front of and behind, the light emitting parts (204) are positioned on the left side of the photoelectric receiving parts (205), the MOSFETs (206) are positioned on the right side of the photoelectric receiving parts (205), the light emitting parts (204) and the photoelectric receiving parts (205) form a light passage through point colloid (207), the point colloid (207) is coated and fixed through the inner packaging body (202), and the outer packaging body (203) is coated on the inner packaging body (202), the inner packaging body (202) and the point colloid (207) form a downward concave reflecting curved surface, the color of the outer packaging body (203) is black, the color of the inner packaging body (202) is white, the color of the point colloid (207) is transparent, and the reflecting curved surface enables light rays emitted by the light emitting piece (204) to be received by the photoelectric receiver (205) through the reflection of the interface.
2. A novel two-way optocoupler integrated circuit according to claim 1, characterized in that: the planar frame (201) is provided with 8 base islands, the first island (201.1) and the second island (201.2) are used for mounting two light emitting elements (204), the third island (201.3) and the fourth island (201.4) are used for mounting two photoelectric receiving elements (205), and the fifth island (201.5), the sixth island (201.6), the seventh island (201.7) and the eighth island (201.8) are used for mounting four MOSFETs (206).
3. A novel two-way optocoupler integrated circuit according to claim 2, characterized in that: there is an isolation distance D between the first (201.1) and third (201.3) islands, and an isolation distance D between the second (201.2) and fourth (201.4) islands, said D ranging from 0.35mm to 0.75 mm.
4. A novel two-way optocoupler integrated circuit according to claim 2, characterized in that: the island structure is characterized in that a first isolation groove (209) is arranged between the fifth island (201.5) and the sixth island (201.6) and a seventh island (201.7) and an eighth island (201.8), a second isolation groove (210) is arranged on the rear side of the first island (201.1) and the rear side of the second island (201.2), two strip-shaped grooves (208) are arranged on each light path, the strip-shaped grooves (208) are parallel to the front and rear direction, one strip-shaped groove (208) is arranged on the right side of the first isolation groove (209) and communicated with the first isolation groove (209), the other strip-shaped groove (208) is arranged on the left side of the second isolation groove (210) and communicated with the second isolation groove (210), the length of the strip-shaped groove (208) is D1, and the range of D1 is 0.6mm-1.2 mm.
5. A novel two-way optocoupler integrated circuit according to claim 1, characterized in that: all tips in the planar frame (201) are made into a chamfer structure, and the chamfer is set to be 2-8 degrees.
6. A novel dual-path optical coupler integrated circuit according to claim 1, wherein: the white packaging material of the outer packaging body (203) has an absorption coefficient of less than 0.1 for visible light.
7. A novel two-way optocoupler integrated circuit according to claim 1, characterized in that: the inner packaging body (202) is shaped as an oblate spheroid, the upper half section of an optical path formed by the oblate spheroid is a working section, the thickness of a chip is H, the highest distance from the surface of the chip to dispensing is D2, and the requirement that 0.5H is less than D2 and less than 5H is met.
8. A novel two-way optocoupler integrated circuit according to claim 1, characterized in that: the distance between the two optical paths is D3, and in order to avoid interference, 0.6mm < D3<1.2mm needs to be satisfied.
9. A production method of a double-path optical coupling integrated circuit is characterized by comprising the following steps:
a. frame preparation
Carrying out the production of the planar frame (201); the planar frame (201) is provided with 8 base islands which are a first island (201.1), a second island (201.2), a third island (201.3), a fourth island (201.4), a fifth island (201.5), a sixth island (201.6), a seventh island (201.7) and an eighth island (201.8), wherein the distance between the first island (201.1) and the second island (201.2) and the distance between the third island (201.3) and the fourth island (201.4) are both D, the range of D is 0.35mm to 0.75mm, and the isolation voltage is guaranteed to be more than 1500V to 5000V; all tips in the planar frame (201) are made into a chamfer angle structure, and the chamfer angle is set to be 2-8 degrees;
b. chip mounting
Mounting two light emitting elements (204) on a first island (201.1) and a second island (201.2) on a planar frame (201), respectively, mounting two photoreceivers (205) on a third island (201.3) and a fourth island (201.4), respectively, mounting two sets of MOSFETs (206) on a fifth island (201.5), a sixth island (201.6), a seventh island (201.7) and an eighth island (201.8), respectively;
the light emitting piece (204) is in plane assembly, light is emitted perpendicular to the substrate, and the photoelectric receiving piece (205) stops receiving the light signal;
c. bonding wire
d. Glue dispensing
An adhesive layer is formed between the first island (201.1) and the third island (201.3) and between the second island (201.2) and the fourth island (201.4) by covering insulating silica gel, and the insulating silica gel forms a spherical surface, so that a dual-path optical path is established between the first island (201.1) and the third island (201.3) and between the second island (201.2) and the fourth island (201.4), and the transmission of optical signals in a plane can be carried out;
in the step, the silica gel is used for dropping the silica gel with electrical insulation, an automatic matrix type glue dispenser is used for completely covering the surfaces of the four chips and the bonding wires, then the four chips are cured, the curing temperature is 25-150 ℃, the curing time is 1-24 hours, and the cured insulation glue forms a spherical surface, so that two paths of light paths are established between the first island (201.1) and the third island (201.3), and between the second island (201.2) and the fourth island (201.4) for transmitting optical signals in a plane;
e. one-step plastic package
The white packaging material is adopted for packaging to form an inner packaging body (202), and the light penetrating through the insulating glue only has a reflection effect and cannot be absorbed, so that the light transmission ratio is improved;
the packaging material takes epoxy resin and phenolic resin as main organic components, high-purity polycrystalline TiO2 is added into the packaging material, the content of the high-purity polycrystalline TiO2 accounts for 1-10% of the total weight, and the thickness of a plastic packaging body of an outer packaging body (203) is not less than 0.5 mm.
F. Secondary plastic package
And the processed inner packaging body (202) is packaged again by adopting black packaging material, so that the reliability of the product is improved, and the performances of the product such as isolation voltage and the like are ensured.
The curing time is 120 seconds, and the curing temperature is 170-180 ℃.
10. The utility model provides a novel two-way opto-coupler integrated circuit's planar frame which characterized in that: comprising 8 base islands, the first (201.1) and second (201.2) islands being intended to mount two light emitting elements (204), the third (201.3) and fourth (201.4) islands being intended to mount two photoreceivers (205), the fifth (201.5), sixth (201.6), seventh (201.7) and eighth (201.8) islands being intended to mount four MOSFETs (206);
-an isolation distance D between said first (201.1) and third (201.3) islands, an isolation distance D between said second (201.2) and fourth (201.4) islands, said D ranging from 0.35mm to 0.75 mm;
first isolation grooves (209) are arranged between the fifth island (201.5) and the sixth island (201.6) and between the seventh island (201.7) and the eighth island (201.8), second isolation grooves (210) are arranged on the rear sides of the first island (201.1) and the second island (201.2), two strip-shaped grooves (208) are arranged on each optical path, the strip-shaped grooves (208) are parallel to the front-back direction, one strip-shaped groove (208) is positioned on the right side of the first isolation groove (209) and communicated with the first isolation groove (209), the other strip-shaped groove (208) is positioned on the left side of the second isolation groove (210) and communicated with the second isolation groove (210), the length of the strip-shaped groove (208) is D1, and the range of D1 is 0.6mm-1.2 mm;
all tips in the planar frame (201) are made into a chamfer angle structure, and the chamfer angle is set to be 2-8 degrees;
the distance between the two optical paths is D3, and in order to avoid interference, 0.6mm < D3<1.2mm needs to be satisfied.
CN202210236537.2A 2022-03-10 2022-03-10 Novel double-circuit optical coupling integrated circuit and plane type frame Pending CN114497020A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210236537.2A CN114497020A (en) 2022-03-10 2022-03-10 Novel double-circuit optical coupling integrated circuit and plane type frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210236537.2A CN114497020A (en) 2022-03-10 2022-03-10 Novel double-circuit optical coupling integrated circuit and plane type frame

Publications (1)

Publication Number Publication Date
CN114497020A true CN114497020A (en) 2022-05-13

Family

ID=81485346

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210236537.2A Pending CN114497020A (en) 2022-03-10 2022-03-10 Novel double-circuit optical coupling integrated circuit and plane type frame

Country Status (1)

Country Link
CN (1) CN114497020A (en)

Similar Documents

Publication Publication Date Title
US7667223B2 (en) Solid-state optical device
JP5104490B2 (en) Light emitting device and manufacturing method thereof
JP4055373B2 (en) Method for manufacturing light emitting device
CN101681962B (en) Semiconductor light-emitting device
EP2244396B1 (en) Optocoupler
US7276739B2 (en) Low thermal resistance light emitting diode
US8172632B2 (en) Method of making white LED package structure having a silicon substrate
US8283675B2 (en) Light emitting device
EP3327803A1 (en) Semiconductor device package
KR20080049828A (en) Light emitting device
JPWO2002089219A1 (en) Light emitting device
CN107293535B (en) LED chip structure based on flip-chip packaging
CN216958030U (en) Novel double-circuit optical coupling integrated circuit and plane type frame
JP2009004659A (en) Light emitting device
CN109686731A (en) A kind of opto-coupler chip SSR integrated circuit and plane frame
CN114497020A (en) Novel double-circuit optical coupling integrated circuit and plane type frame
CN209487506U (en) A kind of opto-coupler chip SSR integrated circuit and plane frame
CN106784258B (en) Wafer-level packaging LED
CN113826201B (en) LED luminous device
CN102130270B (en) White LED luminous device
CN212848471U (en) Small-angle light-emitting device
KR20190049506A (en) Light emitting device package and lighting apparatus having thereof
CN210628307U (en) Combined type opto-coupler encapsulation
CN216751705U (en) Light MOS relay with interference killing feature
CN112397495B (en) High-sensitivity miniaturized photoelectric coupler and high-sensitivity processing method thereof

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination