CN114496988A - Rewiring packaging structure of brain wave processing system and manufacturing method thereof - Google Patents
Rewiring packaging structure of brain wave processing system and manufacturing method thereof Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5386—Geometry or layout of the interconnection structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76895—Local interconnects; Local pads, as exemplified by patent document EP0896365
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5383—Multilayer substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/162—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits the devices being mounted on two or more different substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
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Abstract
The invention relates to the technical field of integrated circuit packaging, and particularly discloses a rewiring packaging structure of a brain wave processing system, which comprises: the packaging structure comprises a first wiring layer packaging body, a second wiring layer packaging body, an active device structure layer, a passive device structure layer, a first molding structure and a second molding structure; the passive device structure layer is arranged on the first wiring layer packaging body, and the first molding structure is arranged on the first wiring layer packaging body and wraps the passive device structure layer; the second wiring layer packaging body is arranged on the surface, away from the first wiring layer packaging body, of the first molding structure; the active device structure layer is arranged on the second wiring layer packaging body, and the second molding structure is arranged on the second wiring layer packaging body and covers the active device structure layer. The invention also discloses a manufacturing method of the rewiring packaging structure of the brain wave processing system. The rewiring packaging structure of the brain wave processing system can improve the integration level and reduce the loss.
Description
Technical Field
The invention relates to the technical field of integrated circuit packaging, in particular to a rewiring packaging structure of a brain wave processing system and a manufacturing method of the rewiring packaging structure of the brain wave processing system.
Background
At present, most circuits for producing brain wave processing systems are integrated on a Printed Circuit Board (PCB) Board by a traditional method, and each chip on the PCB Board is manufactured by one-time substrate through such a process, which results in low system integration level, large size and high cost. Therefore, the size of the product can be effectively reduced by adopting a high-integration packaging mode, and if all devices in the brain wave processing system are arranged on the same layer during packaging, if detection is problematic after final completion, the cost loss is large.
Therefore, it is an urgent technical problem to be solved by those skilled in the art to provide a rewiring package structure of a brain wave processing system with high integration and low loss.
Disclosure of Invention
The invention provides a rewiring packaging structure of a brain wave processing system and a manufacturing method of the rewiring packaging structure of the brain wave processing system, and solves the problem of low integration level in the related technology.
As a first aspect of the present invention, there is provided a rewiring package structure of a brain wave processing system, comprising:
the packaging structure comprises a first wiring layer packaging body, a second wiring layer packaging body, an active device structure layer, a passive device structure layer, a first molding structure and a second molding structure;
the passive device structure layer is arranged on the first wiring layer packaging body and connected with the first wiring layer packaging body through a first metal structure, the first molding structure is arranged on the first wiring layer packaging body and wraps the passive device structure layer, and the passive device structure layer comprises passive devices in the electroencephalogram signal processing module;
the second wiring layer packaging body is arranged on the surface, away from the first wiring layer packaging body, of the first molding structure and is connected with the first wiring layer packaging body through a first connecting structure located in the first molding structure;
the active device structure layer is arranged on the second wiring layer packaging body and connected with the second wiring layer packaging body through a second metal structure, the second molding structure is arranged on the second wiring layer packaging body and wraps the active device structure layer, and the active device structure layer comprises an active device in the electroencephalogram signal processing module;
the first wiring layer packaging body comprises a first packaging body structure and at least two layers of rewiring layers, the periphery of each two adjacent layers of rewiring layers and the periphery of each layer of rewiring layers are all covered by the first packaging body structure, a second connecting structure is arranged in the first packaging body structure between each two adjacent layers of rewiring layers, each two adjacent layers of rewiring layers are connected through the second connecting structure, and a third metal structure is arranged on the surface, away from the passive device structure layer, of the first wiring layer packaging body;
the second wiring layer packaging body comprises a second packaging body structure and at least one layer of rewiring layer, and the periphery of each layer of rewiring layer is wrapped by the second packaging body structure.
Further, the first wiring layer packaging body comprises three rewiring layers which are sequentially arranged at intervals, and a first passivation layer is formed on the first packaging body structure between every two adjacent rewiring layers.
Further, the second connection structure comprises a first through hole arranged in the first passivation layer and metal filled in the first through hole, and the first through hole is connected with the redistribution layers of every two adjacent layers.
Further, the first metal structure comprises a second through hole and a first solder ball arranged in the second through hole, the second through hole is arranged in a first passivation layer of the first packaging body structure close to the passive device structure layer, and the second through hole is communicated with the passive device structure layer and a rewiring layer close to the passive device structure layer.
Further, the second wiring layer package body comprises a redistribution layer, and a second passivation layer is formed on the second package body structure wrapping the redistribution layer.
Further, the second metal structure comprises a third through hole and a second solder ball arranged in the third through hole, the third through hole is arranged in the second passivation layer, and the third through hole is communicated with the active device structure layer and a redistribution layer in the second wiring layer packaging body.
Further, the third metal structure includes a third solder ball.
Further, the first connection structure includes a fourth via disposed in the first molding structure and a metal filled in the fourth via, and the fourth via connects the first wiring layer package and the second wiring layer package.
As another aspect of the present invention, there is provided a method of fabricating a rewiring package structure of a brain wave processing system for fabricating the rewiring package structure of the brain wave processing system as described above, wherein the method includes:
providing a temporary carrier plate;
sequentially forming a first wiring layer packaging body, a passive device structure layer, a first molding structure, a second wiring layer packaging body, an active device structure layer and a second molding structure on the temporary support plate, wherein the passive device structure layer is arranged on the first wiring layer packaging body and is connected with the first wiring layer packaging body through a first metal structure, the first molding structure is arranged on the first wiring layer packaging body and covers the passive device structure layer, and the passive device structure layer comprises a passive device in an electroencephalogram signal processing module; the second wiring layer packaging body is arranged on the surface, away from the first wiring layer packaging body, of the first molding structure and is connected with the first wiring layer packaging body through a first connecting structure located in the first molding structure; the active device structure layer is arranged on the second wiring layer packaging body and connected with the second wiring layer packaging body through a second metal structure, the second molding structure is arranged on the second wiring layer packaging body and wraps the active device structure layer, and the active device structure layer comprises an active device in the electroencephalogram signal processing module; the first wiring layer packaging body comprises a first packaging body structure and at least two layers of rewiring layers, the space between every two adjacent layers of rewiring layers and the periphery of each layer of rewiring layers are covered by the first packaging body structure, a second connecting structure is arranged in the first packaging body structure between every two adjacent layers of rewiring layers, and every two adjacent layers of rewiring layers are connected through the second connecting structure; the second wiring layer packaging body comprises a second packaging body structure and at least one layer of rewiring layer, and the periphery of each layer of rewiring layer is wrapped by the second packaging body structure;
and removing the temporary carrier plate, and forming a third metal structure on the surface of the first wiring layer packaging body deviating from the passive device structure layer.
Further, the first wiring layer package body includes three redistribution layers arranged at intervals in sequence, a first package body structure between every two adjacent redistribution layers forms a first passivation layer, and forming a first wiring layer package body on the temporary carrier plate includes:
copper is coated on the temporary carrier plate through a sputtering process, and a first rewiring layer is formed through exposure and development after the copper is coated;
packaging on the first redistribution layer to form a first layer in a first passivation layer;
laser drilling is carried out on the first layer in the first passivation layer to form a first through hole in the first layer, wherein the first through hole can expose the line node of the first redistribution layer;
filling metal in the first through hole in the first layer, and manufacturing a second rewiring layer on the metal of the first through hole in the first layer;
packaging on the second rewiring layer to form a second layer in the first passivation layer;
laser drilling is carried out on the second layer in the first passivation layer to form a first through hole in the second layer, wherein the first through hole can expose the line node of the second redistribution layer;
filling metal in the first through hole in the second layer, and manufacturing a third redistribution layer on the metal of the first through hole in the second layer;
molding the peripheries and the surfaces of the first rewiring layer, the second rewiring layer and the third rewiring layer to obtain a first packaging structure;
forming a second through hole capable of exposing the line node of the third redistribution layer on the surface of the first package structure, which is away from the temporary carrier plate, and arranging a first solder ball in the second through hole;
sequentially forming a passive device structure layer and a first molding structure on the first wiring layer package, including:
arranging a passive device in the electroencephalogram signal processing module at the position of a line node of the third wiring layer, and performing pre-bonding and reflow processing to obtain a passive device structure layer;
performing molding bottom filling treatment on the passive device structure layer to obtain a first molding structure;
the second wiring layer package comprises a rewiring layer, a second passivation layer is formed by a second package structure covering the rewiring layer, and a second wiring layer package is formed on the first molding structure, and the second wiring layer package comprises:
laser drilling is carried out on the first molding structure to form a fourth through hole capable of exposing the line node of the third redistribution layer;
filling metal into the fourth through hole, and manufacturing a fourth heavy wiring layer on the fourth through hole filled with the metal;
packaging the fourth heavy wiring layer to form a second passivation layer;
forming a third through hole capable of exposing a line node of the fourth heavy wiring layer on the surface, away from the fourth heavy wiring layer, of the second passivation layer, and arranging a second solder ball in the third through hole;
forming an active device structure layer and a second molding structure on the second wiring layer package in sequence, including:
arranging an active device in the electroencephalogram signal processing module at the position of a line node of the fourth multiple wiring layer, and performing pre-bonding and reflow processing to obtain an active device structural layer;
and carrying out molding bottom filling treatment on the active device structure layer to obtain a second molding structure.
According to the rewiring packaging structure of the brain wave processing system, the devices required by the brain wave signal processing module are integrally arranged on the first wiring layer packaging body and the second wiring layer packaging body, so that the packaging structure with high integration level is formed, and the first wiring layer packaging body comprises at least two rewiring layers, and the second wiring layer packaging body comprises at least one rewiring layer, so that the size of the packaging structure can be effectively reduced, and the cost of the packaging structure is reduced; in addition, the passive device and the active device in the electroencephalogram signal processing module are arranged separately, the passive device is arranged on the first wiring layer packaging body, and the active device is arranged on the second wiring layer packaging body.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
fig. 1 is a schematic diagram of a rewiring package structure of a brain wave processing system according to the present invention.
Fig. 2 is a schematic distribution diagram of active devices in the electroencephalogram signal processing module provided by the invention.
Fig. 3 is a schematic distribution diagram of passive devices in the electroencephalogram signal processing module provided by the invention.
Fig. 4 is a schematic structural diagram of fabricating a first redistribution layer according to the present invention.
Fig. 5 is a schematic structural diagram of a first layer in the first passivation layer according to the present invention.
Fig. 6 is a schematic structural diagram of fabricating a first via in a first layer according to the present invention.
Fig. 7 is a schematic structural diagram of fabricating a second redistribution layer and a second layer in the first passivation layer according to the present invention.
Fig. 8 is a schematic structural diagram of fabricating a third redistribution layer, a third layer in the first passivation layer, a second via, and a first via in the third layer according to the present invention.
Fig. 9 is a schematic structural diagram of the structure layer for fabricating a passive device according to the present invention.
Fig. 10 is a schematic structural diagram of a first molding structure according to the present invention.
Fig. 11 is a schematic structural diagram of fabricating a fourth redistribution layer and a second passivation layer according to the present invention.
Fig. 12 is a schematic structural diagram of the active device structure layer and the second molding structure provided in the present invention.
Detailed Description
It should be noted that the embodiments and features of the embodiments may be combined with each other without conflict. The present invention will be described in detail below with reference to the accompanying drawings in conjunction with embodiments.
In order to make those skilled in the art better understand the technical solution of the present invention, the technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It should be understood that the data so used may be interchanged as appropriate in order to facilitate the embodiments of the invention described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
In the present embodiment, there is provided a rewiring package structure of a brain wave processing system, and fig. 1 is a schematic structural view of the rewiring package structure of the brain wave processing system according to an embodiment of the present invention, as shown in fig. 1, including:
a first wiring layer package 100, a second wiring layer package 200, an active device structure layer 300, a passive device structure layer 400, a first molding structure 500, and a second molding structure 600;
the passive device structure layer 400 is disposed on the first wiring layer package body 100 and connected to the first wiring layer package body 100 through a first metal structure 130, the first molding structure 500 is disposed on the first wiring layer package body 100 and covers the passive device structure layer 400, wherein the passive device structure layer 400 includes a passive device in an electroencephalogram signal processing module;
the second wiring layer package 200 is disposed on a surface of the first molding structure 500 away from the first wiring layer package 100, and is connected to the first wiring layer package 100 through a first connection structure 510 located in the first molding structure 500;
the active device structure layer 300 is disposed on the second wiring layer package 200, and is connected to the second wiring layer package 200 through a second metal structure 230, the second molding structure 600 is disposed on the second wiring layer package 200 and covers the active device structure layer 300, wherein the active device structure layer 300 includes an active device in an electroencephalogram signal processing module;
the first wiring layer package body 100 comprises a first package body structure 110 and at least two redistribution layers, the periphery of each two adjacent redistribution layers and the periphery of each redistribution layer are all covered by the first package body structure 110, a second connection structure 140 is arranged in the first package body structure 110 between each two adjacent redistribution layers, each two adjacent redistribution layers are connected through the second connection structure 140, and a third metal structure 700 is arranged on the surface of the first wiring layer package body 100, which is far away from the passive device structure layer 400;
the second wiring layer package 200 includes a second package structure 210 and at least one redistribution layer, and the periphery of each redistribution layer is covered by the second package structure 210.
According to the rewiring packaging structure of the brain wave processing system, the devices required by the brain wave signal processing module are integrally arranged on the first wiring layer packaging body and the second wiring layer packaging body, so that the packaging structure with high integration level is formed, and the first wiring layer packaging body comprises at least two rewiring layers, and the second wiring layer packaging body comprises at least one rewiring layer, so that the size of the packaging structure can be effectively reduced, and the cost of the packaging structure is reduced; in addition, the passive device and the active device in the electroencephalogram signal processing module are arranged separately, the passive device is arranged on the first wiring layer packaging body, and the active device is arranged on the second wiring layer packaging body.
It should be understood that, in the embodiment of the present invention, the electroencephalogram signal processing module may specifically include a main control module, a sensor module, a communication module, and a power module, where the active device may specifically include devices such as a main control IC and a power IC, and the passive device may specifically include devices such as a resistor and a capacitor, and may also be understood as a peripheral circuit structure in which the passive device is a main control IC.
Fig. 2 is a schematic diagram showing a specific device layout of an active device, and fig. 3 is a schematic diagram showing a specific device layout of a passive device.
Specifically, in the embodiment of the present invention, the first wiring layer package 100 includes the three redistribution layers 120, and the second wiring layer package 200 includes the one redistribution layer 220.
As shown in fig. 1, the first wiring layer package 100 includes three redistribution layers 120 arranged at intervals in sequence, and the first package structure 110 between every two adjacent redistribution layers forms a first passivation layer.
Specifically, the second wiring layer package 200 includes a redistribution layer 220, and the second package structure 210 covering the redistribution layer 220 forms a second passivation layer
It should be understood that each redistribution layer in the first wiring layer package 100 is molded, the first passivation layer is formed by the molded structure between two adjacent redistribution layers after the molding, and the second passivation layer is formed by the second passivation layer after the redistribution layer in the second wiring layer package 200 is packaged, and both the first passivation layer and the second passivation layer can play a role in protecting and separating the metal layout of the redistribution layers.
It should be noted that, when the line density of the redistribution layer is high, the first package structure 110 and the second package structure 210 may be specifically formed by using an ABF (Ajinomoto Build-up Film) lamination, and when the line density is low, the first package structure may be formed by using a plastic molding material lamination. The specific value can be selected according to the needs, and is not limited herein.
In the embodiment of the present invention, the first Molding structure 500 and the second Molding structure 600 may be implemented by Epoxy Molding Compound (EMC for short) or the like. The redistribution layer in the first wiring layer package 100 and the redistribution layer in the second wiring layer package 200 are usually implemented by a metal to which a polymer film material (such as benzocyclobutene, polyimide, etc.) is attached, where the metal may specifically be an alloy of titanium and copper, or an alloy of aluminum and copper, and is not limited herein and may be selected according to needs.
Specifically, the second connection structure 140 includes a first via disposed in the first passivation layer and a metal filled in the first via, and the first via connects the redistribution layers of each two adjacent layers.
It should be understood that, in the first wiring layer package body 100, every two adjacent redistribution layers are connected through the second connection structure 140, and the second connection structure 140 specifically includes a first through hole disposed in the first passivation layer between every two adjacent redistribution layers and a metal located in the first through hole, the first through hole can expose a line node of the redistribution layers, and after the first through hole is filled with the metal, the second connection structure 140 capable of connecting every two adjacent redistribution layers is formed.
Specifically, the first metal structure 130 includes a second via and a first solder ball disposed in the second via, the second via is disposed in a first passivation layer of the first package structure close to the passive device structure layer, and the second via communicates the passive device structure layer and a redistribution layer close to the passive device structure layer.
It should be understood that, as shown in fig. 1, the first metal structure 130 is used to connect the passive device structure layer 400 to the first wiring layer package 100, and is implemented by, for example, still using the first wiring layer package 100 as described above and taking the direction shown in fig. 1 as an example, a second via is provided in the first passivation layer above the uppermost redistribution layer, the second via can expose the line node of the uppermost redistribution layer, and a first solder ball is provided in the second via, so that the connection between the passive device structure layer 400 and the first wiring layer package 100 is implemented.
It should be noted here that a first via still needs to be provided in the uppermost first passivation layer, and the first via is filled with metal to achieve connection with the second wiring layer package 200.
Specifically, the second metal structure 230 includes a third via and a second solder ball disposed in the third via, the third via is disposed in the second passivation layer, and the third via communicates the active device structure layer 300 and a redistribution layer in the second wiring layer package 200.
It should be understood that, as shown in fig. 1, the second metal structure 230 is used to connect the active device structure layer 300 with the second wiring layer package 200, and is implemented by, taking the second wiring layer package 200 including one redistribution layer as an example, and taking the direction shown in fig. 1 as an example, providing a third via in the second passivation layer on the one redistribution layer, providing a second solder ball in the third via, where the third via can expose the line node of one redistribution layer in the second wiring layer package 200, and providing the second solder ball in the third via, so as to implement connection between the active device structure layer 300 and one redistribution layer in the second wiring layer package 200.
In an embodiment of the present invention, the third metal structure 700 includes a third solder ball.
Specifically, the first connection structure 510 includes a fourth via disposed in the first molding structure 500 and a metal filled in the fourth via, and the fourth via connects the first wiring layer package 100 and the second wiring layer package 200.
It should be understood that, in order to implement the connection between the first wiring layer package 100 and the second wiring layer package 200, a first connection structure 510 is disposed in the first molding structure 500, and the first connection structure 510 specifically includes a fourth through hole penetrating through the first molding structure 500, and a metal disposed in the fourth through hole, and the fourth through hole can be connected to the first through hole disposed at the uppermost layer of the first wiring layer package 100, so as to implement the connection between the first wiring layer package 100 and the second wiring layer package 200.
It should be understood that, as is well known to those skilled in the art, the cost of the active device is higher than that of the passive device, and therefore when the active device and the passive device are both arranged on the same layer, if the passive device is not tested, the active device is wasted, and thus a relatively large loss is caused.
In summary, the rewiring packaging structure of the brain wave processing system provided by the embodiment of the invention can realize the integrated arrangement of the brain wave processing module, thereby reducing the size of the brain wave processing system. And the passive devices and the active devices in the brain wave processing module are divided into two layers, so that the active devices can be arranged after the passive devices are tested to be qualified, layered arrangement and layered detection can be realized, and unnecessary waste is avoided.
As another embodiment of the present invention, there is provided a method of fabricating a rewiring package structure of a brain wave processing system for fabricating the rewiring package structure of the brain wave processing system as set forth above, wherein the method of fabricating, as shown in fig. 4 to 12, includes:
s110, providing a temporary carrier plate;
in the embodiment of the present invention, as shown in fig. 4, a temporary carrier 800 is provided, copper is coated on the temporary carrier 800, and a redistribution layer is patterned.
S120, sequentially forming a first wiring layer package 100, a passive device structure layer 400, a first molding structure 500, a second wiring layer package 200, an active device structure layer 300, and a second molding structure 600 on the temporary carrier 800, wherein the passive device structure layer 400 is disposed on the first wiring layer package 100 and connected to the first wiring layer package 100 through a first metal structure 130, the first molding structure 500 is disposed on the first wiring layer package 100 and covers the passive device structure layer 400, and the passive device structure layer 400 includes a passive device in an electroencephalogram signal processing module; the second wiring layer package 200 is disposed on a surface of the first molding structure 500 away from the first wiring layer package 100, and is connected to the first wiring layer package 100 through a first connection structure 510 located in the first molding structure 500; the active device structure layer 300 is disposed on the second wiring layer package 200, and is connected to the second wiring layer package 200 through a second metal structure 230, the second molding structure 600 is disposed on the second wiring layer package 200 and covers the active device structure layer 300, wherein the active device structure layer 300 includes an active device in an electroencephalogram signal processing module; the first wiring layer package body 100 comprises a first package body structure and at least two redistribution layers, wherein each two adjacent redistribution layers and the periphery of each redistribution layer are both covered by the first package body structure, a second connection structure 140 is arranged in the first package body structure between each two adjacent redistribution layers, and each two adjacent redistribution layers are connected through the second connection structure 140; the second wiring layer package 200 includes a second package structure and at least one redistribution layer, and the periphery of each redistribution layer is covered by the second package structure.
In the embodiment of the present invention, specifically, the first wiring layer package 100 includes three redistribution layers sequentially arranged at intervals, and the second wiring layer package 200 includes one redistribution layer as an example.
Specifically, the first wiring layer package 100 includes three redistribution layers 120 arranged at intervals in sequence, the first package structure between every two adjacent redistribution layers forms a first passivation layer, and the forming of the first wiring layer package 100 on the temporary carrier includes:
s121, depositing copper on the temporary carrier 800 by a sputtering process, and performing exposure and development after the copper is deposited to form a first redistribution layer 121;
specifically, as shown in fig. 4, a temporary carrier 800 is selected, which may be a board-level carrier, and the material of the temporary carrier may be glass, metal, or organic; the temporary carrier plate 800 is coated with the copper layer 900 by a sputtering process, and the thickness of the copper layer 900 is about 3 μm; a pattern is formed on the copper clad layer 900 by exposure and development, and the first rewiring layer 121 is obtained.
S122, packaging on the first redistribution layer 121 to form a first layer 111 in a first passivation layer;
in an embodiment of the present invention, as shown in fig. 5, the first rewiring layer 121 on the copper clad layer 900 is molded to form the first layer 111 in the first passivation layer.
S123, laser drilling on the first layer 111 in the first passivation layer to form a first via 141 in the first layer capable of exposing the line node of the first redistribution layer 121;
in the embodiment of the present invention, as shown in fig. 6, the first layer 111 in the first passivation layer is laser drilled to form a first via 141 in the first layer, and the first via 141 in the first layer can expose a corresponding line node of the first redistribution layer 121.
S124, filling metal in the first via 141 in the first layer, and forming a second redistribution layer 122 on the metal of the first via 141 in the first layer;
s125, forming a second layer 112 in the first passivation layer by packaging on the second redistribution layer 122;
as shown in fig. 7, the second redistribution layer 122 is formed by filling all copper in the molding compound after laser drilling, and the second redistribution layer 122 is molded.
Specifically, the line node of the first redistribution layer 121 exposed through the first via 141 in the first layer is filled with all copper to form a via line, and the second redistribution layer 122 is formed; the via wiring interconnects and penetrates signals between the second rewiring layer 122 and the first rewiring layer 121, and the second rewiring layer 122 is molded, resulting in the second layer 112 in the first passivation layer.
S126, laser drilling on the second layer 112 in the first passivation layer to form a first via 142 in the second layer capable of exposing the line node of the second redistribution layer 122;
s127, filling metal in the first via 142 in the second layer, and forming a third redistribution layer 123 on the metal of the first via 142 in the second layer;
s128, molding the peripheries and the surfaces of the first redistribution layer 121, the second redistribution layer 122 and the third redistribution layer 123 to obtain a first package structure 110;
s129, forming a second through hole capable of exposing the line node of the third redistribution layer on the surface of the first package structure 110 away from the temporary carrier 800, and disposing a first solder ball in the second through hole.
In the embodiment of the present invention, as shown in fig. 8, laser drilling is performed on the second layer 112 of the first passivation layer to form a first through hole 142 in the second layer, then full copper filling is performed on the line node exposed by the through hole of the second redistribution layer 122 to form a through hole line, and a third redistribution layer 123 is formed; the through hole line interconnects and penetrates signals between the second redistribution layer 122 and the third redistribution layer 123, and the third redistribution layer 123 is subjected to plastic packaging and is opened.
And packaging the third triple wiring layer 123 to form a third layer 113 of the first passivation layer, and performing laser drilling on the third layer 113 of the first passivation layer to form a second through hole 131, wherein a first solder ball is arranged in the second through hole 131.
In the embodiment of the present invention, the second via 131 is filled with all copper and is provided with the first solder balls to form a via line, and then the copper line of the 3-layer redistribution layer is formed; performing Organic Solderability Preservative (OSP) treatment on the formed copper circuit, and protecting the copper circuit before soldering; and carrying out pre-bonding and reflow processing on passive devices required by the electroencephalogram signal processing system at the corresponding Pad positions of the copper lines.
Specifically, the passive device structure layer 400 and the first molding structure 500 are sequentially formed on the first wiring layer package 100, including:
arranging a passive device in the electroencephalogram signal processing module at a line node position of the third redistribution layer, and performing pre-bonding and reflow processing to obtain a passive device structure layer 400, as shown in fig. 9;
the passive device structure layer 400 is subjected to a mold underfill process to obtain a first mold structure 500, as shown in fig. 10.
In the embodiment of the present invention, it is,
specifically, the second wiring layer package includes a redistribution layer, a second passivation layer is formed by a second package structure covering the redistribution layer, and a second wiring layer package is formed on the first molding structure, including:
laser drilling the first molding structure 500 to form a fourth via hole capable of exposing the line node of the third redistribution layer 123;
filling metal into the fourth through hole, and manufacturing a fourth heavy wiring layer on the fourth through hole filled with the metal;
packaging the fourth heavy wiring layer to form a second passivation layer;
forming a third through hole capable of exposing a line node of the fourth heavy wiring layer on the surface, away from the fourth heavy wiring layer, of the second passivation layer, and arranging a second solder ball in the third through hole;
it should be understood that laser drilling is performed on the third layer 113 of the first passivation layer to obtain the first via 143 in the third layer, and after laser drilling is performed on the first molding structure 500 to form the fourth via, the fourth via is filled with metal to obtain the first connection structure 510, where the first connection structure 510 can communicate with the first via 143 in the third layer, and the first via 143 in the third layer is also filled with copper metal, so that communication between the fourth redistribution layer (i.e., the redistribution layer with reference numeral 220 in the figure) and the third redistribution layer is achieved through the first connection structure 510 and the first via 143 in the third layer filled with copper metal. Packaging on the fourth redistribution layer results in a second package structure 210 (i.e., a second passivation layer), as shown in fig. 11.
Laser drilling is performed in the second package structure 210 to obtain a third through hole, and a second solder ball is disposed in the third through hole to form a second metal structure 230, as shown in fig. 12.
Specifically, sequentially forming an active device structure layer and a second molding structure on the second wiring layer package body includes:
arranging an active device in the electroencephalogram signal processing module at the position of a line node of the fourth multiple wiring layer, and performing pre-bonding and reflow processing to obtain an active device structural layer;
and carrying out molding bottom filling treatment on the active device structure layer to obtain a second molding structure.
In the embodiment of the invention, after the second package structure 210 is completed, an Organic solder mask (OSP) process is performed on the formed copper wire, so as to protect the copper wire before soldering. As shown in fig. 12, active devices required by the electroencephalogram signal processing system are pre-bonded and reflowed at corresponding positions of the second metal structure 230 to obtain an active device structure layer 300, and the layer attached with the active devices is subjected to mold underfill to obtain a second mold structure 600.
S130, removing the temporary carrier 800, and forming a third metal structure 700 on the surface of the first wiring layer package body away from the passive device structure layer.
As shown in fig. 1, a third metal structure 700 is formed by performing ball-planting on the back surface of the package structure that has been bonded and removed, and finally a single electroencephalogram signal processing module is obtained.
In summary, the method for manufacturing the rewiring package structure of the brain wave processing system according to the embodiment of the invention can manufacture a package structure with high integration level, the manufacturing process is simple, the implementation is easy, the size of the package structure can be effectively reduced, and unnecessary loss can be reduced.
It will be understood that the above embodiments are merely exemplary embodiments taken to illustrate the principles of the present invention, which is not limited thereto. It will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the spirit and scope of the invention, and such modifications and improvements are also considered to be within the scope of the invention.
Claims (10)
1. A rewiring package structure of a brain wave processing system, comprising:
the packaging structure comprises a first wiring layer packaging body, a second wiring layer packaging body, an active device structure layer, a passive device structure layer, a first molding structure and a second molding structure;
the passive device structure layer is arranged on the first wiring layer packaging body and connected with the first wiring layer packaging body through a first metal structure, the first molding structure is arranged on the first wiring layer packaging body and wraps the passive device structure layer, and the passive device structure layer comprises passive devices in the electroencephalogram signal processing module;
the second wiring layer packaging body is arranged on the surface, away from the first wiring layer packaging body, of the first molding structure and is connected with the first wiring layer packaging body through a first connecting structure located in the first molding structure;
the active device structure layer is arranged on the second wiring layer packaging body and connected with the second wiring layer packaging body through a second metal structure, the second molding structure is arranged on the second wiring layer packaging body and wraps the active device structure layer, and the active device structure layer comprises an active device in the electroencephalogram signal processing module;
the first wiring layer packaging body comprises a first packaging body structure and at least two layers of rewiring layers, the periphery of each two adjacent layers of rewiring layers and the periphery of each layer of rewiring layers are all covered by the first packaging body structure, a second connecting structure is arranged in the first packaging body structure between each two adjacent layers of rewiring layers, each two adjacent layers of rewiring layers are connected through the second connecting structure, and a third metal structure is arranged on the surface, away from the passive device structure layer, of the first wiring layer packaging body;
the second wiring layer packaging body comprises a second packaging body structure and at least one layer of rewiring layer, and the periphery of each layer of rewiring layer is wrapped by the second packaging body structure.
2. The package structure of claim 1, wherein the first wiring layer package comprises three redistribution layers sequentially spaced apart, and the first package structure between each two adjacent redistribution layers forms a first passivation layer.
3. The package structure according to claim 2, wherein the second connection structure includes a first via disposed in the first passivation layer and a metal filled in the first via, and the first via connects the redistribution layers of each adjacent two layers.
4. The package structure of claim 2, wherein the first metal structure comprises a second via and a first solder ball disposed within the second via, the second via is disposed within the first passivation layer of the first package body structure proximate the passive device structure layer, and the second via communicates the passive device structure layer and the redistribution layer proximate the passive device structure layer.
5. The package structure of claim 1, wherein the second routing layer package comprises a redistribution layer, and the second package structure encapsulating the redistribution layer forms a second passivation layer.
6. The package structure of claim 5, wherein the second metal structure comprises a third via and a second solder ball disposed in the third via, the third via is disposed in the second passivation layer, and the third via communicates the active device structure layer and a redistribution layer in the second routing layer package.
7. The package structure of claim 1, wherein the third metal structure comprises a third solder ball.
8. The package structure of claim 1, wherein the first connection structure comprises a fourth via disposed in the first molding structure and a metal filled in the fourth via, the fourth via connecting the first and second routing layer packages.
9. A method of manufacturing a rewiring package structure of a brain wave processing system, for manufacturing the rewiring package structure of a brain wave processing system according to any one of claims 1 to 8, the method comprising:
providing a temporary carrier plate;
sequentially forming a first wiring layer packaging body, a passive device structure layer, a first molding structure, a second wiring layer packaging body, an active device structure layer and a second molding structure on the temporary carrier plate, wherein the passive device structure layer is arranged on the first wiring layer packaging body and is connected with the first wiring layer packaging body through a first metal structure, the first molding structure is arranged on the first wiring layer packaging body and covers the passive device structure layer, and the passive device structure layer comprises a passive device in an electroencephalogram signal processing module; the second wiring layer packaging body is arranged on the surface, away from the first wiring layer packaging body, of the first molding structure and is connected with the first wiring layer packaging body through a first connecting structure located in the first molding structure; the active device structure layer is arranged on the second wiring layer packaging body and connected with the second wiring layer packaging body through a second metal structure, the second molding structure is arranged on the second wiring layer packaging body and wraps the active device structure layer, and the active device structure layer comprises an active device in the electroencephalogram signal processing module; the first wiring layer packaging body comprises a first packaging body structure and at least two layers of rewiring layers, the space between every two adjacent layers of rewiring layers and the periphery of each layer of rewiring layers are covered by the first packaging body structure, a second connecting structure is arranged in the first packaging body structure between every two adjacent layers of rewiring layers, and every two adjacent layers of rewiring layers are connected through the second connecting structure; the second wiring layer packaging body comprises a second packaging body structure and at least one layer of rewiring layer, and the periphery of each layer of rewiring layer is coated by the second packaging body structure;
and removing the temporary carrier plate, and forming a third metal structure on the surface of the first wiring layer packaging body deviating from the passive device structure layer.
10. The method of manufacturing according to claim 9,
the first wiring layer packaging body comprises three rewiring layers which are sequentially arranged at intervals, a first packaging body structure between every two adjacent rewiring layers forms a first passivation layer, and the forming of the first wiring layer packaging body on the temporary carrier plate comprises the following steps:
copper is coated on the temporary carrier plate through a sputtering process, and a first rewiring layer is formed through exposure and development after the copper is coated;
packaging on the first redistribution layer to form a first layer in a first passivation layer;
laser drilling is carried out on the first layer in the first passivation layer to form a first through hole in the first layer, wherein the first through hole can expose the line node of the first redistribution layer;
filling metal in the first through hole in the first layer, and manufacturing a second rewiring layer on the metal of the first through hole in the first layer;
packaging on the second rewiring layer to form a second layer in the first passivation layer;
laser drilling is carried out on the second layer in the first passivation layer to form a first through hole in the second layer, wherein the first through hole can expose the line node of the second redistribution layer;
filling metal in the first through hole in the second layer, and manufacturing a third redistribution layer on the metal of the first through hole in the second layer;
molding the peripheries and the surfaces of the first redistribution layer, the second redistribution layer and the third redistribution layer to obtain a first packaging structure;
forming a second through hole capable of exposing the line node of the third redistribution layer on the surface of the first package structure, which is away from the temporary carrier plate, and arranging a first solder ball in the second through hole;
sequentially forming a passive device structure layer and a first molding structure on the first wiring layer package, including:
arranging a passive device in the electroencephalogram signal processing module at the position of a line node of the third wiring layer, and performing pre-bonding and reflow processing to obtain a passive device structure layer;
performing molding bottom filling treatment on the passive device structure layer to obtain a first molding structure;
the second wiring layer package body comprises a rewiring layer, a second passivation layer is formed by wrapping a second package body structure of the rewiring layer, and a second wiring layer package body is formed on the first molding structure, and the second wiring layer package body comprises:
laser drilling is carried out on the first molding structure to form a fourth through hole capable of exposing the line node of the third redistribution layer;
filling metal into the fourth through hole, and manufacturing a fourth heavy wiring layer on the fourth through hole filled with the metal;
packaging the fourth heavy wiring layer to form a second passivation layer;
forming a third through hole capable of exposing a line node of the fourth heavy wiring layer on the surface, away from the fourth heavy wiring layer, of the second passivation layer, and arranging a second solder ball in the third through hole;
forming an active device structure layer and a second molding structure on the second wiring layer package in sequence, including:
arranging an active device in the electroencephalogram signal processing module at the position of a line node of the fourth multiple wiring layer, and performing pre-bonding and reflow processing to obtain an active device structural layer;
and carrying out molding bottom filling treatment on the active device structure layer to obtain a second molding structure.
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Application publication date: 20220513 |