CN114490483B - Novel USB architecture - Google Patents
Novel USB architecture Download PDFInfo
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- CN114490483B CN114490483B CN202210053760.3A CN202210053760A CN114490483B CN 114490483 B CN114490483 B CN 114490483B CN 202210053760 A CN202210053760 A CN 202210053760A CN 114490483 B CN114490483 B CN 114490483B
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- 101710176296 Switch 2 Proteins 0.000 claims abstract description 22
- 238000011144 upstream manufacturing Methods 0.000 claims description 11
- 238000000034 method Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 238000004891 communication Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0042—Universal serial bus [USB]
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- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Information Transfer Systems (AREA)
Abstract
The application discloses a novel USB architecture, which comprises: a motherboard and a front board, the motherboard including USB Switch3 and USB HUB, the front board including USB HUB and USB Switch2; USB Switch3 and USB HUB of the motherboard are coupled; USB Switch3 of the main board is coupled with USB HUB of the front-end board; the USB HUB of the main board is coupled with the USB Switch2 of the front-end board; the USB HUB and USB Switch2 of the front-end board are coupled. Because the data signals are recombined again after entering the USB HUB of the front board from the main board, the target signals which are sent out by the USB HUB of the front board are not influenced by cables, the USB eye pattern can be a very beautiful waveform, the signal quality is also ensured, and meanwhile, the overall hardware cost is lower than that of the prior architecture, so that the product has higher cost performance.
Description
Technical Field
The application relates to the technical field of USB, in particular to a novel USB architecture.
Background
The functional requirement of the existing teaching conference integrated machine product on the USB is more and more complex, different signal transmission paths exist for different application scenes, and the USB hub and the USB change-over switch are required to be used for realizing the switching of different paths, as shown in fig. 1, the teaching conference integrated machine product is a USB logic block diagram commonly used by us, the Front Board is a Front Board and is arranged on a Front panel of the machine, and the Front Board is connected with the main Board by using an FFC cable or an electronic cable; the front-mounted board has 2 USB Type A ports, 1 Typec ports and 1 TypeB ports, the TypeA ports and Typec ports can go to the Android main board through cables, the Android main board can go to different Host ports through USB Switch3, the TypeB ports are USB Type A ports for connecting computers, typec ports can be connected with USB equipment or Typec ports of computers, so that the USB equipment of the Type A ports and the Type Typec ports on a computer reading board card can be realized, and file transmission between different equipment (Android or computers) can be realized without plugging the USB equipment. However, the frame shown in fig. 1 may make the quality improvement of the USB signal by the USB driver worse due to the presence of the cable and the USB SWITCH.
Disclosure of Invention
The application provides a novel USB architecture, because the data signals are recombined again after entering the USB HUB of the front board from the main board, the target signals which are sent out by the USB HUB of the front board can not be influenced by cables, the USB eye pattern can be a very beautiful waveform, the signal quality is ensured, and the overall hardware cost is lower than that of the prior architecture, so that the product has higher cost performance.
The application provides a novel USB architecture, comprising:
A motherboard and a front panel, the motherboard comprising a USB Switch3 and a USB HUB, the front panel comprising a USB HUB and a USB Switch2;
the USB Switch3 of the main board is coupled with the USB HUB; the USB Switch3 of the main board is coupled with the USB HUB of the front-end board; the USB HUB of the main board is coupled with the USB Switch2 of the front-end board; the USB HUB and the USB Switch2 of the front-end board are coupled;
The data signals enter the USB Switch3 of the main board from the USB HUB of the main board, then the data signals are sent to the USB HUB of the front board through the USB Switch3, the data signals are recombined by the USB HUB of the front board to obtain target signals, the target signals are sent to the USB Switch2 by the USB HUB of the front board, and finally the target signals are output through the USB Switch 2.
Optionally, the front panel further includes USB Switch1, type C, and USB Type B; the USB Switch1 and the Type C are coupled; the USB Type B is coupled with the USB Switch 2.
Optionally, the motherboard further includes an Android IC and two USB types B2, where the Android IC and the two USB types B2 are respectively coupled with the USB Switch 3.
From the above techniques: the novel USB architecture comprises a main board and a front board, wherein the main board comprises a USB Switch3 and a USB HUB, and the front board comprises the USB HUB and a USB Switch2; USB Switch3 and USB HUB of the motherboard are coupled; USB Switch3 of the main board is coupled with USB HUB of the front-end board; the USB HUB of the main board is coupled with the USB Switch2 of the front-end board; the USB HUB and USB Switch2 of the front-end board are coupled. Because the data signals are recombined again after entering the USB HUB of the front board from the main board, the target signals which are sent out by the USB HUB of the front board are not influenced by cables, the USB eye pattern can be a very beautiful waveform, the signal quality is also ensured, and meanwhile, the overall hardware cost is lower than that of the prior architecture, so that the product has higher cost performance.
Drawings
FIG. 1 is a prior art USB architecture diagram;
FIG. 2 is a diagram illustrating a novel USB architecture according to the present application.
Detailed Description
The embodiment of the application provides a novel USB architecture, and because the data signals are recombined again after entering the USB HUB of the front board from the main board, the target signals which are upwards sent out by the USB HUB of the front board are not influenced by cables, the USB eye pattern can be a very beautiful waveform, the signal quality is ensured, and meanwhile, the overall hardware cost is lower than that of the prior architecture, so that the product has better cost performance.
Referring to fig. 1 and 2, an embodiment of a new USB architecture according to an embodiment of the present application includes:
the novel USB architecture comprises a main board and a front board, wherein the main board comprises a USB Switch3 and a USB HUB, and the front board comprises a USB HUB and a USB Switch2; the front-end board also includes USB Switch1, type C and USB Type B; the mainboard also comprises an Android IC and two USB Type B2.
Wherein the USB Switch3 and the USB HUB of the motherboard are coupled; USB Switch3 of the main board is coupled with USB HUB of the front-end board; the USB HUB of the main board is coupled with the USB Switch2 of the front-end board; the USB HUB of the front-end board is coupled with the USB Switch 2; USB Switch1 and Type C are coupled; USB Type B is coupled with USB Switch 2; android IC and two USB types B2 are coupled with USB Switch3, respectively.
In practical application, the novel USB architecture of the present application is shown in fig. 2, where the novel USB architecture readjusts the switching logic of the USB to achieve the effect of better performance and cost.
The Upstream data in this novel USB architecture first enters the USB HUB of the motherboard from two USB Type a, and then the Upstream data enters the USB Switch3 of the motherboard from the USB HUB of the motherboard, at this time, the Upstream data will enter the front board from the motherboard through the USB Switch3, the Upstream data entering the front board advances the USB HUB of the front board (the other 2 USB Type a ports and 1 Type C ports enter the downstream port of the USB HUB together on the front board), the data coming out from the Upstream port of the USB HUB switches each channel through the USB Switch2, (in this embodiment, the USB Switch is a 1 in 4 out device, and the data flow of the USB HUB can be switched to the motherboard end, the Type C port and the Type B port of the front board according to the configuration of software).
In the application, because the USB HUB of the front-end board can reorganize the Upstream data which enters the HUB, the signal which is sent out by the USB HUB is not influenced by the cable any more, the USB eye diagram can be a very beautiful waveform, the signal quality is also ensured, and the hardware cost of the whole device is lower than that of the prior architecture, so that the product has a better cost performance.
It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, which are not repeated herein.
In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices, and methods may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of the units is merely a logical function division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in the embodiments of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application may be embodied essentially or in part or all of the technical solution or in part in the form of a software product stored in a storage medium, including instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a read-only memory (ROM), a random-access memory (RAM, random access memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
Claims (1)
1. A novel USB architecture, comprising:
A motherboard and a front panel, the motherboard comprising a USB Switch3 and a USB HUB, the front panel comprising a USB HUB and a USB Switch2;
the USB Switch3 of the main board is coupled with the USB HUB of the main board; the USB Switch3 of the main board is coupled with the USB HUB of the front-end board; the USB HUB of the main board is coupled with the USB Switch2 of the front-end board; the USB HUB of the front-end board is coupled with the USB Switch2 of the front-end board;
The data signals enter the USB Switch3 of the main board from the USB HUB of the main board, then are sent to the USB HUB of the front board through the USB Switch3 of the main board, the USB HUB of the front board reorganizes the data signals to obtain target signals, the USB HUB of the front board sends the target signals to the USB Switch2 of the front board, and finally, the target signals are output through the USB Switch2 of the front board;
The front-end board further comprises USB Switch1, type C, USB Type B and two USB Type A; USB Switch1 of the front panel is coupled with Type C of the front panel; the USB Type B of the front-end board is coupled with the USB Switch2 of the front-end board;
The mainboard further comprises an Android IC, two USB Type B2 and two USB Type A, wherein the Android IC and the two USB Type B2 of the mainboard are respectively coupled with the USB Switch3 of the mainboard;
In the novel USB architecture, upStream data firstly enter the USB HUB of the main board from two USB Type A of the main board, then UpStream data enter the USB Switch3 of the main board from the USB HUB of the main board, at the moment, upStream data enter the front board from the main board through the USB Switch3 of the main board, upStream data entering the front board advance the USB HUB of the front board, and 2 USB Type A ports and 1 Type C port of the front board enter the downlink port of the USB HUB of the front board together; the data coming out of the uplink port of the USB HUB of the front plate is switched to each channel through the USB Switch2 of the front plate, and the USB Switch2 of the front plate switches the data flow of the USB HUB of the front plate to the main board end, the Type C port of the front plate and the USB Type B port of the front plate, wherein the UpStream data of the USB Switch2 of the front plate reaches the Type C port of the front plate through the USB Switch1 of the front plate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210053760.3A CN114490483B (en) | 2022-01-18 | 2022-01-18 | Novel USB architecture |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210053760.3A CN114490483B (en) | 2022-01-18 | 2022-01-18 | Novel USB architecture |
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| Publication Number | Publication Date |
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| CN114490483A CN114490483A (en) | 2022-05-13 |
| CN114490483B true CN114490483B (en) | 2024-08-30 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202210053760.3A Active CN114490483B (en) | 2022-01-18 | 2022-01-18 | Novel USB architecture |
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| CN (1) | CN114490483B (en) |
Citations (2)
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| CN103186747A (en) * | 2011-12-31 | 2013-07-03 | 中国长城计算机深圳股份有限公司 | Computer and built-in function sub-board thereof |
| CN109684258A (en) * | 2018-12-24 | 2019-04-26 | 联想(北京)有限公司 | A kind of signal processing apparatus and method |
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| CN201681383U (en) * | 2009-08-07 | 2010-12-22 | 南京易思克网络安全技术有限责任公司 | USB isolation controller |
| CN202422137U (en) * | 2011-12-31 | 2012-09-05 | 中国长城计算机深圳股份有限公司 | Computer and built-in functional daughter board thereof |
| CN206162320U (en) * | 2016-11-02 | 2017-05-10 | 郑州云海信息技术有限公司 | Multipurpose interconnection keysets |
| CN210776468U (en) * | 2019-11-22 | 2020-06-16 | 苏州浪潮智能科技有限公司 | System architecture for realizing 32Ruler SSD storage |
| JP2021101293A (en) * | 2019-12-24 | 2021-07-08 | 株式会社沖データ | Information processing apparatus |
| CN110830749A (en) * | 2019-12-27 | 2020-02-21 | 深圳市创维群欣安防科技股份有限公司 | Video call echo cancellation circuit and method and conference panel |
| US11308022B2 (en) * | 2020-05-27 | 2022-04-19 | Dell Products, L.P. | Support for common motherboard configuration for USB retiming |
| CN212846570U (en) * | 2020-08-20 | 2021-03-30 | 深圳市康冠商用科技有限公司 | Type-C interface circuit and touch-control all-in-one |
| CN112306935A (en) * | 2020-10-23 | 2021-02-02 | 浪潮金融信息技术有限公司 | Method and device for following USB (universal serial bus) equipment in conference tablet |
| CN113238979A (en) * | 2021-06-16 | 2021-08-10 | 深圳市世纪创新显示电子有限公司 | System with type c interface or lightning interface for automatically detecting kvm mode and display equipment thereof |
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- 2022-01-18 CN CN202210053760.3A patent/CN114490483B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103186747A (en) * | 2011-12-31 | 2013-07-03 | 中国长城计算机深圳股份有限公司 | Computer and built-in function sub-board thereof |
| CN109684258A (en) * | 2018-12-24 | 2019-04-26 | 联想(北京)有限公司 | A kind of signal processing apparatus and method |
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| CN114490483A (en) | 2022-05-13 |
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