CN114461555A - Interface circuit and mainboard - Google Patents
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- CN114461555A CN114461555A CN202111659600.5A CN202111659600A CN114461555A CN 114461555 A CN114461555 A CN 114461555A CN 202111659600 A CN202111659600 A CN 202111659600A CN 114461555 A CN114461555 A CN 114461555A
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Abstract
The application relates to an interface circuit and a mainboard, the interface circuit comprises a driving circuit, the driving circuit is respectively connected with a display card and a capacitor, the capacitor is connected with a data transmission interface, the display card comprises at least two types of data processing chips, and the driving circuit provides a driving signal for the output signal of the data processing chip to generate a fluctuation signal, so that the fluctuation signal is output to the data transmission interface after passing through the capacitor. The interface circuit can be compatible with signal transmission between the display card with different data processing chips and the mainboard, and the circuit design of the mainboard corresponding to the original display card is not required to be changed, and the circuit device of the mainboard is disassembled, so that the interface circuit compatible with multiple types of data processing chips can be realized, and the manufacturing cost and the maintenance cost of connecting different display cards with the mainboard circuit are reduced.
Description
Technical Field
The application relates to the technical field of automatic testing, in particular to an interface circuit and a mainboard.
Background
With the continuous development of computer technology, computer terminal devices are increasingly applied to daily life. A graphics card in a computer device is a very important hardware. Currently, a video card having an MXM interface (Mobile PCI Express Module) is a main board for inserting a Mobile video card into a Mobile notebook, as a main video card used in a small terminal such as a notebook.
At present, the display card with the MXM interface is designed and produced by different manufacturers at home and abroad. Therefore, the interface circuit of the motherboard to which the interface circuit is connected also needs to be designed for the graphics cards designed and produced by different manufacturers.
Therefore, the prior art has the problems of low development efficiency of the mainboard and incompatibility of interface circuits for butting the display card.
Disclosure of Invention
In view of the above, it is necessary to provide an interface circuit and a motherboard that are compatible with GPU chips produced by different manufacturers.
In a first aspect, the present application provides an interface circuit that drives a circuit; the driving circuit is respectively connected with the display card and the capacitor, the capacitor is connected with the data transmission interface, and the display card comprises at least two types of data processing chips;
and the driving circuit is used for providing driving signals for the output signals of the data processing chips so as to generate fluctuation signals, and the fluctuation signals are output to the data transmission interface after passing through the capacitor.
The interface circuit can be compatible with signal transmission between the display card with different data processing chips and the mainboard, and the circuit design of the mainboard corresponding to the original display card is not required to be changed, and the circuit device of the mainboard is disassembled, so that the interface circuit compatible with multiple types of data processing chips can be realized, and the manufacturing cost and the maintenance cost of connecting different display cards with the mainboard circuit are reduced.
In one embodiment, the driving circuit comprises a signal generator and a resistor; the signal generator is connected with one end of the resistor, and the other end of the resistor is connected with a common end between the display card and the capacitor;
and the signal generator is used for generating a driving signal, and generating a fluctuation signal with the output signal of the data processing chip after the driving signal passes through the resistor.
In the above embodiment, the signal generator generates the driving signal, the driving signal and the output signal of the data processing chip are superimposed through the resistor to generate the fluctuation signal, and the fluctuation signal is coupled only through the capacitor and can be transmitted to the data transmission interface. The problem that interface circuits of different data processing chips corresponding to the main board are incompatible is solved.
In one embodiment, the resistors comprise a first resistor and a second resistor; the signal generator is respectively connected with one end of the first resistor and one end of the second resistor, the other end of the first resistor is connected with a common end between the first output end of the display card and the capacitor, and the other end of the second resistor is connected with a common end between the second output end of the display card and the capacitor;
the signal generator is used for enabling the driving signal to pass through the first resistor and then generate a first fluctuation signal with a first output signal of a first output end of the display card; and generating a second fluctuation signal by the driving signal and a second output signal of a second output end of the display card after passing through the second resistor.
The embodiment can provide driving signals for output signals of data processing chips of different lines, and performs voltage division protection through the resistor, so that the whole interface circuit can normally operate.
In one embodiment, the capacitor comprises a first capacitor and a second capacitor, one end of the first capacitor is respectively connected with the other end of the first resistor and the first output end of the display card, and the second end of the first capacitor is connected with the data transmission interface;
one end of the second capacitor is connected with the other end of the second resistor and the second output end of the display card respectively, and the second end of the second capacitor is connected with the data transmission interface.
In the embodiment, the fluctuation signals on each line are coupled through the capacitors corresponding to different lines, so that stable signals are provided for the data transmission interface.
In one embodiment, the driving signal is a voltage signal with a preset voltage value.
The above-described embodiment provides an optimum ripple signal by setting the voltage signal to the same voltage value as in the data processing chip.
In one embodiment, the at least two types of data processing chips include an AMD GPU chip and a JM GPU chip.
The above embodiment specifically illustrates two data processing chips with different output signals, thereby providing a basis for the interface circuit in the present scheme to be compatible with different data processing chips.
In one embodiment, the signal generator is connected to the data processing chip, and the signal generator is configured to obtain a source signal from the data processing chip and generate a driving signal according to the source signal.
The embodiment can acquire accurate driving signals to generate the fluctuation signals.
In one embodiment, the data transmission interface is a high definition multimedia HMDI interface.
The embodiment further determines the data transmission interfaces corresponding to different display cards, so that the interface circuit provided by the scheme can realize signal transmission between different data processing chips and the high-definition multimedia HMDI interface.
In one embodiment, the output signal of the data processing chip is a video interface signal or a high definition multimedia interface signal.
The embodiment can be compatible with the transmission of different video interface signals or high-definition multimedia interface signals in the interface circuit.
In a second aspect, the present application further provides a motherboard, where the motherboard includes the interface circuit in any embodiment of the first aspect.
The embodiment can realize data transmission between the main board and the display cards with different data processing chips. The maintenance of follow-up mainboard of further being convenient for need not to change the circuit design that the display card corresponds the mainboard at original data processing chip place to dismantle the circuit device of mainboard, reduced mainboard circuit's development and maintenance cost, and then improved mainboard circuit utilization ratio.
Above-mentioned interface circuit and mainboard, because interface circuit includes drive circuit, and this drive circuit is connected with display card and electric capacity respectively, electric capacity and data transmission interface connection, include two kinds at least data processing chips on the display card, this drive circuit provides drive signal to each data processing chip's output signal to the fluctuating signal of generation makes fluctuating signal export to the data transmission interface behind the electric capacity. The interface circuit can be compatible with signal transmission between the display card with different data processing chips and the mainboard, and the circuit design of the mainboard corresponding to the original display card is not required to be changed, and the circuit device of the mainboard is disassembled, so that the interface circuit compatible with multiple types of data processing chips can be realized, and the manufacturing cost and the maintenance cost of connecting different display cards with the mainboard circuit are reduced.
Drawings
FIG. 1 is a diagram illustrating a relationship between pin names and motherboard lines of a graphics card according to an embodiment;
FIG. 2 is a schematic diagram of an interface circuit corresponding to the AMD display card and the motherboard according to an embodiment;
FIG. 3 is a conceptual diagram of a TMDS differential pair in one embodiment;
FIG. 4 is a schematic diagram of an interface circuit of the JM display card corresponding to the motherboard in another embodiment;
FIG. 5 is a block diagram of an interface circuit according to an embodiment;
FIG. 6 is a block diagram of an interface circuit according to an embodiment;
FIG. 7 is a schematic diagram of an interface circuit according to another embodiment;
FIG. 8 is a schematic diagram of an interface circuit according to another embodiment;
FIG. 9 is a schematic diagram of an interface circuit according to another embodiment;
fig. 10 is a schematic structural diagram of a connection circuit between a motherboard and a graphics card in an embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
The numbering of the components as such, for example "first", "second", etc., in this application is used solely to distinguish between the objects depicted and not to imply any order or technical meaning. The term "connected" and "coupled" when used in this application, unless otherwise indicated, includes both direct and indirect connections (couplings). In the description of the present application, it is to be understood that the terms "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", and the like, indicate orientations or positional relationships based on those shown in the drawings, and are used only for convenience in describing the present application and for simplicity in description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed in a particular orientation, and be operated, and thus, are not to be considered as limiting the present application.
In this application, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may be directly contacting the first and second features or indirectly contacting the first and second features through intervening media. Also, a first feature "on," "over," and "above" a second feature may be directly or diagonally above the second feature, or may simply indicate that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature may be directly under or obliquely under the first feature, or may simply mean that the first feature is at a lesser elevation than the second feature.
At present, more and more display devices have the requirements of HDMI interface display and mainboard design. Due to the unique modular design of the MXM display card, the design period can be greatly shortened, and the latest GPU can be put on the market more quickly. With the MXM design interface, a notebook computer manufacturer can flexibly configure various graphic chips by means of a single basic platform according to different market segment and price requirements. It allows manufacturers to make full use of the best available graphics processing solution at any time, offering more up-to-date products to users, by creating a unified graphics interface that is applicable to all notebook types. Among them, MXM, Mobile PCI Express Module, is a set of PCI-Express interface-based device interfaces designed for graphics processors, and is located in different types of notebook products, and is commonly made by NVidia and multiple notebook computer manufacturers. MXM adopts the communication protocol compatible with PCI-Express, therefore can use all drawing core and chip set supporting PCI-Express drawing interface that support PCI-Express specification, it has not only shortened the cycle of product design, and the producer can provide the MXM display card product of different grades because of user's different demands, the user can upgrade MXM display card by oneself in the future as required and need not to change the whole notebook computer.
The GPU chips on the existing MXM video card are mainly produced by AMD manufacturers abroad and JM chip manufacturers domestically, and certainly include some other manufacturers, but the GPU chips of different manufacturers have different requirements on the peripheral motherboard HDMI line design. Taking R7340 GPU chip produced by AMD manufacturer as an example, the GPU chip has no native HDMI interface, and its native DP (displayport) interface can be used as an output DP signal, and can also be multiplexed as an HDMI interface for HDMI signal display. As shown in fig. 1, the names of the pins of the R7340 GPU chip and the corresponding Digital Visual Interface (DVI) and HDMI lines of the motherboard are shown. The DP interface standard is a digital video interface standard developed by the consortium of PC and chip manufacturers and standardized by the Video Electronics Standards Association (VESA). The interface is free of authentication and authorization, is mainly used for connecting a video source with a display and other equipment, and also supports carrying audio, USB and other forms of data. The HDMI standard is a protocol standard requiring authentication, and since DP is an open protocol standard, many new technologies appear on DP first and then on HDMI slowly.
The MXM3.1 video card design specification requires that the output signal related to the DP line DP _ x _ LZ/DP _ x _ LZ # in the hardware motherboard interface circuit design must be output through the coupling capacitor, if the native DP interface is reused as the HDMI display output, i.e. the output signal related to HDMI _ x _ TX/HDMI _ x _ TX # must also be output through the coupling capacitor. For example, the interface circuit of the display card and the motherboard corresponding to the GPU chip produced by AMD manufacturer is shown in fig. 2. The MXM display card where the AMD GPU chip is located is connected with the mainboard circuit through an MXM Connector (interface converter). The mainboard circuit comprises an HDMI Connector, a pull-up circuit (a 3.3V pull-up circuit shown in the figure), a pull-down circuit (a grounding pull-down circuit shown in the figure) and a coupling capacitor.
Further, in the HDMI protocol specification, since HDMI is a TMDS level standard, the protocol requires that the output terminal of the graphics card where the GPU chip is located must adopt a dc coupling mode. As shown in fig. 3, a conceptual schematic diagram of a TMDS differential pair is illustrated.
Secondly, for JM chips produced by home manufacturers as an example, the GPU chip has a native HDMI interface. Therefore, the HDMI _ x _ TX/HDMI _ x _ TX # interface lines thereof must be designed in such a way as to be connected with the HDMI interface in a dc coupling manner according to the HDMI protocol specification. As shown in fig. 4, a circuit diagram is designed for the HDMI line of the JM GPU chip. The MXM graphics card where the JM GPU chip is located is connected with a mainboard circuit through an MXM Connector (interface converter), and the mainboard circuit comprises an HDMI Connector (HDMI interface) and a pull-up circuit (a 3.3V pull-up circuit shown in the figure). And MXM Connector (interface converter) and HDMI Connector are dc-coupled.
Therefore, if the JM-series GPU chip is designed according to the HDMI interface design requirement in the MXM3.1 specification or according to the AMD GPU chip scheme, the problem that HDMI cannot be displayed occurs. Because the DP port of the AMD GPU is incompatible with the native HDMI peripheral motherboard line of the JM GPU when used as the HDMI function, two different motherboard designs are required for GPU chips of different manufacturers or the MXM graphics card where the GPU is located, which seriously restricts the development cycle and cost, motherboard design maintenance, and subsequent product release.
Based on this, the present application provides a GPU chip HDMI interface Circuit that is compatible with two different output HDMI signals without modifying any PCB (Printed Circuit Board) and BOM (Bill of Material). The problem that the mainboards are complex to maintain can be solved, and the research and development period and the production cost are greatly reduced. The following embodiments specifically describe the interface circuit and the motherboard according to the present invention.
Fig. 5 is a schematic structural diagram of an interface circuit according to an embodiment, where the interface circuit includes: a driver circuit 501; the driving circuit 501 is respectively connected with the display card 502 and the capacitor 503, the capacitor 503 is connected with the data transmission interface 504, and the display card 502 comprises a data processing chip 5021;
the driving circuit 501 is configured to provide a driving signal to an output signal of each data processing chip 5021 to generate a fluctuation signal, so that the fluctuation signal passes through the capacitor 503 and is output to the data transmission interface 504.
The data processing chip 5021 may include any type of chip such as an AMD chip, a JM chip, and an NVIDIA chip. The driving circuit 501 may include a signal generator, a power supply, an oscillation circuit capable of generating a certain amplitude and direction voltage signal, and the like. The data transmission interface 504 may include a DP interface, an HDMI interface, and the like.
Specifically, the driving circuit 501 is connected to the graphics card 502 and the capacitor 503, respectively, and the capacitor 503 is connected to the data transmission interface 504. The number of capacitors is not limited, and may be one capacitor or a capacitor group including a plurality of capacitors, and is not limited herein. At least one transmission line connection may be used between the driving circuit 501 and the data transmission interface 504, and each line includes at least one capacitor 503. The number and the type of the capacitors 503 on each line may be equal or different. And are not intended to be limiting herein.
The driving circuit 501 provides a driving signal to the output signal of the data processing chip 5021 to generate a fluctuation signal, so that the fluctuation signal is output to the data transmission interface 504 after passing through the capacitor 503.
Further, the driving circuit 501 may periodically output a constant electrical signal and add to the output signal of the data processing chip 5021 to obtain a fluctuating signal. The driving circuit 501 may continuously output an oscillation signal (e.g., a square wave signal or a positive sine wave signal) and superimpose the output signal of each data processing chip 5021 to obtain a ripple signal. The driving circuit 501 may also determine an electrical signal to be output according to a signal source in the data processing chip 5021, and superimpose the electrical signal on the output signal of each data processing chip 50221 to obtain a fluctuation signal, which is not limited herein. When the waveform signal is generated, the ripple signal is coupled by the connected capacitor 503, and the coupled electric signal is transmitted to the data transmission interface 504.
For example, if the display card 502 includes both the AMD chip and the JM chip. For the ADM chip, the AMD chip outputs a first ripple signal, and at this time, the driving signal may output a second ripple signal identical to the first ripple signal, and after the first ripple signal and the second ripple signal are superimposed, the first superimposed ripple signal may be generated, and the first superimposed ripple signal is transmitted to the capacitor for coupling, and the coupled electrical signal is transmitted to the data transmission interface 504.
And aiming at the JM chip, the output of the JM chip is a direct current signal, at this time, the driving signal outputs a second fluctuation signal, and the second fluctuation signal is superposed with the direct current signal, so that a second superposed fluctuation signal can be generated, the second superposed fluctuation signal is transmitted to the capacitor for coupling, and the coupled electric signal is transmitted to the data transmission interface.
Alternatively, the data processing chip 5021 may be embodied as an AMD GPU chip or a JM GPU chip, i.e., GPU chips produced by different manufacturers.
Optionally, the data transmission interface is a high definition multimedia HMDI interface.
Optionally, an output signal of the data processing chip 5021 is a video interface signal or a high-definition multimedia interface signal.
In this embodiment, the interface circuit includes a driving circuit, the driving circuit is respectively connected to the graphics card and the capacitor, the capacitor is connected to the data transmission interface, the graphics card includes a data processing chip, the driving circuit provides a driving signal to an output signal of the data processing chip to generate a fluctuation signal, so that the fluctuation signal is output to the data transmission interface after passing through the capacitor. The interface circuit can be compatible with signal transmission between the display card with different data processing chips and the mainboard, and the circuit design of the mainboard corresponding to the original display card is not required to be changed, and the circuit device of the mainboard is disassembled, so that the interface circuit compatible with multiple types of data processing chips can be realized, and the manufacturing cost and the maintenance cost of connecting different display cards with the mainboard circuit are reduced.
The above embodiments have explained the interface circuit, and now the driving circuit in the interface circuit is further explained by an embodiment, in an embodiment, as shown in fig. 6, the driving circuit 501 includes a signal generator 5011 and a resistor 5012; the signal generator 5011 is connected with one end of a resistor 5012, and the other end of the resistor 5012 is connected with a common end between the display card 502 and the capacitor 503;
the signal generator 5011 is configured to generate a driving signal, and generate a fluctuation signal from the driving signal and an output signal of the data processing chip 5021 through a resistor.
Among them, the signal generator 5011 may include: a sinusoidal signal generator, a low frequency signal generator, a high frequency signal generator, a random signal generator, etc., without limitation thereto. The driving signal may be a constant current signal output periodically or a continuous oscillation signal, which is not limited herein.
For example, the video card 502 may include a data processing chip 5021 for outputting a ripple signal, and may also include a data processing chip 5021 for outputting a dc signal. For the data processing chip 5021 outputting the fluctuation signal, the driving signal may be a signal of the same type as the signal output from the data processing chip 5021, and after the driving signal passes through the resistor and is superimposed with the signal output from the data processing chip 5021, the fluctuation signal may be generated, transmitted to the capacitor 503 for coupling, and transmitted to the data transmission interface 504.
For the data processing chip 5021 with an output signal of dc, at this time, the signal generator 5011 outputs a driving signal, and the driving signal passing through the resistor 5012 is superimposed with the dc signal output by the data processing chip 5021, so as to generate a fluctuation signal, transmit the fluctuation signal to the capacitor 5012 for coupling, and transmit the coupled electrical signal to the data transmission interface 504.
Optionally, the driving signal is a voltage signal of a preset voltage value, preferably a 3.3V voltage signal.
In the present embodiment, since the driver circuit 501 includes the signal generator 5011 and the resistor 5012; the signal generator 5011 is connected with one end of a resistor 5012, and the other end of the resistor 5012 is connected with a common end between the display card 502 and the capacitor 503; the signal generator 5011 can generate a driving signal, and generate a fluctuation signal from the driving signal and an output signal of the data processing chip after passing through the resistor, so as to adjust signals output by the data processing chip 5021 of different types to the fluctuation signal, and then the fluctuation signal can be transmitted to the data transmission interface 504 only by coupling the fluctuation signal through the capacitor 503. The problem that interface circuits of different data processing chips corresponding to the main board are incompatible is solved.
The driver circuit 501 is illustrated in the above embodiments, and the driver circuit 501 is further illustrated in an embodiment in which the resistor 5012 includes a first resistor 50121 and a second resistor 50122 as shown in fig. 7; the signal generator 5011 is respectively connected with one end of a first resistor 50121 and one end of a second resistor 50122, the other end of the first resistor 50121 is connected with the common end between the first output end of the display card 502 and the capacitor 503, and the other end of the second resistor 50122 is connected with the common end between the second output end of the display card 502 and the capacitor 503;
the signal generator 5011 is configured to generate a first wobble signal with a first output signal of a first output terminal of the graphics card 502 after passing through the first resistor 50121; and generating a second ripple signal with a second output signal at a second output of the graphics card 502 after passing the driving signal through the second resistor 50122.
Wherein, because the display card can pass through circuit 1: DP _ x _ LZ/HDMI _ x _ TX, line 2: and DP _ x _ LZ/HDMI _ x _ TX #, and realizes signal transmission with the data transmission interface. Therefore, for different lines, the driving circuit comprises two resistors respectively corresponding to the two lines of the display card.
Specifically, the resistors in the driving circuit 501 include: a first resistor 50121 and a second resistor 50122; the signal generator 5011 is connected to one end of a first resistor 50121 and one end of a second resistor 50122, respectively, the other end of the first resistor 50121 is connected to a common terminal between the first output terminal of the graphic card 502 and the capacitor 503, and the other end of the second resistor 50122 is connected to a common terminal between the second output terminal of the graphic card 502 and the capacitor 503. The signal generator 5011 can generate a first fluctuation signal with a first output signal of a first output terminal of the graphics card 502 after passing the driving signal through the first resistor 50121; and a second ripple signal is generated by the driving signal passing through the second resistor 50122 and the second output signal of the second output terminal of the graphics card 502. The driving circuit provided by the embodiment can provide a driving signal for the output signal of the data processing chip, and performs voltage division protection through the resistor, so that the whole interface circuit operates normally.
The resistor in the driving circuit is described in the above embodiment, and now the capacitor in the driving circuit is described in an embodiment, as shown in fig. 8, the capacitor 503 includes a first capacitor 5031 and a second capacitor 5032, one end of the first capacitor 5031 is connected to the other end of the first resistor 50121 and the first output terminal of the graphics card 502, and the second end of the first capacitor 50121 is connected to the data transmission interface 504;
one end of the second capacitor 5032 is connected to the other end of the second resistor 50122 and the second output end of the graphics card 502, and the second end of the second capacitor 5032 is connected to the data transmission interface 504.
The capacitor 503 in the driving circuit 501 includes a first capacitor 5031 and a second capacitor 5032, and the first capacitor 5031 and the second capacitor 5032 may have the same or different types and sizes. The first capacitor 5031 and the second capacitor 5032 may be a single capacitor or a capacitor group including a plurality of capacitors.
Specifically, one end of the first capacitor 5031 is connected to the other end of the first resistor 50121 and the first output end of the graphics card 502, and the second end of the first capacitor 5031 is connected to the data transmission interface 504; one end of the second capacitor 5032 is connected to the other end of the second resistor 50122 and the second output end of the graphics card 502, and the second end of the second capacitor 5032 is connected to the data transmission interface 504. The first capacitor 5031 and the second capacitor 5032 are used for coupling the transmitted ripple signal and providing a stable signal for the data transmission interface 504. In the above embodiment, the signal output by the data processing chip 5021 is coupled through the first capacitor and the second capacitor, so as to provide a stable signal for the data transmission interface.
The above embodiment describes the driving circuit in detail, and when determining the driving signal generated by the signal generator in the driving circuit, the driving signal can be set as the same signal source in the data processing chip, and how to set as the same signal source in the data processing chip is described with an embodiment, as shown in fig. 9, in an embodiment, the signal generator 5011 is connected to the data processing chip 5021, and the signal generator 5011 is used to obtain the source signal from the data processing chip 5021 and generate the driving signal according to the source signal.
Specifically, if the data processing chip 5021 connected to the signal generator 5011 is a chip (for example, an AMD GPU chip) that outputs a ripple signal, since a corresponding driving circuit is present inside the data processing chip 5021, the ripple signal output by the driving circuit can be generated by the driving circuit, and a driving voltage output by the driving circuit can be provided by a source signal inside the data processing chip 5021, a signal generator disposed outside the data processing chip 5021 can obtain the source signal from the data processing chip 5021, and generate the same driving signal as that inside the data processing chip 5021 according to the source signal.
If the data processing chip 5021 connected to the signal generator 5011 is a chip (e.g., JM GPU chip) outputting a dc signal and a power supply capable of generating a constant current voltage, e.g., 3.3V, is also disposed inside the chip, the signal generator disposed outside the chip can obtain a voltage signal from the power supply inside the data processing chip, and then the voltage signal can be used as a driving signal to generate a ripple signal. In the embodiment, the driving circuit obtains the source signal from the data processing chip, so that the driving signal generated by the source signal can be more matched with the signal output by the data processing chip, and the signal output by the data processing chip can be accurately and stably transmitted to the data transmission interface circuit.
Based on the same inventive concept, the present application provides a motherboard including the interface circuit in any of the above embodiments.
An exemplary motherboard is provided, and as shown in fig. 10, a graphics card 601 is connected to the motherboard 602. The interface circuit in this embodiment is disposed on the motherboard 602, and the design scheme of the motherboard is mainly that, on the basis of the native DP _ x _ Lx/DP _ x _ Lx # interface circuit of the AMD GPU chip, a pull-up circuit (corresponding to the driving circuit in the foregoing embodiment) of the GPU using P3V3 is added on the line before the coupling capacitor 503, the pull-up circuit of the P3V3 circuit is equivalent to the pull-up circuit of the P3V3 circuit inside the AMD GPU chip, and here, the external design of the chip on the pull-up circuit of the P3V3 circuit inside the AMD GPU chip is realized, so that if a graphics card including the JM chip is connected on the motherboard 602, the dc signal output by the JM GPU chip can be converted into a ripple signal by the pull-up circuit of the externally disposed P3V3 circuit, and then transmitted to the data transmission interface through the subsequent coupling capacitor, and compatibility of the interface circuit of the AMD GPU chip and the JM chip is realized, for example, according to the scheme design of the HDMI lines related to the AMD chip, when the JM GPU chip is used, the coupling capacitor in the HDMI _ x _ TX/HDMI _ x _ TX # line needs to be changed into a resistor, and the related pull-down resistor in the line is subjected to downloading processing, so that the product development and design and subsequent maintenance work are not facilitated. By using the interface circuit design of the mainboard, the JM GPU chip can directly replace the original AMD GPU chip to be used on the display card. It should be noted that, the JM GPU chip does not have a pull-up circuit of P3V3, so if there is no pull-up circuit of P3V3, the signal output by the JM GPU chip must be transmitted by means of dc coupling when it needs to be transmitted to the data transmission interface normally, so that the above-mentioned interface circuit of the motherboard can be used to solve this problem by means of an external pull-up circuit. For the connection relationship and the operation principle between each device and other devices in the interface circuit, reference may be made to the foregoing description, and details are not repeated here.
In this embodiment, because the interface circuit on the current mainboard increases drive circuit on the basis of the interface circuit of original mainboard, make the interface circuit on the mainboard can be compatible possess the data processing chip place display card and the signal transmission between the mainboard that different grade type or different manufacturers produced, and owing to still need not to change the circuit design that original data processing chip place display card corresponds the mainboard, and dismantle the circuit device of mainboard, the cost of manufacture and the later maintenance cost of mainboard have been reduced, very big improvement the utilization ratio of this mainboard.
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the present application. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present application shall be subject to the appended claims.
Claims (10)
1. An interface circuit, characterized in that the interface circuit comprises a driving circuit; the driving circuit is respectively connected with the display card and the capacitor, the capacitor is connected with the data transmission interface, and the display card comprises a data processing chip;
the driving circuit is used for providing a driving signal for an output signal of the data processing chip to generate a fluctuation signal, so that the fluctuation signal passes through the capacitor and then is output to the data transmission interface.
2. The circuit of claim 1, wherein the drive circuit comprises a signal generator and a resistor; the signal generator is connected with one end of the resistor, and the other end of the resistor is connected with a common end between the display card and the capacitor;
the signal generator is used for generating the driving signal and generating the fluctuation signal with the output signal of the data processing chip after the driving signal passes through the resistor.
3. The circuit of claim 2, wherein the resistance comprises a first resistance and a second resistance; the signal generator is respectively connected with one end of the first resistor and one end of the second resistor, the other end of the first resistor is connected with a common end between the first output end of the display card and the capacitor, and the other end of the second resistor is connected with a common end between the second output end of the display card and the capacitor;
the signal generator is used for enabling the driving signal to pass through the first resistor and then generate a first fluctuation signal with a first output signal of a first output end of the display card; and generating a second fluctuation signal by the driving signal and a second output signal of a second output end of the display card after passing through the second resistor.
4. The circuit according to claim 3, wherein the capacitor comprises a first capacitor and a second capacitor, one end of the first capacitor is connected to the other end of the first resistor and the first output end of the graphics card, and the second end of the first capacitor is connected to the data transmission interface;
one end of the second capacitor is connected with the other end of the second resistor and the second output end of the display card respectively, and the second end of the second capacitor is connected with the data transmission interface.
5. The circuit according to any one of claims 2-4, wherein the driving signal is a voltage signal with a preset voltage value.
6. The circuit of any of claims 1-4, wherein the at least two types of data processing chips comprise AMD GPU chips and JM GPU chips.
7. The circuit of any one of claims 2-4, wherein the signal generator is coupled to the data processing chip, and the signal generator is configured to obtain a source signal from the data processing chip and generate the driving signal according to the source signal.
8. The circuit of any of claims 1-4, wherein the data transmission interface is a high definition multimedia HMDI interface.
9. The circuit according to any one of claims 1 to 4, wherein the output signal of the data processing chip is a video interface signal or a high definition multimedia interface signal.
10. A motherboard, characterized in that the motherboard comprises an interface circuit according to any of claims 1-9.
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| CN202111659600.5A CN114461555A (en) | 2021-12-30 | 2021-12-30 | Interface circuit and mainboard |
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| CN202111659600.5A CN114461555A (en) | 2021-12-30 | 2021-12-30 | Interface circuit and mainboard |
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