CN114429745A - Display panel and writing method of display panel - Google Patents

Display panel and writing method of display panel Download PDF

Info

Publication number
CN114429745A
CN114429745A CN202111422105.2A CN202111422105A CN114429745A CN 114429745 A CN114429745 A CN 114429745A CN 202111422105 A CN202111422105 A CN 202111422105A CN 114429745 A CN114429745 A CN 114429745A
Authority
CN
China
Prior art keywords
circuit
voltage value
gamma voltage
display panel
control circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202111422105.2A
Other languages
Chinese (zh)
Inventor
唐莉
郑浩旋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HKC Co Ltd
Chongqing HKC Optoelectronics Technology Co Ltd
Original Assignee
HKC Co Ltd
Chongqing HKC Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by HKC Co Ltd, Chongqing HKC Optoelectronics Technology Co Ltd filed Critical HKC Co Ltd
Priority to CN202111422105.2A priority Critical patent/CN114429745A/en
Publication of CN114429745A publication Critical patent/CN114429745A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264Details of driving circuits
    • G09G2310/0291Details of output amplifiers or buffers arranged for use in a driving circuit

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The application provides a display panel and a writing method of the display panel, wherein the display panel comprises: the power management circuit comprises a driving circuit and a master control circuit, and the master control circuit is connected with the driving circuit; the power management circuit further comprises a control circuit, wherein the driving circuit comprises a nonvolatile memory and a buffer, and the nonvolatile memory stores a first gamma voltage value of the display panel; the control circuit is connected with the driving circuit, and when the driving circuit is controlled to be in a first state, the second gamma voltage value acquired by the main control unit is stored in the buffer so as to protect the first gamma voltage value from being rewritten. When the display panel is used for eliminating brightness deviation, the problem of gamma data change on the jig plate can be solved. The guarantee is done at every turn and is eliminated the luminance deviation, and the gamma value on the tool board is all unchangeable, and the effectual condition of producing the line tool and being difficult to the management and control of having avoided.

Description

Display panel and writing method of display panel
Technical Field
The present disclosure relates to the field of display technologies, and in particular, to a display panel and a writing method for the display panel.
Background
Generally, each piece of glass cannot be completely consistent due to the manufacturing process, and the brightness deviation (mura) phenomenon is also not completely consistent. Therefore, the auto-gamma and demura compensation data are both delivered following the glass end, so that the panel manufacturer can eliminate the brightness deviation, i.e. demura compensation, and eliminate the dark clusters caused by backlight non-uniformity, charging non-uniformity, etc. demura compensation is a method for compensating brightness deviation (mura) generated by panel mechanism/process, etc., so that the picture becomes more uniform.
When demura compensation is performed, demura compensation data and auto-gamma data of each piece of glass need to be placed on a product to be provided for a customer, and in the process of demura compensation, the gamma data on the jig plate can be changed after once demura compensation is performed, so that next demura compensation is influenced.
Disclosure of Invention
The application provides a display panel and a writing method of the display panel, wherein the display panel can solve the problem of gamma data change on a jig plate when brightness deviation is eliminated.
In order to solve the above technical problem, a first technical solution provided by the present application is: provided is a display panel including: the power management circuit comprises a driving circuit and a master control circuit, wherein the master control circuit is connected with the driving circuit; the power management circuit further comprises: a control circuit; the driving circuit comprises a nonvolatile memory and a buffer, wherein the nonvolatile memory stores a first gamma voltage value of the display panel; the control circuit is connected with the driving circuit, and when the driving circuit is controlled to be in a first state, the control circuit stores the second gamma voltage value acquired by the main control unit into the buffer so as to protect the first gamma voltage value from being rewritten.
The power management circuit comprises a driving circuit, a main control circuit and a control circuit, wherein the driving circuit comprises a nonvolatile memory and a buffer, and the main control circuit is connected with the driving circuit; the non-volatile memory stores a first gamma voltage value of the display panel; the control circuit is connected with the driving circuit, and when the driving circuit is controlled to be in a first state, the second gamma voltage value acquired by the main control unit is stored in the buffer so as to protect the first gamma voltage value from being rewritten.
The control circuit controls the driving circuit to receive the low voltage signal, so that the nonvolatile memory is in a write protection state, and the first gamma voltage value is protected from being rewritten.
Wherein, the control circuit includes: one end of the pull-down circuit is connected with the drive circuit and the external control power supply, and the other end of the pull-down circuit is connected with the ground voltage end; and the first switch circuit is connected between the pull-down circuit and the ground voltage end, controls the connection and disconnection between the pull-down circuit and the ground voltage end, and is switched on when the first switch circuit is closed, so that the drive circuit is in a first state.
Wherein, control circuit still includes: one end of the pull-up circuit is connected with an external control power supply, and the other end of the pull-up circuit is connected with the drive circuit and one end of the pull-down circuit; the second switch circuit is connected between the pull-up circuit and the drive circuit and controls the connection and disconnection of the pull-up circuit and the drive circuit, and when the second switch circuit is closed, the pull-up circuit is connected and the drive circuit is in a second state; when the driving circuit is in the second state, the main control circuit writes the first gamma voltage value into the nonvolatile memory.
Wherein, the display panel still includes: and the code memory comprises a flash memory unit, the flash memory unit is connected with the main control circuit, and the main control circuit acquires a second gamma voltage value from the flash memory unit.
Wherein, the display panel also comprises a logic connector; the logic connector is connected with the code memory and the power management circuit.
In order to solve the above technical problem, a first technical solution provided by the present application is: the writing method of the display panel is provided, the display panel comprises a power management circuit, the power management circuit comprises a driving circuit, a main control circuit and a control circuit, the driving circuit comprises a nonvolatile memory and a buffer, and the main control circuit is connected with the driving circuit; the writing method comprises the following steps: storing the first gamma voltage value into a non-volatile memory; the driving circuit is controlled to be in a first state through the control circuit, and the second gamma voltage value acquired by the main control unit is stored in the buffer based on the first state so as to protect the first gamma voltage value from being rewritten.
Wherein, the step of controlling the drive circuit to be in the first state through the control circuit comprises: and inputting a low-voltage signal to the driving circuit through the control circuit, controlling the driving circuit to be in a first state, and controlling the nonvolatile memory to be in a write protection state.
The step of storing the second gamma voltage value acquired by the main control unit into the buffer based on the first state includes: and storing the second gamma voltage value into the buffer in response to the difference value between the second gamma voltage value and the first gamma voltage value being less than a preset value.
Wherein the step of storing the first gamma voltage value into the non-volatile memory comprises: the driving circuit is controlled to be in a second state by the control circuit, and the first gamma voltage value is stored in the nonvolatile memory based on the second state.
The power management circuit has the beneficial effects that the power management circuit is different from the prior art, and comprises a driving circuit, a main control circuit and a control circuit, wherein the driving circuit comprises a nonvolatile memory and a buffer, and the main control circuit is connected with the driving circuit; the non-volatile memory stores a first gamma voltage value of the display panel; the control circuit is connected with the driving circuit, and when the driving circuit is controlled to be in a first state, the second gamma voltage value acquired by the main control unit is stored in the buffer so as to protect the first gamma voltage value from being rewritten. When the display panel is used for eliminating brightness deviation, the problem of gamma data change on the jig plate can be solved. The guarantee is done at every turn and is eliminated the luminance deviation, and the gamma value on the tool board is all unchangeable, and the effectual condition of producing the line tool and being difficult to the management and control of having avoided.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, it is obvious that the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without inventive efforts, wherein:
fig. 1 is a schematic structural diagram of a display panel according to a first embodiment of the present application;
FIG. 2 is a schematic diagram of an embodiment of the control circuit of FIG. 1;
FIG. 3 is a schematic diagram of another embodiment of the control circuit of FIG. 1;
fig. 4 is a schematic structural diagram of a display panel according to a second embodiment of the present application;
FIG. 5 is a flowchart illustrating a writing method of a display panel according to a third embodiment of the present application;
1: power management circuit, 11: drive circuit, 12: control circuit, 13: master control circuit, 21: nonvolatile memory, 22: buffer, 121: pull-down circuit, 122: first switching circuit, 123: pull-up circuit, 124: second switching circuit, 2: code memory, 20: flash memory cell, 3: a logical connector.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Example one
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present disclosure. The display panel of the present application includes a power management circuit 1, and the power management circuit 1 includes a driving circuit 11, a main control circuit 13, and a control circuit 12. The main control circuit 13 is connected to the driving circuit 11, and the control circuit 12 is connected to the driving circuit 11.
The drive circuit 11 includes a nonvolatile memory 21 and a buffer 22. The nonvolatile memory 21 stores a first gamma voltage value of the display panel. When the control circuit 12 controls the driving circuit 11 to be in the first state, the second gamma voltage value acquired by the main control circuit 3 is stored in the buffer 22.
Further, the control circuit 12 controls the driving circuit 11 to receive the low level signal, so that the nonvolatile memory 21 in the driving circuit 11 is in a write-protected state, and the first gamma voltage value stored in the nonvolatile memory 21 is protected from being rewritten.
In the application, the first gamma voltage value is stored in the nonvolatile memory 21, the second gamma voltage value is stored in the buffer 22, the buffer 22 has the characteristic of data loss after power failure, and the nonvolatile memory 21 has the characteristic of no loss after power failure, and the application sets the write protection of the nonvolatile memory 21, when the second gamma voltage value is written in the buffer 22, the write protection of the nonvolatile memory 21 is started, the second gamma voltage value is prevented from being written in the nonvolatile memory 21, and the first gamma voltage value stored in the nonvolatile memory 21 is ensured not to be rewritten. Therefore, the brightness deviation can be eliminated each time, the consistency of the gamma voltage on the jig plate (namely, the power management circuit) can be ensured, the brightness deviation can be eliminated each time, the gamma voltage on the jig plate (namely, the power management circuit) is stored in the nonvolatile memory 21, and the condition that the production line jig is difficult to control is effectively avoided. It should be noted that demura compensation, i.e. the elimination of the brightness deviation, is a method for compensating the brightness deviation (mura) generated by the panel mechanism/process, etc., so that the picture becomes more uniform.
Referring to fig. 2, a schematic structural diagram of an embodiment of a control circuit of a display panel according to the present application is shown, in which the control circuit 12 includes: a pull-down circuit 121 and a first switch circuit 122. One end of the pull-down circuit 121 is connected to the driving circuit 11 and the external control power VCC, and the other end of the pull-down circuit 121 is connected to the ground voltage terminal GND. The first switch circuit 122 is connected between the pull-down circuit and the ground voltage terminal GND. The first switch circuit 122 controls on and off between the pull-down circuit 121 and the ground voltage GND, and when the first switch circuit 122 is closed, the pull-down circuit 121 is turned on, and at this time, the driving circuit 11 is in the first state. Specifically, when the pull-down circuit 121 is turned on, the voltage at the B port of the driving circuit 11 is pulled down, that is, the B port receives a low voltage signal.
In this application, when the pull-down circuit 121 is turned on, the B port of the driving circuit 11 receives the low voltage signal, and the nonvolatile memory 21 is in a write-protected state, and at this time, the main control circuit 13 writes the acquired second gamma voltage value into the buffer 22, so as to prevent the first gamma voltage value stored in the nonvolatile memory 21 from being overwritten. Therefore, the brightness deviation can be eliminated each time, the consistency of the gamma voltage on the jig plate (namely, the power management circuit) can be ensured, the brightness deviation can be eliminated each time, the gamma voltage on the jig plate (namely, the power management circuit) is stored in the nonvolatile memory 21, and the condition that the production line jig is difficult to control is effectively avoided.
Referring to fig. 3, a schematic structural diagram of another embodiment of a control circuit of a display panel of the present application is shown, and compared with the embodiment shown in fig. 2, the difference is that in this embodiment, the control circuit 12 further includes: a pull-up circuit 123 and a second switching circuit 124. One end of the pull-up circuit 123 is connected to the external control power VCC, and the other end is connected to the driving circuit 11 and one end of the pull-down circuit 121. The second switch circuit 124 is connected between the pull-up circuit 123 and the drive circuit 11, and controls on and off of the pull-up circuit 123 and the drive circuit 11. When the second switch circuit 124 is closed, the pull-up circuit 123 is turned on, and the drive circuit 11 is in the second state.
Specifically, in this embodiment, when the driving circuit 11 is in the second state, the main control circuit 13 writes the first gamma voltage value into the nonvolatile memory 21. It can be understood that, when the pull-up circuit 123 is turned on, the voltage at the B port of the driving circuit 11 is pulled up by the external control power VCC, that is, the B port of the driving circuit 11 receives a high voltage signal, the nonvolatile memory 21 is not in the write-protection state, and the first gamma voltage value is written into the nonvolatile memory 21.
It is understood that after the non-volatile memory 21 is controlled not to be in the write-protected state and the first gamma voltage value is written into the non-volatile memory 21, the non-volatile memory 21 is controlled to be in the write-protected state to avoid overwriting the first gamma voltage value. Therefore, the brightness deviation can be eliminated each time, the consistency of the gamma voltage on the jig plate (namely, the power management circuit) can be ensured, the brightness deviation can be eliminated each time, the gamma voltage on the jig plate (namely, the power management circuit) is stored in the nonvolatile memory 21, and the condition that the production line jig is difficult to control is effectively avoided.
Example two:
referring to fig. 4, a schematic structural diagram of a display panel according to a second embodiment of the present disclosure is shown, and compared with the embodiment shown in fig. 1, the difference is that the present embodiment further includes a code memory 2 and a logic connector 3 for connecting the code memory and the power management circuit 1.
The code memory 2 includes a flash memory unit 20, and the flash memory unit 20 is connected to the main control circuit 13. Specifically, the flash memory unit 20 is connected to the main control circuit 13 through the logic connector 3. The main control circuit 13 obtains the second gamma voltage value from the flash memory unit 20 and writes the second gamma voltage value into the buffer 22.
The logic connector 3 is connected to the code memory 2 and the power management circuit 1. In one embodiment, the code memory 2 is provided with a connector M, the power management circuit 1 is provided with a connector N, and the logic connector 3 connects the connector M with the connector N, thereby connecting the code memory 2 with the power management circuit 1. As shown in fig. 4, the flash memory unit 20 is connected to the connector M, and the main control circuit 13 is connected to the connector N, so that the flash memory unit 20 is connected to the main control circuit 13 through the logic connector 3.
In the present application, when the pull-up circuit 123 is turned on, the B port of the driving circuit 11 receives a high voltage signal, and the nonvolatile memory 21 is not in the write-protected state, and the main control circuit 13 writes the first gamma voltage value of the display panel into the nonvolatile memory 21. Then, the pull-down circuit 121 is switched to be turned on, when the pull-down circuit 121 is turned on, the B port of the driving circuit 11 receives a low voltage signal, and at this time, the nonvolatile memory 21 is in a write-protected state, the main control circuit 13 obtains the second gamma voltage value from the flash memory unit 20, and writes the second gamma voltage value into the buffer 22, so as to prevent the second gamma voltage value from overwriting the first gamma voltage value, and further prevent the first gamma voltage value from being overwritten. Therefore, the brightness deviation can be eliminated each time, the consistency of the gamma voltage on the jig plate (namely, the power management circuit) can be ensured, the brightness deviation can be eliminated each time, the gamma voltage on the jig plate (namely, the power management circuit) is stored in the nonvolatile memory 21, and the condition that the production line jig is difficult to control is effectively avoided.
In another embodiment of the present application, the power management circuit 1 further includes an I2C circuit, the main control circuit 13 obtains the second gamma voltage value from the flash memory unit 20, converts the second gamma voltage value by using the I2C circuit, calculates a CRC value of the second gamma voltage value, compares the CRC value with a CRC value corresponding to the first gamma voltage value written in the nonvolatile memory 21, and writes the CRC value of the second gamma voltage value and the second gamma voltage value into the buffer 22 when a difference between the CRC value of the second gamma voltage value and the CRC value corresponding to the first gamma voltage value is smaller than a preset value.
It should be noted that the driving circuit 11 of the present application uses a chip that combines functions of a power chip (power IC), a gamma chip (gamma IC), and a level shifter IC, so that cost can be saved.
Fig. 5 is a schematic flow chart of a writing method of a display panel according to a third embodiment of the present application, which includes:
step S51: the first gamma voltage value is stored into a non-volatile memory.
Step S52: the driving circuit is controlled to be in a first state through the control circuit, and the second gamma voltage value acquired by the main control unit is stored in the buffer based on the first state so as to protect the first gamma voltage value from being rewritten.
The writing method of the present embodiment is performed based on the display panel of any one of the embodiments of fig. 1 to 4. Specifically, the display panel includes a power management circuit 1, and the power management circuit 1 includes a driving circuit 11, a main control circuit 13, and a control circuit 12. The main control circuit 13 is connected to the driving circuit 11, and the control circuit 12 is connected to the driving circuit 11.
The drive circuit 11 includes a nonvolatile memory 21 and a buffer 22. The nonvolatile memory 21 stores a first gamma voltage value of the display panel. When the control circuit 12 controls the driving circuit 11 to be in the first state, the second gamma voltage value acquired by the main control circuit 13 is stored in the buffer 22.
Further, the control circuit 12 controls the driving circuit 11 to receive the low level signal, so that the nonvolatile memory 21 in the driving circuit 11 is in a write-protected state, and the first gamma voltage value stored in the nonvolatile memory 21 is protected from being rewritten.
In the application, the first gamma voltage value is stored in the nonvolatile memory 21, the second gamma voltage value is stored in the buffer 22, the buffer 22 has the characteristic of data loss after power failure, and the nonvolatile memory 21 has the characteristic of no loss after power failure, and the application sets the write protection of the nonvolatile memory 21, when the second gamma voltage value is written in the buffer 22, the write protection of the nonvolatile memory 21 is started, the second gamma voltage value is prevented from being written in the nonvolatile memory 21, and the first gamma voltage value stored in the nonvolatile memory 21 is ensured not to be rewritten. Therefore, the brightness deviation can be eliminated each time, the consistency of the gamma voltage on the jig plate (namely, the power management circuit) can be ensured, the brightness deviation can be eliminated each time, the gamma voltage on the jig plate (namely, the power management circuit) is stored in the nonvolatile memory 21, and the condition that the production line jig is difficult to control is effectively avoided.
In one embodiment, the step of controlling the driving circuit to be in the first state by the control circuit includes: and inputting a low-voltage signal to the driving circuit through the control circuit, controlling the driving circuit to be in a first state, and controlling the nonvolatile memory to be in a write protection state.
Specifically, the control circuit 12 includes: a pull-down circuit 121 and a first switch circuit 122. One end of the pull-down circuit 121 is connected to the driving circuit 11 and the external control power VCC, and the other end of the pull-down circuit 121 is connected to the ground voltage terminal GND. The first switch circuit 122 is connected between the pull-down circuit and the ground voltage terminal GND. The first switch circuit 122 controls on and off between the pull-down circuit 121 and the ground voltage terminal GND, and when the first switch circuit 122 is turned on, the pull-down circuit 121 is turned on, and at this time, the driving circuit 11 is in the first state. Specifically, when the pull-down circuit 121 is turned on, the voltage at the B port of the driving circuit 11 is pulled down, that is, the B port receives a low voltage signal.
In the present application, when the pull-down circuit 121 is turned on, the B port of the driving circuit 11 receives the low voltage signal, and the nonvolatile memory 21 is in a write-protected state, and at this time, the main control circuit 13 writes the acquired second gamma voltage value into the buffer 22, so as to prevent the first gamma voltage value stored in the nonvolatile memory 21 from being rewritten.
In one embodiment, the step of storing the first gamma voltage value in the non-volatile memory comprises: the driving circuit is controlled to be in a second state by the control circuit, and the first gamma voltage value is stored in the nonvolatile memory based on the second state.
Specifically, the control circuit 12 further includes: a pull-up circuit 123 and a second switching circuit 124. One end of the pull-up circuit 123 is connected to the external control power VCC, and the other end is connected to the driving circuit 11 and one end of the pull-down circuit 121. The second switch circuit 124 is connected between the pull-up circuit 123 and the drive circuit 11, and controls on and off of the pull-up circuit 123 and the drive circuit 11. When the second switch circuit 124 is closed, the pull-up circuit 123 is turned on, and the drive circuit 11 is in the second state.
Specifically, in the embodiment, when the driving circuit 11 is in the second state, the main control circuit 13 writes the first gamma voltage value into the nonvolatile memory 21. It can be understood that, when the pull-up circuit 123 is turned on, the voltage at the B port of the driving circuit 11 is pulled up by the external control power VCC, that is, the B port of the driving circuit 11 receives a high voltage signal, the nonvolatile memory 21 is not in the write-protection state, and the first gamma voltage value is written into the nonvolatile memory 21.
It is understood that after the non-volatile memory 21 is controlled not to be in the write-protected state and the first gamma voltage value is written into the non-volatile memory 21, the non-volatile memory 21 is controlled to be in the write-protected state to prevent the first gamma voltage value from being rewritten.
In one embodiment, the second gamma voltage value is further compared with the first gamma voltage value, and when the difference between the second gamma voltage value and the first gamma voltage value is smaller than a preset value, the second gamma voltage value is stored in the buffer.
Specifically, the power management circuit 1 further includes an I2C circuit, the main control circuit 13 obtains the second gamma voltage value from the flash memory unit 20, converts the second gamma voltage value by using the I2C circuit, calculates a CRC value of the second gamma voltage value, compares the CRC value with a CRC value corresponding to the first gamma voltage value written in the nonvolatile memory 21, and writes the CRC value of the second gamma voltage value and the second gamma voltage value into the buffer 22 when a difference between the CRC value of the second gamma voltage value and the CRC value corresponding to the first gamma voltage value is smaller than a predetermined value.
It should be noted that the driving circuit 11 of the present application uses a chip that combines functions of a power chip (power IC), a gamma chip (gamma IC), and a level shifter IC, so that cost can be saved.
The above embodiments are merely examples and are not intended to limit the scope of the present disclosure, and all modifications, equivalents, and flow charts using the contents of the specification and drawings of the present disclosure or those directly or indirectly applied to other related technical fields are intended to be included in the scope of the present disclosure.

Claims (10)

1. A display panel comprises a power management circuit, wherein the power management circuit comprises a driving circuit and a main control circuit, and the main control circuit is connected with the driving circuit; characterized in that, the power management circuit further comprises: a control circuit;
the driving circuit comprises a nonvolatile memory and a buffer, wherein the nonvolatile memory stores a first gamma voltage value of the display panel;
the control circuit is connected with the driving circuit, and when the driving circuit is controlled to be in a first state, the control circuit stores the second gamma voltage value acquired by the main control unit into the buffer so as to protect the first gamma voltage value from being rewritten.
2. The display panel according to claim 1, wherein the control circuit controls the driving circuit to receive a low voltage signal to make the nonvolatile memory in a write-protected state, thereby protecting the first gamma voltage value from being rewritten.
3. The display panel according to claim 1 or 2, wherein the control circuit comprises:
one end of the pull-down circuit is connected with the drive circuit and an external control power supply, and the other end of the pull-down circuit is connected with a ground voltage end;
the first switch circuit is connected between the pull-down circuit and a ground voltage end, the connection and disconnection between the pull-down circuit and the ground voltage end are controlled, in addition, when the first switch circuit is closed, the pull-down circuit is connected, and the driving circuit is in the first state.
4. The display panel according to claim 3, wherein the control circuit further comprises:
one end of the pull-up circuit is connected with the external control power supply, and the other end of the pull-up circuit is connected with the driving circuit and one end of the pull-down circuit;
the second switch circuit is connected between the pull-up circuit and the drive circuit and controls the connection and disconnection of the pull-up circuit and the drive circuit, and when the second switch circuit is closed, the pull-up circuit is connected and the drive circuit is in a second state;
when the driving circuit is in a second state, the main control circuit writes the first gamma voltage value into the nonvolatile memory.
5. The display panel according to claim 1, characterized in that the display panel further comprises:
a code memory including a flash memory cell connected with the main control circuit,
the main control circuit obtains the second gamma voltage value from the flash memory unit.
6. The display panel of claim 5, wherein the display panel further comprises a logical connector;
the logic connector is connected with the code memory and the power management circuit.
7. The writing method of the display panel is characterized in that the display panel comprises a power management circuit, the power management circuit comprises a driving circuit, a main control circuit and a control circuit, the driving circuit comprises a nonvolatile memory and a buffer, and the main control circuit is connected with the driving circuit; the writing method comprises the following steps:
storing a first gamma voltage value into the non-volatile memory;
the driving circuit is controlled to be in a first state through the control circuit, and a second gamma voltage value acquired by the main control unit is stored in the buffer based on the first state so as to protect the first gamma voltage value from being rewritten.
8. The writing method according to claim 7, wherein the step of controlling the driving circuit in the first state by the control circuit comprises:
and inputting a low-voltage signal to the driving circuit through the control circuit, controlling the driving circuit to be in a first state, and controlling the nonvolatile memory to be in a write protection state.
9. The writing method according to claim 7, wherein the step of storing the second gamma voltage value obtained by the main control unit into the buffer based on the first status comprises:
and storing the second gamma voltage value into the buffer in response to the difference value between the second gamma voltage value and the first gamma voltage value being less than a preset value.
10. The writing method according to claim 7, wherein the step of storing the first gamma voltage value in the non-volatile memory comprises:
controlling, by the control circuit, the drive circuit to be in a second state, the first gamma voltage value being stored into the non-volatile memory based on the second state.
CN202111422105.2A 2021-11-26 2021-11-26 Display panel and writing method of display panel Pending CN114429745A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202111422105.2A CN114429745A (en) 2021-11-26 2021-11-26 Display panel and writing method of display panel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111422105.2A CN114429745A (en) 2021-11-26 2021-11-26 Display panel and writing method of display panel

Publications (1)

Publication Number Publication Date
CN114429745A true CN114429745A (en) 2022-05-03

Family

ID=81312153

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111422105.2A Pending CN114429745A (en) 2021-11-26 2021-11-26 Display panel and writing method of display panel

Country Status (1)

Country Link
CN (1) CN114429745A (en)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003005736A (en) * 2001-06-20 2003-01-08 Nec Viewtechnology Ltd Video display device
JP2004153531A (en) * 2002-10-30 2004-05-27 Sanyo Electric Co Ltd Display device and liquid crystal projector
US20070013725A1 (en) * 2005-07-18 2007-01-18 Dialog Semiconductor Gmbh Gamma curve correction for TN and TFT display modules
CN101276561A (en) * 2007-03-28 2008-10-01 冲电气工业株式会社 Gamma corrector
CN104299556A (en) * 2014-10-13 2015-01-21 深圳市华星光电技术有限公司 Driving circuit and display device
CN111105743A (en) * 2019-12-23 2020-05-05 Tcl华星光电技术有限公司 Control circuit and control method of display panel and display device

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003005736A (en) * 2001-06-20 2003-01-08 Nec Viewtechnology Ltd Video display device
JP2004153531A (en) * 2002-10-30 2004-05-27 Sanyo Electric Co Ltd Display device and liquid crystal projector
US20070013725A1 (en) * 2005-07-18 2007-01-18 Dialog Semiconductor Gmbh Gamma curve correction for TN and TFT display modules
CN101276561A (en) * 2007-03-28 2008-10-01 冲电气工业株式会社 Gamma corrector
CN104299556A (en) * 2014-10-13 2015-01-21 深圳市华星光电技术有限公司 Driving circuit and display device
CN111105743A (en) * 2019-12-23 2020-05-05 Tcl华星光电技术有限公司 Control circuit and control method of display panel and display device

Similar Documents

Publication Publication Date Title
JP4825658B2 (en) Liquid crystal display device and driving method thereof
US20060044295A1 (en) Timing controller for flat panel display
US10262742B2 (en) Memory protection circuit and liquid crystal display including same
US7586475B2 (en) Circuit for driving liquid crystal display device
JP2006178403A (en) Display unit
US8244925B2 (en) Circuit board and liquid crystal display includes changing EDID information
CN109272956B (en) Protection circuit of memory cell in display panel and display device
CN109979411B (en) Display panel, burning method and electrifying method of display panel
CN110428767B (en) Driving circuit of display panel and display device
US20060079120A1 (en) Interface and control devices for display apparatus and integrated circuit chip having the same
US11386943B2 (en) Write protection circuit for memory and display apparatus
CN109493894A (en) Protection circuit, display panel and the display device of storage unit in display panel
CN111833797A (en) Time sequence control plate, driving device and display device
CN114429745A (en) Display panel and writing method of display panel
CN109446851B (en) Method for protecting data in display panel and display device thereof
CN111477154B (en) Communication structure of display panel and display panel
CN103345896A (en) Gamma correction buffer circuit, display device and anti-interference method
US20090213129A1 (en) Storage Unit and Storage Module for Storing EDID
CN102243890A (en) Read-write protection circuit
US20070236503A1 (en) Digital visual interface apparatus
KR102438484B1 (en) Write protection circuit, display device including the same, and their driving method
EP1944685A2 (en) Display apparatus and control method thereof
CN109658898B (en) Circuit and method for preventing error of read data and display device
CN110827725A (en) Detection system, method for performing multiple programming in detection system and display device
US20220293032A1 (en) Display driving system and electronic equipment

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination