CN114422290A - Data transmission device and communication system - Google Patents
Data transmission device and communication system Download PDFInfo
- Publication number
- CN114422290A CN114422290A CN202210071872.1A CN202210071872A CN114422290A CN 114422290 A CN114422290 A CN 114422290A CN 202210071872 A CN202210071872 A CN 202210071872A CN 114422290 A CN114422290 A CN 114422290A
- Authority
- CN
- China
- Prior art keywords
- data transmission
- data
- master device
- transmission mode
- cache
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005540 biological transmission Effects 0.000 title claims abstract description 101
- 238000004891 communication Methods 0.000 title claims abstract description 69
- 230000002093 peripheral effect Effects 0.000 claims abstract description 37
- 238000013461 design Methods 0.000 abstract description 11
- 238000000034 method Methods 0.000 description 8
- 238000011161 development Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000003139 buffering effect Effects 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000002054 transplantation Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
- H04L12/40019—Details regarding a bus master
Abstract
The invention discloses a data transmission device and a communication system, wherein a data transmission device is used for connecting a master device and a plurality of slave devices, the master device is only required to be provided with a peripheral bus and a communication port to be connected with the data transmission device, the data transmission device is also provided with a plurality of communication ports to be connected with the slave devices, one-to-many communication between the master device and the plurality of slave devices can be realized under the condition of not increasing the hardware design of a peripheral circuit, the pin resource of the master device is saved, and the complexity of the hardware circuit design is reduced.
Description
Technical Field
The present invention relates to the field of communications technologies, and in particular, to a data transmission device and a communication system.
Background
At present, with the continuous development of the communication field, more and more devices need to be connected into a network, and the communication demand between the devices is higher and higher, for example, the demand of one-to-many communication in the fields of servers, home appliance control, automation device control, and the like is more and more common.
Disclosure of Invention
The invention aims to provide a data transmission device and a communication system, which can realize one-to-many communication between a master device and a plurality of slave devices under the condition of not increasing the hardware design of peripheral circuits, save the pin resources of the master device and reduce the complexity of the hardware circuit design.
In order to solve the above technical problem, the present invention provides a data transmission device, which includes an arbiter, a first communication port, a cache module, and N second communication ports, where N is an integer not less than 1; the first communication port is connected with a master device, the N second communication ports are connected with the N slave devices in a one-to-one correspondence mode, and the arbiter is connected with the master device through a peripheral bus;
the cache module is used for caching data to be transmitted between the main equipment and the target slave equipment;
the arbiter is configured to determine a data transmission mode and the target slave device according to a configuration instruction sent by the master device through the peripheral bus, acquire data from the cache module, and transmit the data between the master device and the target slave device according to the data transmission mode, where the data transmission mode includes a sending transmission mode and a receiving transmission mode.
Preferably, the device further comprises a clock count value generation module, and the configuration instruction further comprises a clock count value instruction;
the clock count value generation module is connected with the peripheral bus and is used for generating a corresponding clock count value according to a clock count value instruction sent by the master device through the peripheral bus;
acquiring data from the cache module and transmitting the data between the master device and the target slave device according to the data transmission mode, wherein the data transmission mode comprises the following steps:
and acquiring data from the cache module and transmitting the data between the master device and the target slave device according to the data transmission mode and the clock count value.
Preferably, the cache module includes a first sub-cache module and N second sub-cache modules, the first sub-cache module is connected to the first communication port and the arbiter, and each of the second sub-cache modules is connected to the arbiter and the corresponding second communication port.
Preferably, the data transmission module further includes:
and the N second communication port state modules are respectively connected with the N second sub-cache modules in a one-to-one correspondence manner and are used for acquiring cache space information of the N second sub-cache modules and sending the cache space information to the master equipment through the peripheral bus, so that the master equipment can judge whether to continue to communicate with corresponding slave equipment or not based on the cache space information.
Preferably, the data transmission device is an FPGA.
Preferably, the peripheral bus is an APB bus.
Preferably, when the data transmission mode is a transmission mode:
the cache module is used for caching the data to be transmitted, which is sent to the target slave equipment by the master equipment;
the arbiter is configured to determine a data transmission mode and the target slave device according to a configuration instruction sent by the master device through the peripheral bus, acquire data from the cache module, and transmit the data to the target slave device.
Preferably, when the data transmission mode is a reception transmission mode:
the cache module is used for caching the data to be transmitted, which is sent from the slave equipment to the master equipment;
the arbiter is configured to determine a data transmission mode and a target slave device according to a configuration instruction sent by the master device through the peripheral bus, acquire data of the target slave device from the cache module, and transmit the data of the target slave device to the master device.
In order to solve the above technical problem, the present invention further provides a communication system, including the data transmission apparatus, further including a master device and N slave devices, where the master device is connected to the first communication port of the data transmission apparatus, and the N slave devices are connected to the N second communication ports of the data transmission apparatus.
The invention provides a data transmission device and a communication system, wherein a data transmission device is used for connecting a master device and a plurality of slave devices, the master device is only required to be provided with a peripheral bus and a communication port for connecting with the data transmission device, the data transmission device is also provided with a plurality of communication ports for connecting with the slave devices, one-to-many communication between the master device and the plurality of slave devices can be realized under the condition of not increasing the hardware design of a peripheral circuit, the pin resource of the master device is saved, and the complexity of the hardware circuit design is reduced.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed in the prior art and the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a data transmission device according to the present invention.
Detailed Description
The core of the invention is to provide a data transmission device and a communication system, which can realize one-to-many communication between a master device and a plurality of slave devices under the condition of not increasing the hardware design of peripheral circuits, save the pin resources of the master device and reduce the hardware design.
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a data transmission device provided in the present invention, the data transmission device includes an arbiter 1, a first communication port 2, a cache module 3, and N second communication ports 4, where N is an integer not less than 1; the first communication port 1 is connected with a master device, the N second communication ports 4 are correspondingly connected with the N slave devices one by one, and the arbiter 1 is connected with the master device through a peripheral bus 5;
the cache module 3 is used for caching data to be transmitted between the master device and the target slave device;
the arbiter 1 is configured to determine a data transmission mode and a target slave device according to a configuration instruction sent by the master device through the peripheral bus 5, acquire data from the buffer module 3, and transmit the data between the master device and the target slave device according to the data transmission mode, where the data transmission mode includes a sending transmission mode and a receiving transmission mode.
In the prior art, with the continuous development of the communication field, more and more devices need to be connected into a network, and the one-to-many communication requirements in the fields of servers, home appliance control, automation device control and the like are more and more, whereas in the prior art, UARTs (universal Asynchronous Receiver/Transmitter ) are generally used to complete short-distance point-to-point communication, and a standard UART adopts a simple one-to-one communication mode.
In order to solve the problem, in this embodiment, a data transmission apparatus is provided to complete one-to-many communication between a master device and a plurality of slave devices, the master device is connected to a first communication port 2 on the data transmission apparatus, and each slave device is correspondingly connected to each second communication port 4, and in consideration of the data transmission process, a buffer needs to temporarily store data transmitted between the master device and the slave device, so that a buffer module 3 is further provided in the scheme, for buffering data to be transmitted between the master device and a target slave device.
Specifically, when the master device needs to perform data communication with the target slave device, a configuration instruction is sent through the peripheral bus 5, the configuration instruction includes information of a data transmission mode and the target slave device, the arbiter 1 in the data transmission apparatus can determine whether the master device currently wants to receive data or send data and the target slave device that the master device wants to communicate with according to the configuration instruction, and then the arbiter 1 can enable the master device and the target slave device to perform data transmission. Therefore, through the data transmission device, the master equipment can complete one-to-many communication between the master equipment and the slave equipment only by connecting one communication port and the peripheral bus with the data transmission device, so that the pin resources of the master equipment are saved, and the hardware design is reduced.
In summary, the present invention provides a data transmission apparatus and a communication system, wherein a data transmission apparatus is used to connect a master device and a plurality of slave devices, the master device only needs to be provided with a peripheral bus and a communication port to connect with the data transmission apparatus, the data transmission apparatus is also provided with a plurality of communication ports to connect with the slave devices, and one-to-many communication between the master device and the plurality of slave devices can be realized without increasing the hardware design of peripheral circuits, so that the pin resources of the master device are saved, and the complexity of the hardware circuit design is reduced.
On the basis of the above-described embodiment:
as a preferred embodiment, the apparatus further includes a clock count value generation module, and the configuration instruction further includes a clock count value instruction;
the clock count value generation module is connected with the peripheral bus 5 and is used for generating a corresponding clock count value according to a clock count value instruction sent by the main equipment through the peripheral bus 5;
the data is acquired from the cache module 3 and is transmitted between the master device and the target slave device according to the data transmission mode, and the data transmission method comprises the following steps:
and acquiring data from the buffer module 3 and transmitting the data between the master device and the target slave device according to the data transmission mode and the clock count value.
In this embodiment, in consideration of the fact that the data transmission baud rates of different slave devices are different, the scheme further includes a clock value generation module, the configuration instruction sent by the master device further includes a clock count value instruction, the clock count value instruction includes the baud rate and the clock frequency of the slave device that needs to communicate currently, a corresponding clock count value can be calculated according to the baud rate and the clock frequency, the clock count value module generates a corresponding clock count value after receiving the clock count value instruction sent by the master device, and then data transmission is performed according to the clock count value when the master device communicates with the target slave device, so that the master device can communicate with the slave devices with different baud rates.
It should be noted that the number of the clock value generation modules here may also be N, corresponding to N slave devices one to one, that is, each clock value generation module is only responsible for generating the clock count value of the corresponding slave device.
As a preferred embodiment, the cache module 3 includes a first sub-cache module and N second sub-cache modules, the first sub-cache module is respectively connected to the first communication port and the arbiter, and each second sub-cache module is respectively connected to the arbiter 1 and the corresponding second communication port 4.
In this embodiment, the cache module 3 includes a first sub-cache module and N second sub-cache modules, where the first sub-cache module is configured to cache data of the first communication port 2, and each of the second sub-cache modules is configured to cache data of the corresponding second communication port 4. Specifically, when the master device needs to send data to the target slave device, the data is cached in the first sub-cache module, after the arbiter 1 determines the target slave device, the data in the first sub-cache module is transmitted to the corresponding second sub-cache module, and then the slave device receives the data from the second sub-cache module; when the master device needs to receive data sent by the target slave device, the target slave device will send the data that needs to be sent to the master device to the corresponding second sub-cache module, after the arbiter 1 determines the target slave device that needs to receive data, the arbiter sends the data in the corresponding second sub-cache module to the first sub-cache module, and then the master device receives the data in the first sub-cache module. The feasibility of the scheme is improved.
As a preferred embodiment, the data transmission module further includes:
and the N second communication port state modules are respectively connected with the N second sub-cache modules in a one-to-one correspondence manner and are used for acquiring cache space information of the N second sub-cache modules and sending the cache space information to the main equipment through a peripheral bus, so that the main equipment judges whether to continue to communicate with corresponding slave equipment or not based on the cache space information.
In this embodiment, in consideration of different slave devices, the sending and receiving rates of the slave devices are different, so that there may be a situation that the second sub-cache module of the second communication port 4 of the slave device does not have a cache space in the data transmission process, and therefore the present solution further includes N second communication port state modules, which may monitor the cache space information in the N second sub-cache modules of the N second communication ports 4 in real time, where the cache space information may be a signal that indicates that the cache space is full, and when the master device receives the signal that indicates that the cache space is full, the master device does not continue to send data to the slave device, so as to prevent data loss and increase reliability of data transmission.
In a preferred embodiment, the data transmission device is an FPGA.
In the embodiment, the data transmission device can be an FPGA (field programmable gate array), the FPGA is an integrated circuit containing a programmable logic element, the flexibility is high, the maintenance is easy, and the transplantation is convenient.
In a preferred embodiment, the peripheral bus is an APB bus.
In this embodiment, the peripheral bus may be an APB bus, which has low power, low energy consumption, easy use, and a simple implementation manner of sending the configuration instruction through the APB bus.
As a preferred embodiment, when the data transmission mode is a transmission mode:
the cache module 3 is used for caching the data to be transmitted, which is sent to the target slave device by the master device;
the arbiter 1 is configured to determine a data transmission mode and a target slave device according to a configuration instruction sent by the master device through the peripheral bus 5, acquire data from the buffer module 3, and transmit the data to the target slave device.
In this embodiment, when the master device needs to send data to the target slave device, the master device will send the data to be transmitted to the cache module 3 first, and after determining the target slave device and the transmission mode according to the configuration instruction sent by the master device through the peripheral bus 5, the arbiter 1 will transmit the data in the cache module 3 to the corresponding target slave device, so that the implementation mode is simple.
As a preferred embodiment, when the data transmission mode is a reception transmission mode:
the cache module 3 is used for caching the data to be transmitted, which is sent from the slave device to the master device;
the arbiter 1 is configured to determine a data transmission method and a target slave device according to a configuration instruction sent by the master device through the peripheral bus 5, acquire data of the target slave device from the buffer module 3, and transmit the data of the target slave device to the master device.
In this embodiment, when the master device needs to receive data sent by the target slave device, the target slave device will send the data that needs to be sent to the master device to the cache module 3 first, after the master device sends a configuration instruction to the arbiter 1 through the peripheral bus 5, and after the arbiter 1 determines the target slave device and the transmission mode according to the configuration instruction, the data of the target slave device will be obtained from the cache module 3 and transmitted to the master device, so that the implementation mode is simple.
The invention also provides a communication system, which comprises the data transmission device, a main device and N auxiliary devices, wherein the main device is connected with the first communication port in the data transmission device, and the N auxiliary devices are connected with the N second communication ports in the data transmission device.
For the introduction of a communication system provided by the present invention, please refer to the above device embodiments, which are not described herein again.
It is further noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (9)
1. A data transmission device is characterized by comprising an arbiter, a first communication port, a cache module and N second communication ports, wherein N is an integer not less than 1; the first communication port is connected with a master device, the N second communication ports are connected with the N slave devices in a one-to-one correspondence mode, and the arbiter is connected with the master device through a peripheral bus;
the cache module is used for caching data to be transmitted between the main equipment and the target slave equipment;
the arbiter is configured to determine a data transmission mode and the target slave device according to a configuration instruction sent by the master device through the peripheral bus, acquire data from the cache module, and transmit the data between the master device and the target slave device according to the data transmission mode, where the data transmission mode includes a sending transmission mode and a receiving transmission mode.
2. The data transmission apparatus of claim 1, further comprising a clock count value generation module, the configuration instructions further comprising a clock count value instruction;
the clock count value generation module is connected with the peripheral bus and is used for generating a corresponding clock count value according to a clock count value instruction sent by the master device through the peripheral bus;
acquiring data from the cache module and transmitting the data between the master device and the target slave device according to the data transmission mode, wherein the data transmission mode comprises the following steps:
and acquiring data from the cache module and transmitting the data between the master device and the target slave device according to the data transmission mode and the clock count value.
3. The data transmission apparatus according to claim 1, wherein the cache module includes a first sub-cache module and N second sub-cache modules, the first sub-cache module is connected to the first communication port and the arbiter, respectively, and each of the second sub-cache modules is connected to the arbiter and a corresponding second communication port, respectively.
4. The data transmission apparatus of claim 3, wherein the data transmission module further comprises:
and the N second communication port state modules are respectively connected with the N second sub-cache modules in a one-to-one correspondence manner and are used for acquiring cache space information of the N second sub-cache modules and sending the cache space information to the master equipment through the peripheral bus, so that the master equipment can judge whether to continue to communicate with corresponding slave equipment or not based on the cache space information.
5. The data transmission device of claim 1, wherein the data transmission device is an FPGA.
6. The data transmission apparatus of claim 1, wherein the peripheral bus is an APB bus.
7. The data transmission apparatus according to any one of claims 1 to 6, wherein when the data transmission mode is a transmission mode:
the cache module is used for caching the data to be transmitted, which is sent to the target slave equipment by the master equipment;
the arbiter is configured to determine a data transmission mode and the target slave device according to a configuration instruction sent by the master device through the peripheral bus, acquire data from the cache module, and transmit the data to the target slave device.
8. The data transmission apparatus according to any one of claims 1 to 6, wherein when the data transmission mode is a reception transmission mode:
the cache module is used for caching the data to be transmitted, which is sent from the slave equipment to the master equipment;
the arbiter is configured to determine a data transmission mode and a target slave device according to a configuration instruction sent by the master device through the peripheral bus, acquire data of the target slave device from the cache module, and transmit the data of the target slave device to the master device.
9. A communication system comprising the data transmission apparatus according to claim 1, further comprising a master device and N slave devices, wherein the master device is connected to the first communication port of the data transmission apparatus, and the N slave devices are connected to the N second communication ports of the data transmission apparatus.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210071872.1A CN114422290A (en) | 2022-01-21 | 2022-01-21 | Data transmission device and communication system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210071872.1A CN114422290A (en) | 2022-01-21 | 2022-01-21 | Data transmission device and communication system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN114422290A true CN114422290A (en) | 2022-04-29 |
Family
ID=81275989
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210071872.1A Pending CN114422290A (en) | 2022-01-21 | 2022-01-21 | Data transmission device and communication system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114422290A (en) |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6857035B1 (en) * | 2001-09-13 | 2005-02-15 | Altera Corporation | Methods and apparatus for bus mastering and arbitration |
| CN101937412A (en) * | 2010-09-14 | 2011-01-05 | 硅谷数模半导体（北京）有限公司 | System on chip and access method thereof |
| CN106874237A (en) * | 2017-03-08 | 2017-06-20 | 上海冉能自动化科技有限公司 | Method of data synchronization and system based on two lines bus |
| CN110109847A (en) * | 2019-04-25 | 2019-08-09 | 深圳吉迪思电子科技有限公司 | Referee method, system and the storage medium of the multiple main equipments of APB bus |
| CN110795382A (en) * | 2019-10-09 | 2020-02-14 | 广东高云半导体科技股份有限公司 | Universal asynchronous receiving and transmitting transmitter based on FPGA and system on chip |
| CN112491672A (en) * | 2019-09-11 | 2021-03-12 | 杭州海康威视数字技术股份有限公司 | PCIE communication system, communication configuration parameter backup method and PCIE switch |
-
2022
- 2022-01-21 CN CN202210071872.1A patent/CN114422290A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6857035B1 (en) * | 2001-09-13 | 2005-02-15 | Altera Corporation | Methods and apparatus for bus mastering and arbitration |
| CN101937412A (en) * | 2010-09-14 | 2011-01-05 | 硅谷数模半导体（北京）有限公司 | System on chip and access method thereof |
| CN106874237A (en) * | 2017-03-08 | 2017-06-20 | 上海冉能自动化科技有限公司 | Method of data synchronization and system based on two lines bus |
| CN110109847A (en) * | 2019-04-25 | 2019-08-09 | 深圳吉迪思电子科技有限公司 | Referee method, system and the storage medium of the multiple main equipments of APB bus |
| CN112491672A (en) * | 2019-09-11 | 2021-03-12 | 杭州海康威视数字技术股份有限公司 | PCIE communication system, communication configuration parameter backup method and PCIE switch |
| CN110795382A (en) * | 2019-10-09 | 2020-02-14 | 广东高云半导体科技股份有限公司 | Universal asynchronous receiving and transmitting transmitter based on FPGA and system on chip |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103049414A (en) | Method for converting and transmitting data between FC (fiber channel) bus and CAN (controller area network) bus | |
| CN112269749A (en) | I2C communication system | |
| CN213814664U (en) | ARINC429 bus communication equipment based on optical fiber communication | |
| CN210578638U (en) | 5G customer premises equipment | |
| CN103885910B (en) | The method that many equipment carry out IIC communications under holotype | |
| CN114422290A (en) | Data transmission device and communication system | |
| CN218772141U (en) | Dual-processor circuit and control mainboard of distributed control system | |
| US20240104046A1 (en) | Spread spectrum clock negotiation method, and peripheral component interconnect express device and system | |
| CN110740085A (en) | communication method, communication device and terminal based on parallel operation system | |
| CN201966921U (en) | Network-managed type fiber optic transmitter | |
| CN102081383B (en) | Device and method for secure network protocol for field control | |
| CN110297795B (en) | System and method for realizing single-channel serial data transmission based on Ethernet PHY chip | |
| CN113111021A (en) | UART master-slave line communication control circuit and method | |
| CN210804414U (en) | Circuit with reusable communication interface | |
| CN113572629A (en) | Message transmission method, terminal and storage medium | |
| CN102244936A (en) | Method and system for sharing base station bandwidth by wireless access point (AP) | |
| CN111639043A (en) | Communication device | |
| CN111464799A (en) | Inter-plate image real-time transmission system based on optical fibers | |
| CN220210463U (en) | Asynchronous receiving and transmitting serial system and computer equipment | |
| CN105723670A (en) | Self-interference channel estimation method and device | |
| CN107528635B (en) | Communication device and method based on SFP optical module | |
| CN213072692U (en) | Integrated diagnosis and multiplexing serial communication master station management device | |
| CN116436970B (en) | Multi-client multi-serial communication method and system based on MQTT protocol | |
| CN110297790B (en) | System and method for realizing multi-channel serial data transmission based on Ethernet PHY chip | |
| CN108494889B (en) | Communication circuit based on I2C bus and debugging method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |